[ARM] ARMv6: add CPU_HAS_ASID configuration

Presently, we check for the minimum ARM architecture that we're
building for to determine whether we need ASID support. This is
wrong - if we're going to support a range of CPUs which include
ARMv6 or higher, we need the ASID.

Convert the checks to use a new configuration symbol, and arrange
for ARMv6 and higher CPU entries to select it.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

authored by Russell King and committed by Russell King 516793c6 c6af66b9

+12 -4
+1 -1
arch/arm/kernel/asm-offsets.c
··· 85 85 DEFINE(S_OLD_R0, offsetof(struct pt_regs, ARM_ORIG_r0)); 86 86 DEFINE(S_FRAME_SIZE, sizeof(struct pt_regs)); 87 87 BLANK(); 88 - #if __LINUX_ARM_ARCH__ >= 6 88 + #ifdef CONFIG_CPU_HAS_ASID 89 89 DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id)); 90 90 BLANK(); 91 91 #endif
+8
arch/arm/mm/Kconfig
··· 351 351 select CPU_CACHE_V6 352 352 select CPU_CACHE_VIPT 353 353 select CPU_CP15_MMU 354 + select CPU_HAS_ASID 354 355 select CPU_COPY_V6 if MMU 355 356 select CPU_TLB_V6 if MMU 356 357 ··· 377 376 select CPU_CACHE_V7 378 377 select CPU_CACHE_VIPT 379 378 select CPU_CP15_MMU 379 + select CPU_HAS_ASID 380 380 select CPU_COPY_V6 if MMU 381 381 select CPU_TLB_V6 if MMU 382 382 ··· 499 497 bool 500 498 501 499 endif 500 + 501 + config CPU_HAS_ASID 502 + bool 503 + help 504 + This indicates whether the CPU has the ASID register; used to 505 + tag TLB and possibly cache entries. 502 506 503 507 config CPU_CP15 504 508 bool
+2 -2
include/asm-arm/mmu.h
··· 4 4 #ifdef CONFIG_MMU 5 5 6 6 typedef struct { 7 - #if __LINUX_ARM_ARCH__ >= 6 7 + #ifdef CONFIG_CPU_HAS_ASID 8 8 unsigned int id; 9 9 #endif 10 10 unsigned int kvm_seq; 11 11 } mm_context_t; 12 12 13 - #if __LINUX_ARM_ARCH__ >= 6 13 + #ifdef CONFIG_CPU_HAS_ASID 14 14 #define ASID(mm) ((mm)->context.id & 255) 15 15 #else 16 16 #define ASID(mm) (0)
+1 -1
include/asm-arm/mmu_context.h
··· 20 20 21 21 void __check_kvm_seq(struct mm_struct *mm); 22 22 23 - #if __LINUX_ARM_ARCH__ >= 6 23 + #ifdef CONFIG_CPU_HAS_ASID 24 24 25 25 /* 26 26 * On ARMv6, we have the following structure in the Context ID: