···11-/*22- * OMAP36xx-specific clkops33- *44- * Copyright (C) 2010 Texas Instruments, Inc.55- * Copyright (C) 2010 Nokia Corporation66- *77- * Mike Turquette88- * Vijaykumar GN99- * Paul Walmsley1010- *1111- * Parts of this code are based on code written by1212- * Richard Woodruff, Tony Lindgren, Tuukka Tikkanen, Karthik Dasu,1313- * Russell King1414- *1515- * This program is free software; you can redistribute it and/or modify1616- * it under the terms of the GNU General Public License version 2 as1717- * published by the Free Software Foundation.1818- */1919-#undef DEBUG2020-2121-#include <linux/kernel.h>2222-#include <linux/clk.h>2323-#include <linux/clk-provider.h>2424-#include <linux/io.h>2525-2626-#include "clock.h"2727-#include "clock36xx.h"2828-#define to_clk_divider(_hw) container_of(_hw, struct clk_divider, hw)2929-3030-/**3131- * omap36xx_pwrdn_clk_enable_with_hsdiv_restore - enable clocks suffering3232- * from HSDivider PWRDN problem Implements Errata ID: i556.3333- * @clk: DPLL output struct clk3434- *3535- * 3630 only: dpll3_m3_ck, dpll4_m2_ck, dpll4_m3_ck, dpll4_m4_ck,3636- * dpll4_m5_ck & dpll4_m6_ck dividers gets loaded with reset3737- * valueafter their respective PWRDN bits are set. Any dummy write3838- * (Any other value different from the Read value) to the3939- * corresponding CM_CLKSEL register will refresh the dividers.4040- */4141-int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk_hw *clk)4242-{4343- struct clk_divider *parent;4444- struct clk_hw *parent_hw;4545- u32 dummy_v, orig_v;4646- struct clk_hw_omap *omap_clk = to_clk_hw_omap(clk);4747- int ret;4848-4949- /* Clear PWRDN bit of HSDIVIDER */5050- ret = omap2_dflt_clk_enable(clk);5151-5252- parent_hw = __clk_get_hw(__clk_get_parent(clk->clk));5353- parent = to_clk_divider(parent_hw);5454-5555- /* Restore the dividers */5656- if (!ret) {5757- orig_v = omap2_clk_readl(omap_clk, parent->reg);5858- dummy_v = orig_v;5959-6060- /* Write any other value different from the Read value */6161- dummy_v ^= (1 << parent->shift);6262- omap2_clk_writel(dummy_v, omap_clk, parent->reg);6363-6464- /* Write the original divider */6565- omap2_clk_writel(orig_v, omap_clk, parent->reg);6666- }6767-6868- return ret;6969-}
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arch/arm/mach-omap2/clock36xx.h
···11-/*22- * OMAP36xx clock function prototypes and macros33- *44- * Copyright (C) 2010 Texas Instruments, Inc.55- * Copyright (C) 2010 Nokia Corporation66- */77-88-#ifndef __ARCH_ARM_MACH_OMAP2_CLOCK36XX_H99-#define __ARCH_ARM_MACH_OMAP2_CLOCK36XX_H1010-1111-extern int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk_hw *hw);1212-1313-#endif