Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
tjh.dev
kernel
os
linux
[POWERPC] 85xx: Add device nodes for error reporting devices used by EDAC
Adding memory-controller and l2-cache-controller entries to be used by EDAC
as of_devices for MPC8540 ADS, MPC8548 CDS, and MPC8560 ADS.
Also fixed up the size of the PCI node on MPC8560 ADS.
Signed-off-by: Dave Jiang <djiang@mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
authored by Dave Jiang and committed by Paul Mackerras 50cf6707 1c2de47c
+16
arch/powerpc/boot/dts/mpc8540ads.dts
+16
arch/powerpc/boot/dts/mpc8540ads.dts
···
48
48
reg = <e0000000 00100000>; // CCSRBAR 1M
49
49
bus-frequency = <0>;
50
50
51
+
memory-controller@2000 {
52
+
compatible = "fsl,8540-memory-controller";
53
+
reg = <2000 1000>;
54
+
interrupt-parent = <&mpic>;
55
+
interrupts = <2 2>;
56
+
};
57
+
58
+
l2-cache-controller@20000 {
59
+
compatible = "fsl,8540-l2-cache-controller";
60
+
reg = <20000 1000>;
61
+
cache-line-size = <20>; // 32 bytes
62
+
cache-size = <40000>; // L2, 256K
63
+
interrupt-parent = <&mpic>;
64
+
interrupts = <0 2>;
65
+
};
66
+
51
67
i2c@3000 {
52
68
device_type = "i2c";
53
69
compatible = "fsl-i2c";
+16
arch/powerpc/boot/dts/mpc8548cds.dts
+16
arch/powerpc/boot/dts/mpc8548cds.dts
···
48
48
reg = <e0000000 00100000>; // CCSRBAR 1M
49
49
bus-frequency = <0>;
50
50
51
+
memory-controller@2000 {
52
+
compatible = "fsl,8548-memory-controller";
53
+
reg = <2000 1000>;
54
+
interrupt-parent = <&mpic>;
55
+
interrupts = <2 2>;
56
+
};
57
+
58
+
l2-cache-controller@20000 {
59
+
compatible = "fsl,8548-l2-cache-controller";
60
+
reg = <20000 1000>;
61
+
cache-line-size = <20>; // 32 bytes
62
+
cache-size = <80000>; // L2, 512K
63
+
interrupt-parent = <&mpic>;
64
+
interrupts = <0 2>;
65
+
};
66
+
51
67
i2c@3000 {
52
68
device_type = "i2c";
53
69
compatible = "fsl-i2c";
+17
-1
arch/powerpc/boot/dts/mpc8560ads.dts
+17
-1
arch/powerpc/boot/dts/mpc8560ads.dts
···
48
48
reg = <e0000000 00000200>;
49
49
bus-frequency = <13ab6680>;
50
50
51
+
memory-controller@2000 {
52
+
compatible = "fsl,8540-memory-controller";
53
+
reg = <2000 1000>;
54
+
interrupt-parent = <&mpic>;
55
+
interrupts = <2 2>;
56
+
};
57
+
58
+
l2-cache-controller@20000 {
59
+
compatible = "fsl,8540-l2-cache-controller";
60
+
reg = <20000 1000>;
61
+
cache-line-size = <20>; // 32 bytes
62
+
cache-size = <40000>; // L2, 256K
63
+
interrupt-parent = <&mpic>;
64
+
interrupts = <0 2>;
65
+
};
66
+
51
67
mdio@24520 {
52
68
device_type = "mdio";
53
69
compatible = "gianfar";
···
126
110
#address-cells = <3>;
127
111
compatible = "85xx";
128
112
device_type = "pci";
129
-
reg = <8000 400>;
113
+
reg = <8000 1000>;
130
114
clock-frequency = <3f940aa>;
131
115
interrupt-map-mask = <f800 0 0 7>;
132
116
interrupt-map = <