Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

crypto: caam - Add setbits32/clrbits32/clrsetbits primitives for ARM compatibility

Add set/clear 32-bit primitives for compatibility with ARM devices since
the primitives were previously only defined for the Power architecture.

Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Tested-by: Horia Geantă <horia.geanta@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

authored by

Victoria Milhoan and committed by
Herbert Xu
509da8fd e7472422

+26 -3
+3 -3
drivers/crypto/caam/ctrl.c
··· 445 445 * Enable DECO watchdogs and, if this is a PHYS_ADDR_T_64BIT kernel, 446 446 * long pointers in master configuration register 447 447 */ 448 - clrsetbits_be32(&ctrl->mcr, MCFGR_AWCACHE_MASK, MCFGR_AWCACHE_CACH | 449 - MCFGR_WDENABLE | (sizeof(dma_addr_t) == sizeof(u64) ? 450 - MCFGR_LONG_PTR : 0)); 448 + clrsetbits_32(&ctrl->mcr, MCFGR_AWCACHE_MASK, MCFGR_AWCACHE_CACH | 449 + MCFGR_WDENABLE | (sizeof(dma_addr_t) == sizeof(u64) ? 450 + MCFGR_LONG_PTR : 0)); 451 451 452 452 /* 453 453 * Read the Compile Time paramters and SCFGR to determine
+23
drivers/crypto/caam/regs.h
··· 65 65 * 66 66 */ 67 67 68 + #ifdef CONFIG_ARM 69 + /* These are common macros for Power, put here for ARM */ 70 + #define setbits32(_addr, _v) writel((readl(_addr) | (_v)), (_addr)) 71 + #define clrbits32(_addr, _v) writel((readl(_addr) & ~(_v)), (_addr)) 72 + 73 + #define out_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v), a) 74 + #define in_arch(type, endian, a) endian##_to_cpu(__raw_read##type(a)) 75 + 76 + #define out_le32(a, v) out_arch(l, le32, a, v) 77 + #define in_le32(a) in_arch(l, le32, a) 78 + 79 + #define out_be32(a, v) out_arch(l, be32, a, v) 80 + #define in_be32(a) in_arch(l, be32, a) 81 + 82 + #define clrsetbits(type, addr, clear, set) \ 83 + out_##type((addr), (in_##type(addr) & ~(clear)) | (set)) 84 + 85 + #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) 86 + #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) 87 + #endif 88 + 68 89 #ifdef __BIG_ENDIAN 69 90 #define wr_reg32(reg, data) out_be32(reg, data) 70 91 #define rd_reg32(reg) in_be32(reg) 92 + #define clrsetbits_32(addr, clear, set) clrsetbits_be32(addr, clear, set) 71 93 #ifdef CONFIG_64BIT 72 94 #define wr_reg64(reg, data) out_be64(reg, data) 73 95 #define rd_reg64(reg) in_be64(reg) ··· 98 76 #ifdef __LITTLE_ENDIAN 99 77 #define wr_reg32(reg, data) __raw_writel(data, reg) 100 78 #define rd_reg32(reg) __raw_readl(reg) 79 + #define clrsetbits_32(addr, clear, set) clrsetbits_le32(addr, clear, set) 101 80 #ifdef CONFIG_64BIT 102 81 #define wr_reg64(reg, data) __raw_writeq(data, reg) 103 82 #define rd_reg64(reg) __raw_readq(reg)