Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch '20101221_static_const' of git://repo.or.cz/linux-2.6/trivial-mods

+199 -177
+2 -2
drivers/net/3c501.c
··· 158 158 struct net_device * __init el1_probe(int unit) 159 159 { 160 160 struct net_device *dev = alloc_etherdev(sizeof(struct net_local)); 161 - static unsigned ports[] = { 0x280, 0x300, 0}; 162 - unsigned *port; 161 + static const unsigned ports[] = { 0x280, 0x300, 0}; 162 + const unsigned *port; 163 163 int err = 0; 164 164 165 165 if (!dev)
+2 -2
drivers/net/3c503.c
··· 392 392 int retval; 393 393 394 394 if (dev->irq < 2) { 395 - int irqlist[] = {5, 9, 3, 4, 0}; 396 - int *irqp = irqlist; 395 + static const int irqlist[] = {5, 9, 3, 4, 0}; 396 + const int *irqp = irqlist; 397 397 398 398 outb(EGACFR_NORM, E33G_GACFR); /* Enable RAM and interrupts. */ 399 399 do {
+2 -2
drivers/net/3c507.c
··· 311 311 struct net_device * __init el16_probe(int unit) 312 312 { 313 313 struct net_device *dev = alloc_etherdev(sizeof(struct net_local)); 314 - static unsigned ports[] = { 0x300, 0x320, 0x340, 0x280, 0}; 315 - unsigned *port; 314 + static const unsigned ports[] = { 0x300, 0x320, 0x340, 0x280, 0}; 315 + const unsigned *port; 316 316 int err = -ENODEV; 317 317 318 318 if (!dev)
+3 -3
drivers/net/3c527.c
··· 317 317 u8 POS; 318 318 u32 base; 319 319 struct mc32_local *lp = netdev_priv(dev); 320 - static u16 mca_io_bases[]={ 320 + static const u16 mca_io_bases[] = { 321 321 0x7280,0x7290, 322 322 0x7680,0x7690, 323 323 0x7A80,0x7A90, 324 324 0x7E80,0x7E90 325 325 }; 326 - static u32 mca_mem_bases[]={ 326 + static const u32 mca_mem_bases[] = { 327 327 0x00C0000, 328 328 0x00C4000, 329 329 0x00C8000, ··· 333 333 0x00D8000, 334 334 0x00DC000 335 335 }; 336 - static char *failures[]={ 336 + static const char * const failures[] = { 337 337 "Processor instruction", 338 338 "Processor data bus", 339 339 "Processor data bus",
+3 -3
drivers/net/at1700.c
··· 270 270 271 271 static int __init at1700_probe1(struct net_device *dev, int ioaddr) 272 272 { 273 - char fmv_irqmap[4] = {3, 7, 10, 15}; 274 - char fmv_irqmap_pnp[8] = {3, 4, 5, 7, 9, 10, 11, 15}; 275 - char at1700_irqmap[8] = {3, 4, 5, 9, 10, 11, 14, 15}; 273 + static const char fmv_irqmap[4] = {3, 7, 10, 15}; 274 + static const char fmv_irqmap_pnp[8] = {3, 4, 5, 7, 9, 10, 11, 15}; 275 + static const char at1700_irqmap[8] = {3, 4, 5, 9, 10, 11, 14, 15}; 276 276 unsigned int i, irq, is_fmv18x = 0, is_at1700 = 0; 277 277 int slot, ret = -ENODEV; 278 278 struct net_local *lp = netdev_priv(dev);
+3 -1
drivers/net/benet/be_ethtool.c
··· 549 549 { 550 550 int ret, i; 551 551 struct be_dma_mem ddrdma_cmd; 552 - u64 pattern[2] = {0x5a5a5a5a5a5a5a5aULL, 0xa5a5a5a5a5a5a5a5ULL}; 552 + static const u64 pattern[2] = { 553 + 0x5a5a5a5a5a5a5a5aULL, 0xa5a5a5a5a5a5a5a5ULL 554 + }; 553 555 554 556 ddrdma_cmd.size = sizeof(struct be_cmd_req_ddrdma_test); 555 557 ddrdma_cmd.va = pci_alloc_consistent(adapter->pdev, ddrdma_cmd.size,
+5 -5
drivers/net/benet/be_main.c
··· 2398 2398 int num_bytes; 2399 2399 const u8 *p = fw->data; 2400 2400 struct be_cmd_write_flashrom *req = flash_cmd->va; 2401 - struct flash_comp *pflashcomp; 2401 + const struct flash_comp *pflashcomp; 2402 2402 int num_comp; 2403 2403 2404 - struct flash_comp gen3_flash_types[9] = { 2404 + static const struct flash_comp gen3_flash_types[9] = { 2405 2405 { FLASH_iSCSI_PRIMARY_IMAGE_START_g3, IMG_TYPE_ISCSI_ACTIVE, 2406 2406 FLASH_IMAGE_MAX_SIZE_g3}, 2407 2407 { FLASH_REDBOOT_START_g3, IMG_TYPE_REDBOOT, ··· 2421 2421 { FLASH_NCSI_START_g3, IMG_TYPE_NCSI_FW, 2422 2422 FLASH_NCSI_IMAGE_MAX_SIZE_g3} 2423 2423 }; 2424 - struct flash_comp gen2_flash_types[8] = { 2424 + static const struct flash_comp gen2_flash_types[8] = { 2425 2425 { FLASH_iSCSI_PRIMARY_IMAGE_START_g2, IMG_TYPE_ISCSI_ACTIVE, 2426 2426 FLASH_IMAGE_MAX_SIZE_g2}, 2427 2427 { FLASH_REDBOOT_START_g2, IMG_TYPE_REDBOOT, ··· 2443 2443 if (adapter->generation == BE_GEN3) { 2444 2444 pflashcomp = gen3_flash_types; 2445 2445 filehdr_size = sizeof(struct flash_file_hdr_g3); 2446 - num_comp = 9; 2446 + num_comp = ARRAY_SIZE(gen3_flash_types); 2447 2447 } else { 2448 2448 pflashcomp = gen2_flash_types; 2449 2449 filehdr_size = sizeof(struct flash_file_hdr_g2); 2450 - num_comp = 8; 2450 + num_comp = ARRAY_SIZE(gen2_flash_types); 2451 2451 } 2452 2452 for (i = 0; i < num_comp; i++) { 2453 2453 if ((pflashcomp[i].optype == IMG_TYPE_NCSI_FW) &&
+24 -22
drivers/net/bnx2.c
··· 6811 6811 u32 *p = _p, i, offset; 6812 6812 u8 *orig_p = _p; 6813 6813 struct bnx2 *bp = netdev_priv(dev); 6814 - u32 reg_boundaries[] = { 0x0000, 0x0098, 0x0400, 0x045c, 6815 - 0x0800, 0x0880, 0x0c00, 0x0c10, 6816 - 0x0c30, 0x0d08, 0x1000, 0x101c, 6817 - 0x1040, 0x1048, 0x1080, 0x10a4, 6818 - 0x1400, 0x1490, 0x1498, 0x14f0, 6819 - 0x1500, 0x155c, 0x1580, 0x15dc, 6820 - 0x1600, 0x1658, 0x1680, 0x16d8, 6821 - 0x1800, 0x1820, 0x1840, 0x1854, 6822 - 0x1880, 0x1894, 0x1900, 0x1984, 6823 - 0x1c00, 0x1c0c, 0x1c40, 0x1c54, 6824 - 0x1c80, 0x1c94, 0x1d00, 0x1d84, 6825 - 0x2000, 0x2030, 0x23c0, 0x2400, 6826 - 0x2800, 0x2820, 0x2830, 0x2850, 6827 - 0x2b40, 0x2c10, 0x2fc0, 0x3058, 6828 - 0x3c00, 0x3c94, 0x4000, 0x4010, 6829 - 0x4080, 0x4090, 0x43c0, 0x4458, 6830 - 0x4c00, 0x4c18, 0x4c40, 0x4c54, 6831 - 0x4fc0, 0x5010, 0x53c0, 0x5444, 6832 - 0x5c00, 0x5c18, 0x5c80, 0x5c90, 6833 - 0x5fc0, 0x6000, 0x6400, 0x6428, 6834 - 0x6800, 0x6848, 0x684c, 0x6860, 6835 - 0x6888, 0x6910, 0x8000 }; 6814 + static const u32 reg_boundaries[] = { 6815 + 0x0000, 0x0098, 0x0400, 0x045c, 6816 + 0x0800, 0x0880, 0x0c00, 0x0c10, 6817 + 0x0c30, 0x0d08, 0x1000, 0x101c, 6818 + 0x1040, 0x1048, 0x1080, 0x10a4, 6819 + 0x1400, 0x1490, 0x1498, 0x14f0, 6820 + 0x1500, 0x155c, 0x1580, 0x15dc, 6821 + 0x1600, 0x1658, 0x1680, 0x16d8, 6822 + 0x1800, 0x1820, 0x1840, 0x1854, 6823 + 0x1880, 0x1894, 0x1900, 0x1984, 6824 + 0x1c00, 0x1c0c, 0x1c40, 0x1c54, 6825 + 0x1c80, 0x1c94, 0x1d00, 0x1d84, 6826 + 0x2000, 0x2030, 0x23c0, 0x2400, 6827 + 0x2800, 0x2820, 0x2830, 0x2850, 6828 + 0x2b40, 0x2c10, 0x2fc0, 0x3058, 6829 + 0x3c00, 0x3c94, 0x4000, 0x4010, 6830 + 0x4080, 0x4090, 0x43c0, 0x4458, 6831 + 0x4c00, 0x4c18, 0x4c40, 0x4c54, 6832 + 0x4fc0, 0x5010, 0x53c0, 0x5444, 6833 + 0x5c00, 0x5c18, 0x5c80, 0x5c90, 6834 + 0x5fc0, 0x6000, 0x6400, 0x6428, 6835 + 0x6800, 0x6848, 0x684c, 0x6860, 6836 + 0x6888, 0x6910, 0x8000 6837 + }; 6836 6838 6837 6839 regs->version = 0; 6838 6840
+4 -2
drivers/net/bnx2x/bnx2x_main.c
··· 6208 6208 * @param cam_offset offset in a CAM to use 6209 6209 * @param is_bcast is the set MAC a broadcast address (for E1 only) 6210 6210 */ 6211 - static void bnx2x_set_mac_addr_gen(struct bnx2x *bp, int set, u8 *mac, 6211 + static void bnx2x_set_mac_addr_gen(struct bnx2x *bp, int set, const u8 *mac, 6212 6212 u32 cl_bit_vec, u8 cam_offset, 6213 6213 u8 is_bcast) 6214 6214 { ··· 6400 6400 6401 6401 if (CHIP_IS_E1(bp)) { 6402 6402 /* broadcast MAC */ 6403 - u8 bcast[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; 6403 + static const u8 bcast[ETH_ALEN] = { 6404 + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff 6405 + }; 6404 6406 bnx2x_set_mac_addr_gen(bp, set, bcast, 0, cam_offset + 1, 1); 6405 6407 } 6406 6408 }
+1 -1
drivers/net/can/sja1000/plx_pci.c
··· 383 383 { 384 384 void __iomem *reset_addr; 385 385 int i; 386 - int reset_bar[2] = {3, 5}; 386 + static const int reset_bar[2] = {3, 5}; 387 387 388 388 plx_pci_reset_common(pdev); 389 389
+4 -6
drivers/net/chelsio/sge.c
··· 273 273 struct cmdQ cmdQ[SGE_CMDQ_N] ____cacheline_aligned_in_smp; 274 274 }; 275 275 276 + static const u8 ch_mac_addr[ETH_ALEN] = { 277 + 0x0, 0x7, 0x43, 0x0, 0x0, 0x0 278 + }; 279 + 276 280 /* 277 281 * stop tasklet and free all pending skb's 278 282 */ ··· 2016 2012 continue; 2017 2013 2018 2014 if (!skb->cb[0]) { 2019 - u8 ch_mac_addr[ETH_ALEN] = { 2020 - 0x0, 0x7, 0x43, 0x0, 0x0, 0x0 2021 - }; 2022 - 2023 2015 skb_copy_to_linear_data_offset(skb, 2024 2016 sizeof(struct cpl_tx_pkt), 2025 2017 ch_mac_addr, ··· 2048 2048 2049 2049 if ((seop & 0xfff0fff) == 0xfff && skb) { 2050 2050 if (!skb->cb[0]) { 2051 - u8 ch_mac_addr[ETH_ALEN] = 2052 - {0x0, 0x7, 0x43, 0x0, 0x0, 0x0}; 2053 2051 skb_copy_to_linear_data_offset(skb, 2054 2052 sizeof(struct cpl_tx_pkt), 2055 2053 ch_mac_addr,
+12 -12
drivers/net/cxgb3/ael1002.c
··· 292 292 */ 293 293 static int ael2005_setup_sr_edc(struct cphy *phy) 294 294 { 295 - static struct reg_val regs[] = { 295 + static const struct reg_val regs[] = { 296 296 { MDIO_MMD_PMAPMD, 0xc003, 0xffff, 0x181 }, 297 297 { MDIO_MMD_PMAPMD, 0xc010, 0xffff, 0x448a }, 298 298 { MDIO_MMD_PMAPMD, 0xc04a, 0xffff, 0x5200 }, ··· 324 324 325 325 static int ael2005_setup_twinax_edc(struct cphy *phy, int modtype) 326 326 { 327 - static struct reg_val regs[] = { 327 + static const struct reg_val regs[] = { 328 328 { MDIO_MMD_PMAPMD, 0xc04a, 0xffff, 0x5a00 }, 329 329 { 0, 0, 0, 0 } 330 330 }; 331 - static struct reg_val preemphasis[] = { 331 + static const struct reg_val preemphasis[] = { 332 332 { MDIO_MMD_PMAPMD, 0xc014, 0xffff, 0xfe16 }, 333 333 { MDIO_MMD_PMAPMD, 0xc015, 0xffff, 0xa000 }, 334 334 { 0, 0, 0, 0 } ··· 393 393 394 394 static int ael2005_reset(struct cphy *phy, int wait) 395 395 { 396 - static struct reg_val regs0[] = { 396 + static const struct reg_val regs0[] = { 397 397 { MDIO_MMD_PMAPMD, 0xc001, 0, 1 << 5 }, 398 398 { MDIO_MMD_PMAPMD, 0xc017, 0, 1 << 5 }, 399 399 { MDIO_MMD_PMAPMD, 0xc013, 0xffff, 0xf341 }, ··· 403 403 { MDIO_MMD_PMAPMD, 0xc210, 0xffff, 0 }, 404 404 { 0, 0, 0, 0 } 405 405 }; 406 - static struct reg_val regs1[] = { 406 + static const struct reg_val regs1[] = { 407 407 { MDIO_MMD_PMAPMD, 0xca00, 0xffff, 0x0080 }, 408 408 { MDIO_MMD_PMAPMD, 0xca12, 0xffff, 0 }, 409 409 { 0, 0, 0, 0 } ··· 522 522 */ 523 523 static int ael2020_setup_sr_edc(struct cphy *phy) 524 524 { 525 - static struct reg_val regs[] = { 525 + static const struct reg_val regs[] = { 526 526 /* set CDR offset to 10 */ 527 527 { MDIO_MMD_PMAPMD, 0xcc01, 0xffff, 0x488a }, 528 528 ··· 551 551 static int ael2020_setup_twinax_edc(struct cphy *phy, int modtype) 552 552 { 553 553 /* set uC to 40MHz */ 554 - static struct reg_val uCclock40MHz[] = { 554 + static const struct reg_val uCclock40MHz[] = { 555 555 { MDIO_MMD_PMAPMD, 0xff28, 0xffff, 0x4001 }, 556 556 { MDIO_MMD_PMAPMD, 0xff2a, 0xffff, 0x0002 }, 557 557 { 0, 0, 0, 0 } 558 558 }; 559 559 560 560 /* activate uC clock */ 561 - static struct reg_val uCclockActivate[] = { 561 + static const struct reg_val uCclockActivate[] = { 562 562 { MDIO_MMD_PMAPMD, 0xd000, 0xffff, 0x5200 }, 563 563 { 0, 0, 0, 0 } 564 564 }; 565 565 566 566 /* set PC to start of SRAM and activate uC */ 567 - static struct reg_val uCactivate[] = { 567 + static const struct reg_val uCactivate[] = { 568 568 { MDIO_MMD_PMAPMD, 0xd080, 0xffff, 0x0100 }, 569 569 { MDIO_MMD_PMAPMD, 0xd092, 0xffff, 0x0000 }, 570 570 { 0, 0, 0, 0 } ··· 624 624 */ 625 625 static int ael2020_intr_enable(struct cphy *phy) 626 626 { 627 - struct reg_val regs[] = { 627 + static const struct reg_val regs[] = { 628 628 /* output Module's Loss Of Signal (LOS) to LED */ 629 629 { MDIO_MMD_PMAPMD, AEL2020_GPIO_CFG+AEL2020_GPIO_LSTAT, 630 630 0xffff, 0x4 }, ··· 664 664 */ 665 665 static int ael2020_intr_disable(struct cphy *phy) 666 666 { 667 - struct reg_val regs[] = { 667 + static const struct reg_val regs[] = { 668 668 /* reset "link status" LED to "off" */ 669 669 { MDIO_MMD_PMAPMD, AEL2020_GPIO_CTRL, 670 670 0xffff, 0xb << (AEL2020_GPIO_LSTAT*4) }, ··· 701 701 return err ? err : t3_phy_lasi_intr_clear(phy); 702 702 } 703 703 704 - static struct reg_val ael2020_reset_regs[] = { 704 + static const struct reg_val ael2020_reset_regs[] = { 705 705 /* Erratum #2: CDRLOL asserted, causing PMA link down status */ 706 706 { MDIO_MMD_PMAPMD, 0xc003, 0xffff, 0x3101 }, 707 707
+1 -1
drivers/net/cxgb3/t3_hw.c
··· 1562 1562 {0} 1563 1563 }; 1564 1564 1565 - static struct intr_info tp_intr_info_t3c[] = { 1565 + static const struct intr_info tp_intr_info_t3c[] = { 1566 1566 {0x1fffffff, "TP parity error", -1, 1}, 1567 1567 {F_FLMRXFLSTEMPTY, "TP out of Rx pages", -1, 1}, 1568 1568 {F_FLMTXFLSTEMPTY, "TP out of Tx pages", -1, 1},
+1 -1
drivers/net/cxgb4vf/t4vf_hw.c
··· 116 116 int t4vf_wr_mbox_core(struct adapter *adapter, const void *cmd, int size, 117 117 void *rpl, bool sleep_ok) 118 118 { 119 - static int delay[] = { 119 + static const int delay[] = { 120 120 1, 1, 3, 5, 10, 10, 20, 50, 100 121 121 }; 122 122
+1 -1
drivers/net/e2100.c
··· 216 216 printk(" %02X", station_addr[i]); 217 217 218 218 if (dev->irq < 2) { 219 - int irqlist[] = {15, 11, 10, 12, 5, 9, 3, 4}; 219 + static const int irqlist[] = {15, 11, 10, 12, 5, 9, 3, 4}; 220 220 for (i = 0; i < ARRAY_SIZE(irqlist); i++) 221 221 if (request_irq (irqlist[i], NULL, 0, "bogus", NULL) != -EBUSY) { 222 222 dev->irq = irqlist[i];
+5 -4
drivers/net/eepro.c
··· 891 891 there is non-reboot way to recover if something goes wrong. 892 892 */ 893 893 894 - static char irqrmap[] = {-1,-1,0,1,-1,2,-1,-1,-1,0,3,4,-1,-1,-1,-1}; 895 - static char irqrmap2[] = {-1,-1,4,0,1,2,-1,3,-1,4,5,6,7,-1,-1,-1}; 894 + static const char irqrmap[] = {-1,-1,0,1,-1,2,-1,-1,-1,0,3,4,-1,-1,-1,-1}; 895 + static const char irqrmap2[] = {-1,-1,4,0,1,2,-1,3,-1,4,5,6,7,-1,-1,-1}; 896 896 static int eepro_grab_irq(struct net_device *dev) 897 897 { 898 - int irqlist[] = { 3, 4, 5, 7, 9, 10, 11, 12, 0 }; 899 - int *irqp = irqlist, temp_reg, ioaddr = dev->base_addr; 898 + static const int irqlist[] = { 3, 4, 5, 7, 9, 10, 11, 12, 0 }; 899 + const int *irqp = irqlist; 900 + int temp_reg, ioaddr = dev->base_addr; 900 901 901 902 eepro_sw2bank1(ioaddr); /* be CAREFUL, BANK 1 now */ 902 903
+1 -1
drivers/net/eexpress.c
··· 1103 1103 dev->dev_addr[i] = ((unsigned char *)hw_addr)[5-i]; 1104 1104 1105 1105 { 1106 - static char irqmap[]={0, 9, 3, 4, 5, 10, 11, 0}; 1106 + static const char irqmap[] = { 0, 9, 3, 4, 5, 10, 11, 0 }; 1107 1107 unsigned short setupval = eexp_hw_readeeprom(ioaddr,0); 1108 1108 1109 1109 /* Use the IRQ from EEPROM if none was given */
+6 -4
drivers/net/gianfar.c
··· 143 143 static void gfar_halt_nodisable(struct net_device *dev); 144 144 void gfar_start(struct net_device *dev); 145 145 static void gfar_clear_exact_match(struct net_device *dev); 146 - static void gfar_set_mac_for_addr(struct net_device *dev, int num, u8 *addr); 146 + static void gfar_set_mac_for_addr(struct net_device *dev, int num, 147 + const u8 *addr); 147 148 static int gfar_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); 148 149 149 150 MODULE_AUTHOR("Freescale Semiconductor, Inc"); ··· 3095 3094 static void gfar_clear_exact_match(struct net_device *dev) 3096 3095 { 3097 3096 int idx; 3098 - u8 zero_arr[MAC_ADDR_LEN] = {0,0,0,0,0,0}; 3097 + static const u8 zero_arr[MAC_ADDR_LEN] = {0, 0, 0, 0, 0, 0}; 3099 3098 3100 3099 for(idx = 1;idx < GFAR_EM_NUM + 1;idx++) 3101 - gfar_set_mac_for_addr(dev, idx, (u8 *)zero_arr); 3100 + gfar_set_mac_for_addr(dev, idx, zero_arr); 3102 3101 } 3103 3102 3104 3103 /* Set the appropriate hash bit for the given addr */ ··· 3133 3132 /* There are multiple MAC Address register pairs on some controllers 3134 3133 * This function sets the numth pair to a given address 3135 3134 */ 3136 - static void gfar_set_mac_for_addr(struct net_device *dev, int num, u8 *addr) 3135 + static void gfar_set_mac_for_addr(struct net_device *dev, int num, 3136 + const u8 *addr) 3137 3137 { 3138 3138 struct gfar_private *priv = netdev_priv(dev); 3139 3139 struct gfar __iomem *regs = priv->gfargrp[0].regs;
+3 -3
drivers/net/hp.c
··· 162 162 163 163 /* Snarf the interrupt now. Someday this could be moved to open(). */ 164 164 if (dev->irq < 2) { 165 - int irq_16list[] = { 11, 10, 5, 3, 4, 7, 9, 0}; 166 - int irq_8list[] = { 7, 5, 3, 4, 9, 0}; 167 - int *irqp = wordmode ? irq_16list : irq_8list; 165 + static const int irq_16list[] = { 11, 10, 5, 3, 4, 7, 9, 0}; 166 + static const int irq_8list[] = { 7, 5, 3, 4, 9, 0}; 167 + const int *irqp = wordmode ? irq_16list : irq_8list; 168 168 do { 169 169 int irq = *irqp; 170 170 if (request_irq (irq, NULL, 0, "bogus", NULL) != -EBUSY) {
+1 -1
drivers/net/irda/act200l-sir.c
··· 199 199 { 200 200 unsigned state = dev->fsm.substate; 201 201 unsigned delay = 0; 202 - u8 control[9] = { 202 + static const u8 control[9] = { 203 203 ACT200L_REG15, 204 204 ACT200L_REG13 | ACT200L_SHDW, 205 205 ACT200L_REG21 | ACT200L_EXCK | ACT200L_OSCL,
+2 -2
drivers/net/irda/donauboe.c
··· 818 818 { 819 819 int i, j, n; 820 820 #ifdef USE_MIR 821 - int bauds[] = { 9600, 115200, 4000000, 1152000 }; 821 + static const int bauds[] = { 9600, 115200, 4000000, 1152000 }; 822 822 #else 823 - int bauds[] = { 9600, 115200, 4000000 }; 823 + static const int bauds[] = { 9600, 115200, 4000000 }; 824 824 #endif 825 825 unsigned long flags; 826 826
+2 -2
drivers/net/jme.c
··· 135 135 136 136 static void 137 137 jme_setup_wakeup_frame(struct jme_adapter *jme, 138 - u32 *mask, u32 crc, int fnr) 138 + const u32 *mask, u32 crc, int fnr) 139 139 { 140 140 int i; 141 141 ··· 163 163 static inline void 164 164 jme_reset_mac_processor(struct jme_adapter *jme) 165 165 { 166 - u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0}; 166 + static const u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0}; 167 167 u32 crc = 0xCDCDCDCD; 168 168 u32 gpreg0; 169 169 int i;
+10 -10
drivers/net/ksz884x.c
··· 3570 3570 * This routine is used to program Wake-on-LAN pattern. 3571 3571 */ 3572 3572 static void hw_set_wol_frame(struct ksz_hw *hw, int i, uint mask_size, 3573 - u8 *mask, uint frame_size, u8 *pattern) 3573 + const u8 *mask, uint frame_size, const u8 *pattern) 3574 3574 { 3575 3575 int bits; 3576 3576 int from; ··· 3626 3626 * 3627 3627 * This routine is used to add ARP pattern for waking up the host. 3628 3628 */ 3629 - static void hw_add_wol_arp(struct ksz_hw *hw, u8 *ip_addr) 3629 + static void hw_add_wol_arp(struct ksz_hw *hw, const u8 *ip_addr) 3630 3630 { 3631 - u8 mask[6] = { 0x3F, 0xF0, 0x3F, 0x00, 0xC0, 0x03 }; 3631 + static const u8 mask[6] = { 0x3F, 0xF0, 0x3F, 0x00, 0xC0, 0x03 }; 3632 3632 u8 pattern[42] = { 3633 3633 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 3634 3634 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ··· 3651 3651 */ 3652 3652 static void hw_add_wol_bcast(struct ksz_hw *hw) 3653 3653 { 3654 - u8 mask[] = { 0x3F }; 3655 - u8 pattern[] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }; 3654 + static const u8 mask[] = { 0x3F }; 3655 + static const u8 pattern[] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }; 3656 3656 3657 3657 hw_set_wol_frame(hw, 2, 1, mask, MAC_ADDR_LEN, pattern); 3658 3658 } ··· 3669 3669 */ 3670 3670 static void hw_add_wol_mcast(struct ksz_hw *hw) 3671 3671 { 3672 - u8 mask[] = { 0x3F }; 3672 + static const u8 mask[] = { 0x3F }; 3673 3673 u8 pattern[] = { 0x33, 0x33, 0xFF, 0x00, 0x00, 0x00 }; 3674 3674 3675 3675 memcpy(&pattern[3], &hw->override_addr[3], 3); ··· 3687 3687 */ 3688 3688 static void hw_add_wol_ucast(struct ksz_hw *hw) 3689 3689 { 3690 - u8 mask[] = { 0x3F }; 3690 + static const u8 mask[] = { 0x3F }; 3691 3691 3692 3692 hw_set_wol_frame(hw, 0, 1, mask, MAC_ADDR_LEN, hw->override_addr); 3693 3693 } ··· 3700 3700 * 3701 3701 * This routine is used to enable Wake-on-LAN depending on driver settings. 3702 3702 */ 3703 - static void hw_enable_wol(struct ksz_hw *hw, u32 wol_enable, u8 *net_addr) 3703 + static void hw_enable_wol(struct ksz_hw *hw, u32 wol_enable, const u8 *net_addr) 3704 3704 { 3705 3705 hw_cfg_wol(hw, KS8841_WOL_MAGIC_ENABLE, (wol_enable & WAKE_MAGIC)); 3706 3706 hw_cfg_wol(hw, KS8841_WOL_FRAME0_ENABLE, (wol_enable & WAKE_UCAST)); ··· 6208 6208 struct dev_info *hw_priv = priv->adapter; 6209 6209 6210 6210 /* Need to find a way to retrieve the device IP address. */ 6211 - u8 net_addr[] = { 192, 168, 1, 1 }; 6211 + static const u8 net_addr[] = { 192, 168, 1, 1 }; 6212 6212 6213 6213 if (wol->wolopts & ~hw_priv->wol_support) 6214 6214 return -EINVAL; ··· 7241 7241 struct ksz_hw *hw = &hw_priv->hw; 7242 7242 7243 7243 /* Need to find a way to retrieve the device IP address. */ 7244 - u8 net_addr[] = { 192, 168, 1, 1 }; 7244 + static const u8 net_addr[] = { 192, 168, 1, 1 }; 7245 7245 7246 7246 for (i = 0; i < hw->dev_count; i++) { 7247 7247 if (info->netdev[i]) {
+10 -6
drivers/net/netxen/netxen_nic_hw.c
··· 655 655 } 656 656 657 657 static int nx_p3_nic_add_mac(struct netxen_adapter *adapter, 658 - u8 *addr, struct list_head *del_list) 658 + const u8 *addr, struct list_head *del_list) 659 659 { 660 660 struct list_head *head; 661 661 nx_mac_list_t *cur; ··· 686 686 { 687 687 struct netxen_adapter *adapter = netdev_priv(netdev); 688 688 struct netdev_hw_addr *ha; 689 - u8 bcast_addr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; 689 + static const u8 bcast_addr[ETH_ALEN] = { 690 + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff 691 + }; 690 692 u32 mode = VPORT_MISS_MODE_DROP; 691 693 LIST_HEAD(del_list); 692 694 struct list_head *head; ··· 871 869 u64 word; 872 870 int i, rv; 873 871 874 - u64 key[] = { 0xbeac01fa6a42b73bULL, 0x8030f20c77cb2da3ULL, 875 - 0xae7b30b4d0ca2bcbULL, 0x43a38fb04167253dULL, 876 - 0x255b0ec26d5a56daULL }; 872 + static const u64 key[] = { 873 + 0xbeac01fa6a42b73bULL, 0x8030f20c77cb2da3ULL, 874 + 0xae7b30b4d0ca2bcbULL, 0x43a38fb04167253dULL, 875 + 0x255b0ec26d5a56daULL 876 + }; 877 877 878 878 879 879 memset(&req, 0, sizeof(nx_nic_req_t)); ··· 899 895 ((u64)(enable & 0x1) << 8) | 900 896 ((0x7ULL) << 48); 901 897 req.words[0] = cpu_to_le64(word); 902 - for (i = 0; i < 5; i++) 898 + for (i = 0; i < ARRAY_SIZE(key); i++) 903 899 req.words[i+1] = cpu_to_le64(key[i]); 904 900 905 901
+2 -2
drivers/net/ni52.c
··· 388 388 struct net_device * __init ni52_probe(int unit) 389 389 { 390 390 struct net_device *dev = alloc_etherdev(sizeof(struct priv)); 391 - static int ports[] = {0x300, 0x280, 0x360 , 0x320 , 0x340, 0}; 391 + static const int ports[] = {0x300, 0x280, 0x360, 0x320, 0x340, 0}; 392 + const int *port; 392 393 struct priv *p; 393 - int *port; 394 394 int err = 0; 395 395 396 396 if (!dev)
+2 -2
drivers/net/ni65.c
··· 361 361 struct net_device * __init ni65_probe(int unit) 362 362 { 363 363 struct net_device *dev = alloc_etherdev(0); 364 - static int ports[] = {0x360,0x300,0x320,0x340, 0}; 365 - int *port; 364 + static const int ports[] = { 0x360, 0x300, 0x320, 0x340, 0 }; 365 + const int *port; 366 366 int err = 0; 367 367 368 368 if (!dev)
+1 -1
drivers/net/pcmcia/nmclan_cs.c
··· 1291 1291 1292 1292 static void updateCRC(int *CRC, int bit) 1293 1293 { 1294 - int poly[]={ 1294 + static const int poly[]={ 1295 1295 1,1,1,0, 1,1,0,1, 1296 1296 1,0,1,1, 1,0,0,0, 1297 1297 1,0,0,0, 0,0,1,1,
+9 -6
drivers/net/qlcnic/qlcnic_hw.c
··· 381 381 return qlcnic_send_cmd_descs(adapter, (struct cmd_desc_type0 *)&req, 1); 382 382 } 383 383 384 - static int qlcnic_nic_add_mac(struct qlcnic_adapter *adapter, u8 *addr) 384 + static int qlcnic_nic_add_mac(struct qlcnic_adapter *adapter, const u8 *addr) 385 385 { 386 386 struct list_head *head; 387 387 struct qlcnic_mac_list_s *cur; ··· 415 415 { 416 416 struct qlcnic_adapter *adapter = netdev_priv(netdev); 417 417 struct netdev_hw_addr *ha; 418 - u8 bcast_addr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; 418 + static const u8 bcast_addr[ETH_ALEN] = { 419 + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff 420 + }; 419 421 u32 mode = VPORT_MISS_MODE_DROP; 420 422 421 423 if (!test_bit(__QLCNIC_FW_ATTACHED, &adapter->state)) ··· 623 621 u64 word; 624 622 int i, rv; 625 623 626 - const u64 key[] = { 0xbeac01fa6a42b73bULL, 0x8030f20c77cb2da3ULL, 627 - 0xae7b30b4d0ca2bcbULL, 0x43a38fb04167253dULL, 628 - 0x255b0ec26d5a56daULL }; 629 - 624 + static const u64 key[] = { 625 + 0xbeac01fa6a42b73bULL, 0x8030f20c77cb2da3ULL, 626 + 0xae7b30b4d0ca2bcbULL, 0x43a38fb04167253dULL, 627 + 0x255b0ec26d5a56daULL 628 + }; 630 629 631 630 memset(&req, 0, sizeof(struct qlcnic_nic_req)); 632 631 req.qhdr = cpu_to_le64(QLCNIC_HOST_REQUEST << 23);
+7 -6
drivers/net/qlge/qlge_main.c
··· 3548 3548 3549 3549 static int ql_start_rss(struct ql_adapter *qdev) 3550 3550 { 3551 - u8 init_hash_seed[] = {0x6d, 0x5a, 0x56, 0xda, 0x25, 0x5b, 0x0e, 0xc2, 3552 - 0x41, 0x67, 0x25, 0x3d, 0x43, 0xa3, 0x8f, 3553 - 0xb0, 0xd0, 0xca, 0x2b, 0xcb, 0xae, 0x7b, 3554 - 0x30, 0xb4, 0x77, 0xcb, 0x2d, 0xa3, 0x80, 3555 - 0x30, 0xf2, 0x0c, 0x6a, 0x42, 0xb7, 0x3b, 3556 - 0xbe, 0xac, 0x01, 0xfa}; 3551 + static const u8 init_hash_seed[] = { 3552 + 0x6d, 0x5a, 0x56, 0xda, 0x25, 0x5b, 0x0e, 0xc2, 3553 + 0x41, 0x67, 0x25, 0x3d, 0x43, 0xa3, 0x8f, 0xb0, 3554 + 0xd0, 0xca, 0x2b, 0xcb, 0xae, 0x7b, 0x30, 0xb4, 3555 + 0x77, 0xcb, 0x2d, 0xa3, 0x80, 0x30, 0xf2, 0x0c, 3556 + 0x6a, 0x42, 0xb7, 0x3b, 0xbe, 0xac, 0x01, 0xfa 3557 + }; 3557 3558 struct ricb *ricb = &qdev->ricb; 3558 3559 int status = 0; 3559 3560 int i;
+1 -1
drivers/net/r8169.c
··· 2526 2526 2527 2527 val = mdio_read(ioaddr, 0x0d); 2528 2528 if ((val & 0x00ff) != 0x006c) { 2529 - u32 set[] = { 2529 + static const u32 set[] = { 2530 2530 0x0065, 0x0066, 0x0067, 0x0068, 2531 2531 0x0069, 0x006a, 0x006b, 0x006c 2532 2532 };
+2 -2
drivers/net/skfp/smt.c
··· 1263 1263 static void smt_fill_policy(struct s_smc *smc, struct smt_p_policy *policy) 1264 1264 { 1265 1265 int i ; 1266 - u_char *map ; 1266 + const u_char *map ; 1267 1267 u_short in ; 1268 1268 u_short out ; 1269 1269 ··· 1271 1271 * MIB para 101b (fddiSMTConnectionPolicy) coding 1272 1272 * is different from 0005 coding 1273 1273 */ 1274 - static u_char ansi_weirdness[16] = { 1274 + static const u_char ansi_weirdness[16] = { 1275 1275 0,7,5,3,8,1,6,4,9,10,2,11,12,13,14,15 1276 1276 } ; 1277 1277 SMTSETPARA(policy,SMT_P_POLICY) ;
+2 -2
drivers/net/skge.c
··· 1191 1191 1192 1192 static void genesis_reset(struct skge_hw *hw, int port) 1193 1193 { 1194 - const u8 zero[8] = { 0 }; 1194 + static const u8 zero[8] = { 0 }; 1195 1195 u32 reg; 1196 1196 1197 1197 skge_write8(hw, SK_REG(port, GMAC_IRQ_MSK), 0); ··· 1557 1557 int jumbo = hw->dev[port]->mtu > ETH_DATA_LEN; 1558 1558 int i; 1559 1559 u32 r; 1560 - const u8 zero[6] = { 0 }; 1560 + static const u8 zero[6] = { 0 }; 1561 1561 1562 1562 for (i = 0; i < 10; i++) { 1563 1563 skge_write16(hw, SK_REG(port, TX_MFF_CTRL1),
+6 -2
drivers/net/smc-ultra.c
··· 277 277 dev->base_addr = ioaddr+ULTRA_NIC_OFFSET; 278 278 279 279 { 280 - int addr_tbl[4] = {0x0C0000, 0x0E0000, 0xFC0000, 0xFE0000}; 281 - short num_pages_tbl[4] = {0x20, 0x40, 0x80, 0xff}; 280 + static const int addr_tbl[4] = { 281 + 0x0C0000, 0x0E0000, 0xFC0000, 0xFE0000 282 + }; 283 + static const short num_pages_tbl[4] = { 284 + 0x20, 0x40, 0x80, 0xff 285 + }; 282 286 283 287 dev->mem_start = ((addr & 0x0f) << 13) + addr_tbl[(addr >> 6) & 3] ; 284 288 num_pages = num_pages_tbl[(addr >> 4) & 3];
+12 -14
drivers/net/tg3.c
··· 13086 13086 return 512; 13087 13087 } 13088 13088 13089 + DEFINE_PCI_DEVICE_TABLE(write_reorder_chipsets) = { 13090 + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FE_GATE_700C) }, 13091 + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE) }, 13092 + { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8385_0) }, 13093 + { }, 13094 + }; 13095 + 13089 13096 static int __devinit tg3_get_invariants(struct tg3 *tp) 13090 13097 { 13091 - static struct pci_device_id write_reorder_chipsets[] = { 13092 - { PCI_DEVICE(PCI_VENDOR_ID_AMD, 13093 - PCI_DEVICE_ID_AMD_FE_GATE_700C) }, 13094 - { PCI_DEVICE(PCI_VENDOR_ID_AMD, 13095 - PCI_DEVICE_ID_AMD_8131_BRIDGE) }, 13096 - { PCI_DEVICE(PCI_VENDOR_ID_VIA, 13097 - PCI_DEVICE_ID_VIA_8385_0) }, 13098 - { }, 13099 - }; 13100 13098 u32 misc_ctrl_reg; 13101 13099 u32 pci_state_reg, grc_misc_cfg; 13102 13100 u32 val; ··· 14227 14229 14228 14230 #define TEST_BUFFER_SIZE 0x2000 14229 14231 14232 + DEFINE_PCI_DEVICE_TABLE(dma_wait_state_chipsets) = { 14233 + { PCI_DEVICE(PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_PCI15) }, 14234 + { }, 14235 + }; 14236 + 14230 14237 static int __devinit tg3_test_dma(struct tg3 *tp) 14231 14238 { 14232 14239 dma_addr_t buf_dma; ··· 14401 14398 } 14402 14399 if ((tp->dma_rwctrl & DMA_RWCTRL_WRITE_BNDRY_MASK) != 14403 14400 DMA_RWCTRL_WRITE_BNDRY_16) { 14404 - static struct pci_device_id dma_wait_state_chipsets[] = { 14405 - { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 14406 - PCI_DEVICE_ID_APPLE_UNI_N_PCI15) }, 14407 - { }, 14408 - }; 14409 14401 14410 14402 /* DMA test passed without adjusting DMA boundary, 14411 14403 * now look for chipsets that are known to expose the
+3 -2
drivers/net/tokenring/ibmtr.c
··· 657 657 #ifndef PCMCIA 658 658 /* finish figuring the shared RAM address */ 659 659 if (cardpresent == TR_ISA) { 660 - static __u32 ram_bndry_mask[] = 661 - { 0xffffe000, 0xffffc000, 0xffff8000, 0xffff0000 }; 660 + static const __u32 ram_bndry_mask[] = { 661 + 0xffffe000, 0xffffc000, 0xffff8000, 0xffff0000 662 + }; 662 663 __u32 new_base, rrr_32, chk_base, rbm; 663 664 664 665 rrr_32=readb(ti->mmio+ACA_OFFSET+ACA_RW+RRR_ODD) >> 2 & 0x03;
+12 -6
drivers/net/tulip/de2104x.c
··· 964 964 dw32(MacMode, macmode); 965 965 } 966 966 967 - static void de_next_media (struct de_private *de, u32 *media, 967 + static void de_next_media (struct de_private *de, const u32 *media, 968 968 unsigned int n_media) 969 969 { 970 970 unsigned int i; ··· 1008 1008 return; 1009 1009 1010 1010 if (de->media_type == DE_MEDIA_AUI) { 1011 - u32 next_state = DE_MEDIA_TP; 1011 + static const u32 next_state = DE_MEDIA_TP; 1012 1012 de_next_media(de, &next_state, 1); 1013 1013 } else { 1014 - u32 next_state = DE_MEDIA_AUI; 1014 + static const u32 next_state = DE_MEDIA_AUI; 1015 1015 de_next_media(de, &next_state, 1); 1016 1016 } 1017 1017 ··· 1136 1136 * simply resets the PHY and reloads the current media settings. 1137 1137 */ 1138 1138 if (de->media_type == DE_MEDIA_AUI) { 1139 - u32 next_states[] = { DE_MEDIA_BNC, DE_MEDIA_TP_AUTO }; 1139 + static const u32 next_states[] = { 1140 + DE_MEDIA_BNC, DE_MEDIA_TP_AUTO 1141 + }; 1140 1142 de_next_media(de, next_states, ARRAY_SIZE(next_states)); 1141 1143 } else if (de->media_type == DE_MEDIA_BNC) { 1142 - u32 next_states[] = { DE_MEDIA_TP_AUTO, DE_MEDIA_AUI }; 1144 + static const u32 next_states[] = { 1145 + DE_MEDIA_TP_AUTO, DE_MEDIA_AUI 1146 + }; 1143 1147 de_next_media(de, next_states, ARRAY_SIZE(next_states)); 1144 1148 } else { 1145 - u32 next_states[] = { DE_MEDIA_AUI, DE_MEDIA_BNC, DE_MEDIA_TP_AUTO }; 1149 + static const u32 next_states[] = { 1150 + DE_MEDIA_AUI, DE_MEDIA_BNC, DE_MEDIA_TP_AUTO 1151 + }; 1146 1152 de_next_media(de, next_states, ARRAY_SIZE(next_states)); 1147 1153 } 1148 1154
+9 -6
drivers/net/tulip/tulip_core.c
··· 1302 1302 #endif 1303 1303 }; 1304 1304 1305 + DEFINE_PCI_DEVICE_TABLE(early_486_chipsets) = { 1306 + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82424) }, 1307 + { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_496) }, 1308 + { }, 1309 + }; 1310 + 1305 1311 static int __devinit tulip_init_one (struct pci_dev *pdev, 1306 1312 const struct pci_device_id *ent) 1307 1313 { 1308 1314 struct tulip_private *tp; 1309 1315 /* See note below on the multiport cards. */ 1310 1316 static unsigned char last_phys_addr[6] = {0x00, 'L', 'i', 'n', 'u', 'x'}; 1311 - static struct pci_device_id early_486_chipsets[] = { 1312 - { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82424) }, 1313 - { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_496) }, 1314 - { }, 1315 - }; 1316 1317 static int last_irq; 1317 1318 static int multiport_cnt; /* For four-port boards w/one EEPROM */ 1318 1319 int i, irq; ··· 1683 1682 tp->full_duplex_lock = 1; 1684 1683 1685 1684 if (tulip_media_cap[tp->default_port] & MediaIsMII) { 1686 - u16 media2advert[] = { 0x20, 0x40, 0x03e0, 0x60, 0x80, 0x100, 0x200 }; 1685 + static const u16 media2advert[] = { 1686 + 0x20, 0x40, 0x03e0, 0x60, 0x80, 0x100, 0x200 1687 + }; 1687 1688 tp->mii_advertise = media2advert[tp->default_port - 9]; 1688 1689 tp->mii_advertise |= (tp->flags & HAS_8023X); /* Matching bits! */ 1689 1690 }
+16 -23
drivers/net/usb/hso.c
··· 997 997 } 998 998 } 999 999 1000 + static void fix_crc_bug(struct urb *urb, __le16 max_packet_size) 1001 + { 1002 + static const u8 crc_check[4] = { 0xDE, 0xAD, 0xBE, 0xEF }; 1003 + u32 rest = urb->actual_length % le16_to_cpu(max_packet_size); 1004 + 1005 + if (((rest == 5) || (rest == 6)) && 1006 + !memcmp(((u8 *)urb->transfer_buffer) + urb->actual_length - 4, 1007 + crc_check, 4)) { 1008 + urb->actual_length -= 4; 1009 + } 1010 + } 1011 + 1000 1012 /* Moving data from usb to kernel (in interrupt state) */ 1001 1013 static void read_bulk_callback(struct urb *urb) 1002 1014 { ··· 1037 1025 return; 1038 1026 } 1039 1027 1040 - if (odev->parent->port_spec & HSO_INFO_CRC_BUG) { 1041 - u32 rest; 1042 - u8 crc_check[4] = { 0xDE, 0xAD, 0xBE, 0xEF }; 1043 - rest = urb->actual_length % 1044 - le16_to_cpu(odev->in_endp->wMaxPacketSize); 1045 - if (((rest == 5) || (rest == 6)) && 1046 - !memcmp(((u8 *) urb->transfer_buffer) + 1047 - urb->actual_length - 4, crc_check, 4)) { 1048 - urb->actual_length -= 4; 1049 - } 1050 - } 1028 + if (odev->parent->port_spec & HSO_INFO_CRC_BUG) 1029 + fix_crc_bug(urb, odev->in_endp->wMaxPacketSize); 1051 1030 1052 1031 /* do we even have a packet? */ 1053 1032 if (urb->actual_length) { ··· 1230 1227 return; 1231 1228 1232 1229 if (status == 0) { 1233 - if (serial->parent->port_spec & HSO_INFO_CRC_BUG) { 1234 - u32 rest; 1235 - u8 crc_check[4] = { 0xDE, 0xAD, 0xBE, 0xEF }; 1236 - rest = 1237 - urb->actual_length % 1238 - le16_to_cpu(serial->in_endp->wMaxPacketSize); 1239 - if (((rest == 5) || (rest == 6)) && 1240 - !memcmp(((u8 *) urb->transfer_buffer) + 1241 - urb->actual_length - 4, crc_check, 4)) { 1242 - urb->actual_length -= 4; 1243 - } 1244 - } 1230 + if (serial->parent->port_spec & HSO_INFO_CRC_BUG) 1231 + fix_crc_bug(urb, serial->in_endp->wMaxPacketSize); 1245 1232 /* Valid data, handle RX data */ 1246 1233 spin_lock(&serial->serial_lock); 1247 1234 serial->rx_urb_filled[hso_urb_to_index(serial, urb)] = 1;
+3 -1
drivers/net/vmxnet3/vmxnet3_drv.c
··· 1131 1131 vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq, 1132 1132 struct vmxnet3_adapter *adapter, int quota) 1133 1133 { 1134 - static u32 rxprod_reg[2] = {VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2}; 1134 + static const u32 rxprod_reg[2] = { 1135 + VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2 1136 + }; 1135 1137 u32 num_rxd = 0; 1136 1138 struct Vmxnet3_RxCompDesc *rcd; 1137 1139 struct vmxnet3_rx_ctx *ctx = &rq->rx_ctx;
+3 -3
drivers/net/wan/dscc4.c
··· 1358 1358 return ret; 1359 1359 } 1360 1360 1361 - static int dscc4_match(struct thingie *p, int value) 1361 + static int dscc4_match(const struct thingie *p, int value) 1362 1362 { 1363 1363 int i; 1364 1364 ··· 1403 1403 static int dscc4_encoding_setting(struct dscc4_dev_priv *dpriv, 1404 1404 struct net_device *dev) 1405 1405 { 1406 - struct thingie encoding[] = { 1406 + static const struct thingie encoding[] = { 1407 1407 { ENCODING_NRZ, 0x00000000 }, 1408 1408 { ENCODING_NRZI, 0x00200000 }, 1409 1409 { ENCODING_FM_MARK, 0x00400000 }, ··· 1442 1442 static int dscc4_crc_setting(struct dscc4_dev_priv *dpriv, 1443 1443 struct net_device *dev) 1444 1444 { 1445 - struct thingie crc[] = { 1445 + static const struct thingie crc[] = { 1446 1446 { PARITY_CRC16_PR0_CCITT, 0x00000010 }, 1447 1447 { PARITY_CRC16_PR1_CCITT, 0x00000000 }, 1448 1448 { PARITY_CRC32_PR0_CCITT, 0x00000011 },
+1 -1
drivers/net/wd.c
··· 275 275 dev->base_addr = ioaddr+WD_NIC_OFFSET; 276 276 277 277 if (dev->irq < 2) { 278 - int irqmap[] = {9,3,5,7,10,11,15,4}; 278 + static const int irqmap[] = {9, 3, 5, 7, 10, 11, 15, 4}; 279 279 int reg1 = inb(ioaddr+1); 280 280 int reg4 = inb(ioaddr+4); 281 281 if (ancient || reg1 == 0xff) { /* Ack!! No way to read the IRQ! */