tjh.dev / kernel
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drm/amd/display: Modify DHCUB waterwark structures and functions

[WHY&HOW]
Converting the watermark set structure to a union and modifying some interfaces
to accommodate future usage.

Reviewed-by: Chaitanya Dhere <chaitanya.dhere@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Dillon Varone and committed by
Alex Deucher 5034b935 285a7054

+56 -50
+4 -4
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c
··· 242 242 243 243 bool hubbub1_program_urgent_watermarks( 244 244 struct hubbub *hubbub, 245 - struct dcn_watermark_set *watermarks, 245 + union dcn_watermark_set *watermarks, 246 246 unsigned int refclk_mhz, 247 247 bool safe_to_lower) 248 248 { ··· 356 356 357 357 bool hubbub1_program_stutter_watermarks( 358 358 struct hubbub *hubbub, 359 - struct dcn_watermark_set *watermarks, 359 + union dcn_watermark_set *watermarks, 360 360 unsigned int refclk_mhz, 361 361 bool safe_to_lower) 362 362 { ··· 501 501 502 502 bool hubbub1_program_pstate_watermarks( 503 503 struct hubbub *hubbub, 504 - struct dcn_watermark_set *watermarks, 504 + union dcn_watermark_set *watermarks, 505 505 unsigned int refclk_mhz, 506 506 bool safe_to_lower) 507 507 { ··· 582 582 583 583 bool hubbub1_program_watermarks( 584 584 struct hubbub *hubbub, 585 - struct dcn_watermark_set *watermarks, 585 + union dcn_watermark_set *watermarks, 586 586 unsigned int refclk_mhz, 587 587 bool safe_to_lower) 588 588 {
+5 -5
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h
··· 409 409 const struct dcn_hubbub_shift *shifts; 410 410 const struct dcn_hubbub_mask *masks; 411 411 unsigned int debug_test_index_pstate; 412 - struct dcn_watermark_set watermarks; 412 + union dcn_watermark_set watermarks; 413 413 }; 414 414 415 415 void hubbub1_update_dchub( ··· 423 423 424 424 bool hubbub1_program_watermarks( 425 425 struct hubbub *hubbub, 426 - struct dcn_watermark_set *watermarks, 426 + union dcn_watermark_set *watermarks, 427 427 unsigned int refclk_mhz, 428 428 bool safe_to_lower); 429 429 ··· 446 446 447 447 bool hubbub1_program_urgent_watermarks( 448 448 struct hubbub *hubbub, 449 - struct dcn_watermark_set *watermarks, 449 + union dcn_watermark_set *watermarks, 450 450 unsigned int refclk_mhz, 451 451 bool safe_to_lower); 452 452 bool hubbub1_program_stutter_watermarks( 453 453 struct hubbub *hubbub, 454 - struct dcn_watermark_set *watermarks, 454 + union dcn_watermark_set *watermarks, 455 455 unsigned int refclk_mhz, 456 456 bool safe_to_lower); 457 457 bool hubbub1_program_pstate_watermarks( 458 458 struct hubbub *hubbub, 459 - struct dcn_watermark_set *watermarks, 459 + union dcn_watermark_set *watermarks, 460 460 unsigned int refclk_mhz, 461 461 bool safe_to_lower); 462 462
+1 -1
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c
··· 570 570 571 571 static bool hubbub2_program_watermarks( 572 572 struct hubbub *hubbub, 573 - struct dcn_watermark_set *watermarks, 573 + union dcn_watermark_set *watermarks, 574 574 unsigned int refclk_mhz, 575 575 bool safe_to_lower) 576 576 {
+1 -1
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h
··· 85 85 const struct dcn_hubbub_shift *shifts; 86 86 const struct dcn_hubbub_mask *masks; 87 87 unsigned int debug_test_index_pstate; 88 - struct dcn_watermark_set watermarks; 88 + union dcn_watermark_set watermarks; 89 89 int num_vmid; 90 90 struct dcn20_vmid vmid[16]; 91 91 unsigned int detile_buf_size;
+1 -1
drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hubbub.c
··· 52 52 53 53 static bool hubbub201_program_watermarks( 54 54 struct hubbub *hubbub, 55 - struct dcn_watermark_set *watermarks, 55 + union dcn_watermark_set *watermarks, 56 56 unsigned int refclk_mhz, 57 57 bool safe_to_lower) 58 58 {
+4 -4
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c
··· 140 140 141 141 bool hubbub21_program_urgent_watermarks( 142 142 struct hubbub *hubbub, 143 - struct dcn_watermark_set *watermarks, 143 + union dcn_watermark_set *watermarks, 144 144 unsigned int refclk_mhz, 145 145 bool safe_to_lower) 146 146 { ··· 334 334 335 335 bool hubbub21_program_stutter_watermarks( 336 336 struct hubbub *hubbub, 337 - struct dcn_watermark_set *watermarks, 337 + union dcn_watermark_set *watermarks, 338 338 unsigned int refclk_mhz, 339 339 bool safe_to_lower) 340 340 { ··· 487 487 488 488 bool hubbub21_program_pstate_watermarks( 489 489 struct hubbub *hubbub, 490 - struct dcn_watermark_set *watermarks, 490 + union dcn_watermark_set *watermarks, 491 491 unsigned int refclk_mhz, 492 492 bool safe_to_lower) 493 493 { ··· 573 573 574 574 bool hubbub21_program_watermarks( 575 575 struct hubbub *hubbub, 576 - struct dcn_watermark_set *watermarks, 576 + union dcn_watermark_set *watermarks, 577 577 unsigned int refclk_mhz, 578 578 bool safe_to_lower) 579 579 {
+4 -4
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.h
··· 127 127 struct dcn_hubbub_phys_addr_config *pa_config); 128 128 bool hubbub21_program_watermarks( 129 129 struct hubbub *hubbub, 130 - struct dcn_watermark_set *watermarks, 130 + union dcn_watermark_set *watermarks, 131 131 unsigned int refclk_mhz, 132 132 bool safe_to_lower); 133 133 bool hubbub21_program_urgent_watermarks( 134 134 struct hubbub *hubbub, 135 - struct dcn_watermark_set *watermarks, 135 + union dcn_watermark_set *watermarks, 136 136 unsigned int refclk_mhz, 137 137 bool safe_to_lower); 138 138 bool hubbub21_program_stutter_watermarks( 139 139 struct hubbub *hubbub, 140 - struct dcn_watermark_set *watermarks, 140 + union dcn_watermark_set *watermarks, 141 141 unsigned int refclk_mhz, 142 142 bool safe_to_lower); 143 143 bool hubbub21_program_pstate_watermarks( 144 144 struct hubbub *hubbub, 145 - struct dcn_watermark_set *watermarks, 145 + union dcn_watermark_set *watermarks, 146 146 unsigned int refclk_mhz, 147 147 bool safe_to_lower); 148 148
+1 -1
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.c
··· 95 95 96 96 bool hubbub3_program_watermarks( 97 97 struct hubbub *hubbub, 98 - struct dcn_watermark_set *watermarks, 98 + union dcn_watermark_set *watermarks, 99 99 unsigned int refclk_mhz, 100 100 bool safe_to_lower) 101 101 {
+1 -1
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubbub.h
··· 124 124 125 125 bool hubbub3_program_watermarks( 126 126 struct hubbub *hubbub, 127 - struct dcn_watermark_set *watermarks, 127 + union dcn_watermark_set *watermarks, 128 128 unsigned int refclk_mhz, 129 129 bool safe_to_lower); 130 130
+4 -4
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hubbub.c
··· 172 172 173 173 static bool hubbub31_program_urgent_watermarks( 174 174 struct hubbub *hubbub, 175 - struct dcn_watermark_set *watermarks, 175 + union dcn_watermark_set *watermarks, 176 176 unsigned int refclk_mhz, 177 177 bool safe_to_lower) 178 178 { ··· 362 362 363 363 static bool hubbub31_program_stutter_watermarks( 364 364 struct hubbub *hubbub, 365 - struct dcn_watermark_set *watermarks, 365 + union dcn_watermark_set *watermarks, 366 366 unsigned int refclk_mhz, 367 367 bool safe_to_lower) 368 368 { ··· 635 635 636 636 static bool hubbub31_program_pstate_watermarks( 637 637 struct hubbub *hubbub, 638 - struct dcn_watermark_set *watermarks, 638 + union dcn_watermark_set *watermarks, 639 639 unsigned int refclk_mhz, 640 640 bool safe_to_lower) 641 641 { ··· 717 717 718 718 static bool hubbub31_program_watermarks( 719 719 struct hubbub *hubbub, 720 - struct dcn_watermark_set *watermarks, 720 + union dcn_watermark_set *watermarks, 721 721 unsigned int refclk_mhz, 722 722 bool safe_to_lower) 723 723 {
+5 -5
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.c
··· 167 167 168 168 bool hubbub32_program_urgent_watermarks( 169 169 struct hubbub *hubbub, 170 - struct dcn_watermark_set *watermarks, 170 + union dcn_watermark_set *watermarks, 171 171 unsigned int refclk_mhz, 172 172 bool safe_to_lower) 173 173 { ··· 357 357 358 358 bool hubbub32_program_stutter_watermarks( 359 359 struct hubbub *hubbub, 360 - struct dcn_watermark_set *watermarks, 360 + union dcn_watermark_set *watermarks, 361 361 unsigned int refclk_mhz, 362 362 bool safe_to_lower) 363 363 { ··· 503 503 504 504 bool hubbub32_program_pstate_watermarks( 505 505 struct hubbub *hubbub, 506 - struct dcn_watermark_set *watermarks, 506 + union dcn_watermark_set *watermarks, 507 507 unsigned int refclk_mhz, 508 508 bool safe_to_lower) 509 509 { ··· 656 656 657 657 bool hubbub32_program_usr_watermarks( 658 658 struct hubbub *hubbub, 659 - struct dcn_watermark_set *watermarks, 659 + union dcn_watermark_set *watermarks, 660 660 unsigned int refclk_mhz, 661 661 bool safe_to_lower) 662 662 { ··· 750 750 751 751 static bool hubbub32_program_watermarks( 752 752 struct hubbub *hubbub, 753 - struct dcn_watermark_set *watermarks, 753 + union dcn_watermark_set *watermarks, 754 754 unsigned int refclk_mhz, 755 755 bool safe_to_lower) 756 756 {
+4 -4
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubbub.h
··· 118 118 119 119 bool hubbub32_program_urgent_watermarks( 120 120 struct hubbub *hubbub, 121 - struct dcn_watermark_set *watermarks, 121 + union dcn_watermark_set *watermarks, 122 122 unsigned int refclk_mhz, 123 123 bool safe_to_lower); 124 124 125 125 bool hubbub32_program_stutter_watermarks( 126 126 struct hubbub *hubbub, 127 - struct dcn_watermark_set *watermarks, 127 + union dcn_watermark_set *watermarks, 128 128 unsigned int refclk_mhz, 129 129 bool safe_to_lower); 130 130 131 131 bool hubbub32_program_pstate_watermarks( 132 132 struct hubbub *hubbub, 133 - struct dcn_watermark_set *watermarks, 133 + union dcn_watermark_set *watermarks, 134 134 unsigned int refclk_mhz, 135 135 bool safe_to_lower); 136 136 137 137 bool hubbub32_program_usr_watermarks( 138 138 struct hubbub *hubbub, 139 - struct dcn_watermark_set *watermarks, 139 + union dcn_watermark_set *watermarks, 140 140 unsigned int refclk_mhz, 141 141 bool safe_to_lower); 142 142
+2 -2
drivers/gpu/drm/amd/display/dc/dcn35/dcn35_hubbub.c
··· 111 111 112 112 static bool hubbub35_program_stutter_z8_watermarks( 113 113 struct hubbub *hubbub, 114 - struct dcn_watermark_set *watermarks, 114 + union dcn_watermark_set *watermarks, 115 115 unsigned int refclk_mhz, 116 116 bool safe_to_lower) 117 117 { ··· 297 297 298 298 static bool hubbub35_program_watermarks( 299 299 struct hubbub *hubbub, 300 - struct dcn_watermark_set *watermarks, 300 + union dcn_watermark_set *watermarks, 301 301 unsigned int refclk_mhz, 302 302 bool safe_to_lower) 303 303 {
+10 -6
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
··· 1910 1910 dc->res_pool->hubbub->funcs->force_wm_propagate_to_pipes(dc->res_pool->hubbub); 1911 1911 } 1912 1912 1913 - if (dc->res_pool->hubbub->funcs->program_det_size && pipe_ctx->update_flags.bits.det_size) 1914 - dc->res_pool->hubbub->funcs->program_det_size( 1915 - dc->res_pool->hubbub, pipe_ctx->plane_res.hubp->inst, pipe_ctx->det_buffer_size_kb); 1913 + if (pipe_ctx->update_flags.bits.det_size) { 1914 + if (dc->res_pool->hubbub->funcs->program_det_size) 1915 + dc->res_pool->hubbub->funcs->program_det_size( 1916 + dc->res_pool->hubbub, pipe_ctx->plane_res.hubp->inst, pipe_ctx->det_buffer_size_kb); 1917 + } 1916 1918 1917 1919 if (pipe_ctx->update_flags.raw || pipe_ctx->plane_state->update_flags.raw || pipe_ctx->stream->update_flags.raw) 1918 1920 dcn20_update_dchubp_dpp(dc, pipe_ctx, context); ··· 2075 2073 * turned on (i.e. in an MCLK switch) which can come in too late and cause issues with 2076 2074 * DET allocation. 2077 2075 */ 2078 - if (hubbub->funcs->program_det_size && (context->res_ctx.pipe_ctx[i].update_flags.bits.disable || 2079 - (context->res_ctx.pipe_ctx[i].plane_state && dc_state_get_pipe_subvp_type(context, &context->res_ctx.pipe_ctx[i]) == SUBVP_PHANTOM))) 2080 - hubbub->funcs->program_det_size(hubbub, dc->current_state->res_ctx.pipe_ctx[i].plane_res.hubp->inst, 0); 2076 + if ((context->res_ctx.pipe_ctx[i].update_flags.bits.disable || 2077 + (context->res_ctx.pipe_ctx[i].plane_state && dc_state_get_pipe_subvp_type(context, &context->res_ctx.pipe_ctx[i]) == SUBVP_PHANTOM))) { 2078 + if (hubbub->funcs->program_det_size) 2079 + hubbub->funcs->program_det_size(hubbub, dc->current_state->res_ctx.pipe_ctx[i].plane_res.hubp->inst, 0); 2080 + } 2081 2081 hws->funcs.plane_atomic_disconnect(dc, dc->current_state, &dc->current_state->res_ctx.pipe_ctx[i]); 2082 2082 DC_LOG_DC("Reset mpcc for pipe %d\n", dc->current_state->res_ctx.pipe_ctx[i].pipe_idx); 2083 2083 }
+1 -1
drivers/gpu/drm/amd/display/dc/inc/core_types.h
··· 499 499 500 500 struct dcn_bw_output { 501 501 struct dc_clocks clk; 502 - struct dcn_watermark_set watermarks; 502 + union dcn_watermark_set watermarks; 503 503 struct dcn_bw_writeback bw_writeback; 504 504 int compbuf_size_kb; 505 505 unsigned int mall_ss_size_bytes;
+1 -1
drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h
··· 160 160 161 161 bool (*program_watermarks)( 162 162 struct hubbub *hubbub, 163 - struct dcn_watermark_set *watermarks, 163 + union dcn_watermark_set *watermarks, 164 164 unsigned int refclk_mhz, 165 165 bool safe_to_lower); 166 166
+7 -5
drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h
··· 50 50 uint32_t usr_retraining_ns; 51 51 }; 52 52 53 - struct dcn_watermark_set { 54 - struct dcn_watermarks a; 55 - struct dcn_watermarks b; 56 - struct dcn_watermarks c; 57 - struct dcn_watermarks d; 53 + union dcn_watermark_set { 54 + struct { 55 + struct dcn_watermarks a; 56 + struct dcn_watermarks b; 57 + struct dcn_watermarks c; 58 + struct dcn_watermarks d; 59 + }; // legacy 58 60 }; 59 61 60 62 struct dce_watermarks {