Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/amd/display: refactor the cursor programing codes

Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Roy Chan <roy.chan@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Roy Chan and committed by
Alex Deucher
4fd771ea f9ccaf6d

+73 -49
+73 -49
drivers/gpu/drm/amd/display/dc/core/dc_stream.c
··· 246 246 return dc_stream_get_status_from_state(dc->current_state, stream); 247 247 } 248 248 249 + static void program_cursor_attributes( 250 + struct dc *dc, 251 + struct dc_stream_state *stream, 252 + const struct dc_cursor_attributes *attributes) 253 + { 254 + int i; 255 + struct resource_context *res_ctx; 256 + struct pipe_ctx *pipe_to_program = NULL; 257 + 258 + if (!stream) 259 + return; 260 + 261 + res_ctx = &dc->current_state->res_ctx; 262 + 263 + for (i = 0; i < MAX_PIPES; i++) { 264 + struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; 265 + 266 + if (pipe_ctx->stream != stream) 267 + continue; 268 + 269 + if (!pipe_to_program) { 270 + pipe_to_program = pipe_ctx; 271 + dc->hwss.cursor_lock(dc, pipe_to_program, true); 272 + } 273 + 274 + dc->hwss.set_cursor_attribute(pipe_ctx); 275 + if (dc->hwss.set_cursor_sdr_white_level) 276 + dc->hwss.set_cursor_sdr_white_level(pipe_ctx); 277 + } 278 + 279 + if (pipe_to_program) 280 + dc->hwss.cursor_lock(dc, pipe_to_program, false); 281 + } 282 + 249 283 #ifndef TRIM_FSFT 250 284 /* 251 285 * dc_optimize_timing_for_fsft() - dc to optimize timing ··· 304 270 struct dc_stream_state *stream, 305 271 const struct dc_cursor_attributes *attributes) 306 272 { 307 - int i; 308 273 struct dc *dc; 309 - struct resource_context *res_ctx; 310 - struct pipe_ctx *pipe_to_program = NULL; 311 274 #if defined(CONFIG_DRM_AMD_DC_DCN) 312 275 bool reset_idle_optimizations = false; 313 276 #endif ··· 324 293 } 325 294 326 295 dc = stream->ctx->dc; 327 - res_ctx = &dc->current_state->res_ctx; 328 296 stream->cursor_attributes = *attributes; 329 297 330 298 #if defined(CONFIG_DRM_AMD_DC_DCN) ··· 335 305 } 336 306 337 307 #endif 338 - 339 - for (i = 0; i < MAX_PIPES; i++) { 340 - struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; 341 - 342 - if (pipe_ctx->stream != stream) 343 - continue; 344 - 345 - if (!pipe_to_program) { 346 - pipe_to_program = pipe_ctx; 347 - dc->hwss.cursor_lock(dc, pipe_to_program, true); 348 - } 349 - 350 - dc->hwss.set_cursor_attribute(pipe_ctx); 351 - if (dc->hwss.set_cursor_sdr_white_level) 352 - dc->hwss.set_cursor_sdr_white_level(pipe_ctx); 353 - } 354 - 355 - if (pipe_to_program) 356 - dc->hwss.cursor_lock(dc, pipe_to_program, false); 308 + program_cursor_attributes(dc, stream, attributes); 357 309 358 310 #if defined(CONFIG_DRM_AMD_DC_DCN) 359 311 /* re-enable idle optimizations if necessary */ ··· 346 334 return true; 347 335 } 348 336 349 - bool dc_stream_set_cursor_position( 337 + static void program_cursor_position( 338 + struct dc *dc, 350 339 struct dc_stream_state *stream, 351 340 const struct dc_cursor_position *position) 352 341 { 353 342 int i; 354 - struct dc *dc; 355 343 struct resource_context *res_ctx; 356 344 struct pipe_ctx *pipe_to_program = NULL; 357 - #if defined(CONFIG_DRM_AMD_DC_DCN) 358 - bool reset_idle_optimizations = false; 359 - #endif 360 345 361 - if (NULL == stream) { 362 - dm_error("DC: dc_stream is NULL!\n"); 363 - return false; 364 - } 346 + if (!stream) 347 + return; 365 348 366 - if (NULL == position) { 367 - dm_error("DC: cursor position is NULL!\n"); 368 - return false; 369 - } 370 - 371 - dc = stream->ctx->dc; 372 349 res_ctx = &dc->current_state->res_ctx; 373 - #if defined(CONFIG_DRM_AMD_DC_DCN) 374 - dc_z10_restore(dc); 375 - 376 - /* disable idle optimizations if enabling cursor */ 377 - if (dc->idle_optimizations_allowed && !stream->cursor_position.enable && position->enable) { 378 - dc_allow_idle_optimizations(dc, false); 379 - reset_idle_optimizations = true; 380 - } 381 - 382 - #endif 383 - stream->cursor_position = *position; 384 350 385 351 for (i = 0; i < MAX_PIPES; i++) { 386 352 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; ··· 380 390 381 391 if (pipe_to_program) 382 392 dc->hwss.cursor_lock(dc, pipe_to_program, false); 393 + } 383 394 395 + bool dc_stream_set_cursor_position( 396 + struct dc_stream_state *stream, 397 + const struct dc_cursor_position *position) 398 + { 399 + struct dc *dc; 400 + #if defined(CONFIG_DRM_AMD_DC_DCN) 401 + bool reset_idle_optimizations = false; 402 + #endif 403 + 404 + if (NULL == stream) { 405 + dm_error("DC: dc_stream is NULL!\n"); 406 + return false; 407 + } 408 + 409 + if (NULL == position) { 410 + dm_error("DC: cursor position is NULL!\n"); 411 + return false; 412 + } 413 + 414 + dc = stream->ctx->dc; 415 + #if defined(CONFIG_DRM_AMD_DC_DCN) 416 + dc_z10_restore(dc); 417 + 418 + /* disable idle optimizations if enabling cursor */ 419 + if (dc->idle_optimizations_allowed && !stream->cursor_position.enable && position->enable) { 420 + dc_allow_idle_optimizations(dc, false); 421 + reset_idle_optimizations = true; 422 + } 423 + 424 + #endif 425 + stream->cursor_position = *position; 426 + 427 + program_cursor_position(dc, stream, position); 384 428 #if defined(CONFIG_DRM_AMD_DC_DCN) 385 429 /* re-enable idle optimizations if necessary */ 386 430 if (reset_idle_optimizations)