tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
clk: rockchip: Add 1.6GHz PLL rate for rk3399
We need this rate to generate 100, 200, and 228.57MHz from the same
PLL. 228.57MHz is useful for a pixel clock when the VPLL is used for
an external display.
Signed-off-by: Derek Basehore <dbasehore@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
authored by
Derek Basehore
and committed by
Heiko Stuebner
4ee3fd4a
60cf09e4
+1
+1
drivers/clk/rockchip/clk-rk3399.c
+1
drivers/clk/rockchip/clk-rk3399.c
···
57
57
RK3036_PLL_RATE(1656000000, 1, 69, 1, 1, 1, 0),
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58
RK3036_PLL_RATE(1632000000, 1, 68, 1, 1, 1, 0),
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59
RK3036_PLL_RATE(1608000000, 1, 67, 1, 1, 1, 0),
60
+
RK3036_PLL_RATE(1600000000, 3, 200, 1, 1, 1, 0),
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61
RK3036_PLL_RATE(1584000000, 1, 66, 1, 1, 1, 0),
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62
RK3036_PLL_RATE(1560000000, 1, 65, 1, 1, 1, 0),
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63
RK3036_PLL_RATE(1536000000, 1, 64, 1, 1, 1, 0),