tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

pinctrl: sh-pfc: r8a7790: Add r8a7742 PFC support

Renesas RZ/G1H (R8A7742) is pin compatible with R-Car H2 (R8A7790),
however it doesn't have several automotive specific peripherals. Add
automotive-specific pin groups/functions along with common pin
groups/functions for supporting both r8a7790 and r8a7742 SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1588542414-14826-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

authored by

Lad Prabhakar and committed by
Geert Uytterhoeven 4ecc7ff8 baf674bf

+404 -352
+4
drivers/pinctrl/sh-pfc/Kconfig
··· 12 12 select PINCTRL_PFC_EMEV2 if ARCH_EMEV2 13 13 select PINCTRL_PFC_R8A73A4 if ARCH_R8A73A4 14 14 select PINCTRL_PFC_R8A7740 if ARCH_R8A7740 15 + select PINCTRL_PFC_R8A7742 if ARCH_R8A7742 15 16 select PINCTRL_PFC_R8A7743 if ARCH_R8A7743 16 17 select PINCTRL_PFC_R8A7744 if ARCH_R8A7744 17 18 select PINCTRL_PFC_R8A7745 if ARCH_R8A7745 ··· 74 73 config PINCTRL_PFC_R8A7740 75 74 bool "R-Mobile A1 pin control support" if COMPILE_TEST 76 75 select PINCTRL_SH_PFC_GPIO 76 + 77 + config PINCTRL_PFC_R8A7742 78 + bool "RZ/G1H pin control support" if COMPILE_TEST 77 79 78 80 config PINCTRL_PFC_R8A7743 79 81 bool "RZ/G1M pin control support" if COMPILE_TEST
+1
drivers/pinctrl/sh-pfc/Makefile
··· 4 4 obj-$(CONFIG_PINCTRL_PFC_EMEV2) += pfc-emev2.o 5 5 obj-$(CONFIG_PINCTRL_PFC_R8A73A4) += pfc-r8a73a4.o 6 6 obj-$(CONFIG_PINCTRL_PFC_R8A7740) += pfc-r8a7740.o 7 + obj-$(CONFIG_PINCTRL_PFC_R8A7742) += pfc-r8a7790.o 7 8 obj-$(CONFIG_PINCTRL_PFC_R8A7743) += pfc-r8a7791.o 8 9 obj-$(CONFIG_PINCTRL_PFC_R8A7744) += pfc-r8a7791.o 9 10 obj-$(CONFIG_PINCTRL_PFC_R8A7745) += pfc-r8a7794.o
+6
drivers/pinctrl/sh-pfc/core.c
··· 485 485 .data = &r8a7740_pinmux_info, 486 486 }, 487 487 #endif 488 + #ifdef CONFIG_PINCTRL_PFC_R8A7742 489 + { 490 + .compatible = "renesas,pfc-r8a7742", 491 + .data = &r8a7742_pinmux_info, 492 + }, 493 + #endif 488 494 #ifdef CONFIG_PINCTRL_PFC_R8A7743 489 495 { 490 496 .compatible = "renesas,pfc-r8a7743",
+392 -352
drivers/pinctrl/sh-pfc/pfc-r8a7790.c
··· 3938 3938 VI3_CLK_MARK, 3939 3939 }; 3940 3940 3941 - static const struct sh_pfc_pin_group pinmux_groups[] = { 3942 - SH_PFC_PIN_GROUP(audio_clk_a), 3943 - SH_PFC_PIN_GROUP(audio_clk_b), 3944 - SH_PFC_PIN_GROUP(audio_clk_c), 3945 - SH_PFC_PIN_GROUP(audio_clkout), 3946 - SH_PFC_PIN_GROUP(audio_clkout_b), 3947 - SH_PFC_PIN_GROUP(audio_clkout_c), 3948 - SH_PFC_PIN_GROUP(audio_clkout_d), 3949 - SH_PFC_PIN_GROUP(avb_link), 3950 - SH_PFC_PIN_GROUP(avb_magic), 3951 - SH_PFC_PIN_GROUP(avb_phy_int), 3952 - SH_PFC_PIN_GROUP(avb_mdio), 3953 - SH_PFC_PIN_GROUP(avb_mii), 3954 - SH_PFC_PIN_GROUP(avb_gmii), 3955 - SH_PFC_PIN_GROUP(du_rgb666), 3956 - SH_PFC_PIN_GROUP(du_rgb888), 3957 - SH_PFC_PIN_GROUP(du_clk_out_0), 3958 - SH_PFC_PIN_GROUP(du_clk_out_1), 3959 - SH_PFC_PIN_GROUP(du_sync_0), 3960 - SH_PFC_PIN_GROUP(du_sync_1), 3961 - SH_PFC_PIN_GROUP(du_cde), 3962 - SH_PFC_PIN_GROUP(du0_clk_in), 3963 - SH_PFC_PIN_GROUP(du1_clk_in), 3964 - SH_PFC_PIN_GROUP(du2_clk_in), 3965 - SH_PFC_PIN_GROUP(eth_link), 3966 - SH_PFC_PIN_GROUP(eth_magic), 3967 - SH_PFC_PIN_GROUP(eth_mdio), 3968 - SH_PFC_PIN_GROUP(eth_rmii), 3969 - SH_PFC_PIN_GROUP(hscif0_data), 3970 - SH_PFC_PIN_GROUP(hscif0_clk), 3971 - SH_PFC_PIN_GROUP(hscif0_ctrl), 3972 - SH_PFC_PIN_GROUP(hscif0_data_b), 3973 - SH_PFC_PIN_GROUP(hscif0_ctrl_b), 3974 - SH_PFC_PIN_GROUP(hscif0_data_c), 3975 - SH_PFC_PIN_GROUP(hscif0_ctrl_c), 3976 - SH_PFC_PIN_GROUP(hscif0_data_d), 3977 - SH_PFC_PIN_GROUP(hscif0_ctrl_d), 3978 - SH_PFC_PIN_GROUP(hscif0_data_e), 3979 - SH_PFC_PIN_GROUP(hscif0_ctrl_e), 3980 - SH_PFC_PIN_GROUP(hscif0_data_f), 3981 - SH_PFC_PIN_GROUP(hscif0_ctrl_f), 3982 - SH_PFC_PIN_GROUP(hscif1_data), 3983 - SH_PFC_PIN_GROUP(hscif1_clk), 3984 - SH_PFC_PIN_GROUP(hscif1_ctrl), 3985 - SH_PFC_PIN_GROUP(hscif1_data_b), 3986 - SH_PFC_PIN_GROUP(hscif1_clk_b), 3987 - SH_PFC_PIN_GROUP(hscif1_ctrl_b), 3988 - SH_PFC_PIN_GROUP(i2c0), 3989 - SH_PFC_PIN_GROUP(i2c1), 3990 - SH_PFC_PIN_GROUP(i2c1_b), 3991 - SH_PFC_PIN_GROUP(i2c1_c), 3992 - SH_PFC_PIN_GROUP(i2c2), 3993 - SH_PFC_PIN_GROUP(i2c2_b), 3994 - SH_PFC_PIN_GROUP(i2c2_c), 3995 - SH_PFC_PIN_GROUP(i2c2_d), 3996 - SH_PFC_PIN_GROUP(i2c2_e), 3997 - SH_PFC_PIN_GROUP(i2c3), 3998 - SH_PFC_PIN_GROUP(iic0), 3999 - SH_PFC_PIN_GROUP(iic1), 4000 - SH_PFC_PIN_GROUP(iic1_b), 4001 - SH_PFC_PIN_GROUP(iic1_c), 4002 - SH_PFC_PIN_GROUP(iic2), 4003 - SH_PFC_PIN_GROUP(iic2_b), 4004 - SH_PFC_PIN_GROUP(iic2_c), 4005 - SH_PFC_PIN_GROUP(iic2_d), 4006 - SH_PFC_PIN_GROUP(iic2_e), 4007 - SH_PFC_PIN_GROUP(iic3), 4008 - SH_PFC_PIN_GROUP(intc_irq0), 4009 - SH_PFC_PIN_GROUP(intc_irq1), 4010 - SH_PFC_PIN_GROUP(intc_irq2), 4011 - SH_PFC_PIN_GROUP(intc_irq3), 4012 - SH_PFC_PIN_GROUP(mlb_3pin), 4013 - SH_PFC_PIN_GROUP(mmc0_data1), 4014 - SH_PFC_PIN_GROUP(mmc0_data4), 4015 - SH_PFC_PIN_GROUP(mmc0_data8), 4016 - SH_PFC_PIN_GROUP(mmc0_ctrl), 4017 - SH_PFC_PIN_GROUP(mmc1_data1), 4018 - SH_PFC_PIN_GROUP(mmc1_data4), 4019 - SH_PFC_PIN_GROUP(mmc1_data8), 4020 - SH_PFC_PIN_GROUP(mmc1_ctrl), 4021 - SH_PFC_PIN_GROUP(msiof0_clk), 4022 - SH_PFC_PIN_GROUP(msiof0_sync), 4023 - SH_PFC_PIN_GROUP(msiof0_ss1), 4024 - SH_PFC_PIN_GROUP(msiof0_ss2), 4025 - SH_PFC_PIN_GROUP(msiof0_rx), 4026 - SH_PFC_PIN_GROUP(msiof0_tx), 4027 - SH_PFC_PIN_GROUP(msiof0_clk_b), 4028 - SH_PFC_PIN_GROUP(msiof0_ss1_b), 4029 - SH_PFC_PIN_GROUP(msiof0_ss2_b), 4030 - SH_PFC_PIN_GROUP(msiof0_rx_b), 4031 - SH_PFC_PIN_GROUP(msiof0_tx_b), 4032 - SH_PFC_PIN_GROUP(msiof1_clk), 4033 - SH_PFC_PIN_GROUP(msiof1_sync), 4034 - SH_PFC_PIN_GROUP(msiof1_ss1), 4035 - SH_PFC_PIN_GROUP(msiof1_ss2), 4036 - SH_PFC_PIN_GROUP(msiof1_rx), 4037 - SH_PFC_PIN_GROUP(msiof1_tx), 4038 - SH_PFC_PIN_GROUP(msiof1_clk_b), 4039 - SH_PFC_PIN_GROUP(msiof1_ss1_b), 4040 - SH_PFC_PIN_GROUP(msiof1_ss2_b), 4041 - SH_PFC_PIN_GROUP(msiof1_rx_b), 4042 - SH_PFC_PIN_GROUP(msiof1_tx_b), 4043 - SH_PFC_PIN_GROUP(msiof2_clk), 4044 - SH_PFC_PIN_GROUP(msiof2_sync), 4045 - SH_PFC_PIN_GROUP(msiof2_ss1), 4046 - SH_PFC_PIN_GROUP(msiof2_ss2), 4047 - SH_PFC_PIN_GROUP(msiof2_rx), 4048 - SH_PFC_PIN_GROUP(msiof2_tx), 4049 - SH_PFC_PIN_GROUP(msiof3_clk), 4050 - SH_PFC_PIN_GROUP(msiof3_sync), 4051 - SH_PFC_PIN_GROUP(msiof3_ss1), 4052 - SH_PFC_PIN_GROUP(msiof3_ss2), 4053 - SH_PFC_PIN_GROUP(msiof3_rx), 4054 - SH_PFC_PIN_GROUP(msiof3_tx), 4055 - SH_PFC_PIN_GROUP(msiof3_clk_b), 4056 - SH_PFC_PIN_GROUP(msiof3_sync_b), 4057 - SH_PFC_PIN_GROUP(msiof3_rx_b), 4058 - SH_PFC_PIN_GROUP(msiof3_tx_b), 4059 - SH_PFC_PIN_GROUP(pwm0), 4060 - SH_PFC_PIN_GROUP(pwm0_b), 4061 - SH_PFC_PIN_GROUP(pwm1), 4062 - SH_PFC_PIN_GROUP(pwm1_b), 4063 - SH_PFC_PIN_GROUP(pwm2), 4064 - SH_PFC_PIN_GROUP(pwm3), 4065 - SH_PFC_PIN_GROUP(pwm4), 4066 - SH_PFC_PIN_GROUP(pwm5), 4067 - SH_PFC_PIN_GROUP(pwm6), 4068 - SH_PFC_PIN_GROUP(qspi_ctrl), 4069 - SH_PFC_PIN_GROUP(qspi_data2), 4070 - SH_PFC_PIN_GROUP(qspi_data4), 4071 - SH_PFC_PIN_GROUP(scif0_data), 4072 - SH_PFC_PIN_GROUP(scif0_clk), 4073 - SH_PFC_PIN_GROUP(scif0_ctrl), 4074 - SH_PFC_PIN_GROUP(scif0_data_b), 4075 - SH_PFC_PIN_GROUP(scif1_data), 4076 - SH_PFC_PIN_GROUP(scif1_clk), 4077 - SH_PFC_PIN_GROUP(scif1_ctrl), 4078 - SH_PFC_PIN_GROUP(scif1_data_b), 4079 - SH_PFC_PIN_GROUP(scif1_data_c), 4080 - SH_PFC_PIN_GROUP(scif1_data_d), 4081 - SH_PFC_PIN_GROUP(scif1_clk_d), 4082 - SH_PFC_PIN_GROUP(scif1_data_e), 4083 - SH_PFC_PIN_GROUP(scif1_clk_e), 4084 - SH_PFC_PIN_GROUP(scif2_data), 4085 - SH_PFC_PIN_GROUP(scif2_clk), 4086 - SH_PFC_PIN_GROUP(scif2_data_b), 4087 - SH_PFC_PIN_GROUP(scifa0_data), 4088 - SH_PFC_PIN_GROUP(scifa0_clk), 4089 - SH_PFC_PIN_GROUP(scifa0_ctrl), 4090 - SH_PFC_PIN_GROUP(scifa0_data_b), 4091 - SH_PFC_PIN_GROUP(scifa0_clk_b), 4092 - SH_PFC_PIN_GROUP(scifa0_ctrl_b), 4093 - SH_PFC_PIN_GROUP(scifa1_data), 4094 - SH_PFC_PIN_GROUP(scifa1_clk), 4095 - SH_PFC_PIN_GROUP(scifa1_ctrl), 4096 - SH_PFC_PIN_GROUP(scifa1_data_b), 4097 - SH_PFC_PIN_GROUP(scifa1_clk_b), 4098 - SH_PFC_PIN_GROUP(scifa1_ctrl_b), 4099 - SH_PFC_PIN_GROUP(scifa1_data_c), 4100 - SH_PFC_PIN_GROUP(scifa1_clk_c), 4101 - SH_PFC_PIN_GROUP(scifa1_ctrl_c), 4102 - SH_PFC_PIN_GROUP(scifa1_data_d), 4103 - SH_PFC_PIN_GROUP(scifa1_clk_d), 4104 - SH_PFC_PIN_GROUP(scifa1_ctrl_d), 4105 - SH_PFC_PIN_GROUP(scifa2_data), 4106 - SH_PFC_PIN_GROUP(scifa2_clk), 4107 - SH_PFC_PIN_GROUP(scifa2_ctrl), 4108 - SH_PFC_PIN_GROUP(scifa2_data_b), 4109 - SH_PFC_PIN_GROUP(scifa2_data_c), 4110 - SH_PFC_PIN_GROUP(scifa2_clk_c), 4111 - SH_PFC_PIN_GROUP(scifb0_data), 4112 - SH_PFC_PIN_GROUP(scifb0_clk), 4113 - SH_PFC_PIN_GROUP(scifb0_ctrl), 4114 - SH_PFC_PIN_GROUP(scifb0_data_b), 4115 - SH_PFC_PIN_GROUP(scifb0_clk_b), 4116 - SH_PFC_PIN_GROUP(scifb0_ctrl_b), 4117 - SH_PFC_PIN_GROUP(scifb0_data_c), 4118 - SH_PFC_PIN_GROUP(scifb1_data), 4119 - SH_PFC_PIN_GROUP(scifb1_clk), 4120 - SH_PFC_PIN_GROUP(scifb1_ctrl), 4121 - SH_PFC_PIN_GROUP(scifb1_data_b), 4122 - SH_PFC_PIN_GROUP(scifb1_clk_b), 4123 - SH_PFC_PIN_GROUP(scifb1_ctrl_b), 4124 - SH_PFC_PIN_GROUP(scifb1_data_c), 4125 - SH_PFC_PIN_GROUP(scifb1_data_d), 4126 - SH_PFC_PIN_GROUP(scifb1_data_e), 4127 - SH_PFC_PIN_GROUP(scifb1_clk_e), 4128 - SH_PFC_PIN_GROUP(scifb1_data_f), 4129 - SH_PFC_PIN_GROUP(scifb1_data_g), 4130 - SH_PFC_PIN_GROUP(scifb1_clk_g), 4131 - SH_PFC_PIN_GROUP(scifb2_data), 4132 - SH_PFC_PIN_GROUP(scifb2_clk), 4133 - SH_PFC_PIN_GROUP(scifb2_ctrl), 4134 - SH_PFC_PIN_GROUP(scifb2_data_b), 4135 - SH_PFC_PIN_GROUP(scifb2_clk_b), 4136 - SH_PFC_PIN_GROUP(scifb2_ctrl_b), 4137 - SH_PFC_PIN_GROUP(scifb2_data_c), 4138 - SH_PFC_PIN_GROUP(scif_clk), 4139 - SH_PFC_PIN_GROUP(scif_clk_b), 4140 - SH_PFC_PIN_GROUP(sdhi0_data1), 4141 - SH_PFC_PIN_GROUP(sdhi0_data4), 4142 - SH_PFC_PIN_GROUP(sdhi0_ctrl), 4143 - SH_PFC_PIN_GROUP(sdhi0_cd), 4144 - SH_PFC_PIN_GROUP(sdhi0_wp), 4145 - SH_PFC_PIN_GROUP(sdhi1_data1), 4146 - SH_PFC_PIN_GROUP(sdhi1_data4), 4147 - SH_PFC_PIN_GROUP(sdhi1_ctrl), 4148 - SH_PFC_PIN_GROUP(sdhi1_cd), 4149 - SH_PFC_PIN_GROUP(sdhi1_wp), 4150 - SH_PFC_PIN_GROUP(sdhi2_data1), 4151 - SH_PFC_PIN_GROUP(sdhi2_data4), 4152 - SH_PFC_PIN_GROUP(sdhi2_ctrl), 4153 - SH_PFC_PIN_GROUP(sdhi2_cd), 4154 - SH_PFC_PIN_GROUP(sdhi2_wp), 4155 - SH_PFC_PIN_GROUP(sdhi3_data1), 4156 - SH_PFC_PIN_GROUP(sdhi3_data4), 4157 - SH_PFC_PIN_GROUP(sdhi3_ctrl), 4158 - SH_PFC_PIN_GROUP(sdhi3_cd), 4159 - SH_PFC_PIN_GROUP(sdhi3_wp), 4160 - SH_PFC_PIN_GROUP(ssi0_data), 4161 - SH_PFC_PIN_GROUP(ssi0129_ctrl), 4162 - SH_PFC_PIN_GROUP(ssi1_data), 4163 - SH_PFC_PIN_GROUP(ssi1_ctrl), 4164 - SH_PFC_PIN_GROUP(ssi2_data), 4165 - SH_PFC_PIN_GROUP(ssi2_ctrl), 4166 - SH_PFC_PIN_GROUP(ssi3_data), 4167 - SH_PFC_PIN_GROUP(ssi34_ctrl), 4168 - SH_PFC_PIN_GROUP(ssi4_data), 4169 - SH_PFC_PIN_GROUP(ssi4_ctrl), 4170 - SH_PFC_PIN_GROUP(ssi5), 4171 - SH_PFC_PIN_GROUP(ssi5_b), 4172 - SH_PFC_PIN_GROUP(ssi5_c), 4173 - SH_PFC_PIN_GROUP(ssi6), 4174 - SH_PFC_PIN_GROUP(ssi6_b), 4175 - SH_PFC_PIN_GROUP(ssi7_data), 4176 - SH_PFC_PIN_GROUP(ssi7_b_data), 4177 - SH_PFC_PIN_GROUP(ssi7_c_data), 4178 - SH_PFC_PIN_GROUP(ssi78_ctrl), 4179 - SH_PFC_PIN_GROUP(ssi78_b_ctrl), 4180 - SH_PFC_PIN_GROUP(ssi78_c_ctrl), 4181 - SH_PFC_PIN_GROUP(ssi8_data), 4182 - SH_PFC_PIN_GROUP(ssi8_b_data), 4183 - SH_PFC_PIN_GROUP(ssi8_c_data), 4184 - SH_PFC_PIN_GROUP(ssi9_data), 4185 - SH_PFC_PIN_GROUP(ssi9_ctrl), 4186 - SH_PFC_PIN_GROUP(tpu0_to0), 4187 - SH_PFC_PIN_GROUP(tpu0_to1), 4188 - SH_PFC_PIN_GROUP(tpu0_to2), 4189 - SH_PFC_PIN_GROUP(tpu0_to3), 4190 - SH_PFC_PIN_GROUP(usb0), 4191 - SH_PFC_PIN_GROUP(usb0_ovc_vbus), 4192 - SH_PFC_PIN_GROUP(usb1), 4193 - SH_PFC_PIN_GROUP(usb2), 4194 - VIN_DATA_PIN_GROUP(vin0_data, 24), 4195 - VIN_DATA_PIN_GROUP(vin0_data, 20), 4196 - SH_PFC_PIN_GROUP(vin0_data18), 4197 - VIN_DATA_PIN_GROUP(vin0_data, 16), 4198 - VIN_DATA_PIN_GROUP(vin0_data, 12), 4199 - VIN_DATA_PIN_GROUP(vin0_data, 10), 4200 - VIN_DATA_PIN_GROUP(vin0_data, 8), 4201 - VIN_DATA_PIN_GROUP(vin0_data, 4), 4202 - SH_PFC_PIN_GROUP(vin0_sync), 4203 - SH_PFC_PIN_GROUP(vin0_field), 4204 - SH_PFC_PIN_GROUP(vin0_clkenb), 4205 - SH_PFC_PIN_GROUP(vin0_clk), 4206 - VIN_DATA_PIN_GROUP(vin1_data, 24), 4207 - VIN_DATA_PIN_GROUP(vin1_data, 20), 4208 - SH_PFC_PIN_GROUP(vin1_data18), 4209 - VIN_DATA_PIN_GROUP(vin1_data, 16), 4210 - VIN_DATA_PIN_GROUP(vin1_data, 12), 4211 - VIN_DATA_PIN_GROUP(vin1_data, 10), 4212 - VIN_DATA_PIN_GROUP(vin1_data, 8), 4213 - VIN_DATA_PIN_GROUP(vin1_data, 4), 4214 - SH_PFC_PIN_GROUP(vin1_sync), 4215 - SH_PFC_PIN_GROUP(vin1_field), 4216 - SH_PFC_PIN_GROUP(vin1_clkenb), 4217 - SH_PFC_PIN_GROUP(vin1_clk), 4218 - VIN_DATA_PIN_GROUP(vin2_data, 24), 4219 - SH_PFC_PIN_GROUP(vin2_data18), 4220 - VIN_DATA_PIN_GROUP(vin2_data, 16), 4221 - VIN_DATA_PIN_GROUP(vin2_data, 8), 4222 - VIN_DATA_PIN_GROUP(vin2_data, 4), 4223 - SH_PFC_PIN_GROUP(vin2_sync), 4224 - SH_PFC_PIN_GROUP(vin2_field), 4225 - SH_PFC_PIN_GROUP(vin2_clkenb), 4226 - SH_PFC_PIN_GROUP(vin2_clk), 4227 - SH_PFC_PIN_GROUP(vin3_data8), 4228 - SH_PFC_PIN_GROUP(vin3_sync), 4229 - SH_PFC_PIN_GROUP(vin3_field), 4230 - SH_PFC_PIN_GROUP(vin3_clkenb), 4231 - SH_PFC_PIN_GROUP(vin3_clk), 3941 + static const struct { 3942 + struct sh_pfc_pin_group common[289]; 3943 + struct sh_pfc_pin_group automotive[1]; 3944 + } pinmux_groups = { 3945 + .common = { 3946 + SH_PFC_PIN_GROUP(audio_clk_a), 3947 + SH_PFC_PIN_GROUP(audio_clk_b), 3948 + SH_PFC_PIN_GROUP(audio_clk_c), 3949 + SH_PFC_PIN_GROUP(audio_clkout), 3950 + SH_PFC_PIN_GROUP(audio_clkout_b), 3951 + SH_PFC_PIN_GROUP(audio_clkout_c), 3952 + SH_PFC_PIN_GROUP(audio_clkout_d), 3953 + SH_PFC_PIN_GROUP(avb_link), 3954 + SH_PFC_PIN_GROUP(avb_magic), 3955 + SH_PFC_PIN_GROUP(avb_phy_int), 3956 + SH_PFC_PIN_GROUP(avb_mdio), 3957 + SH_PFC_PIN_GROUP(avb_mii), 3958 + SH_PFC_PIN_GROUP(avb_gmii), 3959 + SH_PFC_PIN_GROUP(du_rgb666), 3960 + SH_PFC_PIN_GROUP(du_rgb888), 3961 + SH_PFC_PIN_GROUP(du_clk_out_0), 3962 + SH_PFC_PIN_GROUP(du_clk_out_1), 3963 + SH_PFC_PIN_GROUP(du_sync_0), 3964 + SH_PFC_PIN_GROUP(du_sync_1), 3965 + SH_PFC_PIN_GROUP(du_cde), 3966 + SH_PFC_PIN_GROUP(du0_clk_in), 3967 + SH_PFC_PIN_GROUP(du1_clk_in), 3968 + SH_PFC_PIN_GROUP(du2_clk_in), 3969 + SH_PFC_PIN_GROUP(eth_link), 3970 + SH_PFC_PIN_GROUP(eth_magic), 3971 + SH_PFC_PIN_GROUP(eth_mdio), 3972 + SH_PFC_PIN_GROUP(eth_rmii), 3973 + SH_PFC_PIN_GROUP(hscif0_data), 3974 + SH_PFC_PIN_GROUP(hscif0_clk), 3975 + SH_PFC_PIN_GROUP(hscif0_ctrl), 3976 + SH_PFC_PIN_GROUP(hscif0_data_b), 3977 + SH_PFC_PIN_GROUP(hscif0_ctrl_b), 3978 + SH_PFC_PIN_GROUP(hscif0_data_c), 3979 + SH_PFC_PIN_GROUP(hscif0_ctrl_c), 3980 + SH_PFC_PIN_GROUP(hscif0_data_d), 3981 + SH_PFC_PIN_GROUP(hscif0_ctrl_d), 3982 + SH_PFC_PIN_GROUP(hscif0_data_e), 3983 + SH_PFC_PIN_GROUP(hscif0_ctrl_e), 3984 + SH_PFC_PIN_GROUP(hscif0_data_f), 3985 + SH_PFC_PIN_GROUP(hscif0_ctrl_f), 3986 + SH_PFC_PIN_GROUP(hscif1_data), 3987 + SH_PFC_PIN_GROUP(hscif1_clk), 3988 + SH_PFC_PIN_GROUP(hscif1_ctrl), 3989 + SH_PFC_PIN_GROUP(hscif1_data_b), 3990 + SH_PFC_PIN_GROUP(hscif1_clk_b), 3991 + SH_PFC_PIN_GROUP(hscif1_ctrl_b), 3992 + SH_PFC_PIN_GROUP(i2c0), 3993 + SH_PFC_PIN_GROUP(i2c1), 3994 + SH_PFC_PIN_GROUP(i2c1_b), 3995 + SH_PFC_PIN_GROUP(i2c1_c), 3996 + SH_PFC_PIN_GROUP(i2c2), 3997 + SH_PFC_PIN_GROUP(i2c2_b), 3998 + SH_PFC_PIN_GROUP(i2c2_c), 3999 + SH_PFC_PIN_GROUP(i2c2_d), 4000 + SH_PFC_PIN_GROUP(i2c2_e), 4001 + SH_PFC_PIN_GROUP(i2c3), 4002 + SH_PFC_PIN_GROUP(iic0), 4003 + SH_PFC_PIN_GROUP(iic1), 4004 + SH_PFC_PIN_GROUP(iic1_b), 4005 + SH_PFC_PIN_GROUP(iic1_c), 4006 + SH_PFC_PIN_GROUP(iic2), 4007 + SH_PFC_PIN_GROUP(iic2_b), 4008 + SH_PFC_PIN_GROUP(iic2_c), 4009 + SH_PFC_PIN_GROUP(iic2_d), 4010 + SH_PFC_PIN_GROUP(iic2_e), 4011 + SH_PFC_PIN_GROUP(iic3), 4012 + SH_PFC_PIN_GROUP(intc_irq0), 4013 + SH_PFC_PIN_GROUP(intc_irq1), 4014 + SH_PFC_PIN_GROUP(intc_irq2), 4015 + SH_PFC_PIN_GROUP(intc_irq3), 4016 + SH_PFC_PIN_GROUP(mmc0_data1), 4017 + SH_PFC_PIN_GROUP(mmc0_data4), 4018 + SH_PFC_PIN_GROUP(mmc0_data8), 4019 + SH_PFC_PIN_GROUP(mmc0_ctrl), 4020 + SH_PFC_PIN_GROUP(mmc1_data1), 4021 + SH_PFC_PIN_GROUP(mmc1_data4), 4022 + SH_PFC_PIN_GROUP(mmc1_data8), 4023 + SH_PFC_PIN_GROUP(mmc1_ctrl), 4024 + SH_PFC_PIN_GROUP(msiof0_clk), 4025 + SH_PFC_PIN_GROUP(msiof0_sync), 4026 + SH_PFC_PIN_GROUP(msiof0_ss1), 4027 + SH_PFC_PIN_GROUP(msiof0_ss2), 4028 + SH_PFC_PIN_GROUP(msiof0_rx), 4029 + SH_PFC_PIN_GROUP(msiof0_tx), 4030 + SH_PFC_PIN_GROUP(msiof0_clk_b), 4031 + SH_PFC_PIN_GROUP(msiof0_ss1_b), 4032 + SH_PFC_PIN_GROUP(msiof0_ss2_b), 4033 + SH_PFC_PIN_GROUP(msiof0_rx_b), 4034 + SH_PFC_PIN_GROUP(msiof0_tx_b), 4035 + SH_PFC_PIN_GROUP(msiof1_clk), 4036 + SH_PFC_PIN_GROUP(msiof1_sync), 4037 + SH_PFC_PIN_GROUP(msiof1_ss1), 4038 + SH_PFC_PIN_GROUP(msiof1_ss2), 4039 + SH_PFC_PIN_GROUP(msiof1_rx), 4040 + SH_PFC_PIN_GROUP(msiof1_tx), 4041 + SH_PFC_PIN_GROUP(msiof1_clk_b), 4042 + SH_PFC_PIN_GROUP(msiof1_ss1_b), 4043 + SH_PFC_PIN_GROUP(msiof1_ss2_b), 4044 + SH_PFC_PIN_GROUP(msiof1_rx_b), 4045 + SH_PFC_PIN_GROUP(msiof1_tx_b), 4046 + SH_PFC_PIN_GROUP(msiof2_clk), 4047 + SH_PFC_PIN_GROUP(msiof2_sync), 4048 + SH_PFC_PIN_GROUP(msiof2_ss1), 4049 + SH_PFC_PIN_GROUP(msiof2_ss2), 4050 + SH_PFC_PIN_GROUP(msiof2_rx), 4051 + SH_PFC_PIN_GROUP(msiof2_tx), 4052 + SH_PFC_PIN_GROUP(msiof3_clk), 4053 + SH_PFC_PIN_GROUP(msiof3_sync), 4054 + SH_PFC_PIN_GROUP(msiof3_ss1), 4055 + SH_PFC_PIN_GROUP(msiof3_ss2), 4056 + SH_PFC_PIN_GROUP(msiof3_rx), 4057 + SH_PFC_PIN_GROUP(msiof3_tx), 4058 + SH_PFC_PIN_GROUP(msiof3_clk_b), 4059 + SH_PFC_PIN_GROUP(msiof3_sync_b), 4060 + SH_PFC_PIN_GROUP(msiof3_rx_b), 4061 + SH_PFC_PIN_GROUP(msiof3_tx_b), 4062 + SH_PFC_PIN_GROUP(pwm0), 4063 + SH_PFC_PIN_GROUP(pwm0_b), 4064 + SH_PFC_PIN_GROUP(pwm1), 4065 + SH_PFC_PIN_GROUP(pwm1_b), 4066 + SH_PFC_PIN_GROUP(pwm2), 4067 + SH_PFC_PIN_GROUP(pwm3), 4068 + SH_PFC_PIN_GROUP(pwm4), 4069 + SH_PFC_PIN_GROUP(pwm5), 4070 + SH_PFC_PIN_GROUP(pwm6), 4071 + SH_PFC_PIN_GROUP(qspi_ctrl), 4072 + SH_PFC_PIN_GROUP(qspi_data2), 4073 + SH_PFC_PIN_GROUP(qspi_data4), 4074 + SH_PFC_PIN_GROUP(scif0_data), 4075 + SH_PFC_PIN_GROUP(scif0_clk), 4076 + SH_PFC_PIN_GROUP(scif0_ctrl), 4077 + SH_PFC_PIN_GROUP(scif0_data_b), 4078 + SH_PFC_PIN_GROUP(scif1_data), 4079 + SH_PFC_PIN_GROUP(scif1_clk), 4080 + SH_PFC_PIN_GROUP(scif1_ctrl), 4081 + SH_PFC_PIN_GROUP(scif1_data_b), 4082 + SH_PFC_PIN_GROUP(scif1_data_c), 4083 + SH_PFC_PIN_GROUP(scif1_data_d), 4084 + SH_PFC_PIN_GROUP(scif1_clk_d), 4085 + SH_PFC_PIN_GROUP(scif1_data_e), 4086 + SH_PFC_PIN_GROUP(scif1_clk_e), 4087 + SH_PFC_PIN_GROUP(scif2_data), 4088 + SH_PFC_PIN_GROUP(scif2_clk), 4089 + SH_PFC_PIN_GROUP(scif2_data_b), 4090 + SH_PFC_PIN_GROUP(scifa0_data), 4091 + SH_PFC_PIN_GROUP(scifa0_clk), 4092 + SH_PFC_PIN_GROUP(scifa0_ctrl), 4093 + SH_PFC_PIN_GROUP(scifa0_data_b), 4094 + SH_PFC_PIN_GROUP(scifa0_clk_b), 4095 + SH_PFC_PIN_GROUP(scifa0_ctrl_b), 4096 + SH_PFC_PIN_GROUP(scifa1_data), 4097 + SH_PFC_PIN_GROUP(scifa1_clk), 4098 + SH_PFC_PIN_GROUP(scifa1_ctrl), 4099 + SH_PFC_PIN_GROUP(scifa1_data_b), 4100 + SH_PFC_PIN_GROUP(scifa1_clk_b), 4101 + SH_PFC_PIN_GROUP(scifa1_ctrl_b), 4102 + SH_PFC_PIN_GROUP(scifa1_data_c), 4103 + SH_PFC_PIN_GROUP(scifa1_clk_c), 4104 + SH_PFC_PIN_GROUP(scifa1_ctrl_c), 4105 + SH_PFC_PIN_GROUP(scifa1_data_d), 4106 + SH_PFC_PIN_GROUP(scifa1_clk_d), 4107 + SH_PFC_PIN_GROUP(scifa1_ctrl_d), 4108 + SH_PFC_PIN_GROUP(scifa2_data), 4109 + SH_PFC_PIN_GROUP(scifa2_clk), 4110 + SH_PFC_PIN_GROUP(scifa2_ctrl), 4111 + SH_PFC_PIN_GROUP(scifa2_data_b), 4112 + SH_PFC_PIN_GROUP(scifa2_data_c), 4113 + SH_PFC_PIN_GROUP(scifa2_clk_c), 4114 + SH_PFC_PIN_GROUP(scifb0_data), 4115 + SH_PFC_PIN_GROUP(scifb0_clk), 4116 + SH_PFC_PIN_GROUP(scifb0_ctrl), 4117 + SH_PFC_PIN_GROUP(scifb0_data_b), 4118 + SH_PFC_PIN_GROUP(scifb0_clk_b), 4119 + SH_PFC_PIN_GROUP(scifb0_ctrl_b), 4120 + SH_PFC_PIN_GROUP(scifb0_data_c), 4121 + SH_PFC_PIN_GROUP(scifb1_data), 4122 + SH_PFC_PIN_GROUP(scifb1_clk), 4123 + SH_PFC_PIN_GROUP(scifb1_ctrl), 4124 + SH_PFC_PIN_GROUP(scifb1_data_b), 4125 + SH_PFC_PIN_GROUP(scifb1_clk_b), 4126 + SH_PFC_PIN_GROUP(scifb1_ctrl_b), 4127 + SH_PFC_PIN_GROUP(scifb1_data_c), 4128 + SH_PFC_PIN_GROUP(scifb1_data_d), 4129 + SH_PFC_PIN_GROUP(scifb1_data_e), 4130 + SH_PFC_PIN_GROUP(scifb1_clk_e), 4131 + SH_PFC_PIN_GROUP(scifb1_data_f), 4132 + SH_PFC_PIN_GROUP(scifb1_data_g), 4133 + SH_PFC_PIN_GROUP(scifb1_clk_g), 4134 + SH_PFC_PIN_GROUP(scifb2_data), 4135 + SH_PFC_PIN_GROUP(scifb2_clk), 4136 + SH_PFC_PIN_GROUP(scifb2_ctrl), 4137 + SH_PFC_PIN_GROUP(scifb2_data_b), 4138 + SH_PFC_PIN_GROUP(scifb2_clk_b), 4139 + SH_PFC_PIN_GROUP(scifb2_ctrl_b), 4140 + SH_PFC_PIN_GROUP(scifb2_data_c), 4141 + SH_PFC_PIN_GROUP(scif_clk), 4142 + SH_PFC_PIN_GROUP(scif_clk_b), 4143 + SH_PFC_PIN_GROUP(sdhi0_data1), 4144 + SH_PFC_PIN_GROUP(sdhi0_data4), 4145 + SH_PFC_PIN_GROUP(sdhi0_ctrl), 4146 + SH_PFC_PIN_GROUP(sdhi0_cd), 4147 + SH_PFC_PIN_GROUP(sdhi0_wp), 4148 + SH_PFC_PIN_GROUP(sdhi1_data1), 4149 + SH_PFC_PIN_GROUP(sdhi1_data4), 4150 + SH_PFC_PIN_GROUP(sdhi1_ctrl), 4151 + SH_PFC_PIN_GROUP(sdhi1_cd), 4152 + SH_PFC_PIN_GROUP(sdhi1_wp), 4153 + SH_PFC_PIN_GROUP(sdhi2_data1), 4154 + SH_PFC_PIN_GROUP(sdhi2_data4), 4155 + SH_PFC_PIN_GROUP(sdhi2_ctrl), 4156 + SH_PFC_PIN_GROUP(sdhi2_cd), 4157 + SH_PFC_PIN_GROUP(sdhi2_wp), 4158 + SH_PFC_PIN_GROUP(sdhi3_data1), 4159 + SH_PFC_PIN_GROUP(sdhi3_data4), 4160 + SH_PFC_PIN_GROUP(sdhi3_ctrl), 4161 + SH_PFC_PIN_GROUP(sdhi3_cd), 4162 + SH_PFC_PIN_GROUP(sdhi3_wp), 4163 + SH_PFC_PIN_GROUP(ssi0_data), 4164 + SH_PFC_PIN_GROUP(ssi0129_ctrl), 4165 + SH_PFC_PIN_GROUP(ssi1_data), 4166 + SH_PFC_PIN_GROUP(ssi1_ctrl), 4167 + SH_PFC_PIN_GROUP(ssi2_data), 4168 + SH_PFC_PIN_GROUP(ssi2_ctrl), 4169 + SH_PFC_PIN_GROUP(ssi3_data), 4170 + SH_PFC_PIN_GROUP(ssi34_ctrl), 4171 + SH_PFC_PIN_GROUP(ssi4_data), 4172 + SH_PFC_PIN_GROUP(ssi4_ctrl), 4173 + SH_PFC_PIN_GROUP(ssi5), 4174 + SH_PFC_PIN_GROUP(ssi5_b), 4175 + SH_PFC_PIN_GROUP(ssi5_c), 4176 + SH_PFC_PIN_GROUP(ssi6), 4177 + SH_PFC_PIN_GROUP(ssi6_b), 4178 + SH_PFC_PIN_GROUP(ssi7_data), 4179 + SH_PFC_PIN_GROUP(ssi7_b_data), 4180 + SH_PFC_PIN_GROUP(ssi7_c_data), 4181 + SH_PFC_PIN_GROUP(ssi78_ctrl), 4182 + SH_PFC_PIN_GROUP(ssi78_b_ctrl), 4183 + SH_PFC_PIN_GROUP(ssi78_c_ctrl), 4184 + SH_PFC_PIN_GROUP(ssi8_data), 4185 + SH_PFC_PIN_GROUP(ssi8_b_data), 4186 + SH_PFC_PIN_GROUP(ssi8_c_data), 4187 + SH_PFC_PIN_GROUP(ssi9_data), 4188 + SH_PFC_PIN_GROUP(ssi9_ctrl), 4189 + SH_PFC_PIN_GROUP(tpu0_to0), 4190 + SH_PFC_PIN_GROUP(tpu0_to1), 4191 + SH_PFC_PIN_GROUP(tpu0_to2), 4192 + SH_PFC_PIN_GROUP(tpu0_to3), 4193 + SH_PFC_PIN_GROUP(usb0), 4194 + SH_PFC_PIN_GROUP(usb0_ovc_vbus), 4195 + SH_PFC_PIN_GROUP(usb1), 4196 + SH_PFC_PIN_GROUP(usb2), 4197 + VIN_DATA_PIN_GROUP(vin0_data, 24), 4198 + VIN_DATA_PIN_GROUP(vin0_data, 20), 4199 + SH_PFC_PIN_GROUP(vin0_data18), 4200 + VIN_DATA_PIN_GROUP(vin0_data, 16), 4201 + VIN_DATA_PIN_GROUP(vin0_data, 12), 4202 + VIN_DATA_PIN_GROUP(vin0_data, 10), 4203 + VIN_DATA_PIN_GROUP(vin0_data, 8), 4204 + VIN_DATA_PIN_GROUP(vin0_data, 4), 4205 + SH_PFC_PIN_GROUP(vin0_sync), 4206 + SH_PFC_PIN_GROUP(vin0_field), 4207 + SH_PFC_PIN_GROUP(vin0_clkenb), 4208 + SH_PFC_PIN_GROUP(vin0_clk), 4209 + VIN_DATA_PIN_GROUP(vin1_data, 24), 4210 + VIN_DATA_PIN_GROUP(vin1_data, 20), 4211 + SH_PFC_PIN_GROUP(vin1_data18), 4212 + VIN_DATA_PIN_GROUP(vin1_data, 16), 4213 + VIN_DATA_PIN_GROUP(vin1_data, 12), 4214 + VIN_DATA_PIN_GROUP(vin1_data, 10), 4215 + VIN_DATA_PIN_GROUP(vin1_data, 8), 4216 + VIN_DATA_PIN_GROUP(vin1_data, 4), 4217 + SH_PFC_PIN_GROUP(vin1_sync), 4218 + SH_PFC_PIN_GROUP(vin1_field), 4219 + SH_PFC_PIN_GROUP(vin1_clkenb), 4220 + SH_PFC_PIN_GROUP(vin1_clk), 4221 + VIN_DATA_PIN_GROUP(vin2_data, 24), 4222 + SH_PFC_PIN_GROUP(vin2_data18), 4223 + VIN_DATA_PIN_GROUP(vin2_data, 16), 4224 + VIN_DATA_PIN_GROUP(vin2_data, 8), 4225 + VIN_DATA_PIN_GROUP(vin2_data, 4), 4226 + SH_PFC_PIN_GROUP(vin2_sync), 4227 + SH_PFC_PIN_GROUP(vin2_field), 4228 + SH_PFC_PIN_GROUP(vin2_clkenb), 4229 + SH_PFC_PIN_GROUP(vin2_clk), 4230 + SH_PFC_PIN_GROUP(vin3_data8), 4231 + SH_PFC_PIN_GROUP(vin3_sync), 4232 + SH_PFC_PIN_GROUP(vin3_field), 4233 + SH_PFC_PIN_GROUP(vin3_clkenb), 4234 + SH_PFC_PIN_GROUP(vin3_clk), 4235 + }, 4236 + .automotive = { 4237 + SH_PFC_PIN_GROUP(mlb_3pin), 4238 + } 4232 4239 }; 4233 4240 4234 4241 static const char * const audio_clk_groups[] = { ··· 4696 4689 "vin3_clk", 4697 4690 }; 4698 4691 4699 - static const struct sh_pfc_function pinmux_functions[] = { 4700 - SH_PFC_FUNCTION(audio_clk), 4701 - SH_PFC_FUNCTION(avb), 4702 - SH_PFC_FUNCTION(du), 4703 - SH_PFC_FUNCTION(du0), 4704 - SH_PFC_FUNCTION(du1), 4705 - SH_PFC_FUNCTION(du2), 4706 - SH_PFC_FUNCTION(eth), 4707 - SH_PFC_FUNCTION(hscif0), 4708 - SH_PFC_FUNCTION(hscif1), 4709 - SH_PFC_FUNCTION(i2c0), 4710 - SH_PFC_FUNCTION(i2c1), 4711 - SH_PFC_FUNCTION(i2c2), 4712 - SH_PFC_FUNCTION(i2c3), 4713 - SH_PFC_FUNCTION(iic0), 4714 - SH_PFC_FUNCTION(iic1), 4715 - SH_PFC_FUNCTION(iic2), 4716 - SH_PFC_FUNCTION(iic3), 4717 - SH_PFC_FUNCTION(intc), 4718 - SH_PFC_FUNCTION(mlb), 4719 - SH_PFC_FUNCTION(mmc0), 4720 - SH_PFC_FUNCTION(mmc1), 4721 - SH_PFC_FUNCTION(msiof0), 4722 - SH_PFC_FUNCTION(msiof1), 4723 - SH_PFC_FUNCTION(msiof2), 4724 - SH_PFC_FUNCTION(msiof3), 4725 - SH_PFC_FUNCTION(pwm0), 4726 - SH_PFC_FUNCTION(pwm1), 4727 - SH_PFC_FUNCTION(pwm2), 4728 - SH_PFC_FUNCTION(pwm3), 4729 - SH_PFC_FUNCTION(pwm4), 4730 - SH_PFC_FUNCTION(pwm5), 4731 - SH_PFC_FUNCTION(pwm6), 4732 - SH_PFC_FUNCTION(qspi), 4733 - SH_PFC_FUNCTION(scif0), 4734 - SH_PFC_FUNCTION(scif1), 4735 - SH_PFC_FUNCTION(scif2), 4736 - SH_PFC_FUNCTION(scifa0), 4737 - SH_PFC_FUNCTION(scifa1), 4738 - SH_PFC_FUNCTION(scifa2), 4739 - SH_PFC_FUNCTION(scifb0), 4740 - SH_PFC_FUNCTION(scifb1), 4741 - SH_PFC_FUNCTION(scifb2), 4742 - SH_PFC_FUNCTION(scif_clk), 4743 - SH_PFC_FUNCTION(sdhi0), 4744 - SH_PFC_FUNCTION(sdhi1), 4745 - SH_PFC_FUNCTION(sdhi2), 4746 - SH_PFC_FUNCTION(sdhi3), 4747 - SH_PFC_FUNCTION(ssi), 4748 - SH_PFC_FUNCTION(tpu0), 4749 - SH_PFC_FUNCTION(usb0), 4750 - SH_PFC_FUNCTION(usb1), 4751 - SH_PFC_FUNCTION(usb2), 4752 - SH_PFC_FUNCTION(vin0), 4753 - SH_PFC_FUNCTION(vin1), 4754 - SH_PFC_FUNCTION(vin2), 4755 - SH_PFC_FUNCTION(vin3), 4692 + static const struct { 4693 + struct sh_pfc_function common[55]; 4694 + struct sh_pfc_function automotive[1]; 4695 + } pinmux_functions = { 4696 + .common = { 4697 + SH_PFC_FUNCTION(audio_clk), 4698 + SH_PFC_FUNCTION(avb), 4699 + SH_PFC_FUNCTION(du), 4700 + SH_PFC_FUNCTION(du0), 4701 + SH_PFC_FUNCTION(du1), 4702 + SH_PFC_FUNCTION(du2), 4703 + SH_PFC_FUNCTION(eth), 4704 + SH_PFC_FUNCTION(hscif0), 4705 + SH_PFC_FUNCTION(hscif1), 4706 + SH_PFC_FUNCTION(i2c0), 4707 + SH_PFC_FUNCTION(i2c1), 4708 + SH_PFC_FUNCTION(i2c2), 4709 + SH_PFC_FUNCTION(i2c3), 4710 + SH_PFC_FUNCTION(iic0), 4711 + SH_PFC_FUNCTION(iic1), 4712 + SH_PFC_FUNCTION(iic2), 4713 + SH_PFC_FUNCTION(iic3), 4714 + SH_PFC_FUNCTION(intc), 4715 + SH_PFC_FUNCTION(mmc0), 4716 + SH_PFC_FUNCTION(mmc1), 4717 + SH_PFC_FUNCTION(msiof0), 4718 + SH_PFC_FUNCTION(msiof1), 4719 + SH_PFC_FUNCTION(msiof2), 4720 + SH_PFC_FUNCTION(msiof3), 4721 + SH_PFC_FUNCTION(pwm0), 4722 + SH_PFC_FUNCTION(pwm1), 4723 + SH_PFC_FUNCTION(pwm2), 4724 + SH_PFC_FUNCTION(pwm3), 4725 + SH_PFC_FUNCTION(pwm4), 4726 + SH_PFC_FUNCTION(pwm5), 4727 + SH_PFC_FUNCTION(pwm6), 4728 + SH_PFC_FUNCTION(qspi), 4729 + SH_PFC_FUNCTION(scif0), 4730 + SH_PFC_FUNCTION(scif1), 4731 + SH_PFC_FUNCTION(scif2), 4732 + SH_PFC_FUNCTION(scifa0), 4733 + SH_PFC_FUNCTION(scifa1), 4734 + SH_PFC_FUNCTION(scifa2), 4735 + SH_PFC_FUNCTION(scifb0), 4736 + SH_PFC_FUNCTION(scifb1), 4737 + SH_PFC_FUNCTION(scifb2), 4738 + SH_PFC_FUNCTION(scif_clk), 4739 + SH_PFC_FUNCTION(sdhi0), 4740 + SH_PFC_FUNCTION(sdhi1), 4741 + SH_PFC_FUNCTION(sdhi2), 4742 + SH_PFC_FUNCTION(sdhi3), 4743 + SH_PFC_FUNCTION(ssi), 4744 + SH_PFC_FUNCTION(tpu0), 4745 + SH_PFC_FUNCTION(usb0), 4746 + SH_PFC_FUNCTION(usb1), 4747 + SH_PFC_FUNCTION(usb2), 4748 + SH_PFC_FUNCTION(vin0), 4749 + SH_PFC_FUNCTION(vin1), 4750 + SH_PFC_FUNCTION(vin2), 4751 + SH_PFC_FUNCTION(vin3), 4752 + }, 4753 + .automotive = { 4754 + SH_PFC_FUNCTION(mlb), 4755 + } 4756 4756 }; 4757 4757 4758 4758 static const struct pinmux_cfg_reg pinmux_config_regs[] = { ··· 5750 5736 .pin_to_pocctrl = r8a7790_pin_to_pocctrl, 5751 5737 }; 5752 5738 5739 + #ifdef CONFIG_PINCTRL_PFC_R8A7742 5740 + const struct sh_pfc_soc_info r8a7742_pinmux_info = { 5741 + .name = "r8a77420_pfc", 5742 + .ops = &r8a7790_pinmux_ops, 5743 + .unlock_reg = 0xe6060000, /* PMMR */ 5744 + 5745 + .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, 5746 + 5747 + .pins = pinmux_pins, 5748 + .nr_pins = ARRAY_SIZE(pinmux_pins), 5749 + .groups = pinmux_groups.common, 5750 + .nr_groups = ARRAY_SIZE(pinmux_groups.common), 5751 + .functions = pinmux_functions.common, 5752 + .nr_functions = ARRAY_SIZE(pinmux_functions.common), 5753 + 5754 + .cfg_regs = pinmux_config_regs, 5755 + 5756 + .pinmux_data = pinmux_data, 5757 + .pinmux_data_size = ARRAY_SIZE(pinmux_data), 5758 + }; 5759 + #endif 5760 + 5761 + #ifdef CONFIG_PINCTRL_PFC_R8A7790 5753 5762 const struct sh_pfc_soc_info r8a7790_pinmux_info = { 5754 5763 .name = "r8a77900_pfc", 5755 5764 .ops = &r8a7790_pinmux_ops, ··· 5782 5745 5783 5746 .pins = pinmux_pins, 5784 5747 .nr_pins = ARRAY_SIZE(pinmux_pins), 5785 - .groups = pinmux_groups, 5786 - .nr_groups = ARRAY_SIZE(pinmux_groups), 5787 - .functions = pinmux_functions, 5788 - .nr_functions = ARRAY_SIZE(pinmux_functions), 5748 + .groups = pinmux_groups.common, 5749 + .nr_groups = ARRAY_SIZE(pinmux_groups.common) + 5750 + ARRAY_SIZE(pinmux_groups.automotive), 5751 + .functions = pinmux_functions.common, 5752 + .nr_functions = ARRAY_SIZE(pinmux_functions.common) + 5753 + ARRAY_SIZE(pinmux_functions.automotive), 5789 5754 5790 5755 .cfg_regs = pinmux_config_regs, 5791 5756 5792 5757 .pinmux_data = pinmux_data, 5793 5758 .pinmux_data_size = ARRAY_SIZE(pinmux_data), 5794 5759 }; 5760 + #endif
+1
drivers/pinctrl/sh-pfc/sh_pfc.h
··· 304 304 extern const struct sh_pfc_soc_info emev2_pinmux_info; 305 305 extern const struct sh_pfc_soc_info r8a73a4_pinmux_info; 306 306 extern const struct sh_pfc_soc_info r8a7740_pinmux_info; 307 + extern const struct sh_pfc_soc_info r8a7742_pinmux_info; 307 308 extern const struct sh_pfc_soc_info r8a7743_pinmux_info; 308 309 extern const struct sh_pfc_soc_info r8a7744_pinmux_info; 309 310 extern const struct sh_pfc_soc_info r8a7745_pinmux_info;