phy: qcom: qmp: Add debug prints for register writes

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

These register prints are useful to validate the init sequence against the
Qcom internal documentation and also to share with the Qcom hw engineers to
debug issues related to PHY.

Sample debug prints:

qcom-qmp-pcie-phy 1c0e000.phy: Writing Reg: QSERDES_V5_COM_SYSCLK_EN_SEL Offset: 0x0094 Val: 0xd9
qcom-qmp-pcie-phy 1c0e000.phy: Writing Reg: QSERDES_V5_COM_HSCLK_SEL Offset: 0x0158 Val: 0x11

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240731152548.102987-1-manivannan.sadhasivam@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Manivannan Sadhasivam and committed by

Vinod Koul 2 years ago 4e92d504 f75999c5

+67 -60

7 changed files

expand all

drivers

phy

qualcomm

phy-qcom-qmp-combo.c

phy-qcom-qmp-common.h

phy-qcom-qmp-pcie-msm8996.c

phy-qcom-qmp-pcie.c

phy-qcom-qmp-ufs.c

phy-qcom-qmp-usb.c

phy-qcom-qmp-usbc.c

+20 -18

drivers/phy/qualcomm/phy-qcom-qmp-combo.c

··· 2190 2190 void __iomem *serdes = qmp->dp_serdes; 2191 2191 const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; 2192 2192 2193 - qmp_configure(serdes, cfg->dp_serdes_tbl, cfg->dp_serdes_tbl_num); 2193 + qmp_configure(qmp->dev, serdes, cfg->dp_serdes_tbl, 2194 + cfg->dp_serdes_tbl_num); 2194 2195 2195 2196 switch (dp_opts->link_rate) { 2196 2197 case 1620: 2197 - qmp_configure(serdes, cfg->serdes_tbl_rbr, 2198 - cfg->serdes_tbl_rbr_num); 2198 + qmp_configure(qmp->dev, serdes, cfg->serdes_tbl_rbr, 2199 + cfg->serdes_tbl_rbr_num); 2199 2200 break; 2200 2201 case 2700: 2201 - qmp_configure(serdes, cfg->serdes_tbl_hbr, 2202 - cfg->serdes_tbl_hbr_num); 2202 + qmp_configure(qmp->dev, serdes, cfg->serdes_tbl_hbr, 2203 + cfg->serdes_tbl_hbr_num); 2203 2204 break; 2204 2205 case 5400: 2205 - qmp_configure(serdes, cfg->serdes_tbl_hbr2, 2206 - cfg->serdes_tbl_hbr2_num); 2206 + qmp_configure(qmp->dev, serdes, cfg->serdes_tbl_hbr2, 2207 + cfg->serdes_tbl_hbr2_num); 2207 2208 break; 2208 2209 case 8100: 2209 - qmp_configure(serdes, cfg->serdes_tbl_hbr3, 2210 - cfg->serdes_tbl_hbr3_num); 2210 + qmp_configure(qmp->dev, serdes, cfg->serdes_tbl_hbr3, 2211 + cfg->serdes_tbl_hbr3_num); 2211 2212 break; 2212 2213 default: 2213 2214 /* Other link rates aren't supported */ ··· 2808 2807 2809 2808 qmp_combo_dp_serdes_init(qmp); 2810 2809 2811 - qmp_configure_lane(tx, cfg->dp_tx_tbl, cfg->dp_tx_tbl_num, 1); 2812 - qmp_configure_lane(tx2, cfg->dp_tx_tbl, cfg->dp_tx_tbl_num, 2); 2810 + qmp_configure_lane(qmp->dev, tx, cfg->dp_tx_tbl, cfg->dp_tx_tbl_num, 1); 2811 + qmp_configure_lane(qmp->dev, tx2, cfg->dp_tx_tbl, cfg->dp_tx_tbl_num, 2); 2813 2812 2814 2813 /* Configure special DP tx tunings */ 2815 2814 cfg->configure_dp_tx(qmp); ··· 2851 2850 unsigned int val; 2852 2851 int ret; 2853 2852 2854 - qmp_configure(serdes, cfg->serdes_tbl, cfg->serdes_tbl_num); 2853 + qmp_configure(qmp->dev, serdes, cfg->serdes_tbl, cfg->serdes_tbl_num); 2855 2854 2856 2855 ret = clk_prepare_enable(qmp->pipe_clk); 2857 2856 if (ret) { ··· 2860 2859 } 2861 2860 2862 2861 /* Tx, Rx, and PCS configurations */ 2863 - qmp_configure_lane(tx, cfg->tx_tbl, cfg->tx_tbl_num, 1); 2864 - qmp_configure_lane(tx2, cfg->tx_tbl, cfg->tx_tbl_num, 2); 2862 + qmp_configure_lane(qmp->dev, tx, cfg->tx_tbl, cfg->tx_tbl_num, 1); 2863 + qmp_configure_lane(qmp->dev, tx2, cfg->tx_tbl, cfg->tx_tbl_num, 2); 2865 2864 2866 - qmp_configure_lane(rx, cfg->rx_tbl, cfg->rx_tbl_num, 1); 2867 - qmp_configure_lane(rx2, cfg->rx_tbl, cfg->rx_tbl_num, 2); 2865 + qmp_configure_lane(qmp->dev, rx, cfg->rx_tbl, cfg->rx_tbl_num, 1); 2866 + qmp_configure_lane(qmp->dev, rx2, cfg->rx_tbl, cfg->rx_tbl_num, 2); 2868 2867 2869 - qmp_configure(pcs, cfg->pcs_tbl, cfg->pcs_tbl_num); 2868 + qmp_configure(qmp->dev, pcs, cfg->pcs_tbl, cfg->pcs_tbl_num); 2870 2869 2871 2870 if (pcs_usb) 2872 - qmp_configure(pcs_usb, cfg->pcs_usb_tbl, cfg->pcs_usb_tbl_num); 2871 + qmp_configure(qmp->dev, pcs_usb, cfg->pcs_usb_tbl, 2872 + cfg->pcs_usb_tbl_num); 2873 2873 2874 2874 if (cfg->has_pwrdn_delay) 2875 2875 usleep_range(10, 20);

+11 -8

drivers/phy/qualcomm/phy-qcom-qmp-common.h

··· 9 9 struct qmp_phy_init_tbl { 10 10 unsigned int offset; 11 11 unsigned int val; 12 + char *name; 12 13 /* 13 14 * mask of lanes for which this register is written 14 15 * for cases when second lane needs different values ··· 21 20 { \ 22 21 .offset = o, \ 23 22 .val = v, \ 23 + .name = #o, \ 24 24 .lane_mask = 0xff, \ 25 25 } 26 26 ··· 29 27 { \ 30 28 .offset = o, \ 31 29 .val = v, \ 30 + .name = #o, \ 32 31 .lane_mask = l, \ 33 32 } 34 33 35 - static inline void qmp_configure_lane(void __iomem *base, 36 - const struct qmp_phy_init_tbl tbl[], 37 - int num, 38 - u8 lane_mask) 34 + static inline void qmp_configure_lane(struct device *dev, void __iomem *base, 35 + const struct qmp_phy_init_tbl tbl[], 36 + int num, u8 lane_mask) 39 37 { 40 38 int i; 41 39 const struct qmp_phy_init_tbl *t = tbl; ··· 47 45 if (!(t->lane_mask & lane_mask)) 48 46 continue; 49 47 48 + dev_dbg(dev, "Writing Reg: %s Offset: 0x%04x Val: 0x%02x\n", 49 + t->name, t->offset, t->val); 50 50 writel(t->val, base + t->offset); 51 51 } 52 52 } 53 53 54 - static inline void qmp_configure(void __iomem *base, 55 - const struct qmp_phy_init_tbl tbl[], 56 - int num) 54 + static inline void qmp_configure(struct device *dev, void __iomem *base, 55 + const struct qmp_phy_init_tbl tbl[], int num) 57 56 { 58 - qmp_configure_lane(base, tbl, num, 0xff); 57 + qmp_configure_lane(dev, base, tbl, num, 0xff); 59 58 } 60 59 61 60 #endif

+4 -4

drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c

··· 288 288 unsigned int val; 289 289 int ret; 290 290 291 - qmp_configure(serdes, serdes_tbl, serdes_tbl_num); 291 + qmp_configure(qmp->dev, serdes, serdes_tbl, serdes_tbl_num); 292 292 293 293 qphy_clrbits(serdes, cfg->regs[QPHY_COM_SW_RESET], SW_RESET); 294 294 qphy_setbits(serdes, cfg->regs[QPHY_COM_START_CONTROL], ··· 431 431 } 432 432 433 433 /* Tx, Rx, and PCS configurations */ 434 - qmp_configure_lane(tx, cfg->tx_tbl, cfg->tx_tbl_num, 1); 435 - qmp_configure_lane(rx, cfg->rx_tbl, cfg->rx_tbl_num, 1); 436 - qmp_configure(pcs, cfg->pcs_tbl, cfg->pcs_tbl_num); 434 + qmp_configure_lane(qmp->dev, tx, cfg->tx_tbl, cfg->tx_tbl_num, 1); 435 + qmp_configure_lane(qmp->dev, rx, cfg->rx_tbl, cfg->rx_tbl_num, 1); 436 + qmp_configure(qmp->dev, pcs, cfg->pcs_tbl, cfg->pcs_tbl_num); 437 437 438 438 /* 439 439 * Pull out PHY from POWER DOWN state.

+14 -13

drivers/phy/qualcomm/phy-qcom-qmp-pcie.c

··· 3667 3667 tx4 = qmp->port_b + offs->tx2; 3668 3668 rx4 = qmp->port_b + offs->rx2; 3669 3669 3670 - qmp_configure_lane(tx3, tbls->tx, tbls->tx_num, 1); 3671 - qmp_configure_lane(rx3, tbls->rx, tbls->rx_num, 1); 3670 + qmp_configure_lane(qmp->dev, tx3, tbls->tx, tbls->tx_num, 1); 3671 + qmp_configure_lane(qmp->dev, rx3, tbls->rx, tbls->rx_num, 1); 3672 3672 3673 - qmp_configure_lane(tx4, tbls->tx, tbls->tx_num, 2); 3674 - qmp_configure_lane(rx4, tbls->rx, tbls->rx_num, 2); 3673 + qmp_configure_lane(qmp->dev, tx4, tbls->tx, tbls->tx_num, 2); 3674 + qmp_configure_lane(qmp->dev, rx4, tbls->rx, tbls->rx_num, 2); 3675 3675 } 3676 3676 3677 3677 static void qmp_pcie_init_registers(struct qmp_pcie *qmp, const struct qmp_phy_cfg_tbls *tbls) ··· 3689 3689 if (!tbls) 3690 3690 return; 3691 3691 3692 - qmp_configure(serdes, tbls->serdes, tbls->serdes_num); 3692 + qmp_configure(qmp->dev, serdes, tbls->serdes, tbls->serdes_num); 3693 3693 3694 - qmp_configure_lane(tx, tbls->tx, tbls->tx_num, 1); 3695 - qmp_configure_lane(rx, tbls->rx, tbls->rx_num, 1); 3694 + qmp_configure_lane(qmp->dev, tx, tbls->tx, tbls->tx_num, 1); 3695 + qmp_configure_lane(qmp->dev, rx, tbls->rx, tbls->rx_num, 1); 3696 3696 3697 3697 if (cfg->lanes >= 2) { 3698 - qmp_configure_lane(tx2, tbls->tx, tbls->tx_num, 2); 3699 - qmp_configure_lane(rx2, tbls->rx, tbls->rx_num, 2); 3698 + qmp_configure_lane(qmp->dev, tx2, tbls->tx, tbls->tx_num, 2); 3699 + qmp_configure_lane(qmp->dev, rx2, tbls->rx, tbls->rx_num, 2); 3700 3700 } 3701 3701 3702 - qmp_configure(pcs, tbls->pcs, tbls->pcs_num); 3703 - qmp_configure(pcs_misc, tbls->pcs_misc, tbls->pcs_misc_num); 3702 + qmp_configure(qmp->dev, pcs, tbls->pcs, tbls->pcs_num); 3703 + qmp_configure(qmp->dev, pcs_misc, tbls->pcs_misc, tbls->pcs_misc_num); 3704 3704 3705 3705 if (cfg->lanes >= 4 && qmp->tcsr_4ln_config) { 3706 - qmp_configure(serdes, cfg->serdes_4ln_tbl, cfg->serdes_4ln_num); 3706 + qmp_configure(qmp->dev, serdes, cfg->serdes_4ln_tbl, 3707 + cfg->serdes_4ln_num); 3707 3708 qmp_pcie_init_port_b(qmp, tbls); 3708 3709 } 3709 3710 3710 - qmp_configure(ln_shrd, tbls->ln_shrd, tbls->ln_shrd_num); 3711 + qmp_configure(qmp->dev, ln_shrd, tbls->ln_shrd, tbls->ln_shrd_num); 3711 3712 } 3712 3713 3713 3714 static int qmp_pcie_init(struct phy *phy)

+6 -6

drivers/phy/qualcomm/phy-qcom-qmp-ufs.c

··· 1527 1527 { 1528 1528 void __iomem *serdes = qmp->serdes; 1529 1529 1530 - qmp_configure(serdes, tbls->serdes, tbls->serdes_num); 1530 + qmp_configure(qmp->dev, serdes, tbls->serdes, tbls->serdes_num); 1531 1531 } 1532 1532 1533 1533 static void qmp_ufs_lanes_init(struct qmp_ufs *qmp, const struct qmp_phy_cfg_tbls *tbls) ··· 1536 1536 void __iomem *tx = qmp->tx; 1537 1537 void __iomem *rx = qmp->rx; 1538 1538 1539 - qmp_configure_lane(tx, tbls->tx, tbls->tx_num, 1); 1540 - qmp_configure_lane(rx, tbls->rx, tbls->rx_num, 1); 1539 + qmp_configure_lane(qmp->dev, tx, tbls->tx, tbls->tx_num, 1); 1540 + qmp_configure_lane(qmp->dev, rx, tbls->rx, tbls->rx_num, 1); 1541 1541 1542 1542 if (cfg->lanes >= 2) { 1543 - qmp_configure_lane(qmp->tx2, tbls->tx, tbls->tx_num, 2); 1544 - qmp_configure_lane(qmp->rx2, tbls->rx, tbls->rx_num, 2); 1543 + qmp_configure_lane(qmp->dev, qmp->tx2, tbls->tx, tbls->tx_num, 2); 1544 + qmp_configure_lane(qmp->dev, qmp->rx2, tbls->rx, tbls->rx_num, 2); 1545 1545 } 1546 1546 } 1547 1547 ··· 1549 1549 { 1550 1550 void __iomem *pcs = qmp->pcs; 1551 1551 1552 - qmp_configure(pcs, tbls->pcs, tbls->pcs_num); 1552 + qmp_configure(qmp->dev, pcs, tbls->pcs, tbls->pcs_num); 1553 1553 } 1554 1554 1555 1555 static int qmp_ufs_get_gear_overlay(struct qmp_ufs *qmp, const struct qmp_phy_cfg *cfg)

+5 -5

drivers/phy/qualcomm/phy-qcom-qmp-usb.c

··· 1649 1649 const struct qmp_phy_init_tbl *serdes_tbl = cfg->serdes_tbl; 1650 1650 int serdes_tbl_num = cfg->serdes_tbl_num; 1651 1651 1652 - qmp_configure(serdes, serdes_tbl, serdes_tbl_num); 1652 + qmp_configure(qmp->dev, serdes, serdes_tbl, serdes_tbl_num); 1653 1653 1654 1654 return 0; 1655 1655 } ··· 1730 1730 } 1731 1731 1732 1732 /* Tx, Rx, and PCS configurations */ 1733 - qmp_configure_lane(tx, cfg->tx_tbl, cfg->tx_tbl_num, 1); 1734 - qmp_configure_lane(rx, cfg->rx_tbl, cfg->rx_tbl_num, 1); 1733 + qmp_configure_lane(qmp->dev, tx, cfg->tx_tbl, cfg->tx_tbl_num, 1); 1734 + qmp_configure_lane(qmp->dev, rx, cfg->rx_tbl, cfg->rx_tbl_num, 1); 1735 1735 1736 - qmp_configure(pcs, cfg->pcs_tbl, cfg->pcs_tbl_num); 1736 + qmp_configure(qmp->dev, pcs, cfg->pcs_tbl, cfg->pcs_tbl_num); 1737 1737 1738 1738 if (pcs_usb) 1739 - qmp_configure(pcs_usb, cfg->pcs_usb_tbl, cfg->pcs_usb_tbl_num); 1739 + qmp_configure(qmp->dev, pcs_usb, cfg->pcs_usb_tbl, cfg->pcs_usb_tbl_num); 1740 1740 1741 1741 if (cfg->has_pwrdn_delay) 1742 1742 usleep_range(10, 20);

+7 -6

drivers/phy/qualcomm/phy-qcom-qmp-usbc.c

··· 526 526 unsigned int val; 527 527 int ret; 528 528 529 - qmp_configure(qmp->serdes, cfg->serdes_tbl, cfg->serdes_tbl_num); 529 + qmp_configure(qmp->dev, qmp->serdes, cfg->serdes_tbl, 530 + cfg->serdes_tbl_num); 530 531 531 532 ret = clk_prepare_enable(qmp->pipe_clk); 532 533 if (ret) { ··· 536 535 } 537 536 538 537 /* Tx, Rx, and PCS configurations */ 539 - qmp_configure_lane(qmp->tx, cfg->tx_tbl, cfg->tx_tbl_num, 1); 540 - qmp_configure_lane(qmp->rx, cfg->rx_tbl, cfg->rx_tbl_num, 1); 538 + qmp_configure_lane(qmp->dev, qmp->tx, cfg->tx_tbl, cfg->tx_tbl_num, 1); 539 + qmp_configure_lane(qmp->dev, qmp->rx, cfg->rx_tbl, cfg->rx_tbl_num, 1); 541 540 542 - qmp_configure_lane(qmp->tx2, cfg->tx_tbl, cfg->tx_tbl_num, 2); 543 - qmp_configure_lane(qmp->rx2, cfg->rx_tbl, cfg->rx_tbl_num, 2); 541 + qmp_configure_lane(qmp->dev, qmp->tx2, cfg->tx_tbl, cfg->tx_tbl_num, 2); 542 + qmp_configure_lane(qmp->dev, qmp->rx2, cfg->rx_tbl, cfg->rx_tbl_num, 2); 544 543 545 - qmp_configure(qmp->pcs, cfg->pcs_tbl, cfg->pcs_tbl_num); 544 + qmp_configure(qmp->dev, qmp->pcs, cfg->pcs_tbl, cfg->pcs_tbl_num); 546 545 547 546 /* Pull PHY out of reset state */ 548 547 qphy_clrbits(qmp->pcs, cfg->regs[QPHY_SW_RESET], SW_RESET);