Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'iio-for-5.8a' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next

Jonathan writes:

First set of new IIO device support, features and cleanup for the 5.8 cycle

Usual mix of new drivers, new support in old drivers and lots of minor
cleanup. Yaml conversions also continue to trickle in (plenty more to go!)

New device support
* ad7476
- Add ad7091 support (ID only)
* ad9467
- New driver for this 200/250 MSPS adi-axi-adc and SPI attached ADC.
* adi-axi-adc
- New driver to support ADIs generic AXI ADC IP core, used to provide
high speed interfaces to ADCs (JESD204B/C or parallel interfaces). Usually
paired with a device using a slow configuration interface (spi etc)
Includes DT bindings and some fixes for fpga headers.
* bmg160
- Add support for BMI088 (ID only)
* max1241
- New driver for this ADC.
* st_sensors
- Add support for LIS2HH12 accelerometer
* sx9310
- New driver supporting sx9310 and sx9311 proximity sensors.

Yaml DT binding conversions
* rockchip-saradc (including adding some missing parts)
* stm32-dac
* tsl2563
* vcnl4000

Features
* st_lsm6dsx
- Add LIS3MDL as a possible sensor hub device.
* vcnl4000
- Add new concept of near level (from DT) to provide to userspace which
often needs to have some calibrated concept of 'near'.

Cleanups, minor fixes etc.
* core
- Use snprintf for functions where strings are built and there is
potential for overflow.
- Correct docs to indicate mlock should not be used directly by drivers.
- Fix up accidental dropping of a patch to use bitmap_zalloc.
- Stop allowing enabling of buffers with no channels enabled.
- Drop unused 'stufftoread' from iio_buffer.
- Drop scan_el_attrs form iio_buffer as unused.
- Reorder sanity checks in __iio_device_register to fail earlier.
- Drop all the devm_ runregister / free functions from IIO as they
were never used and encourage poor design.
* dma-buffer
- Tidy up includes.
* dma-engine-buffer
- Provide dev-managed allocator.
- Fix an issue with printing a size_t
* cross subsystem (kxsd9, bmg160, mpu3050, bmi160, mpu6050, bmc150)
- Replace some unnecessary casts of error ptrs and whilst there.
use the %pe printf parameter to print them in a more useful fashion.
* cross subsystem
- Drop casts in calls to regmap_bulk_read as they make no sense.
- Use devm_platform_ioremap_resource to reduce boilerplate.
- Fix typos in Analog Devices.
* counters/104-quad
- Add Syed Nayyar Waris as an additional maintainer.
* ad7476
- Generate CONVST signal internally rather than requiring external
trigger. Add sysfs read back as can now do so.
- use devm_add_action_or_reset to tidy up error and remove handling.
* ad7793
- Switch to read_avail from explicit attribute. Mostly done to avoid
confusing people with a - sign (without surounding spaces) that
was correct but checkpatch didn't like.
* adis library
- Add missing newlines at end of error messages.
* adis16400
- Use DEFINE_DEBUGS_ATTRIBUTE rather than DEFINE_SIMPLE_ATTR.
* adis16460
- Use DEFINE_DEBUGS_ATTRIBUTE rather than DEFINE_SIMPLE_ATTR.
* ad_sigma_delta
- Move some channel definitions into individual drivers to avoid
having to deal with complex options.
* ak8974
- Silence an error on deffered probe.
* bmp280
- Harden against IRQ before registration.
- Convert to read_avail instead of opencoding the equivalent.
- Explicitly mark GPIO as optional.
- Cleanup casts.
- Remove line breaks from strings.
* htts221
- Replace direct access to platform_data with dev_get_platdata().
- Use device properties rather than device tree ones to allow ACPI
probing.
- Casting cleanups.
* intel_mrfld_adc
- Don't use unaligned accessor for aligned data.
* isl29125
- Reorder buer pre and post hooks to allow for coming core rework.
* ltc2983
- Remove comp to bool.
* max1363
- Stop using mlock from the iio_dev directly in favour of a local lock
with clearly defined scope.
* max30100
- Use generic device properties to allow ACPI probe.
* mpu6050
- Convert to i2c_new_client_device.
- Add debugfs register access.
* st_lsm6dsx
- Provide means of configuring full scale on slave device if supported.
- Drop include of st_sensors header to get one value. Its not otherwise
used by this driver.
* st-sensors
- Replace direct access to platform_data with dev_get_platdata().
- Casting cleanups.
- Avoid splitting strings.
* st_uvis25
- Casting cleanups.
* tsl2563
- Typo fix.
* tsl2772
- scnprintf in a non obvious string building usecase. Note also 'fixes'
a wrong calculation of remaining space that couldn't actually cause
any trouble as there was lots of room.
* xilinx-xadc
- Fix Lars-Peter spelling his own name wrong :) + additional typos.

* tag 'iio-for-5.8a' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (101 commits)
iio: magnetometer: ak8974: Silence deferred-probe error
Documentation: ABI: document IIO in_proximity_nearlevel file
iio: vcnl4000: Export near level property for proximity sensor
dt-bindings: iio: light: vcnl4000: Add proximity-near-level
dt-bindings: iio: Introduce common properties for iio sensors
dt-bindings: iio: vcnl4000: convert bindings to YAML format
iio: Fix misspellings of "Analog Devices"
iio: light: isl29125: fix iio_triggered_buffer_{predisable,postenable} positions
iio: adc: fsl-imx25-gcq: Use devm_platform_ioremap_resource
iio: adc: at91-adc: Use devm_platform_ioremap_resource
iio: adc: sun4i-gpadc-iio: Use devm_platform_ioremap_resource
iio:light:ltr501: Drop unnecessary cast of parameter in regmap_bulk_read
iio:magn:mmc35240: Drop unnecessary casts of val parameter in regmap_bulk*
iio:imu:mpu6050: Tidy up parameters to regmap_bulk functions.
iio:chemical:bme680: Tidy up parameters to regmap_bulk_read
iio:chemical:atlas-sensor: Drop unnecessary explicit casts in regmap_bulk_read calls
iio:accel:mxc4005: Drop unnecessary explicit casts in regmap_bulk_read calls
iio: imu: st_lsm6dsx: drop huge include in sensor-hub driver
iio: buffer: drop devm_iio_kfifo_free() API call
iio: buffer: drop devm_iio_hw_consumer_free() API call
...

+3625 -774
+10
Documentation/ABI/testing/sysfs-bus-iio-proximity
··· 1 + What: /sys/bus/iio/devices/iio:deviceX/in_proximity_nearlevel 2 + Date: March 2020 3 + KernelVersion: 5.7 4 + Contact: linux-iio@vger.kernel.org 5 + Description: 6 + Near level for proximity sensors. This is a single integer 7 + value that tells user space when an object should be 8 + considered close to the device. If the value read from the 9 + sensor is above or equal to the value in this file an object 10 + should typically be considered near.
+10
Documentation/ABI/testing/sysfs-bus-iio-sx9310
··· 1 + What: /sys/bus/iio/devices/iio:deviceX/in_proximity3_comb_raw 2 + Date: February 2019 3 + KernelVersion: 5.6 4 + Contact: Daniel Campello <campello@chromium.org> 5 + Description: 6 + Proximity measurement indicating that some object is 7 + near the combined sensor. The combined sensor presents 8 + proximity measurements constructed by hardware by 9 + combining measurements taken from a given set of 10 + physical sensors.
+65
Documentation/devicetree/bindings/iio/adc/adi,ad9467.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/iio/adc/adi,ad9467.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Analog Devices AD9467 High-Speed ADC 8 + 9 + maintainers: 10 + - Michael Hennerich <michael.hennerich@analog.com> 11 + - Alexandru Ardelean <alexandru.ardelean@analog.com> 12 + 13 + description: | 14 + The AD9467 is a 16-bit, monolithic, IF sampling analog-to-digital 15 + converter (ADC). 16 + 17 + https://www.analog.com/media/en/technical-documentation/data-sheets/AD9467.pdf 18 + 19 + properties: 20 + compatible: 21 + enum: 22 + - adi,ad9467 23 + 24 + reg: 25 + maxItems: 1 26 + 27 + clocks: 28 + maxItems: 1 29 + 30 + clock-names: 31 + items: 32 + - const: adc-clk 33 + 34 + powerdown-gpios: 35 + description: 36 + Pin that controls the powerdown mode of the device. 37 + maxItems: 1 38 + 39 + reset-gpios: 40 + description: 41 + Reset pin for the device. 42 + maxItems: 1 43 + 44 + required: 45 + - compatible 46 + - reg 47 + - clocks 48 + - clock-names 49 + 50 + additionalProperties: false 51 + 52 + examples: 53 + - | 54 + spi { 55 + #address-cells = <1>; 56 + #size-cells = <0>; 57 + 58 + adc@0 { 59 + compatible = "adi,ad9467"; 60 + reg = <0>; 61 + clocks = <&adc_clk>; 62 + clock-names = "adc-clk"; 63 + }; 64 + }; 65 + ...
+62
Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/iio/adc/adi,axi-adc.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Analog Devices AXI ADC IP core 8 + 9 + maintainers: 10 + - Michael Hennerich <michael.hennerich@analog.com> 11 + - Alexandru Ardelean <alexandru.ardelean@analog.com> 12 + 13 + description: | 14 + Analog Devices Generic AXI ADC IP core for interfacing an ADC device 15 + with a high speed serial (JESD204B/C) or source synchronous parallel 16 + interface (LVDS/CMOS). 17 + Usually, some other interface type (i.e SPI) is used as a control 18 + interface for the actual ADC, while this IP core will interface 19 + to the data-lines of the ADC and handle the streaming of data into 20 + memory via DMA. 21 + 22 + https://wiki.analog.com/resources/fpga/docs/axi_adc_ip 23 + 24 + properties: 25 + compatible: 26 + enum: 27 + - adi,axi-adc-10.0.a 28 + 29 + reg: 30 + maxItems: 1 31 + 32 + dmas: 33 + maxItems: 1 34 + 35 + dma-names: 36 + items: 37 + - const: rx 38 + 39 + adi,adc-dev: 40 + $ref: /schemas/types.yaml#/definitions/phandle 41 + description: 42 + A reference to a the actual ADC to which this FPGA ADC interfaces to. 43 + 44 + required: 45 + - compatible 46 + - dmas 47 + - reg 48 + - adi,adc-dev 49 + 50 + additionalProperties: false 51 + 52 + examples: 53 + - | 54 + axi-adc@44a00000 { 55 + compatible = "adi,axi-adc-10.0.a"; 56 + reg = <0x44a00000 0x10000>; 57 + dmas = <&rx_dma 0>; 58 + dma-names = "rx"; 59 + 60 + adi,adc-dev = <&spi_adc>; 61 + }; 62 + ...
+63
Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 + # Copyright 2020 Alexandru Lazar 3 + %YAML 1.2 4 + --- 5 + $id: http://devicetree.org/schemas/iio/adc/maxim,max1241.yaml# 6 + $schema: http://devicetree.org/meta-schemas/core.yaml# 7 + 8 + title: Maxim MAX1241 12-bit, single-channel analog to digital converter 9 + 10 + maintainers: 11 + - Alexandru Lazar <alazar@startmail.com> 12 + 13 + description: | 14 + Bindings for the max1241 12-bit, single-channel ADC device. Datasheet 15 + can be found at: 16 + https://datasheets.maximintegrated.com/en/ds/MAX1240-MAX1241.pdf 17 + 18 + properties: 19 + compatible: 20 + enum: 21 + - maxim,max1241 22 + 23 + reg: 24 + maxItems: 1 25 + 26 + vdd-supply: 27 + description: 28 + Device tree identifier of the regulator that powers the ADC. 29 + 30 + vref-supply: 31 + description: 32 + Device tree identifier of the regulator that provides the external 33 + reference voltage. 34 + 35 + shutdown-gpios: 36 + description: 37 + GPIO spec for the GPIO pin connected to the ADC's /SHDN pin. If 38 + specified, the /SHDN pin will be asserted between conversions, 39 + thus enabling power-down mode. 40 + maxItems: 1 41 + 42 + required: 43 + - compatible 44 + - reg 45 + - vdd-supply 46 + - vref-supply 47 + 48 + examples: 49 + - | 50 + #include <dt-bindings/gpio/gpio.h> 51 + spi { 52 + #address-cells = <1>; 53 + #size-cells = <0>; 54 + 55 + adc@0 { 56 + compatible = "maxim,max1241"; 57 + reg = <0>; 58 + vdd-supply = <&adc_vdd>; 59 + vref-supply = <&adc_vref>; 60 + spi-max-frequency = <1000000>; 61 + shutdown-gpios = <&gpio 26 1>; 62 + }; 63 + };
-37
Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
··· 1 - Rockchip Successive Approximation Register (SAR) A/D Converter bindings 2 - 3 - Required properties: 4 - - compatible: should be "rockchip,<name>-saradc" or "rockchip,rk3066-tsadc" 5 - - "rockchip,saradc": for rk3188, rk3288 6 - - "rockchip,rk3066-tsadc": for rk3036 7 - - "rockchip,rk3328-saradc", "rockchip,rk3399-saradc": for rk3328 8 - - "rockchip,rk3399-saradc": for rk3399 9 - - "rockchip,rv1108-saradc", "rockchip,rk3399-saradc": for rv1108 10 - 11 - - reg: physical base address of the controller and length of memory mapped 12 - region. 13 - - interrupts: The interrupt number to the cpu. The interrupt specifier format 14 - depends on the interrupt controller. 15 - - clocks: Must contain an entry for each entry in clock-names. 16 - - clock-names: Shall be "saradc" for the converter-clock, and "apb_pclk" for 17 - the peripheral clock. 18 - - vref-supply: The regulator supply ADC reference voltage. 19 - - #io-channel-cells: Should be 1, see ../iio-bindings.txt 20 - 21 - Optional properties: 22 - - resets: Must contain an entry for each entry in reset-names if need support 23 - this option. See ../reset/reset.txt for details. 24 - - reset-names: Must include the name "saradc-apb". 25 - 26 - Example: 27 - saradc: saradc@2006c000 { 28 - compatible = "rockchip,saradc"; 29 - reg = <0x2006c000 0x100>; 30 - interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 31 - clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; 32 - clock-names = "saradc", "apb_pclk"; 33 - resets = <&cru SRST_SARADC>; 34 - reset-names = "saradc-apb"; 35 - #io-channel-cells = <1>; 36 - vref-supply = <&vcc18>; 37 - };
+80
Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml
··· 1 + # SPDX-License-Identifier: GPL-2.0 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/iio/adc/rockchip-saradc.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Rockchip Successive Approximation Register (SAR) A/D Converter 8 + 9 + maintainers: 10 + - Heiko Stuebner <heiko@sntech.de> 11 + 12 + properties: 13 + compatible: 14 + oneOf: 15 + - const: rockchip,saradc 16 + - const: rockchip,rk3066-tsadc 17 + - const: rockchip,rk3399-saradc 18 + - items: 19 + - enum: 20 + - rockchip,px30-saradc 21 + - rockchip,rk3308-saradc 22 + - rockchip,rk3328-saradc 23 + - rockchip,rv1108-saradc 24 + - const: rockchip,rk3399-saradc 25 + 26 + reg: 27 + maxItems: 1 28 + 29 + interrupts: 30 + maxItems: 1 31 + 32 + clocks: 33 + items: 34 + - description: converter clock 35 + - description: peripheral clock 36 + 37 + clock-names: 38 + items: 39 + - const: saradc 40 + - const: apb_pclk 41 + 42 + resets: 43 + maxItems: 1 44 + 45 + reset-names: 46 + const: saradc-apb 47 + 48 + vref-supply: 49 + description: 50 + The regulator supply for the ADC reference voltage. 51 + 52 + "#io-channel-cells": 53 + const: 1 54 + 55 + required: 56 + - compatible 57 + - reg 58 + - interrupts 59 + - clocks 60 + - clock-names 61 + - vref-supply 62 + - "#io-channel-cells" 63 + 64 + additionalProperties: false 65 + 66 + examples: 67 + - | 68 + #include <dt-bindings/clock/rk3288-cru.h> 69 + #include <dt-bindings/interrupt-controller/arm-gic.h> 70 + saradc: saradc@2006c000 { 71 + compatible = "rockchip,saradc"; 72 + reg = <0x2006c000 0x100>; 73 + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 74 + clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; 75 + clock-names = "saradc", "apb_pclk"; 76 + resets = <&cru SRST_SARADC>; 77 + reset-names = "saradc-apb"; 78 + vref-supply = <&vcc18>; 79 + #io-channel-cells = <1>; 80 + };
+35
Documentation/devicetree/bindings/iio/common.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/iio/common.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Common properties for iio sensors 8 + 9 + maintainers: 10 + - Jonathan Cameron <jic23@kernel.org> 11 + - Guido Günther <agx@sigxcpu.org> 12 + 13 + description: | 14 + This document defines device tree properties common to several iio 15 + sensors. It doesn't constitue a device tree binding specification by itself but 16 + is meant to be referenced by device tree bindings. 17 + 18 + When referenced from sensor tree bindings the properties defined in this 19 + document are defined as follows. The sensor tree bindings are responsible for 20 + defining whether each property is required or optional. 21 + 22 + properties: 23 + proximity-near-level: 24 + $ref: /schemas/types.yaml#/definitions/uint32 25 + description: | 26 + For proximity sensors whether an object can be considered near to the 27 + device depends on parameters like sensor position, covering glass and 28 + aperture. This value gives an indication to userspace for which 29 + sensor readings this is the case. 30 + 31 + Raw proximity values equal or above this level should be 32 + considered 'near' to the device (an object is near to the 33 + sensor). 34 + 35 + ...
-63
Documentation/devicetree/bindings/iio/dac/st,stm32-dac.txt
··· 1 - STMicroelectronics STM32 DAC 2 - 3 - The STM32 DAC is a 12-bit voltage output digital-to-analog converter. The DAC 4 - may be configured in 8 or 12-bit mode. It has two output channels, each with 5 - its own converter. 6 - It has built-in noise and triangle waveform generator and supports external 7 - triggers for conversions. The DAC's output buffer allows a high drive output 8 - current. 9 - 10 - Contents of a stm32 dac root node: 11 - ----------------------------------- 12 - Required properties: 13 - - compatible: Should be one of: 14 - "st,stm32f4-dac-core" 15 - "st,stm32h7-dac-core" 16 - - reg: Offset and length of the device's register set. 17 - - clocks: Must contain an entry for pclk (which feeds the peripheral bus 18 - interface) 19 - - clock-names: Must be "pclk". 20 - - vref-supply: Phandle to the vref+ input analog reference supply. 21 - - #address-cells = <1>; 22 - - #size-cells = <0>; 23 - 24 - Optional properties: 25 - - resets: Must contain the phandle to the reset controller. 26 - - A pinctrl state named "default" for each DAC channel may be defined to set 27 - DAC_OUTx pin in mode of operation for analog output on external pin. 28 - 29 - Contents of a stm32 dac child node: 30 - ----------------------------------- 31 - DAC core node should contain at least one subnode, representing a 32 - DAC instance/channel available on the machine. 33 - 34 - Required properties: 35 - - compatible: Must be "st,stm32-dac". 36 - - reg: Must be either 1 or 2, to define (single) channel in use 37 - - #io-channel-cells = <1>: See the IIO bindings section "IIO consumers" in 38 - Documentation/devicetree/bindings/iio/iio-bindings.txt 39 - 40 - Example: 41 - dac: dac@40007400 { 42 - compatible = "st,stm32h7-dac-core"; 43 - reg = <0x40007400 0x400>; 44 - clocks = <&clk>; 45 - clock-names = "pclk"; 46 - vref-supply = <&reg_vref>; 47 - pinctrl-names = "default"; 48 - pinctrl-0 = <&dac_out1 &dac_out2>; 49 - #address-cells = <1>; 50 - #size-cells = <0>; 51 - 52 - dac1: dac@1 { 53 - compatible = "st,stm32-dac"; 54 - #io-channels-cells = <1>; 55 - reg = <1>; 56 - }; 57 - 58 - dac2: dac@2 { 59 - compatible = "st,stm32-dac"; 60 - #io-channels-cells = <1>; 61 - reg = <2>; 62 - }; 63 - };
+110
Documentation/devicetree/bindings/iio/dac/st,stm32-dac.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: "http://devicetree.org/schemas/iio/dac/st,stm32-dac.yaml#" 5 + $schema: "http://devicetree.org/meta-schemas/core.yaml#" 6 + 7 + title: STMicroelectronics STM32 DAC bindings 8 + 9 + description: | 10 + The STM32 DAC is a 12-bit voltage output digital-to-analog converter. The DAC 11 + may be configured in 8 or 12-bit mode. It has two output channels, each with 12 + its own converter. 13 + It has built-in noise and triangle waveform generator and supports external 14 + triggers for conversions. The DAC's output buffer allows a high drive output 15 + current. 16 + 17 + maintainers: 18 + - Fabrice Gasnier <fabrice.gasnier@st.com> 19 + 20 + properties: 21 + compatible: 22 + enum: 23 + - st,stm32f4-dac-core 24 + - st,stm32h7-dac-core 25 + 26 + reg: 27 + maxItems: 1 28 + 29 + resets: 30 + maxItems: 1 31 + 32 + clocks: 33 + maxItems: 1 34 + 35 + clock-names: 36 + items: 37 + - const: pclk 38 + 39 + vref-supply: 40 + description: Phandle to the vref input analog reference voltage. 41 + 42 + '#address-cells': 43 + const: 1 44 + 45 + '#size-cells': 46 + const: 0 47 + 48 + additionalProperties: false 49 + 50 + required: 51 + - compatible 52 + - reg 53 + - clocks 54 + - clock-names 55 + - vref-supply 56 + - '#address-cells' 57 + - '#size-cells' 58 + 59 + patternProperties: 60 + "^dac@[1-2]+$": 61 + type: object 62 + description: 63 + A DAC block node should contain at least one subnode, representing an 64 + DAC instance/channel available on the machine. 65 + 66 + properties: 67 + compatible: 68 + const: st,stm32-dac 69 + 70 + reg: 71 + description: Must be either 1 or 2, to define (single) channel in use 72 + enum: [1, 2] 73 + 74 + '#io-channel-cells': 75 + const: 1 76 + 77 + additionalProperties: false 78 + 79 + required: 80 + - compatible 81 + - reg 82 + - '#io-channel-cells' 83 + 84 + examples: 85 + - | 86 + // Example on stm32mp157c 87 + #include <dt-bindings/clock/stm32mp1-clks.h> 88 + dac: dac@40017000 { 89 + compatible = "st,stm32h7-dac-core"; 90 + reg = <0x40017000 0x400>; 91 + clocks = <&rcc DAC12>; 92 + clock-names = "pclk"; 93 + vref-supply = <&vref>; 94 + #address-cells = <1>; 95 + #size-cells = <0>; 96 + 97 + dac@1 { 98 + compatible = "st,stm32-dac"; 99 + #io-channel-cells = <1>; 100 + reg = <1>; 101 + }; 102 + 103 + dac@2 { 104 + compatible = "st,stm32-dac"; 105 + #io-channel-cells = <1>; 106 + reg = <2>; 107 + }; 108 + }; 109 + 110 + ...
+1 -1
Documentation/devicetree/bindings/iio/gyroscope/bmg160.txt
··· 2 2 3 3 Required properties: 4 4 5 - - compatible : should be "bosch,bmg160" or "bosch,bmi055_gyro" 5 + - compatible : should be "bosch,bmg160", "bosch,bmi055_gyro" or "bosch,bmi088_gyro" 6 6 - reg : the I2C address of the sensor (0x69) 7 7 8 8 Optional properties:
+49
Documentation/devicetree/bindings/iio/light/amstaos,tsl2563.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/iio/light/amstaos,tsl2563.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: AMS TAOS TSL2563 ambient light sensor 8 + 9 + maintainers: 10 + - Sebastian Reichel <sre@kernel.org> 11 + 12 + description: | 13 + Ambient light sensor with an i2c interface. 14 + 15 + properties: 16 + compatible: 17 + enum: 18 + - amstaos,tsl2560 19 + - amstaos,tsl2561 20 + - amstaos,tsl2562 21 + - amstaos,tsl2563 22 + 23 + reg: 24 + maxItems: 1 25 + 26 + amstaos,cover-comp-gain: 27 + description: Multiplier for gain compensation 28 + allOf: 29 + - $ref: /schemas/types.yaml#/definitions/uint32 30 + - enum: [1, 16] 31 + 32 + required: 33 + - compatible 34 + - reg 35 + 36 + examples: 37 + - | 38 + i2c { 39 + 40 + #address-cells = <1>; 41 + #size-cells = <0>; 42 + 43 + light-sensor@29 { 44 + compatible = "amstaos,tsl2563"; 45 + reg = <0x29>; 46 + amstaos,cover-comp-gain = <16>; 47 + }; 48 + }; 49 + ...
-19
Documentation/devicetree/bindings/iio/light/tsl2563.txt
··· 1 - * AMS TAOS TSL2563 ambient light sensor 2 - 3 - Required properties: 4 - 5 - - compatible : should be "amstaos,tsl2563" 6 - - reg : the I2C address of the sensor 7 - 8 - Optional properties: 9 - 10 - - amstaos,cover-comp-gain : integer used as multiplier for gain 11 - compensation (default = 1) 12 - 13 - Example: 14 - 15 - tsl2563@29 { 16 - compatible = "amstaos,tsl2563"; 17 - reg = <0x29>; 18 - amstaos,cover-comp-gain = <16>; 19 - };
-24
Documentation/devicetree/bindings/iio/light/vcnl4000.txt
··· 1 - VISHAY VCNL4000 - Ambient Light and proximity sensor 2 - 3 - This driver supports the VCNL4000/10/20/40 and VCNL4200 chips 4 - 5 - Required properties: 6 - 7 - -compatible: must be one of : 8 - vishay,vcnl4000 9 - vishay,vcnl4010 10 - vishay,vcnl4020 11 - vishay,vcnl4040 12 - vishay,vcnl4200 13 - 14 - -reg: I2C address of the sensor, should be one from below based on the model: 15 - 0x13 16 - 0x51 17 - 0x60 18 - 19 - Example: 20 - 21 - light-sensor@51 { 22 - compatible = "vishay,vcnl4200"; 23 - reg = <0x51>; 24 - };
+50
Documentation/devicetree/bindings/iio/light/vishay,vcnl4000.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/iio/light/vishay,vcnl4000.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: VISHAY VCNL4000 ambient light and proximity sensor 8 + 9 + maintainers: 10 + - Peter Meerwald <pmeerw@pmeerw.net> 11 + 12 + description: | 13 + Ambient light sensing with proximity detection over an i2c 14 + interface. 15 + 16 + allOf: 17 + - $ref: ../common.yaml# 18 + 19 + properties: 20 + compatible: 21 + enum: 22 + - vishay,vcnl4000 23 + - vishay,vcnl4010 24 + - vishay,vcnl4020 25 + - vishay,vcnl4040 26 + - vishay,vcnl4200 27 + reg: 28 + maxItems: 1 29 + 30 + proximity-near-level: true 31 + 32 + required: 33 + - compatible 34 + - reg 35 + 36 + additionalProperties: false 37 + 38 + examples: 39 + - | 40 + i2c { 41 + #address-cells = <1>; 42 + #size-cells = <0>; 43 + 44 + light-sensor@51 { 45 + compatible = "vishay,vcnl4200"; 46 + reg = <0x51>; 47 + proximity-near-level = <220>; 48 + }; 49 + }; 50 + ...
+1
Documentation/devicetree/bindings/iio/st-sensors.txt
··· 50 50 - st,lis3dhh 51 51 - st,lis3de 52 52 - st,lis2de12 53 + - st,lis2hh12 53 54 54 55 Gyroscopes: 55 56 - st,l3g4200d-gyro
-8
Documentation/driver-api/driver-model/devres.rst
··· 284 284 285 285 IIO 286 286 devm_iio_device_alloc() 287 - devm_iio_device_free() 288 287 devm_iio_device_register() 289 - devm_iio_device_unregister() 290 288 devm_iio_kfifo_allocate() 291 - devm_iio_kfifo_free() 292 289 devm_iio_triggered_buffer_setup() 293 - devm_iio_triggered_buffer_cleanup() 294 290 devm_iio_trigger_alloc() 295 - devm_iio_trigger_free() 296 291 devm_iio_trigger_register() 297 - devm_iio_trigger_unregister() 298 292 devm_iio_channel_get() 299 - devm_iio_channel_release() 300 293 devm_iio_channel_get_all() 301 - devm_iio_channel_release_all() 302 294 303 295 INPUT 304 296 devm_input_allocate_device()
-2
Documentation/driver-api/iio/triggers.rst
··· 4 4 5 5 * struct :c:type:`iio_trigger` — industrial I/O trigger device 6 6 * :c:func:`devm_iio_trigger_alloc` — Resource-managed iio_trigger_alloc 7 - * :c:func:`devm_iio_trigger_free` — Resource-managed iio_trigger_free 8 7 * :c:func:`devm_iio_trigger_register` — Resource-managed iio_trigger_register 9 - * :c:func:`devm_iio_trigger_unregister` — Resource-managed 10 8 iio_trigger_unregister 11 9 * :c:func:`iio_trigger_validate_own_device` — Check if a trigger and IIO 12 10 device belong to the same device
+1
MAINTAINERS
··· 294 294 295 295 ACCES 104-QUAD-8 DRIVER 296 296 M: William Breathitt Gray <vilhelm.gray@gmail.com> 297 + M: Syed Nayyar Waris <syednwaris@gmail.com> 297 298 L: linux-iio@vger.kernel.org 298 299 S: Maintained 299 300 F: Documentation/ABI/testing/sysfs-bus-counter-104-quad-8
+1 -1
drivers/iio/accel/Kconfig
··· 238 238 Say yes here to build support for STMicroelectronics accelerometers: 239 239 LSM303DLH, LSM303DLHC, LIS3DH, LSM330D, LSM330DL, LSM330DLC, 240 240 LIS331DLH, LSM303DL, LSM303DLM, LSM330, LIS2DH12, H3LIS331DL, 241 - LNG2DM, LIS3DE, LIS2DE12 241 + LNG2DM, LIS3DE, LIS2DE12, LIS2HH12 242 242 243 243 This driver can also be built as a module. If so, these modules 244 244 will be created:
+2 -2
drivers/iio/accel/kxsd9-i2c.c
··· 21 21 22 22 regmap = devm_regmap_init_i2c(i2c, &config); 23 23 if (IS_ERR(regmap)) { 24 - dev_err(&i2c->dev, "Failed to register i2c regmap %d\n", 25 - (int)PTR_ERR(regmap)); 24 + dev_err(&i2c->dev, "Failed to register i2c regmap: %pe\n", 25 + regmap); 26 26 return PTR_ERR(regmap); 27 27 } 28 28
+2 -2
drivers/iio/accel/mxc4005.c
··· 135 135 int ret; 136 136 137 137 ret = regmap_bulk_read(data->regmap, MXC4005_REG_XOUT_UPPER, 138 - (u8 *) data->buffer, sizeof(data->buffer)); 138 + data->buffer, sizeof(data->buffer)); 139 139 if (ret < 0) { 140 140 dev_err(data->dev, "failed to read axes\n"); 141 141 return ret; ··· 150 150 __be16 reg; 151 151 int ret; 152 152 153 - ret = regmap_bulk_read(data->regmap, addr, (u8 *) &reg, sizeof(reg)); 153 + ret = regmap_bulk_read(data->regmap, addr, &reg, sizeof(reg)); 154 154 if (ret < 0) { 155 155 dev_err(data->dev, "failed to read reg %02x\n", addr); 156 156 return ret;
+2
drivers/iio/accel/st_accel.h
··· 35 35 LIS2DW12, 36 36 LIS3DHH, 37 37 LIS2DE12, 38 + LIS2HH12, 38 39 ST_ACCEL_MAX, 39 40 }; 40 41 ··· 60 59 #define LIS3DHH_ACCEL_DEV_NAME "lis3dhh" 61 60 #define LIS3DE_ACCEL_DEV_NAME "lis3de" 62 61 #define LIS2DE12_ACCEL_DEV_NAME "lis2de12" 62 + #define LIS2HH12_ACCEL_DEV_NAME "lis2hh12" 63 63 64 64 /** 65 65 * struct st_sensors_platform_data - default accel platform data
+1 -2
drivers/iio/accel/st_accel_buffer.c
··· 37 37 if (err < 0) 38 38 return err; 39 39 40 - err = st_sensors_set_axis_enable(indio_dev, 41 - (u8)indio_dev->active_scan_mask[0]); 40 + err = st_sensors_set_axis_enable(indio_dev, indio_dev->active_scan_mask[0]); 42 41 if (err < 0) 43 42 goto st_accel_buffer_predisable; 44 43
+79 -4
drivers/iio/accel/st_accel_core.c
··· 904 904 .multi_read_bit = true, 905 905 .bootime = 2, 906 906 }, 907 + { 908 + .wai = 0x41, 909 + .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS, 910 + .sensors_supported = { 911 + [0] = LIS2HH12_ACCEL_DEV_NAME, 912 + }, 913 + .ch = (struct iio_chan_spec *)st_accel_16bit_channels, 914 + .odr = { 915 + .addr = 0x20, 916 + .mask = 0x70, 917 + .odr_avl = { 918 + { .hz = 10, .value = 0x01, }, 919 + { .hz = 50, .value = 0x02, }, 920 + { .hz = 100, .value = 0x03, }, 921 + { .hz = 200, .value = 0x04, }, 922 + { .hz = 400, .value = 0x05, }, 923 + { .hz = 800, .value = 0x06, }, 924 + }, 925 + }, 926 + .pw = { 927 + .addr = 0x20, 928 + .mask = 0x70, 929 + .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 930 + }, 931 + .enable_axis = { 932 + .addr = ST_SENSORS_DEFAULT_AXIS_ADDR, 933 + .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 934 + }, 935 + .fs = { 936 + .addr = 0x23, 937 + .mask = 0x30, 938 + .fs_avl = { 939 + [0] = { 940 + .num = ST_ACCEL_FS_AVL_2G, 941 + .value = 0x00, 942 + .gain = IIO_G_TO_M_S_2(61), 943 + }, 944 + [1] = { 945 + .num = ST_ACCEL_FS_AVL_4G, 946 + .value = 0x02, 947 + .gain = IIO_G_TO_M_S_2(122), 948 + }, 949 + [2] = { 950 + .num = ST_ACCEL_FS_AVL_8G, 951 + .value = 0x03, 952 + .gain = IIO_G_TO_M_S_2(244), 953 + }, 954 + }, 955 + }, 956 + .bdu = { 957 + .addr = 0x20, 958 + .mask = 0x08, 959 + }, 960 + .drdy_irq = { 961 + .int1 = { 962 + .addr = 0x22, 963 + .mask = 0x01, 964 + }, 965 + .int2 = { 966 + .addr = 0x25, 967 + .mask = 0x01, 968 + }, 969 + .addr_ihl = 0x24, 970 + .mask_ihl = 0x02, 971 + .stat_drdy = { 972 + .addr = ST_SENSORS_DEFAULT_STAT_ADDR, 973 + .mask = 0x07, 974 + }, 975 + }, 976 + .sim = { 977 + .addr = 0x23, 978 + .value = BIT(0), 979 + }, 980 + .multi_read_bit = true, 981 + .bootime = 2, 982 + }, 983 + 907 984 }; 908 985 909 986 static int st_accel_read_raw(struct iio_dev *indio_dev, ··· 1247 1170 int st_accel_common_probe(struct iio_dev *indio_dev) 1248 1171 { 1249 1172 struct st_sensor_data *adata = iio_priv(indio_dev); 1250 - struct st_sensors_platform_data *pdata = 1251 - (struct st_sensors_platform_data *)adata->dev->platform_data; 1173 + struct st_sensors_platform_data *pdata = dev_get_platdata(adata->dev); 1252 1174 struct iio_chan_spec *channels; 1253 1175 size_t channels_size; 1254 1176 int err; ··· 1280 1204 "failed to apply ACPI orientation data: %d\n", err); 1281 1205 1282 1206 indio_dev->channels = channels; 1283 - adata->current_fullscale = (struct st_sensor_fullscale_avl *) 1284 - &adata->sensor_settings->fs.fs_avl[0]; 1207 + adata->current_fullscale = &adata->sensor_settings->fs.fs_avl[0]; 1285 1208 adata->odr = adata->sensor_settings->odr.odr_avl[0].hz; 1286 1209 1287 1210 if (!pdata)
+5
drivers/iio/accel/st_accel_i2c.c
··· 104 104 .compatible = "st,lis2de12", 105 105 .data = LIS2DE12_ACCEL_DEV_NAME, 106 106 }, 107 + { 108 + .compatible = "st,lis2hh12", 109 + .data = LIS2HH12_ACCEL_DEV_NAME, 110 + }, 107 111 {}, 108 112 }; 109 113 MODULE_DEVICE_TABLE(of, st_accel_of_match); ··· 142 138 { LIS2DW12_ACCEL_DEV_NAME }, 143 139 { LIS3DE_ACCEL_DEV_NAME }, 144 140 { LIS2DE12_ACCEL_DEV_NAME }, 141 + { LIS2HH12_ACCEL_DEV_NAME }, 145 142 {}, 146 143 }; 147 144 MODULE_DEVICE_TABLE(i2c, st_accel_id_table);
+45
drivers/iio/adc/Kconfig
··· 246 246 To compile this driver as a module, choose M here: the module will be 247 247 called ad799x. 248 248 249 + config AD9467 250 + tristate "Analog Devices AD9467 High Speed ADC driver" 251 + depends on SPI 252 + select ADI_AXI_ADC 253 + help 254 + Say yes here to build support for Analog Devices: 255 + * AD9467 16-Bit, 200 MSPS/250 MSPS Analog-to-Digital Converter 256 + 257 + The driver requires the assistance of the AXI ADC IP core to operate, 258 + since SPI is used for configuration only, while data has to be 259 + streamed into memory via DMA. 260 + 261 + To compile this driver as a module, choose M here: the module will be 262 + called ad9467. 263 + 264 + config ADI_AXI_ADC 265 + tristate "Analog Devices Generic AXI ADC IP core driver" 266 + select IIO_BUFFER 267 + select IIO_BUFFER_HW_CONSUMER 268 + select IIO_BUFFER_DMAENGINE 269 + help 270 + Say yes here to build support for Analog Devices Generic 271 + AXI ADC IP core. The IP core is used for interfacing with 272 + analog-to-digital (ADC) converters that require either a high-speed 273 + serial interface (JESD204B/C) or a source synchronous parallel 274 + interface (LVDS/CMOS). 275 + Typically (for such devices) SPI will be used for configuration only, 276 + while this IP core handles the streaming of data into memory via DMA. 277 + 278 + Link: https://wiki.analog.com/resources/fpga/docs/axi_adc_ip 279 + If unsure, say N (but it's safe to say "Y"). 280 + 281 + To compile this driver as a module, choose M here: the 282 + module will be called adi-axi-adc. 283 + 249 284 config ASPEED_ADC 250 285 tristate "Aspeed ADC" 251 286 depends on ARCH_ASPEED || COMPILE_TEST ··· 629 594 630 595 To compile this driver as a module, choose M here: the module will be 631 596 called max1118. 597 + 598 + config MAX1241 599 + tristate "Maxim max1241 ADC driver" 600 + depends on SPI_MASTER 601 + help 602 + Say yes here to build support for Maxim max1241 12-bit, single-channel 603 + ADC. 604 + 605 + To compile this driver as a module, choose M here: the module will be 606 + called max1241. 632 607 633 608 config MAX1363 634 609 tristate "Maxim max1363 ADC driver"
+3
drivers/iio/adc/Makefile
··· 26 26 obj-$(CONFIG_AD7887) += ad7887.o 27 27 obj-$(CONFIG_AD7949) += ad7949.o 28 28 obj-$(CONFIG_AD799X) += ad799x.o 29 + obj-$(CONFIG_AD9467) += ad9467.o 30 + obj-$(CONFIG_ADI_AXI_ADC) += adi-axi-adc.o 29 31 obj-$(CONFIG_ASPEED_ADC) += aspeed_adc.o 30 32 obj-$(CONFIG_AT91_ADC) += at91_adc.o 31 33 obj-$(CONFIG_AT91_SAMA5D2_ADC) += at91-sama5d2_adc.o ··· 59 57 obj-$(CONFIG_MAX1027) += max1027.o 60 58 obj-$(CONFIG_MAX11100) += max11100.o 61 59 obj-$(CONFIG_MAX1118) += max1118.o 60 + obj-$(CONFIG_MAX1241) += max1241.o 62 61 obj-$(CONFIG_MAX1363) += max1363.o 63 62 obj-$(CONFIG_MAX9611) += max9611.o 64 63 obj-$(CONFIG_MCP320X) += mcp320x.o
+46 -13
drivers/iio/adc/ad7476.c
··· 12 12 #include <linux/sysfs.h> 13 13 #include <linux/spi/spi.h> 14 14 #include <linux/regulator/consumer.h> 15 + #include <linux/gpio/consumer.h> 15 16 #include <linux/err.h> 16 17 #include <linux/module.h> 17 18 #include <linux/bitops.h> 19 + #include <linux/delay.h> 18 20 19 21 #include <linux/iio/iio.h> 20 22 #include <linux/iio/sysfs.h> ··· 29 27 struct ad7476_chip_info { 30 28 unsigned int int_vref_uv; 31 29 struct iio_chan_spec channel[2]; 30 + /* channels used when convst gpio is defined */ 31 + struct iio_chan_spec convst_channel[2]; 32 32 void (*reset)(struct ad7476_state *); 33 33 }; 34 34 ··· 38 34 struct spi_device *spi; 39 35 const struct ad7476_chip_info *chip_info; 40 36 struct regulator *reg; 37 + struct gpio_desc *convst_gpio; 41 38 struct spi_transfer xfer; 42 39 struct spi_message msg; 43 40 /* ··· 69 64 ID_ADS7868, 70 65 }; 71 66 67 + static void ad7091_convst(struct ad7476_state *st) 68 + { 69 + if (!st->convst_gpio) 70 + return; 71 + 72 + gpiod_set_value(st->convst_gpio, 0); 73 + udelay(1); /* CONVST pulse width: 10 ns min */ 74 + gpiod_set_value(st->convst_gpio, 1); 75 + udelay(1); /* Conversion time: 650 ns max */ 76 + } 77 + 72 78 static irqreturn_t ad7476_trigger_handler(int irq, void *p) 73 79 { 74 80 struct iio_poll_func *pf = p; 75 81 struct iio_dev *indio_dev = pf->indio_dev; 76 82 struct ad7476_state *st = iio_priv(indio_dev); 77 83 int b_sent; 84 + 85 + ad7091_convst(st); 78 86 79 87 b_sent = spi_sync(st->spi, &st->msg); 80 88 if (b_sent < 0) ··· 110 92 static int ad7476_scan_direct(struct ad7476_state *st) 111 93 { 112 94 int ret; 95 + 96 + ad7091_convst(st); 113 97 114 98 ret = spi_sync(st->spi, &st->msg); 115 99 if (ret) ··· 180 160 #define AD7940_CHAN(bits) _AD7476_CHAN((bits), 15 - (bits), \ 181 161 BIT(IIO_CHAN_INFO_RAW)) 182 162 #define AD7091R_CHAN(bits) _AD7476_CHAN((bits), 16 - (bits), 0) 163 + #define AD7091R_CONVST_CHAN(bits) _AD7476_CHAN((bits), 16 - (bits), \ 164 + BIT(IIO_CHAN_INFO_RAW)) 183 165 #define ADS786X_CHAN(bits) _AD7476_CHAN((bits), 12 - (bits), \ 184 166 BIT(IIO_CHAN_INFO_RAW)) 185 167 ··· 189 167 [ID_AD7091R] = { 190 168 .channel[0] = AD7091R_CHAN(12), 191 169 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 170 + .convst_channel[0] = AD7091R_CONVST_CHAN(12), 171 + .convst_channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1), 192 172 .reset = ad7091_reset, 193 173 }, 194 174 [ID_AD7276] = { ··· 256 232 .read_raw = &ad7476_read_raw, 257 233 }; 258 234 235 + static void ad7476_reg_disable(void *data) 236 + { 237 + struct ad7476_state *st = data; 238 + 239 + regulator_disable(st->reg); 240 + } 241 + 259 242 static int ad7476_probe(struct spi_device *spi) 260 243 { 261 244 struct ad7476_state *st; ··· 285 254 if (ret) 286 255 return ret; 287 256 257 + ret = devm_add_action_or_reset(&spi->dev, ad7476_reg_disable, 258 + st); 259 + if (ret) 260 + return ret; 261 + 262 + st->convst_gpio = devm_gpiod_get_optional(&spi->dev, 263 + "adi,conversion-start", 264 + GPIOD_OUT_LOW); 265 + if (IS_ERR(st->convst_gpio)) 266 + return PTR_ERR(st->convst_gpio); 267 + 288 268 spi_set_drvdata(spi, indio_dev); 289 269 290 270 st->spi = spi; ··· 308 266 indio_dev->channels = st->chip_info->channel; 309 267 indio_dev->num_channels = 2; 310 268 indio_dev->info = &ad7476_info; 269 + 270 + if (st->convst_gpio && st->chip_info->convst_channel) 271 + indio_dev->channels = st->chip_info->convst_channel; 311 272 /* Setup default message */ 312 273 313 274 st->xfer.rx_buf = &st->data; ··· 340 295 return ret; 341 296 } 342 297 343 - static int ad7476_remove(struct spi_device *spi) 344 - { 345 - struct iio_dev *indio_dev = spi_get_drvdata(spi); 346 - struct ad7476_state *st = iio_priv(indio_dev); 347 - 348 - iio_device_unregister(indio_dev); 349 - iio_triggered_buffer_cleanup(indio_dev); 350 - regulator_disable(st->reg); 351 - 352 - return 0; 353 - } 354 - 355 298 static const struct spi_device_id ad7476_id[] = { 299 + {"ad7091", ID_AD7091R}, 356 300 {"ad7091r", ID_AD7091R}, 357 301 {"ad7273", ID_AD7277}, 358 302 {"ad7274", ID_AD7276}, ··· 377 343 .name = "ad7476", 378 344 }, 379 345 .probe = ad7476_probe, 380 - .remove = ad7476_remove, 381 346 .id_table = ad7476_id, 382 347 }; 383 348 module_spi_driver(ad7476_driver);
+23 -4
drivers/iio/adc/ad7780.c
··· 206 206 .irq_flags = IRQF_TRIGGER_LOW, 207 207 }; 208 208 209 - #define AD7780_CHANNEL(bits, wordsize) \ 210 - AD_SD_CHANNEL(1, 0, 0, bits, 32, (wordsize) - (bits)) 211 - #define AD7170_CHANNEL(bits, wordsize) \ 212 - AD_SD_CHANNEL_NO_SAMP_FREQ(1, 0, 0, bits, 32, (wordsize) - (bits)) 209 + #define _AD7780_CHANNEL(_bits, _wordsize, _mask_all) \ 210 + { \ 211 + .type = IIO_VOLTAGE, \ 212 + .indexed = 1, \ 213 + .channel = 0, \ 214 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 215 + BIT(IIO_CHAN_INFO_OFFSET), \ 216 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 217 + .info_mask_shared_by_all = _mask_all, \ 218 + .scan_index = 1, \ 219 + .scan_type = { \ 220 + .sign = 'u', \ 221 + .realbits = (_bits), \ 222 + .storagebits = 32, \ 223 + .shift = (_wordsize) - (_bits), \ 224 + .endianness = IIO_BE, \ 225 + }, \ 226 + } 227 + 228 + #define AD7780_CHANNEL(_bits, _wordsize) \ 229 + _AD7780_CHANNEL(_bits, _wordsize, BIT(IIO_CHAN_INFO_SAMP_FREQ)) 230 + #define AD7170_CHANNEL(_bits, _wordsize) \ 231 + _AD7780_CHANNEL(_bits, _wordsize, 0) 213 232 214 233 static const struct ad7780_chip_info ad7780_chip_info_tbl[] = { 215 234 [ID_AD7170] = {
+56 -8
drivers/iio/adc/ad7791.c
··· 64 64 #define AD7791_MODE_SEL_MASK (0x3 << 6) 65 65 #define AD7791_MODE_SEL(x) ((x) << 6) 66 66 67 + #define __AD7991_CHANNEL(_si, _channel1, _channel2, _address, _bits, \ 68 + _storagebits, _shift, _extend_name, _type, _mask_all) \ 69 + { \ 70 + .type = (_type), \ 71 + .differential = (_channel2 == -1 ? 0 : 1), \ 72 + .indexed = 1, \ 73 + .channel = (_channel1), \ 74 + .channel2 = (_channel2), \ 75 + .address = (_address), \ 76 + .extend_name = (_extend_name), \ 77 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 78 + BIT(IIO_CHAN_INFO_OFFSET), \ 79 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 80 + .info_mask_shared_by_all = _mask_all, \ 81 + .scan_index = (_si), \ 82 + .scan_type = { \ 83 + .sign = 'u', \ 84 + .realbits = (_bits), \ 85 + .storagebits = (_storagebits), \ 86 + .shift = (_shift), \ 87 + .endianness = IIO_BE, \ 88 + }, \ 89 + } 90 + 91 + #define AD7991_SHORTED_CHANNEL(_si, _channel, _address, _bits, \ 92 + _storagebits, _shift) \ 93 + __AD7991_CHANNEL(_si, _channel, _channel, _address, _bits, \ 94 + _storagebits, _shift, "shorted", IIO_VOLTAGE, \ 95 + BIT(IIO_CHAN_INFO_SAMP_FREQ)) 96 + 97 + #define AD7991_CHANNEL(_si, _channel, _address, _bits, \ 98 + _storagebits, _shift) \ 99 + __AD7991_CHANNEL(_si, _channel, -1, _address, _bits, \ 100 + _storagebits, _shift, NULL, IIO_VOLTAGE, \ 101 + BIT(IIO_CHAN_INFO_SAMP_FREQ)) 102 + 103 + #define AD7991_DIFF_CHANNEL(_si, _channel1, _channel2, _address, _bits, \ 104 + _storagebits, _shift) \ 105 + __AD7991_CHANNEL(_si, _channel1, _channel2, _address, _bits, \ 106 + _storagebits, _shift, NULL, IIO_VOLTAGE, \ 107 + BIT(IIO_CHAN_INFO_SAMP_FREQ)) 108 + 109 + #define AD7991_SUPPLY_CHANNEL(_si, _channel, _address, _bits, _storagebits, \ 110 + _shift) \ 111 + __AD7991_CHANNEL(_si, _channel, -1, _address, _bits, \ 112 + _storagebits, _shift, "supply", IIO_VOLTAGE, \ 113 + BIT(IIO_CHAN_INFO_SAMP_FREQ)) 114 + 67 115 #define DECLARE_AD7787_CHANNELS(name, bits, storagebits) \ 68 116 const struct iio_chan_spec name[] = { \ 69 - AD_SD_DIFF_CHANNEL(0, 0, 0, AD7791_CH_AIN1P_AIN1N, \ 117 + AD7991_DIFF_CHANNEL(0, 0, 0, AD7791_CH_AIN1P_AIN1N, \ 70 118 (bits), (storagebits), 0), \ 71 - AD_SD_CHANNEL(1, 1, AD7791_CH_AIN2, (bits), (storagebits), 0), \ 72 - AD_SD_SHORTED_CHANNEL(2, 0, AD7791_CH_AIN1N_AIN1N, \ 119 + AD7991_CHANNEL(1, 1, AD7791_CH_AIN2, (bits), (storagebits), 0), \ 120 + AD7991_SHORTED_CHANNEL(2, 0, AD7791_CH_AIN1N_AIN1N, \ 73 121 (bits), (storagebits), 0), \ 74 - AD_SD_SUPPLY_CHANNEL(3, 2, AD7791_CH_AVDD_MONITOR, \ 122 + AD7991_SUPPLY_CHANNEL(3, 2, AD7791_CH_AVDD_MONITOR, \ 75 123 (bits), (storagebits), 0), \ 76 124 IIO_CHAN_SOFT_TIMESTAMP(4), \ 77 125 } 78 126 79 127 #define DECLARE_AD7791_CHANNELS(name, bits, storagebits) \ 80 128 const struct iio_chan_spec name[] = { \ 81 - AD_SD_DIFF_CHANNEL(0, 0, 0, AD7791_CH_AIN1P_AIN1N, \ 129 + AD7991_DIFF_CHANNEL(0, 0, 0, AD7791_CH_AIN1P_AIN1N, \ 82 130 (bits), (storagebits), 0), \ 83 - AD_SD_SHORTED_CHANNEL(1, 0, AD7791_CH_AIN1N_AIN1N, \ 131 + AD7991_SHORTED_CHANNEL(1, 0, AD7791_CH_AIN1N_AIN1N, \ 84 132 (bits), (storagebits), 0), \ 85 - AD_SD_SUPPLY_CHANNEL(2, 1, AD7791_CH_AVDD_MONITOR, \ 133 + AD7991_SUPPLY_CHANNEL(2, 1, AD7791_CH_AVDD_MONITOR, \ 86 134 (bits), (storagebits), 0), \ 87 135 IIO_CHAN_SOFT_TIMESTAMP(3), \ 88 136 } ··· 492 444 module_spi_driver(ad7791_driver); 493 445 494 446 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); 495 - MODULE_DESCRIPTION("Analog Device AD7787/AD7788/AD7789/AD7790/AD7791 ADC driver"); 447 + MODULE_DESCRIPTION("Analog Devices AD7787/AD7788/AD7789/AD7790/AD7791 ADC driver"); 496 448 MODULE_LICENSE("GPL v2");
+105 -39
drivers/iio/adc/ad7793.c
··· 354 354 static IIO_CONST_ATTR_NAMED(sampling_frequency_available_ad7797, 355 355 sampling_frequency_available, "123 62 50 33 17 16 12 10 8 6 4"); 356 356 357 - static ssize_t ad7793_show_scale_available(struct device *dev, 358 - struct device_attribute *attr, char *buf) 357 + static int ad7793_read_avail(struct iio_dev *indio_dev, 358 + struct iio_chan_spec const *chan, 359 + const int **vals, int *type, int *length, 360 + long mask) 359 361 { 360 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 361 362 struct ad7793_state *st = iio_priv(indio_dev); 362 - int i, len = 0; 363 363 364 - for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++) 365 - len += sprintf(buf + len, "%d.%09u ", st->scale_avail[i][0], 366 - st->scale_avail[i][1]); 364 + switch (mask) { 365 + case IIO_CHAN_INFO_SCALE: 366 + *vals = (int *)st->scale_avail; 367 + *type = IIO_VAL_INT_PLUS_NANO; 368 + /* Values are stored in a 2D matrix */ 369 + *length = ARRAY_SIZE(st->scale_avail) * 2; 367 370 368 - len += sprintf(buf + len, "\n"); 369 - 370 - return len; 371 + return IIO_AVAIL_LIST; 372 + default: 373 + return -EINVAL; 374 + } 371 375 } 372 - 373 - static IIO_DEVICE_ATTR_NAMED(in_m_in_scale_available, 374 - in_voltage-voltage_scale_available, S_IRUGO, 375 - ad7793_show_scale_available, NULL, 0); 376 376 377 377 static struct attribute *ad7793_attributes[] = { 378 378 &iio_const_attr_sampling_frequency_available.dev_attr.attr, 379 - &iio_dev_attr_in_m_in_scale_available.dev_attr.attr, 380 379 NULL 381 380 }; 382 381 ··· 533 534 .read_raw = &ad7793_read_raw, 534 535 .write_raw = &ad7793_write_raw, 535 536 .write_raw_get_fmt = &ad7793_write_raw_get_fmt, 537 + .read_avail = ad7793_read_avail, 536 538 .attrs = &ad7793_attribute_group, 537 539 .validate_trigger = ad_sd_validate_trigger, 538 540 }; ··· 546 546 .validate_trigger = ad_sd_validate_trigger, 547 547 }; 548 548 549 + #define __AD7793_CHANNEL(_si, _channel1, _channel2, _address, _bits, \ 550 + _storagebits, _shift, _extend_name, _type, _mask_type_av, _mask_all) \ 551 + { \ 552 + .type = (_type), \ 553 + .differential = (_channel2 == -1 ? 0 : 1), \ 554 + .indexed = 1, \ 555 + .channel = (_channel1), \ 556 + .channel2 = (_channel2), \ 557 + .address = (_address), \ 558 + .extend_name = (_extend_name), \ 559 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 560 + BIT(IIO_CHAN_INFO_OFFSET), \ 561 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 562 + .info_mask_shared_by_type_available = (_mask_type_av), \ 563 + .info_mask_shared_by_all = _mask_all, \ 564 + .scan_index = (_si), \ 565 + .scan_type = { \ 566 + .sign = 'u', \ 567 + .realbits = (_bits), \ 568 + .storagebits = (_storagebits), \ 569 + .shift = (_shift), \ 570 + .endianness = IIO_BE, \ 571 + }, \ 572 + } 573 + 574 + #define AD7793_DIFF_CHANNEL(_si, _channel1, _channel2, _address, _bits, \ 575 + _storagebits, _shift) \ 576 + __AD7793_CHANNEL(_si, _channel1, _channel2, _address, _bits, \ 577 + _storagebits, _shift, NULL, IIO_VOLTAGE, \ 578 + BIT(IIO_CHAN_INFO_SCALE), \ 579 + BIT(IIO_CHAN_INFO_SAMP_FREQ)) 580 + 581 + #define AD7793_SHORTED_CHANNEL(_si, _channel, _address, _bits, \ 582 + _storagebits, _shift) \ 583 + __AD7793_CHANNEL(_si, _channel, _channel, _address, _bits, \ 584 + _storagebits, _shift, "shorted", IIO_VOLTAGE, \ 585 + BIT(IIO_CHAN_INFO_SCALE), \ 586 + BIT(IIO_CHAN_INFO_SAMP_FREQ)) 587 + 588 + #define AD7793_TEMP_CHANNEL(_si, _address, _bits, _storagebits, _shift) \ 589 + __AD7793_CHANNEL(_si, 0, -1, _address, _bits, \ 590 + _storagebits, _shift, NULL, IIO_TEMP, \ 591 + 0, \ 592 + BIT(IIO_CHAN_INFO_SAMP_FREQ)) 593 + 594 + #define AD7793_SUPPLY_CHANNEL(_si, _channel, _address, _bits, _storagebits, \ 595 + _shift) \ 596 + __AD7793_CHANNEL(_si, _channel, -1, _address, _bits, \ 597 + _storagebits, _shift, "supply", IIO_VOLTAGE, \ 598 + 0, \ 599 + BIT(IIO_CHAN_INFO_SAMP_FREQ)) 600 + 601 + #define AD7797_DIFF_CHANNEL(_si, _channel1, _channel2, _address, _bits, \ 602 + _storagebits, _shift) \ 603 + __AD7793_CHANNEL(_si, _channel1, _channel2, _address, _bits, \ 604 + _storagebits, _shift, NULL, IIO_VOLTAGE, \ 605 + 0, \ 606 + BIT(IIO_CHAN_INFO_SAMP_FREQ)) 607 + 608 + #define AD7797_SHORTED_CHANNEL(_si, _channel, _address, _bits, \ 609 + _storagebits, _shift) \ 610 + __AD7793_CHANNEL(_si, _channel, _channel, _address, _bits, \ 611 + _storagebits, _shift, "shorted", IIO_VOLTAGE, \ 612 + 0, \ 613 + BIT(IIO_CHAN_INFO_SAMP_FREQ)) 614 + 549 615 #define DECLARE_AD7793_CHANNELS(_name, _b, _sb, _s) \ 550 616 const struct iio_chan_spec _name##_channels[] = { \ 551 - AD_SD_DIFF_CHANNEL(0, 0, 0, AD7793_CH_AIN1P_AIN1M, (_b), (_sb), (_s)), \ 552 - AD_SD_DIFF_CHANNEL(1, 1, 1, AD7793_CH_AIN2P_AIN2M, (_b), (_sb), (_s)), \ 553 - AD_SD_DIFF_CHANNEL(2, 2, 2, AD7793_CH_AIN3P_AIN3M, (_b), (_sb), (_s)), \ 554 - AD_SD_SHORTED_CHANNEL(3, 0, AD7793_CH_AIN1M_AIN1M, (_b), (_sb), (_s)), \ 555 - AD_SD_TEMP_CHANNEL(4, AD7793_CH_TEMP, (_b), (_sb), (_s)), \ 556 - AD_SD_SUPPLY_CHANNEL(5, 3, AD7793_CH_AVDD_MONITOR, (_b), (_sb), (_s)), \ 617 + AD7793_DIFF_CHANNEL(0, 0, 0, AD7793_CH_AIN1P_AIN1M, (_b), (_sb), (_s)), \ 618 + AD7793_DIFF_CHANNEL(1, 1, 1, AD7793_CH_AIN2P_AIN2M, (_b), (_sb), (_s)), \ 619 + AD7793_DIFF_CHANNEL(2, 2, 2, AD7793_CH_AIN3P_AIN3M, (_b), (_sb), (_s)), \ 620 + AD7793_SHORTED_CHANNEL(3, 0, AD7793_CH_AIN1M_AIN1M, (_b), (_sb), (_s)), \ 621 + AD7793_TEMP_CHANNEL(4, AD7793_CH_TEMP, (_b), (_sb), (_s)), \ 622 + AD7793_SUPPLY_CHANNEL(5, 3, AD7793_CH_AVDD_MONITOR, (_b), (_sb), (_s)), \ 557 623 IIO_CHAN_SOFT_TIMESTAMP(6), \ 558 624 } 559 625 560 626 #define DECLARE_AD7795_CHANNELS(_name, _b, _sb) \ 561 627 const struct iio_chan_spec _name##_channels[] = { \ 562 - AD_SD_DIFF_CHANNEL(0, 0, 0, AD7793_CH_AIN1P_AIN1M, (_b), (_sb), 0), \ 563 - AD_SD_DIFF_CHANNEL(1, 1, 1, AD7793_CH_AIN2P_AIN2M, (_b), (_sb), 0), \ 564 - AD_SD_DIFF_CHANNEL(2, 2, 2, AD7793_CH_AIN3P_AIN3M, (_b), (_sb), 0), \ 565 - AD_SD_DIFF_CHANNEL(3, 3, 3, AD7795_CH_AIN4P_AIN4M, (_b), (_sb), 0), \ 566 - AD_SD_DIFF_CHANNEL(4, 4, 4, AD7795_CH_AIN5P_AIN5M, (_b), (_sb), 0), \ 567 - AD_SD_DIFF_CHANNEL(5, 5, 5, AD7795_CH_AIN6P_AIN6M, (_b), (_sb), 0), \ 568 - AD_SD_SHORTED_CHANNEL(6, 0, AD7795_CH_AIN1M_AIN1M, (_b), (_sb), 0), \ 569 - AD_SD_TEMP_CHANNEL(7, AD7793_CH_TEMP, (_b), (_sb), 0), \ 570 - AD_SD_SUPPLY_CHANNEL(8, 3, AD7793_CH_AVDD_MONITOR, (_b), (_sb), 0), \ 628 + AD7793_DIFF_CHANNEL(0, 0, 0, AD7793_CH_AIN1P_AIN1M, (_b), (_sb), 0), \ 629 + AD7793_DIFF_CHANNEL(1, 1, 1, AD7793_CH_AIN2P_AIN2M, (_b), (_sb), 0), \ 630 + AD7793_DIFF_CHANNEL(2, 2, 2, AD7793_CH_AIN3P_AIN3M, (_b), (_sb), 0), \ 631 + AD7793_DIFF_CHANNEL(3, 3, 3, AD7795_CH_AIN4P_AIN4M, (_b), (_sb), 0), \ 632 + AD7793_DIFF_CHANNEL(4, 4, 4, AD7795_CH_AIN5P_AIN5M, (_b), (_sb), 0), \ 633 + AD7793_DIFF_CHANNEL(5, 5, 5, AD7795_CH_AIN6P_AIN6M, (_b), (_sb), 0), \ 634 + AD7793_SHORTED_CHANNEL(6, 0, AD7795_CH_AIN1M_AIN1M, (_b), (_sb), 0), \ 635 + AD7793_TEMP_CHANNEL(7, AD7793_CH_TEMP, (_b), (_sb), 0), \ 636 + AD7793_SUPPLY_CHANNEL(8, 3, AD7793_CH_AVDD_MONITOR, (_b), (_sb), 0), \ 571 637 IIO_CHAN_SOFT_TIMESTAMP(9), \ 572 638 } 573 639 574 640 #define DECLARE_AD7797_CHANNELS(_name, _b, _sb) \ 575 641 const struct iio_chan_spec _name##_channels[] = { \ 576 - AD_SD_DIFF_CHANNEL(0, 0, 0, AD7793_CH_AIN1P_AIN1M, (_b), (_sb), 0), \ 577 - AD_SD_SHORTED_CHANNEL(1, 0, AD7793_CH_AIN1M_AIN1M, (_b), (_sb), 0), \ 578 - AD_SD_TEMP_CHANNEL(2, AD7793_CH_TEMP, (_b), (_sb), 0), \ 579 - AD_SD_SUPPLY_CHANNEL(3, 3, AD7793_CH_AVDD_MONITOR, (_b), (_sb), 0), \ 642 + AD7797_DIFF_CHANNEL(0, 0, 0, AD7793_CH_AIN1P_AIN1M, (_b), (_sb), 0), \ 643 + AD7797_SHORTED_CHANNEL(1, 0, AD7793_CH_AIN1M_AIN1M, (_b), (_sb), 0), \ 644 + AD7793_TEMP_CHANNEL(2, AD7793_CH_TEMP, (_b), (_sb), 0), \ 645 + AD7793_SUPPLY_CHANNEL(3, 3, AD7793_CH_AVDD_MONITOR, (_b), (_sb), 0), \ 580 646 IIO_CHAN_SOFT_TIMESTAMP(4), \ 581 647 } 582 648 583 649 #define DECLARE_AD7799_CHANNELS(_name, _b, _sb) \ 584 650 const struct iio_chan_spec _name##_channels[] = { \ 585 - AD_SD_DIFF_CHANNEL(0, 0, 0, AD7793_CH_AIN1P_AIN1M, (_b), (_sb), 0), \ 586 - AD_SD_DIFF_CHANNEL(1, 1, 1, AD7793_CH_AIN2P_AIN2M, (_b), (_sb), 0), \ 587 - AD_SD_DIFF_CHANNEL(2, 2, 2, AD7793_CH_AIN3P_AIN3M, (_b), (_sb), 0), \ 588 - AD_SD_SHORTED_CHANNEL(3, 0, AD7793_CH_AIN1M_AIN1M, (_b), (_sb), 0), \ 589 - AD_SD_SUPPLY_CHANNEL(4, 3, AD7793_CH_AVDD_MONITOR, (_b), (_sb), 0), \ 651 + AD7793_DIFF_CHANNEL(0, 0, 0, AD7793_CH_AIN1P_AIN1M, (_b), (_sb), 0), \ 652 + AD7793_DIFF_CHANNEL(1, 1, 1, AD7793_CH_AIN2P_AIN2M, (_b), (_sb), 0), \ 653 + AD7793_DIFF_CHANNEL(2, 2, 2, AD7793_CH_AIN3P_AIN3M, (_b), (_sb), 0), \ 654 + AD7793_SHORTED_CHANNEL(3, 0, AD7793_CH_AIN1M_AIN1M, (_b), (_sb), 0), \ 655 + AD7793_SUPPLY_CHANNEL(4, 3, AD7793_CH_AVDD_MONITOR, (_b), (_sb), 0), \ 590 656 IIO_CHAN_SOFT_TIMESTAMP(5), \ 591 657 } 592 658
+422
drivers/iio/adc/ad9467.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-only 2 + /* 3 + * Analog Devices AD9467 SPI ADC driver 4 + * 5 + * Copyright 2012-2020 Analog Devices Inc. 6 + */ 7 + 8 + #include <linux/module.h> 9 + #include <linux/device.h> 10 + #include <linux/kernel.h> 11 + #include <linux/slab.h> 12 + #include <linux/spi/spi.h> 13 + #include <linux/err.h> 14 + #include <linux/delay.h> 15 + #include <linux/gpio/consumer.h> 16 + #include <linux/of_device.h> 17 + 18 + 19 + #include <linux/iio/iio.h> 20 + #include <linux/iio/sysfs.h> 21 + 22 + #include <linux/clk.h> 23 + 24 + #include <linux/iio/adc/adi-axi-adc.h> 25 + 26 + /* 27 + * ADI High-Speed ADC common spi interface registers 28 + * See Application-Note AN-877: 29 + * https://www.analog.com/media/en/technical-documentation/application-notes/AN-877.pdf 30 + */ 31 + 32 + #define AN877_ADC_REG_CHIP_PORT_CONF 0x00 33 + #define AN877_ADC_REG_CHIP_ID 0x01 34 + #define AN877_ADC_REG_CHIP_GRADE 0x02 35 + #define AN877_ADC_REG_CHAN_INDEX 0x05 36 + #define AN877_ADC_REG_TRANSFER 0xFF 37 + #define AN877_ADC_REG_MODES 0x08 38 + #define AN877_ADC_REG_TEST_IO 0x0D 39 + #define AN877_ADC_REG_ADC_INPUT 0x0F 40 + #define AN877_ADC_REG_OFFSET 0x10 41 + #define AN877_ADC_REG_OUTPUT_MODE 0x14 42 + #define AN877_ADC_REG_OUTPUT_ADJUST 0x15 43 + #define AN877_ADC_REG_OUTPUT_PHASE 0x16 44 + #define AN877_ADC_REG_OUTPUT_DELAY 0x17 45 + #define AN877_ADC_REG_VREF 0x18 46 + #define AN877_ADC_REG_ANALOG_INPUT 0x2C 47 + 48 + /* AN877_ADC_REG_TEST_IO */ 49 + #define AN877_ADC_TESTMODE_OFF 0x0 50 + #define AN877_ADC_TESTMODE_MIDSCALE_SHORT 0x1 51 + #define AN877_ADC_TESTMODE_POS_FULLSCALE 0x2 52 + #define AN877_ADC_TESTMODE_NEG_FULLSCALE 0x3 53 + #define AN877_ADC_TESTMODE_ALT_CHECKERBOARD 0x4 54 + #define AN877_ADC_TESTMODE_PN23_SEQ 0x5 55 + #define AN877_ADC_TESTMODE_PN9_SEQ 0x6 56 + #define AN877_ADC_TESTMODE_ONE_ZERO_TOGGLE 0x7 57 + #define AN877_ADC_TESTMODE_USER 0x8 58 + #define AN877_ADC_TESTMODE_BIT_TOGGLE 0x9 59 + #define AN877_ADC_TESTMODE_SYNC 0xA 60 + #define AN877_ADC_TESTMODE_ONE_BIT_HIGH 0xB 61 + #define AN877_ADC_TESTMODE_MIXED_BIT_FREQUENCY 0xC 62 + #define AN877_ADC_TESTMODE_RAMP 0xF 63 + 64 + /* AN877_ADC_REG_TRANSFER */ 65 + #define AN877_ADC_TRANSFER_SYNC 0x1 66 + 67 + /* AN877_ADC_REG_OUTPUT_MODE */ 68 + #define AN877_ADC_OUTPUT_MODE_OFFSET_BINARY 0x0 69 + #define AN877_ADC_OUTPUT_MODE_TWOS_COMPLEMENT 0x1 70 + #define AN877_ADC_OUTPUT_MODE_GRAY_CODE 0x2 71 + 72 + /* AN877_ADC_REG_OUTPUT_PHASE */ 73 + #define AN877_ADC_OUTPUT_EVEN_ODD_MODE_EN 0x20 74 + #define AN877_ADC_INVERT_DCO_CLK 0x80 75 + 76 + /* AN877_ADC_REG_OUTPUT_DELAY */ 77 + #define AN877_ADC_DCO_DELAY_ENABLE 0x80 78 + 79 + /* 80 + * Analog Devices AD9467 16-Bit, 200/250 MSPS ADC 81 + */ 82 + 83 + #define CHIPID_AD9467 0x50 84 + #define AD9467_DEF_OUTPUT_MODE 0x08 85 + #define AD9467_REG_VREF_MASK 0x0F 86 + 87 + enum { 88 + ID_AD9467, 89 + }; 90 + 91 + struct ad9467_state { 92 + struct spi_device *spi; 93 + struct clk *clk; 94 + unsigned int output_mode; 95 + 96 + struct gpio_desc *pwrdown_gpio; 97 + struct gpio_desc *reset_gpio; 98 + }; 99 + 100 + static int ad9467_spi_read(struct spi_device *spi, unsigned int reg) 101 + { 102 + unsigned char tbuf[2], rbuf[1]; 103 + int ret; 104 + 105 + tbuf[0] = 0x80 | (reg >> 8); 106 + tbuf[1] = reg & 0xFF; 107 + 108 + ret = spi_write_then_read(spi, 109 + tbuf, ARRAY_SIZE(tbuf), 110 + rbuf, ARRAY_SIZE(rbuf)); 111 + 112 + if (ret < 0) 113 + return ret; 114 + 115 + return rbuf[0]; 116 + } 117 + 118 + static int ad9467_spi_write(struct spi_device *spi, unsigned int reg, 119 + unsigned int val) 120 + { 121 + unsigned char buf[3]; 122 + 123 + buf[0] = reg >> 8; 124 + buf[1] = reg & 0xFF; 125 + buf[2] = val; 126 + 127 + return spi_write(spi, buf, ARRAY_SIZE(buf)); 128 + } 129 + 130 + static int ad9467_reg_access(struct adi_axi_adc_conv *conv, unsigned int reg, 131 + unsigned int writeval, unsigned int *readval) 132 + { 133 + struct ad9467_state *st = adi_axi_adc_conv_priv(conv); 134 + struct spi_device *spi = st->spi; 135 + int ret; 136 + 137 + if (readval == NULL) { 138 + ret = ad9467_spi_write(spi, reg, writeval); 139 + ad9467_spi_write(spi, AN877_ADC_REG_TRANSFER, 140 + AN877_ADC_TRANSFER_SYNC); 141 + return ret; 142 + } 143 + 144 + ret = ad9467_spi_read(spi, reg); 145 + if (ret < 0) 146 + return ret; 147 + *readval = ret; 148 + 149 + return 0; 150 + } 151 + 152 + static const unsigned int ad9467_scale_table[][2] = { 153 + {2000, 0}, {2100, 6}, {2200, 7}, 154 + {2300, 8}, {2400, 9}, {2500, 10}, 155 + }; 156 + 157 + static void __ad9467_get_scale(struct adi_axi_adc_conv *conv, int index, 158 + unsigned int *val, unsigned int *val2) 159 + { 160 + const struct adi_axi_adc_chip_info *info = conv->chip_info; 161 + const struct iio_chan_spec *chan = &info->channels[0]; 162 + unsigned int tmp; 163 + 164 + tmp = (info->scale_table[index][0] * 1000000ULL) >> 165 + chan->scan_type.realbits; 166 + *val = tmp / 1000000; 167 + *val2 = tmp % 1000000; 168 + } 169 + 170 + #define AD9467_CHAN(_chan, _si, _bits, _sign) \ 171 + { \ 172 + .type = IIO_VOLTAGE, \ 173 + .indexed = 1, \ 174 + .channel = _chan, \ 175 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ 176 + BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 177 + .scan_index = _si, \ 178 + .scan_type = { \ 179 + .sign = _sign, \ 180 + .realbits = _bits, \ 181 + .storagebits = 16, \ 182 + }, \ 183 + } 184 + 185 + static const struct iio_chan_spec ad9467_channels[] = { 186 + AD9467_CHAN(0, 0, 16, 'S'), 187 + }; 188 + 189 + static const struct adi_axi_adc_chip_info ad9467_chip_tbl[] = { 190 + [ID_AD9467] = { 191 + .id = CHIPID_AD9467, 192 + .max_rate = 250000000UL, 193 + .scale_table = ad9467_scale_table, 194 + .num_scales = ARRAY_SIZE(ad9467_scale_table), 195 + .channels = ad9467_channels, 196 + .num_channels = ARRAY_SIZE(ad9467_channels), 197 + }, 198 + }; 199 + 200 + static int ad9467_get_scale(struct adi_axi_adc_conv *conv, int *val, int *val2) 201 + { 202 + const struct adi_axi_adc_chip_info *info = conv->chip_info; 203 + struct ad9467_state *st = adi_axi_adc_conv_priv(conv); 204 + unsigned int i, vref_val, vref_mask; 205 + 206 + vref_val = ad9467_spi_read(st->spi, AN877_ADC_REG_VREF); 207 + 208 + switch (info->id) { 209 + case CHIPID_AD9467: 210 + vref_mask = AD9467_REG_VREF_MASK; 211 + break; 212 + default: 213 + vref_mask = 0xFFFF; 214 + break; 215 + } 216 + 217 + vref_val &= vref_mask; 218 + 219 + for (i = 0; i < info->num_scales; i++) { 220 + if (vref_val == info->scale_table[i][1]) 221 + break; 222 + } 223 + 224 + if (i == info->num_scales) 225 + return -ERANGE; 226 + 227 + __ad9467_get_scale(conv, i, val, val2); 228 + 229 + return IIO_VAL_INT_PLUS_MICRO; 230 + } 231 + 232 + static int ad9467_set_scale(struct adi_axi_adc_conv *conv, int val, int val2) 233 + { 234 + const struct adi_axi_adc_chip_info *info = conv->chip_info; 235 + struct ad9467_state *st = adi_axi_adc_conv_priv(conv); 236 + unsigned int scale_val[2]; 237 + unsigned int i; 238 + 239 + if (val != 0) 240 + return -EINVAL; 241 + 242 + for (i = 0; i < info->num_scales; i++) { 243 + __ad9467_get_scale(conv, i, &scale_val[0], &scale_val[1]); 244 + if (scale_val[0] != val || scale_val[1] != val2) 245 + continue; 246 + 247 + ad9467_spi_write(st->spi, AN877_ADC_REG_VREF, 248 + info->scale_table[i][1]); 249 + ad9467_spi_write(st->spi, AN877_ADC_REG_TRANSFER, 250 + AN877_ADC_TRANSFER_SYNC); 251 + return 0; 252 + } 253 + 254 + return -EINVAL; 255 + } 256 + 257 + static int ad9467_read_raw(struct adi_axi_adc_conv *conv, 258 + struct iio_chan_spec const *chan, 259 + int *val, int *val2, long m) 260 + { 261 + struct ad9467_state *st = adi_axi_adc_conv_priv(conv); 262 + 263 + switch (m) { 264 + case IIO_CHAN_INFO_SCALE: 265 + return ad9467_get_scale(conv, val, val2); 266 + case IIO_CHAN_INFO_SAMP_FREQ: 267 + *val = clk_get_rate(st->clk); 268 + 269 + return IIO_VAL_INT; 270 + default: 271 + return -EINVAL; 272 + } 273 + } 274 + 275 + static int ad9467_write_raw(struct adi_axi_adc_conv *conv, 276 + struct iio_chan_spec const *chan, 277 + int val, int val2, long mask) 278 + { 279 + const struct adi_axi_adc_chip_info *info = conv->chip_info; 280 + struct ad9467_state *st = adi_axi_adc_conv_priv(conv); 281 + long r_clk; 282 + 283 + switch (mask) { 284 + case IIO_CHAN_INFO_SCALE: 285 + return ad9467_set_scale(conv, val, val2); 286 + case IIO_CHAN_INFO_SAMP_FREQ: 287 + r_clk = clk_round_rate(st->clk, val); 288 + if (r_clk < 0 || r_clk > info->max_rate) { 289 + dev_warn(&st->spi->dev, 290 + "Error setting ADC sample rate %ld", r_clk); 291 + return -EINVAL; 292 + } 293 + 294 + return clk_set_rate(st->clk, r_clk); 295 + default: 296 + return -EINVAL; 297 + } 298 + } 299 + 300 + static int ad9467_outputmode_set(struct spi_device *spi, unsigned int mode) 301 + { 302 + int ret; 303 + 304 + ret = ad9467_spi_write(spi, AN877_ADC_REG_OUTPUT_MODE, mode); 305 + if (ret < 0) 306 + return ret; 307 + 308 + return ad9467_spi_write(spi, AN877_ADC_REG_TRANSFER, 309 + AN877_ADC_TRANSFER_SYNC); 310 + } 311 + 312 + static int ad9467_preenable_setup(struct adi_axi_adc_conv *conv) 313 + { 314 + struct ad9467_state *st = adi_axi_adc_conv_priv(conv); 315 + 316 + return ad9467_outputmode_set(st->spi, st->output_mode); 317 + } 318 + 319 + static int ad9467_setup(struct ad9467_state *st, unsigned int chip_id) 320 + { 321 + switch (chip_id) { 322 + case CHIPID_AD9467: 323 + st->output_mode = AD9467_DEF_OUTPUT_MODE | 324 + AN877_ADC_OUTPUT_MODE_TWOS_COMPLEMENT; 325 + return 0; 326 + default: 327 + return -EINVAL; 328 + } 329 + } 330 + 331 + static void ad9467_clk_disable(void *data) 332 + { 333 + struct ad9467_state *st = data; 334 + 335 + clk_disable_unprepare(st->clk); 336 + } 337 + 338 + static int ad9467_probe(struct spi_device *spi) 339 + { 340 + const struct adi_axi_adc_chip_info *info; 341 + struct adi_axi_adc_conv *conv; 342 + struct ad9467_state *st; 343 + unsigned int id; 344 + int ret; 345 + 346 + info = of_device_get_match_data(&spi->dev); 347 + if (!info) 348 + return -ENODEV; 349 + 350 + conv = devm_adi_axi_adc_conv_register(&spi->dev, sizeof(*st)); 351 + if (IS_ERR(conv)) 352 + return PTR_ERR(conv); 353 + 354 + st = adi_axi_adc_conv_priv(conv); 355 + st->spi = spi; 356 + 357 + st->clk = devm_clk_get(&spi->dev, "adc-clk"); 358 + if (IS_ERR(st->clk)) 359 + return PTR_ERR(st->clk); 360 + 361 + ret = clk_prepare_enable(st->clk); 362 + if (ret < 0) 363 + return ret; 364 + 365 + ret = devm_add_action_or_reset(&spi->dev, ad9467_clk_disable, st); 366 + if (ret) 367 + return ret; 368 + 369 + st->pwrdown_gpio = devm_gpiod_get_optional(&spi->dev, "powerdown", 370 + GPIOD_OUT_LOW); 371 + if (IS_ERR(st->pwrdown_gpio)) 372 + return PTR_ERR(st->pwrdown_gpio); 373 + 374 + st->reset_gpio = devm_gpiod_get_optional(&spi->dev, "reset", 375 + GPIOD_OUT_LOW); 376 + if (IS_ERR(st->reset_gpio)) 377 + return PTR_ERR(st->reset_gpio); 378 + 379 + if (st->reset_gpio) { 380 + udelay(1); 381 + ret = gpiod_direction_output(st->reset_gpio, 1); 382 + if (ret) 383 + return ret; 384 + mdelay(10); 385 + } 386 + 387 + spi_set_drvdata(spi, st); 388 + 389 + conv->chip_info = info; 390 + 391 + id = ad9467_spi_read(spi, AN877_ADC_REG_CHIP_ID); 392 + if (id != conv->chip_info->id) { 393 + dev_err(&spi->dev, "Unrecognized CHIP_ID 0x%X\n", id); 394 + return -ENODEV; 395 + } 396 + 397 + conv->reg_access = ad9467_reg_access; 398 + conv->write_raw = ad9467_write_raw; 399 + conv->read_raw = ad9467_read_raw; 400 + conv->preenable_setup = ad9467_preenable_setup; 401 + 402 + return ad9467_setup(st, id); 403 + } 404 + 405 + static const struct of_device_id ad9467_of_match[] = { 406 + { .compatible = "adi,ad9467", .data = &ad9467_chip_tbl[ID_AD9467], }, 407 + {} 408 + }; 409 + MODULE_DEVICE_TABLE(of, ad9467_of_match); 410 + 411 + static struct spi_driver ad9467_driver = { 412 + .driver = { 413 + .name = "ad9467", 414 + .of_match_table = ad9467_of_match, 415 + }, 416 + .probe = ad9467_probe, 417 + }; 418 + module_spi_driver(ad9467_driver); 419 + 420 + MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); 421 + MODULE_DESCRIPTION("Analog Devices AD9467 ADC driver"); 422 + MODULE_LICENSE("GPL v2");
+482
drivers/iio/adc/adi-axi-adc.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-only 2 + /* 3 + * Analog Devices Generic AXI ADC IP core 4 + * Link: https://wiki.analog.com/resources/fpga/docs/axi_adc_ip 5 + * 6 + * Copyright 2012-2020 Analog Devices Inc. 7 + */ 8 + 9 + #include <linux/bitfield.h> 10 + #include <linux/clk.h> 11 + #include <linux/io.h> 12 + #include <linux/delay.h> 13 + #include <linux/module.h> 14 + #include <linux/of_device.h> 15 + #include <linux/platform_device.h> 16 + #include <linux/slab.h> 17 + 18 + #include <linux/iio/iio.h> 19 + #include <linux/iio/sysfs.h> 20 + #include <linux/iio/buffer.h> 21 + #include <linux/iio/buffer-dmaengine.h> 22 + 23 + #include <linux/fpga/adi-axi-common.h> 24 + #include <linux/iio/adc/adi-axi-adc.h> 25 + 26 + /** 27 + * Register definitions: 28 + * https://wiki.analog.com/resources/fpga/docs/axi_adc_ip#register_map 29 + */ 30 + 31 + /* ADC controls */ 32 + 33 + #define ADI_AXI_REG_RSTN 0x0040 34 + #define ADI_AXI_REG_RSTN_CE_N BIT(2) 35 + #define ADI_AXI_REG_RSTN_MMCM_RSTN BIT(1) 36 + #define ADI_AXI_REG_RSTN_RSTN BIT(0) 37 + 38 + /* ADC Channel controls */ 39 + 40 + #define ADI_AXI_REG_CHAN_CTRL(c) (0x0400 + (c) * 0x40) 41 + #define ADI_AXI_REG_CHAN_CTRL_LB_OWR BIT(11) 42 + #define ADI_AXI_REG_CHAN_CTRL_PN_SEL_OWR BIT(10) 43 + #define ADI_AXI_REG_CHAN_CTRL_IQCOR_EN BIT(9) 44 + #define ADI_AXI_REG_CHAN_CTRL_DCFILT_EN BIT(8) 45 + #define ADI_AXI_REG_CHAN_CTRL_FMT_SIGNEXT BIT(6) 46 + #define ADI_AXI_REG_CHAN_CTRL_FMT_TYPE BIT(5) 47 + #define ADI_AXI_REG_CHAN_CTRL_FMT_EN BIT(4) 48 + #define ADI_AXI_REG_CHAN_CTRL_PN_TYPE_OWR BIT(1) 49 + #define ADI_AXI_REG_CHAN_CTRL_ENABLE BIT(0) 50 + 51 + #define ADI_AXI_REG_CHAN_CTRL_DEFAULTS \ 52 + (ADI_AXI_REG_CHAN_CTRL_FMT_SIGNEXT | \ 53 + ADI_AXI_REG_CHAN_CTRL_FMT_EN | \ 54 + ADI_AXI_REG_CHAN_CTRL_ENABLE) 55 + 56 + struct adi_axi_adc_core_info { 57 + unsigned int version; 58 + }; 59 + 60 + struct adi_axi_adc_state { 61 + struct mutex lock; 62 + 63 + struct adi_axi_adc_client *client; 64 + void __iomem *regs; 65 + }; 66 + 67 + struct adi_axi_adc_client { 68 + struct list_head entry; 69 + struct adi_axi_adc_conv conv; 70 + struct adi_axi_adc_state *state; 71 + struct device *dev; 72 + const struct adi_axi_adc_core_info *info; 73 + }; 74 + 75 + static LIST_HEAD(registered_clients); 76 + static DEFINE_MUTEX(registered_clients_lock); 77 + 78 + static struct adi_axi_adc_client *conv_to_client(struct adi_axi_adc_conv *conv) 79 + { 80 + return container_of(conv, struct adi_axi_adc_client, conv); 81 + } 82 + 83 + void *adi_axi_adc_conv_priv(struct adi_axi_adc_conv *conv) 84 + { 85 + struct adi_axi_adc_client *cl = conv_to_client(conv); 86 + 87 + return (char *)cl + ALIGN(sizeof(struct adi_axi_adc_client), IIO_ALIGN); 88 + } 89 + EXPORT_SYMBOL_GPL(adi_axi_adc_conv_priv); 90 + 91 + static void adi_axi_adc_write(struct adi_axi_adc_state *st, 92 + unsigned int reg, 93 + unsigned int val) 94 + { 95 + iowrite32(val, st->regs + reg); 96 + } 97 + 98 + static unsigned int adi_axi_adc_read(struct adi_axi_adc_state *st, 99 + unsigned int reg) 100 + { 101 + return ioread32(st->regs + reg); 102 + } 103 + 104 + static int adi_axi_adc_config_dma_buffer(struct device *dev, 105 + struct iio_dev *indio_dev) 106 + { 107 + struct iio_buffer *buffer; 108 + const char *dma_name; 109 + 110 + if (!device_property_present(dev, "dmas")) 111 + return 0; 112 + 113 + if (device_property_read_string(dev, "dma-names", &dma_name)) 114 + dma_name = "rx"; 115 + 116 + buffer = devm_iio_dmaengine_buffer_alloc(indio_dev->dev.parent, 117 + dma_name); 118 + if (IS_ERR(buffer)) 119 + return PTR_ERR(buffer); 120 + 121 + indio_dev->modes |= INDIO_BUFFER_HARDWARE; 122 + iio_device_attach_buffer(indio_dev, buffer); 123 + 124 + return 0; 125 + } 126 + 127 + static int adi_axi_adc_read_raw(struct iio_dev *indio_dev, 128 + struct iio_chan_spec const *chan, 129 + int *val, int *val2, long mask) 130 + { 131 + struct adi_axi_adc_state *st = iio_priv(indio_dev); 132 + struct adi_axi_adc_conv *conv = &st->client->conv; 133 + 134 + if (!conv->read_raw) 135 + return -EOPNOTSUPP; 136 + 137 + return conv->read_raw(conv, chan, val, val2, mask); 138 + } 139 + 140 + static int adi_axi_adc_write_raw(struct iio_dev *indio_dev, 141 + struct iio_chan_spec const *chan, 142 + int val, int val2, long mask) 143 + { 144 + struct adi_axi_adc_state *st = iio_priv(indio_dev); 145 + struct adi_axi_adc_conv *conv = &st->client->conv; 146 + 147 + if (!conv->write_raw) 148 + return -EOPNOTSUPP; 149 + 150 + return conv->write_raw(conv, chan, val, val2, mask); 151 + } 152 + 153 + static int adi_axi_adc_update_scan_mode(struct iio_dev *indio_dev, 154 + const unsigned long *scan_mask) 155 + { 156 + struct adi_axi_adc_state *st = iio_priv(indio_dev); 157 + struct adi_axi_adc_conv *conv = &st->client->conv; 158 + unsigned int i, ctrl; 159 + 160 + for (i = 0; i < conv->chip_info->num_channels; i++) { 161 + ctrl = adi_axi_adc_read(st, ADI_AXI_REG_CHAN_CTRL(i)); 162 + 163 + if (test_bit(i, scan_mask)) 164 + ctrl |= ADI_AXI_REG_CHAN_CTRL_ENABLE; 165 + else 166 + ctrl &= ~ADI_AXI_REG_CHAN_CTRL_ENABLE; 167 + 168 + adi_axi_adc_write(st, ADI_AXI_REG_CHAN_CTRL(i), ctrl); 169 + } 170 + 171 + return 0; 172 + } 173 + 174 + static struct adi_axi_adc_conv *adi_axi_adc_conv_register(struct device *dev, 175 + size_t sizeof_priv) 176 + { 177 + struct adi_axi_adc_client *cl; 178 + size_t alloc_size; 179 + 180 + alloc_size = ALIGN(sizeof(struct adi_axi_adc_client), IIO_ALIGN); 181 + if (sizeof_priv) 182 + alloc_size += ALIGN(sizeof_priv, IIO_ALIGN); 183 + 184 + cl = kzalloc(alloc_size, GFP_KERNEL); 185 + if (!cl) 186 + return ERR_PTR(-ENOMEM); 187 + 188 + mutex_lock(&registered_clients_lock); 189 + 190 + cl->dev = get_device(dev); 191 + 192 + list_add_tail(&cl->entry, &registered_clients); 193 + 194 + mutex_unlock(&registered_clients_lock); 195 + 196 + return &cl->conv; 197 + } 198 + 199 + static void adi_axi_adc_conv_unregister(struct adi_axi_adc_conv *conv) 200 + { 201 + struct adi_axi_adc_client *cl = conv_to_client(conv); 202 + 203 + mutex_lock(&registered_clients_lock); 204 + 205 + list_del(&cl->entry); 206 + put_device(cl->dev); 207 + 208 + mutex_unlock(&registered_clients_lock); 209 + 210 + kfree(cl); 211 + } 212 + 213 + static void devm_adi_axi_adc_conv_release(struct device *dev, void *res) 214 + { 215 + adi_axi_adc_conv_unregister(*(struct adi_axi_adc_conv **)res); 216 + } 217 + 218 + struct adi_axi_adc_conv *devm_adi_axi_adc_conv_register(struct device *dev, 219 + size_t sizeof_priv) 220 + { 221 + struct adi_axi_adc_conv **ptr, *conv; 222 + 223 + ptr = devres_alloc(devm_adi_axi_adc_conv_release, sizeof(*ptr), 224 + GFP_KERNEL); 225 + if (!ptr) 226 + return ERR_PTR(-ENOMEM); 227 + 228 + conv = adi_axi_adc_conv_register(dev, sizeof_priv); 229 + if (IS_ERR(conv)) { 230 + devres_free(ptr); 231 + return ERR_CAST(conv); 232 + } 233 + 234 + *ptr = conv; 235 + devres_add(dev, ptr); 236 + 237 + return conv; 238 + } 239 + EXPORT_SYMBOL_GPL(devm_adi_axi_adc_conv_register); 240 + 241 + static ssize_t in_voltage_scale_available_show(struct device *dev, 242 + struct device_attribute *attr, 243 + char *buf) 244 + { 245 + struct iio_dev *indio_dev = dev_to_iio_dev(dev); 246 + struct adi_axi_adc_state *st = iio_priv(indio_dev); 247 + struct adi_axi_adc_conv *conv = &st->client->conv; 248 + size_t len = 0; 249 + int i; 250 + 251 + for (i = 0; i < conv->chip_info->num_scales; i++) { 252 + const unsigned int *s = conv->chip_info->scale_table[i]; 253 + 254 + len += scnprintf(buf + len, PAGE_SIZE - len, 255 + "%u.%06u ", s[0], s[1]); 256 + } 257 + buf[len - 1] = '\n'; 258 + 259 + return len; 260 + } 261 + 262 + static IIO_DEVICE_ATTR_RO(in_voltage_scale_available, 0); 263 + 264 + enum { 265 + ADI_AXI_ATTR_SCALE_AVAIL, 266 + }; 267 + 268 + #define ADI_AXI_ATTR(_en_, _file_) \ 269 + [ADI_AXI_ATTR_##_en_] = &iio_dev_attr_##_file_.dev_attr.attr 270 + 271 + static struct attribute *adi_axi_adc_attributes[] = { 272 + ADI_AXI_ATTR(SCALE_AVAIL, in_voltage_scale_available), 273 + NULL 274 + }; 275 + 276 + static umode_t axi_adc_attr_is_visible(struct kobject *kobj, 277 + struct attribute *attr, int n) 278 + { 279 + struct device *dev = container_of(kobj, struct device, kobj); 280 + struct iio_dev *indio_dev = dev_to_iio_dev(dev); 281 + struct adi_axi_adc_state *st = iio_priv(indio_dev); 282 + struct adi_axi_adc_conv *conv = &st->client->conv; 283 + 284 + switch (n) { 285 + case ADI_AXI_ATTR_SCALE_AVAIL: 286 + if (!conv->chip_info->num_scales) 287 + return 0; 288 + return attr->mode; 289 + default: 290 + return attr->mode; 291 + } 292 + } 293 + 294 + static const struct attribute_group adi_axi_adc_attribute_group = { 295 + .attrs = adi_axi_adc_attributes, 296 + .is_visible = axi_adc_attr_is_visible, 297 + }; 298 + 299 + static const struct iio_info adi_axi_adc_info = { 300 + .read_raw = &adi_axi_adc_read_raw, 301 + .write_raw = &adi_axi_adc_write_raw, 302 + .attrs = &adi_axi_adc_attribute_group, 303 + .update_scan_mode = &adi_axi_adc_update_scan_mode, 304 + }; 305 + 306 + static const struct adi_axi_adc_core_info adi_axi_adc_10_0_a_info = { 307 + .version = ADI_AXI_PCORE_VER(10, 0, 'a'), 308 + }; 309 + 310 + static struct adi_axi_adc_client *adi_axi_adc_attach_client(struct device *dev) 311 + { 312 + const struct adi_axi_adc_core_info *info; 313 + struct adi_axi_adc_client *cl; 314 + struct device_node *cln; 315 + 316 + info = of_device_get_match_data(dev); 317 + if (!info) 318 + return ERR_PTR(-ENODEV); 319 + 320 + cln = of_parse_phandle(dev->of_node, "adi,adc-dev", 0); 321 + if (!cln) { 322 + dev_err(dev, "No 'adi,adc-dev' node defined\n"); 323 + return ERR_PTR(-ENODEV); 324 + } 325 + 326 + mutex_lock(&registered_clients_lock); 327 + 328 + list_for_each_entry(cl, &registered_clients, entry) { 329 + if (!cl->dev) 330 + continue; 331 + 332 + if (cl->dev->of_node != cln) 333 + continue; 334 + 335 + if (!try_module_get(dev->driver->owner)) { 336 + mutex_unlock(&registered_clients_lock); 337 + return ERR_PTR(-ENODEV); 338 + } 339 + 340 + get_device(dev); 341 + cl->info = info; 342 + mutex_unlock(&registered_clients_lock); 343 + return cl; 344 + } 345 + 346 + mutex_unlock(&registered_clients_lock); 347 + 348 + return ERR_PTR(-EPROBE_DEFER); 349 + } 350 + 351 + static int adi_axi_adc_setup_channels(struct device *dev, 352 + struct adi_axi_adc_state *st) 353 + { 354 + struct adi_axi_adc_conv *conv = &st->client->conv; 355 + int i, ret; 356 + 357 + if (conv->preenable_setup) { 358 + ret = conv->preenable_setup(conv); 359 + if (ret) 360 + return ret; 361 + } 362 + 363 + for (i = 0; i < conv->chip_info->num_channels; i++) { 364 + adi_axi_adc_write(st, ADI_AXI_REG_CHAN_CTRL(i), 365 + ADI_AXI_REG_CHAN_CTRL_DEFAULTS); 366 + } 367 + 368 + return 0; 369 + } 370 + 371 + static void axi_adc_reset(struct adi_axi_adc_state *st) 372 + { 373 + adi_axi_adc_write(st, ADI_AXI_REG_RSTN, 0); 374 + mdelay(10); 375 + adi_axi_adc_write(st, ADI_AXI_REG_RSTN, ADI_AXI_REG_RSTN_MMCM_RSTN); 376 + mdelay(10); 377 + adi_axi_adc_write(st, ADI_AXI_REG_RSTN, 378 + ADI_AXI_REG_RSTN_RSTN | ADI_AXI_REG_RSTN_MMCM_RSTN); 379 + } 380 + 381 + static void adi_axi_adc_cleanup(void *data) 382 + { 383 + struct adi_axi_adc_client *cl = data; 384 + 385 + put_device(cl->dev); 386 + module_put(cl->dev->driver->owner); 387 + } 388 + 389 + static int adi_axi_adc_probe(struct platform_device *pdev) 390 + { 391 + struct adi_axi_adc_conv *conv; 392 + struct iio_dev *indio_dev; 393 + struct adi_axi_adc_client *cl; 394 + struct adi_axi_adc_state *st; 395 + unsigned int ver; 396 + int ret; 397 + 398 + cl = adi_axi_adc_attach_client(&pdev->dev); 399 + if (IS_ERR(cl)) 400 + return PTR_ERR(cl); 401 + 402 + ret = devm_add_action_or_reset(&pdev->dev, adi_axi_adc_cleanup, cl); 403 + if (ret) 404 + return ret; 405 + 406 + indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*st)); 407 + if (indio_dev == NULL) 408 + return -ENOMEM; 409 + 410 + st = iio_priv(indio_dev); 411 + st->client = cl; 412 + cl->state = st; 413 + mutex_init(&st->lock); 414 + 415 + st->regs = devm_platform_ioremap_resource(pdev, 0); 416 + if (IS_ERR(st->regs)) 417 + return PTR_ERR(st->regs); 418 + 419 + conv = &st->client->conv; 420 + 421 + axi_adc_reset(st); 422 + 423 + ver = adi_axi_adc_read(st, ADI_AXI_REG_VERSION); 424 + 425 + if (cl->info->version > ver) { 426 + dev_err(&pdev->dev, 427 + "IP core version is too old. Expected %d.%.2d.%c, Reported %d.%.2d.%c\n", 428 + ADI_AXI_PCORE_VER_MAJOR(cl->info->version), 429 + ADI_AXI_PCORE_VER_MINOR(cl->info->version), 430 + ADI_AXI_PCORE_VER_PATCH(cl->info->version), 431 + ADI_AXI_PCORE_VER_MAJOR(ver), 432 + ADI_AXI_PCORE_VER_MINOR(ver), 433 + ADI_AXI_PCORE_VER_PATCH(ver)); 434 + return -ENODEV; 435 + } 436 + 437 + indio_dev->info = &adi_axi_adc_info; 438 + indio_dev->dev.parent = &pdev->dev; 439 + indio_dev->name = "adi-axi-adc"; 440 + indio_dev->modes = INDIO_DIRECT_MODE; 441 + indio_dev->num_channels = conv->chip_info->num_channels; 442 + indio_dev->channels = conv->chip_info->channels; 443 + 444 + ret = adi_axi_adc_config_dma_buffer(&pdev->dev, indio_dev); 445 + if (ret) 446 + return ret; 447 + 448 + ret = adi_axi_adc_setup_channels(&pdev->dev, st); 449 + if (ret) 450 + return ret; 451 + 452 + ret = devm_iio_device_register(&pdev->dev, indio_dev); 453 + if (ret) 454 + return ret; 455 + 456 + dev_info(&pdev->dev, "AXI ADC IP core (%d.%.2d.%c) probed\n", 457 + ADI_AXI_PCORE_VER_MAJOR(ver), 458 + ADI_AXI_PCORE_VER_MINOR(ver), 459 + ADI_AXI_PCORE_VER_PATCH(ver)); 460 + 461 + return 0; 462 + } 463 + 464 + /* Match table for of_platform binding */ 465 + static const struct of_device_id adi_axi_adc_of_match[] = { 466 + { .compatible = "adi,axi-adc-10.0.a", .data = &adi_axi_adc_10_0_a_info }, 467 + { /* end of list */ } 468 + }; 469 + MODULE_DEVICE_TABLE(of, adi_axi_adc_of_match); 470 + 471 + static struct platform_driver adi_axi_adc_driver = { 472 + .driver = { 473 + .name = KBUILD_MODNAME, 474 + .of_match_table = adi_axi_adc_of_match, 475 + }, 476 + .probe = adi_axi_adc_probe, 477 + }; 478 + module_platform_driver(adi_axi_adc_driver); 479 + 480 + MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); 481 + MODULE_DESCRIPTION("Analog Devices Generic AXI ADC IP core driver"); 482 + MODULE_LICENSE("GPL v2");
+1 -4
drivers/iio/adc/at91_adc.c
··· 1152 1152 int ret; 1153 1153 struct iio_dev *idev; 1154 1154 struct at91_adc_state *st; 1155 - struct resource *res; 1156 1155 u32 reg; 1157 1156 1158 1157 idev = devm_iio_device_alloc(&pdev->dev, sizeof(struct at91_adc_state)); ··· 1181 1182 if (st->irq < 0) 1182 1183 return -ENODEV; 1183 1184 1184 - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1185 - 1186 - st->reg_base = devm_ioremap_resource(&pdev->dev, res); 1185 + st->reg_base = devm_platform_ioremap_resource(pdev, 0); 1187 1186 if (IS_ERR(st->reg_base)) 1188 1187 return PTR_ERR(st->reg_base); 1189 1188
+1 -3
drivers/iio/adc/fsl-imx25-gcq.c
··· 294 294 struct mx25_gcq_priv *priv; 295 295 struct mx25_tsadc *tsadc = dev_get_drvdata(pdev->dev.parent); 296 296 struct device *dev = &pdev->dev; 297 - struct resource *res; 298 297 void __iomem *mem; 299 298 int ret; 300 299 int i; ··· 304 305 305 306 priv = iio_priv(indio_dev); 306 307 307 - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 308 - mem = devm_ioremap_resource(dev, res); 308 + mem = devm_platform_ioremap_resource(pdev, 0); 309 309 if (IS_ERR(mem)) 310 310 return PTR_ERR(mem); 311 311
+3 -3
drivers/iio/adc/intel_mrfld_adc.c
··· 75 75 struct regmap *regmap = adc->regmap; 76 76 unsigned int req; 77 77 long timeout; 78 - u8 buf[2]; 78 + __be16 value; 79 79 int ret; 80 80 81 81 reinit_completion(&adc->completion); ··· 105 105 goto done; 106 106 } 107 107 108 - ret = regmap_bulk_read(regmap, chan->address, buf, 2); 108 + ret = regmap_bulk_read(regmap, chan->address, &value, sizeof(value)); 109 109 if (ret) 110 110 goto done; 111 111 112 - *result = get_unaligned_be16(buf); 112 + *result = be16_to_cpu(value); 113 113 ret = IIO_VAL_INT; 114 114 115 115 done:
+227
drivers/iio/adc/max1241.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-only 2 + /* 3 + * MAX1241 low-power, 12-bit serial ADC 4 + * 5 + * Datasheet: https://datasheets.maximintegrated.com/en/ds/MAX1240-MAX1241.pdf 6 + */ 7 + 8 + #include <linux/delay.h> 9 + #include <linux/gpio/consumer.h> 10 + #include <linux/iio/iio.h> 11 + #include <linux/module.h> 12 + #include <linux/regulator/consumer.h> 13 + #include <linux/spi/spi.h> 14 + 15 + #define MAX1241_VAL_MASK GENMASK(11, 0) 16 + #define MAX1241_SHUTDOWN_DELAY_USEC 4 17 + 18 + enum max1241_id { 19 + max1241, 20 + }; 21 + 22 + struct max1241 { 23 + struct spi_device *spi; 24 + struct mutex lock; 25 + struct regulator *vdd; 26 + struct regulator *vref; 27 + struct gpio_desc *shutdown; 28 + 29 + __be16 data ____cacheline_aligned; 30 + }; 31 + 32 + static const struct iio_chan_spec max1241_channels[] = { 33 + { 34 + .type = IIO_VOLTAGE, 35 + .indexed = 1, 36 + .channel = 0, 37 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 38 + BIT(IIO_CHAN_INFO_SCALE), 39 + }, 40 + }; 41 + 42 + static int max1241_read(struct max1241 *adc) 43 + { 44 + struct spi_transfer xfers[] = { 45 + /* 46 + * Begin conversion by bringing /CS low for at least 47 + * tconv us. 48 + */ 49 + { 50 + .len = 0, 51 + .delay.value = 8, 52 + .delay.unit = SPI_DELAY_UNIT_USECS, 53 + }, 54 + /* 55 + * Then read two bytes of data in our RX buffer. 56 + */ 57 + { 58 + .rx_buf = &adc->data, 59 + .len = 2, 60 + }, 61 + }; 62 + 63 + return spi_sync_transfer(adc->spi, xfers, ARRAY_SIZE(xfers)); 64 + } 65 + 66 + static int max1241_read_raw(struct iio_dev *indio_dev, 67 + struct iio_chan_spec const *chan, 68 + int *val, int *val2, long mask) 69 + { 70 + int ret, vref_uV; 71 + struct max1241 *adc = iio_priv(indio_dev); 72 + 73 + switch (mask) { 74 + case IIO_CHAN_INFO_RAW: 75 + mutex_lock(&adc->lock); 76 + 77 + if (adc->shutdown) { 78 + gpiod_set_value(adc->shutdown, 0); 79 + udelay(MAX1241_SHUTDOWN_DELAY_USEC); 80 + ret = max1241_read(adc); 81 + gpiod_set_value(adc->shutdown, 1); 82 + } else 83 + ret = max1241_read(adc); 84 + 85 + if (ret) { 86 + mutex_unlock(&adc->lock); 87 + return ret; 88 + } 89 + 90 + *val = (be16_to_cpu(adc->data) >> 3) & MAX1241_VAL_MASK; 91 + 92 + mutex_unlock(&adc->lock); 93 + return IIO_VAL_INT; 94 + case IIO_CHAN_INFO_SCALE: 95 + vref_uV = regulator_get_voltage(adc->vref); 96 + 97 + if (vref_uV < 0) 98 + return vref_uV; 99 + 100 + *val = vref_uV / 1000; 101 + *val2 = 12; 102 + 103 + return IIO_VAL_FRACTIONAL_LOG2; 104 + default: 105 + return -EINVAL; 106 + } 107 + } 108 + 109 + static const struct iio_info max1241_info = { 110 + .read_raw = max1241_read_raw, 111 + }; 112 + 113 + static void max1241_disable_vdd_action(void *data) 114 + { 115 + struct max1241 *adc = data; 116 + struct device *dev = &adc->spi->dev; 117 + int err; 118 + 119 + err = regulator_disable(adc->vdd); 120 + if (err) 121 + dev_err(dev, "could not disable vdd regulator.\n"); 122 + } 123 + 124 + static void max1241_disable_vref_action(void *data) 125 + { 126 + struct max1241 *adc = data; 127 + struct device *dev = &adc->spi->dev; 128 + int err; 129 + 130 + err = regulator_disable(adc->vref); 131 + if (err) 132 + dev_err(dev, "could not disable vref regulator.\n"); 133 + } 134 + 135 + static int max1241_probe(struct spi_device *spi) 136 + { 137 + struct device *dev = &spi->dev; 138 + struct iio_dev *indio_dev; 139 + struct max1241 *adc; 140 + int ret; 141 + 142 + indio_dev = devm_iio_device_alloc(dev, sizeof(*adc)); 143 + if (!indio_dev) 144 + return -ENOMEM; 145 + 146 + adc = iio_priv(indio_dev); 147 + adc->spi = spi; 148 + mutex_init(&adc->lock); 149 + 150 + spi_set_drvdata(spi, indio_dev); 151 + 152 + adc->vdd = devm_regulator_get(dev, "vdd"); 153 + if (IS_ERR(adc->vdd)) { 154 + dev_err(dev, "failed to get vdd regulator\n"); 155 + return PTR_ERR(adc->vdd); 156 + } 157 + 158 + ret = regulator_enable(adc->vdd); 159 + if (ret) 160 + return ret; 161 + 162 + ret = devm_add_action_or_reset(dev, max1241_disable_vdd_action, adc); 163 + if (ret) { 164 + dev_err(dev, "could not set up vdd regulator cleanup action\n"); 165 + return ret; 166 + } 167 + 168 + adc->vref = devm_regulator_get(dev, "vref"); 169 + if (IS_ERR(adc->vref)) { 170 + dev_err(dev, "failed to get vref regulator\n"); 171 + return PTR_ERR(adc->vref); 172 + } 173 + 174 + ret = regulator_enable(adc->vref); 175 + if (ret) 176 + return ret; 177 + 178 + ret = devm_add_action_or_reset(dev, max1241_disable_vref_action, adc); 179 + if (ret) { 180 + dev_err(dev, "could not set up vref regulator cleanup action\n"); 181 + return ret; 182 + } 183 + 184 + adc->shutdown = devm_gpiod_get_optional(dev, "shutdown", 185 + GPIOD_OUT_HIGH); 186 + if (IS_ERR(adc->shutdown)) 187 + return PTR_ERR(adc->shutdown); 188 + 189 + if (adc->shutdown) 190 + dev_dbg(dev, "shutdown pin passed, low-power mode enabled"); 191 + else 192 + dev_dbg(dev, "no shutdown pin passed, low-power mode disabled"); 193 + 194 + indio_dev->name = spi_get_device_id(spi)->name; 195 + indio_dev->dev.parent = dev; 196 + indio_dev->info = &max1241_info; 197 + indio_dev->modes = INDIO_DIRECT_MODE; 198 + indio_dev->channels = max1241_channels; 199 + indio_dev->num_channels = ARRAY_SIZE(max1241_channels); 200 + 201 + return devm_iio_device_register(dev, indio_dev); 202 + } 203 + 204 + static const struct spi_device_id max1241_id[] = { 205 + { "max1241", max1241 }, 206 + {} 207 + }; 208 + 209 + static const struct of_device_id max1241_dt_ids[] = { 210 + { .compatible = "maxim,max1241" }, 211 + {} 212 + }; 213 + MODULE_DEVICE_TABLE(of, max1241_dt_ids); 214 + 215 + static struct spi_driver max1241_spi_driver = { 216 + .driver = { 217 + .name = "max1241", 218 + .of_match_table = max1241_dt_ids, 219 + }, 220 + .probe = max1241_probe, 221 + .id_table = max1241_id, 222 + }; 223 + module_spi_driver(max1241_spi_driver); 224 + 225 + MODULE_AUTHOR("Alexandru Lazar <alazar@startmail.com>"); 226 + MODULE_DESCRIPTION("MAX1241 ADC driver"); 227 + MODULE_LICENSE("GPL v2");
+23 -9
drivers/iio/adc/max1363.c
··· 150 150 * @current_mode: the scan mode of this chip 151 151 * @requestedmask: a valid requested set of channels 152 152 * @reg: supply regulator 153 + * @lock lock to ensure state is consistent 153 154 * @monitor_on: whether monitor mode is enabled 154 155 * @monitor_speed: parameter corresponding to device monitor speed setting 155 156 * @mask_high: bitmask for enabled high thresholds ··· 170 169 const struct max1363_mode *current_mode; 171 170 u32 requestedmask; 172 171 struct regulator *reg; 172 + struct mutex lock; 173 173 174 174 /* Using monitor modes and buffer at the same time is 175 175 currently not supported */ ··· 366 364 struct max1363_state *st = iio_priv(indio_dev); 367 365 struct i2c_client *client = st->client; 368 366 369 - mutex_lock(&indio_dev->mlock); 367 + ret = iio_device_claim_direct_mode(indio_dev); 368 + if (ret) 369 + return ret; 370 + mutex_lock(&st->lock); 371 + 370 372 /* 371 373 * If monitor mode is enabled, the method for reading a single 372 374 * channel will have to be rather different and has not yet ··· 378 372 * 379 373 * Also, cannot read directly if buffered capture enabled. 380 374 */ 381 - if (st->monitor_on || iio_buffer_enabled(indio_dev)) { 375 + if (st->monitor_on) { 382 376 ret = -EBUSY; 383 377 goto error_ret; 384 378 } ··· 410 404 data = rxbuf[0]; 411 405 } 412 406 *val = data; 407 + 413 408 error_ret: 414 - mutex_unlock(&indio_dev->mlock); 409 + mutex_unlock(&st->lock); 410 + iio_device_release_direct_mode(indio_dev); 415 411 return ret; 416 412 417 413 } ··· 713 705 if (!found) 714 706 return -EINVAL; 715 707 716 - mutex_lock(&indio_dev->mlock); 708 + mutex_lock(&st->lock); 717 709 st->monitor_speed = i; 718 - mutex_unlock(&indio_dev->mlock); 710 + mutex_unlock(&st->lock); 719 711 720 712 return 0; 721 713 } ··· 818 810 int val; 819 811 int number = chan->channel; 820 812 821 - mutex_lock(&indio_dev->mlock); 813 + mutex_lock(&st->lock); 822 814 if (dir == IIO_EV_DIR_FALLING) 823 815 val = (1 << number) & st->mask_low; 824 816 else 825 817 val = (1 << number) & st->mask_high; 826 - mutex_unlock(&indio_dev->mlock); 818 + mutex_unlock(&st->lock); 827 819 828 820 return val; 829 821 } ··· 970 962 u16 unifiedmask; 971 963 int number = chan->channel; 972 964 973 - mutex_lock(&indio_dev->mlock); 965 + ret = iio_device_claim_direct_mode(indio_dev); 966 + if (ret) 967 + return ret; 968 + mutex_lock(&st->lock); 969 + 974 970 unifiedmask = st->mask_low | st->mask_high; 975 971 if (dir == IIO_EV_DIR_FALLING) { 976 972 ··· 1001 989 1002 990 max1363_monitor_mode_update(st, !!(st->mask_high | st->mask_low)); 1003 991 error_ret: 1004 - mutex_unlock(&indio_dev->mlock); 992 + mutex_unlock(&st->lock); 993 + iio_device_release_direct_mode(indio_dev); 1005 994 1006 995 return ret; 1007 996 } ··· 1600 1587 1601 1588 st = iio_priv(indio_dev); 1602 1589 1590 + mutex_init(&st->lock); 1603 1591 st->reg = devm_regulator_get(&client->dev, "vcc"); 1604 1592 if (IS_ERR(st->reg)) { 1605 1593 ret = PTR_ERR(st->reg);
+1 -3
drivers/iio/adc/sun4i-gpadc-iio.c
··· 496 496 struct iio_dev *indio_dev) 497 497 { 498 498 struct sun4i_gpadc_iio *info = iio_priv(indio_dev); 499 - struct resource *mem; 500 499 void __iomem *base; 501 500 int ret; 502 501 ··· 507 508 indio_dev->num_channels = ARRAY_SIZE(sun8i_a33_gpadc_channels); 508 509 indio_dev->channels = sun8i_a33_gpadc_channels; 509 510 510 - mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 511 - base = devm_ioremap_resource(&pdev->dev, mem); 511 + base = devm_platform_ioremap_resource(pdev, 0); 512 512 if (IS_ERR(base)) 513 513 return PTR_ERR(base); 514 514
+2 -2
drivers/iio/adc/xilinx-xadc-core.c
··· 3 3 * Xilinx XADC driver 4 4 * 5 5 * Copyright 2013-2014 Analog Devices Inc. 6 - * Author: Lars-Peter Clauen <lars@metafoo.de> 6 + * Author: Lars-Peter Clausen <lars@metafoo.de> 7 7 * 8 8 * Documentation for the parts can be found at: 9 9 * - XADC hardmacro: Xilinx UG480 ··· 653 653 mutex_lock(&xadc->mutex); 654 654 655 655 if (state) { 656 - /* Only one of the two triggers can be active at the a time. */ 656 + /* Only one of the two triggers can be active at a time. */ 657 657 if (xadc->trigger != NULL) { 658 658 ret = -EBUSY; 659 659 goto err_out;
+1 -1
drivers/iio/adc/xilinx-xadc-events.c
··· 3 3 * Xilinx XADC driver 4 4 * 5 5 * Copyright 2013 Analog Devices Inc. 6 - * Author: Lars-Peter Clauen <lars@metafoo.de> 6 + * Author: Lars-Peter Clausen <lars@metafoo.de> 7 7 */ 8 8 9 9 #include <linux/iio/events.h>
+1 -1
drivers/iio/adc/xilinx-xadc.h
··· 3 3 * Xilinx XADC driver 4 4 * 5 5 * Copyright 2013 Analog Devices Inc. 6 - * Author: Lars-Peter Clauen <lars@metafoo.de> 6 + * Author: Lars-Peter Clausen <lars@metafoo.de> 7 7 */ 8 8 9 9 #ifndef __IIO_XILINX_XADC__
-1
drivers/iio/buffer/industrialio-buffer-dma.c
··· 12 12 #include <linux/mutex.h> 13 13 #include <linux/sched.h> 14 14 #include <linux/poll.h> 15 - #include <linux/iio/buffer.h> 16 15 #include <linux/iio/buffer_impl.h> 17 16 #include <linux/iio/buffer-dma.h> 18 17 #include <linux/dma-mapping.h>
+40 -1
drivers/iio/buffer/industrialio-buffer-dmaengine.c
··· 134 134 struct dmaengine_buffer *dmaengine_buffer = 135 135 iio_buffer_to_dmaengine_buffer(indio_dev->buffer); 136 136 137 - return sprintf(buf, "%u\n", dmaengine_buffer->align); 137 + return sprintf(buf, "%zu\n", dmaengine_buffer->align); 138 138 } 139 139 140 140 static IIO_DEVICE_ATTR(length_align_bytes, 0444, ··· 228 228 iio_buffer_put(buffer); 229 229 } 230 230 EXPORT_SYMBOL_GPL(iio_dmaengine_buffer_free); 231 + 232 + static void __devm_iio_dmaengine_buffer_free(struct device *dev, void *res) 233 + { 234 + iio_dmaengine_buffer_free(*(struct iio_buffer **)res); 235 + } 236 + 237 + /** 238 + * devm_iio_dmaengine_buffer_alloc() - Resource-managed iio_dmaengine_buffer_alloc() 239 + * @dev: Parent device for the buffer 240 + * @channel: DMA channel name, typically "rx". 241 + * 242 + * This allocates a new IIO buffer which internally uses the DMAengine framework 243 + * to perform its transfers. The parent device will be used to request the DMA 244 + * channel. 245 + * 246 + * The buffer will be automatically de-allocated once the device gets destroyed. 247 + */ 248 + struct iio_buffer *devm_iio_dmaengine_buffer_alloc(struct device *dev, 249 + const char *channel) 250 + { 251 + struct iio_buffer **bufferp, *buffer; 252 + 253 + bufferp = devres_alloc(__devm_iio_dmaengine_buffer_free, 254 + sizeof(*bufferp), GFP_KERNEL); 255 + if (!bufferp) 256 + return ERR_PTR(-ENOMEM); 257 + 258 + buffer = iio_dmaengine_buffer_alloc(dev, channel); 259 + if (IS_ERR(buffer)) { 260 + devres_free(bufferp); 261 + return buffer; 262 + } 263 + 264 + *bufferp = buffer; 265 + devres_add(dev, bufferp); 266 + 267 + return buffer; 268 + } 269 + EXPORT_SYMBOL_GPL(devm_iio_dmaengine_buffer_alloc); 231 270 232 271 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); 233 272 MODULE_DESCRIPTION("DMA buffer for the IIO framework");
-31
drivers/iio/buffer/industrialio-hw-consumer.c
··· 142 142 iio_hw_consumer_free(*(struct iio_hw_consumer **)res); 143 143 } 144 144 145 - static int devm_iio_hw_consumer_match(struct device *dev, void *res, void *data) 146 - { 147 - struct iio_hw_consumer **r = res; 148 - 149 - if (!r || !*r) { 150 - WARN_ON(!r || !*r); 151 - return 0; 152 - } 153 - return *r == data; 154 - } 155 - 156 145 /** 157 146 * devm_iio_hw_consumer_alloc - Resource-managed iio_hw_consumer_alloc() 158 147 * @dev: Pointer to consumer device. 159 148 * 160 149 * Managed iio_hw_consumer_alloc. iio_hw_consumer allocated with this function 161 150 * is automatically freed on driver detach. 162 - * 163 - * If an iio_hw_consumer allocated with this function needs to be freed 164 - * separately, devm_iio_hw_consumer_free() must be used. 165 151 * 166 152 * returns pointer to allocated iio_hw_consumer on success, NULL on failure. 167 153 */ ··· 171 185 return iio_hwc; 172 186 } 173 187 EXPORT_SYMBOL_GPL(devm_iio_hw_consumer_alloc); 174 - 175 - /** 176 - * devm_iio_hw_consumer_free - Resource-managed iio_hw_consumer_free() 177 - * @dev: Pointer to consumer device. 178 - * @hwc: iio_hw_consumer to free. 179 - * 180 - * Free iio_hw_consumer allocated with devm_iio_hw_consumer_alloc(). 181 - */ 182 - void devm_iio_hw_consumer_free(struct device *dev, struct iio_hw_consumer *hwc) 183 - { 184 - int rc; 185 - 186 - rc = devres_release(dev, devm_iio_hw_consumer_release, 187 - devm_iio_hw_consumer_match, hwc); 188 - WARN_ON(rc); 189 - } 190 - EXPORT_SYMBOL_GPL(devm_iio_hw_consumer_free); 191 188 192 189 /** 193 190 * iio_hw_consumer_enable() - Enable IIO hardware consumer
-11
drivers/iio/buffer/industrialio-triggered-buffer.c
··· 126 126 } 127 127 EXPORT_SYMBOL_GPL(devm_iio_triggered_buffer_setup); 128 128 129 - void devm_iio_triggered_buffer_cleanup(struct device *dev, 130 - struct iio_dev *indio_dev) 131 - { 132 - int rc; 133 - 134 - rc = devres_release(dev, devm_iio_triggered_buffer_clean, 135 - devm_iio_device_match, indio_dev); 136 - WARN_ON(rc); 137 - } 138 - EXPORT_SYMBOL_GPL(devm_iio_triggered_buffer_cleanup); 139 - 140 129 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); 141 130 MODULE_DESCRIPTION("IIO helper functions for setting up triggered buffers"); 142 131 MODULE_LICENSE("GPL");
-22
drivers/iio/buffer/kfifo_buf.c
··· 179 179 iio_kfifo_free(*(struct iio_buffer **)res); 180 180 } 181 181 182 - static int devm_iio_kfifo_match(struct device *dev, void *res, void *data) 183 - { 184 - struct iio_buffer **r = res; 185 - 186 - if (WARN_ON(!r || !*r)) 187 - return 0; 188 - 189 - return *r == data; 190 - } 191 - 192 182 /** 193 183 * devm_iio_fifo_allocate - Resource-managed iio_kfifo_allocate() 194 184 * @dev: Device to allocate kfifo buffer for ··· 205 215 return r; 206 216 } 207 217 EXPORT_SYMBOL(devm_iio_kfifo_allocate); 208 - 209 - /** 210 - * devm_iio_fifo_free - Resource-managed iio_kfifo_free() 211 - * @dev: Device the buffer belongs to 212 - * @r: The buffer associated with the device 213 - */ 214 - void devm_iio_kfifo_free(struct device *dev, struct iio_buffer *r) 215 - { 216 - WARN_ON(devres_release(dev, devm_iio_kfifo_release, 217 - devm_iio_kfifo_match, r)); 218 - } 219 - EXPORT_SYMBOL(devm_iio_kfifo_free); 220 218 221 219 MODULE_LICENSE("GPL");
+3 -4
drivers/iio/chemical/atlas-sensor.c
··· 426 426 int ret; 427 427 428 428 ret = regmap_bulk_read(data->regmap, data->chip->data_reg, 429 - (u8 *) &data->buffer, 430 - sizeof(__be32) * channels); 429 + &data->buffer, sizeof(__be32) * channels); 431 430 432 431 if (!ret) 433 432 iio_push_to_buffers_with_timestamp(indio_dev, data->buffer, ··· 462 463 if (suspended) 463 464 msleep(data->chip->delay); 464 465 465 - ret = regmap_bulk_read(data->regmap, reg, (u8 *) val, sizeof(*val)); 466 + ret = regmap_bulk_read(data->regmap, reg, val, sizeof(*val)); 466 467 467 468 pm_runtime_mark_last_busy(dev); 468 469 pm_runtime_put_autosuspend(dev); ··· 484 485 switch (chan->type) { 485 486 case IIO_TEMP: 486 487 ret = regmap_bulk_read(data->regmap, chan->address, 487 - (u8 *) &reg, sizeof(reg)); 488 + &reg, sizeof(reg)); 488 489 break; 489 490 case IIO_PH: 490 491 case IIO_CONCENTRATION:
+22 -14
drivers/iio/chemical/bme680_core.c
··· 114 114 __le16 buf; 115 115 116 116 /* Temperature related coefficients */ 117 - ret = regmap_bulk_read(data->regmap, BME680_T1_LSB_REG, (u8 *) &buf, 2); 117 + ret = regmap_bulk_read(data->regmap, BME680_T1_LSB_REG, 118 + &buf, sizeof(buf)); 118 119 if (ret < 0) { 119 120 dev_err(dev, "failed to read BME680_T1_LSB_REG\n"); 120 121 return ret; 121 122 } 122 123 calib->par_t1 = le16_to_cpu(buf); 123 124 124 - ret = regmap_bulk_read(data->regmap, BME680_T2_LSB_REG, (u8 *) &buf, 2); 125 + ret = regmap_bulk_read(data->regmap, BME680_T2_LSB_REG, 126 + &buf, sizeof(buf)); 125 127 if (ret < 0) { 126 128 dev_err(dev, "failed to read BME680_T2_LSB_REG\n"); 127 129 return ret; ··· 138 136 calib->par_t3 = tmp; 139 137 140 138 /* Pressure related coefficients */ 141 - ret = regmap_bulk_read(data->regmap, BME680_P1_LSB_REG, (u8 *) &buf, 2); 139 + ret = regmap_bulk_read(data->regmap, BME680_P1_LSB_REG, 140 + &buf, sizeof(buf)); 142 141 if (ret < 0) { 143 142 dev_err(dev, "failed to read BME680_P1_LSB_REG\n"); 144 143 return ret; 145 144 } 146 145 calib->par_p1 = le16_to_cpu(buf); 147 146 148 - ret = regmap_bulk_read(data->regmap, BME680_P2_LSB_REG, (u8 *) &buf, 2); 147 + ret = regmap_bulk_read(data->regmap, BME680_P2_LSB_REG, 148 + &buf, sizeof(buf)); 149 149 if (ret < 0) { 150 150 dev_err(dev, "failed to read BME680_P2_LSB_REG\n"); 151 151 return ret; ··· 161 157 } 162 158 calib->par_p3 = tmp; 163 159 164 - ret = regmap_bulk_read(data->regmap, BME680_P4_LSB_REG, (u8 *) &buf, 2); 160 + ret = regmap_bulk_read(data->regmap, BME680_P4_LSB_REG, 161 + &buf, sizeof(buf)); 165 162 if (ret < 0) { 166 163 dev_err(dev, "failed to read BME680_P4_LSB_REG\n"); 167 164 return ret; 168 165 } 169 166 calib->par_p4 = le16_to_cpu(buf); 170 167 171 - ret = regmap_bulk_read(data->regmap, BME680_P5_LSB_REG, (u8 *) &buf, 2); 168 + ret = regmap_bulk_read(data->regmap, BME680_P5_LSB_REG, 169 + &buf, sizeof(buf)); 172 170 if (ret < 0) { 173 171 dev_err(dev, "failed to read BME680_P5_LSB_REG\n"); 174 172 return ret; ··· 191 185 } 192 186 calib->par_p7 = tmp; 193 187 194 - ret = regmap_bulk_read(data->regmap, BME680_P8_LSB_REG, (u8 *) &buf, 2); 188 + ret = regmap_bulk_read(data->regmap, BME680_P8_LSB_REG, 189 + &buf, sizeof(buf)); 195 190 if (ret < 0) { 196 191 dev_err(dev, "failed to read BME680_P8_LSB_REG\n"); 197 192 return ret; 198 193 } 199 194 calib->par_p8 = le16_to_cpu(buf); 200 195 201 - ret = regmap_bulk_read(data->regmap, BME680_P9_LSB_REG, (u8 *) &buf, 2); 196 + ret = regmap_bulk_read(data->regmap, BME680_P9_LSB_REG, 197 + &buf, sizeof(buf)); 202 198 if (ret < 0) { 203 199 dev_err(dev, "failed to read BME680_P9_LSB_REG\n"); 204 200 return ret; ··· 284 276 } 285 277 calib->par_gh1 = tmp; 286 278 287 - ret = regmap_bulk_read(data->regmap, BME680_GH2_LSB_REG, (u8 *) &buf, 288 - 2); 279 + ret = regmap_bulk_read(data->regmap, BME680_GH2_LSB_REG, 280 + &buf, sizeof(buf)); 289 281 if (ret < 0) { 290 282 dev_err(dev, "failed to read BME680_GH2_LSB_REG\n"); 291 283 return ret; ··· 623 615 return ret; 624 616 625 617 ret = regmap_bulk_read(data->regmap, BME680_REG_TEMP_MSB, 626 - (u8 *) &tmp, 3); 618 + &tmp, 3); 627 619 if (ret < 0) { 628 620 dev_err(dev, "failed to read temperature\n"); 629 621 return ret; ··· 664 656 return ret; 665 657 666 658 ret = regmap_bulk_read(data->regmap, BME680_REG_PRESS_MSB, 667 - (u8 *) &tmp, 3); 659 + &tmp, 3); 668 660 if (ret < 0) { 669 661 dev_err(dev, "failed to read pressure\n"); 670 662 return ret; ··· 697 689 return ret; 698 690 699 691 ret = regmap_bulk_read(data->regmap, BM6880_REG_HUMIDITY_MSB, 700 - (u8 *) &tmp, 2); 692 + &tmp, sizeof(tmp)); 701 693 if (ret < 0) { 702 694 dev_err(dev, "failed to read humidity\n"); 703 695 return ret; ··· 762 754 } 763 755 764 756 ret = regmap_bulk_read(data->regmap, BME680_REG_GAS_MSB, 765 - (u8 *) &tmp, 2); 757 + &tmp, sizeof(tmp)); 766 758 if (ret < 0) { 767 759 dev_err(dev, "failed to read gas resistance\n"); 768 760 return ret;
+2 -4
drivers/iio/common/st_sensors/st_sensors_core.c
··· 150 150 if (err < 0) 151 151 goto st_accel_set_fullscale_error; 152 152 153 - sdata->current_fullscale = (struct st_sensor_fullscale_avl *) 154 - &sdata->sensor_settings->fs.fs_avl[i]; 153 + sdata->current_fullscale = &sdata->sensor_settings->fs.fs_avl[i]; 155 154 return err; 156 155 157 156 st_accel_set_fullscale_error: ··· 277 278 !sdata->sensor_settings->drdy_irq.int2.addr) { 278 279 if (pdata->drdy_int_pin) 279 280 dev_info(&indio_dev->dev, 280 - "DRDY on pin INT%d specified, but sensor " 281 - "does not support interrupts\n", 281 + "DRDY on pin INT%d specified, but sensor does not support interrupts\n", 282 282 pdata->drdy_int_pin); 283 283 return 0; 284 284 }
+2 -2
drivers/iio/common/st_sensors/st_sensors_i2c.c
··· 49 49 50 50 sdata->regmap = devm_regmap_init_i2c(client, config); 51 51 if (IS_ERR(sdata->regmap)) { 52 - dev_err(&client->dev, "Failed to register i2c regmap (%d)\n", 53 - (int)PTR_ERR(sdata->regmap)); 52 + dev_err(&client->dev, "Failed to register i2c regmap (%ld)\n", 53 + PTR_ERR(sdata->regmap)); 54 54 return PTR_ERR(sdata->regmap); 55 55 } 56 56
+3 -3
drivers/iio/common/st_sensors/st_sensors_spi.c
··· 44 44 if (device_property_read_bool(dev, "spi-3wire")) 45 45 return true; 46 46 47 - pdata = (struct st_sensors_platform_data *)dev->platform_data; 47 + pdata = dev_get_platdata(dev); 48 48 if (pdata && pdata->spi_3wire) 49 49 return true; 50 50 ··· 101 101 102 102 sdata->regmap = devm_regmap_init_spi(spi, config); 103 103 if (IS_ERR(sdata->regmap)) { 104 - dev_err(&spi->dev, "Failed to register spi regmap (%d)\n", 105 - (int)PTR_ERR(sdata->regmap)); 104 + dev_err(&spi->dev, "Failed to register spi regmap (%ld)\n", 105 + PTR_ERR(sdata->regmap)); 106 106 return PTR_ERR(sdata->regmap); 107 107 } 108 108
+4 -9
drivers/iio/common/st_sensors/st_sensors_trigger.c
··· 44 44 sdata->sensor_settings->drdy_irq.stat_drdy.addr, 45 45 &status); 46 46 if (ret < 0) { 47 - dev_err(sdata->dev, 48 - "error checking samples available\n"); 47 + dev_err(sdata->dev, "error checking samples available\n"); 49 48 return ret; 50 49 } 51 50 ··· 147 148 case IRQF_TRIGGER_LOW: 148 149 if (!sdata->sensor_settings->drdy_irq.addr_ihl) { 149 150 dev_err(&indio_dev->dev, 150 - "falling/low specified for IRQ " 151 - "but hardware supports only rising/high: " 152 - "will request rising/high\n"); 151 + "falling/low specified for IRQ but hardware supports only rising/high: will request rising/high\n"); 153 152 if (irq_trig == IRQF_TRIGGER_FALLING) 154 153 irq_trig = IRQF_TRIGGER_RISING; 155 154 if (irq_trig == IRQF_TRIGGER_LOW) ··· 160 163 if (err < 0) 161 164 goto iio_trigger_free; 162 165 dev_info(&indio_dev->dev, 163 - "interrupts on the falling edge or " 164 - "active low level\n"); 166 + "interrupts on the falling edge or active low level\n"); 165 167 } 166 168 break; 167 169 case IRQF_TRIGGER_RISING: ··· 174 178 default: 175 179 /* This is the most preferred mode, if possible */ 176 180 dev_err(&indio_dev->dev, 177 - "unsupported IRQ trigger specified (%lx), enforce " 178 - "rising edge\n", irq_trig); 181 + "unsupported IRQ trigger specified (%lx), enforce rising edge\n", irq_trig); 179 182 irq_trig = IRQF_TRIGGER_RISING; 180 183 } 181 184
+1 -1
drivers/iio/gyro/Kconfig
··· 61 61 help 62 62 Say yes here to build support for BOSCH BMG160 Tri-axis Gyro Sensor 63 63 driver connected via I2C or SPI. This driver also supports BMI055 64 - gyroscope. 64 + and BMI088 gyroscope. 65 65 66 66 This driver can also be built as a module. If so, the module 67 67 will be called bmg160_i2c or bmg160_spi.
+4 -2
drivers/iio/gyro/bmg160_i2c.c
··· 21 21 22 22 regmap = devm_regmap_init_i2c(client, &bmg160_regmap_i2c_conf); 23 23 if (IS_ERR(regmap)) { 24 - dev_err(&client->dev, "Failed to register i2c regmap %d\n", 25 - (int)PTR_ERR(regmap)); 24 + dev_err(&client->dev, "Failed to register i2c regmap: %pe\n", 25 + regmap); 26 26 return PTR_ERR(regmap); 27 27 } 28 28 ··· 42 42 static const struct acpi_device_id bmg160_acpi_match[] = { 43 43 {"BMG0160", 0}, 44 44 {"BMI055B", 0}, 45 + {"BMI088B", 0}, 45 46 {}, 46 47 }; 47 48 ··· 51 50 static const struct i2c_device_id bmg160_i2c_id[] = { 52 51 {"bmg160", 0}, 53 52 {"bmi055_gyro", 0}, 53 + {"bmi088_gyro", 0}, 54 54 {} 55 55 }; 56 56
+3 -2
drivers/iio/gyro/bmg160_spi.c
··· 19 19 20 20 regmap = devm_regmap_init_spi(spi, &bmg160_regmap_spi_conf); 21 21 if (IS_ERR(regmap)) { 22 - dev_err(&spi->dev, "Failed to register spi regmap %d\n", 23 - (int)PTR_ERR(regmap)); 22 + dev_err(&spi->dev, "Failed to register spi regmap: %pe\n", 23 + regmap); 24 24 return PTR_ERR(regmap); 25 25 } 26 26 ··· 37 37 static const struct spi_device_id bmg160_spi_id[] = { 38 38 {"bmg160", 0}, 39 39 {"bmi055_gyro", 0}, 40 + {"bmi088_gyro", 0}, 40 41 {} 41 42 }; 42 43
+2 -2
drivers/iio/gyro/mpu3050-i2c.c
··· 51 51 52 52 regmap = devm_regmap_init_i2c(client, &mpu3050_i2c_regmap_config); 53 53 if (IS_ERR(regmap)) { 54 - dev_err(&client->dev, "Failed to register i2c regmap %d\n", 55 - (int)PTR_ERR(regmap)); 54 + dev_err(&client->dev, "Failed to register i2c regmap: %pe\n", 55 + regmap); 56 56 return PTR_ERR(regmap); 57 57 } 58 58
+1 -2
drivers/iio/gyro/st_gyro_buffer.c
··· 37 37 if (err < 0) 38 38 return err; 39 39 40 - err = st_sensors_set_axis_enable(indio_dev, 41 - (u8)indio_dev->active_scan_mask[0]); 40 + err = st_sensors_set_axis_enable(indio_dev, indio_dev->active_scan_mask[0]); 42 41 if (err < 0) 43 42 goto st_gyro_buffer_predisable; 44 43
+5 -4
drivers/iio/gyro/st_gyro_core.c
··· 460 460 int st_gyro_common_probe(struct iio_dev *indio_dev) 461 461 { 462 462 struct st_sensor_data *gdata = iio_priv(indio_dev); 463 + struct st_sensors_platform_data *pdata; 463 464 int err; 464 465 465 466 indio_dev->modes = INDIO_DIRECT_MODE; ··· 478 477 indio_dev->channels = gdata->sensor_settings->ch; 479 478 indio_dev->num_channels = ST_SENSORS_NUMBER_ALL_CHANNELS; 480 479 481 - gdata->current_fullscale = (struct st_sensor_fullscale_avl *) 482 - &gdata->sensor_settings->fs.fs_avl[0]; 480 + gdata->current_fullscale = &gdata->sensor_settings->fs.fs_avl[0]; 483 481 gdata->odr = gdata->sensor_settings->odr.odr_avl[0].hz; 484 482 485 - err = st_sensors_init_sensor(indio_dev, 486 - (struct st_sensors_platform_data *)&gyro_pdata); 483 + pdata = (struct st_sensors_platform_data *)&gyro_pdata; 484 + 485 + err = st_sensors_init_sensor(indio_dev, pdata); 487 486 if (err < 0) 488 487 goto st_gyro_power_off; 489 488
+3 -4
drivers/iio/health/max30100.c
··· 16 16 #include <linux/irq.h> 17 17 #include <linux/i2c.h> 18 18 #include <linux/mutex.h> 19 - #include <linux/of.h> 19 + #include <linux/property.h> 20 20 #include <linux/regmap.h> 21 21 #include <linux/iio/iio.h> 22 22 #include <linux/iio/buffer.h> ··· 267 267 static int max30100_led_init(struct max30100_data *data) 268 268 { 269 269 struct device *dev = &data->client->dev; 270 - struct device_node *np = dev->of_node; 271 270 unsigned int val[2]; 272 271 int reg, ret; 273 272 274 - ret = of_property_read_u32_array(np, "maxim,led-current-microamp", 273 + ret = device_property_read_u32_array(dev, "maxim,led-current-microamp", 275 274 (unsigned int *) &val, 2); 276 275 if (ret) { 277 276 /* Default to 24 mA RED LED, 50 mA IR LED */ ··· 501 502 static struct i2c_driver max30100_driver = { 502 503 .driver = { 503 504 .name = MAX30100_DRV_NAME, 504 - .of_match_table = of_match_ptr(max30100_dt_ids), 505 + .of_match_table = max30100_dt_ids, 505 506 }, 506 507 .probe = max30100_probe, 507 508 .remove = max30100_remove,
+2 -4
drivers/iio/humidity/hts221_buffer.c
··· 74 74 75 75 int hts221_allocate_trigger(struct hts221_hw *hw) 76 76 { 77 + struct st_sensors_platform_data *pdata = dev_get_platdata(hw->dev); 77 78 struct iio_dev *iio_dev = iio_priv_to_dev(hw); 78 79 bool irq_active_low = false, open_drain = false; 79 - struct device_node *np = hw->dev->of_node; 80 - struct st_sensors_platform_data *pdata; 81 80 unsigned long irq_type; 82 81 int err; 83 82 ··· 105 106 if (err < 0) 106 107 return err; 107 108 108 - pdata = (struct st_sensors_platform_data *)hw->dev->platform_data; 109 - if ((np && of_property_read_bool(np, "drive-open-drain")) || 109 + if (device_property_read_bool(hw->dev, "drive-open-drain") || 110 110 (pdata && pdata->open_drain)) { 111 111 irq_type |= IRQF_SHARED; 112 112 open_drain = true;
+3 -3
drivers/iio/humidity/hts221_i2c.c
··· 32 32 33 33 regmap = devm_regmap_init_i2c(client, &hts221_i2c_regmap_config); 34 34 if (IS_ERR(regmap)) { 35 - dev_err(&client->dev, "Failed to register i2c regmap %d\n", 36 - (int)PTR_ERR(regmap)); 35 + dev_err(&client->dev, "Failed to register i2c regmap %ld\n", 36 + PTR_ERR(regmap)); 37 37 return PTR_ERR(regmap); 38 38 } 39 39 ··· 63 63 .driver = { 64 64 .name = "hts221_i2c", 65 65 .pm = &hts221_pm_ops, 66 - .of_match_table = of_match_ptr(hts221_i2c_of_match), 66 + .of_match_table = hts221_i2c_of_match, 67 67 .acpi_match_table = ACPI_PTR(hts221_acpi_match), 68 68 }, 69 69 .probe = hts221_i2c_probe,
+3 -3
drivers/iio/humidity/hts221_spi.c
··· 31 31 32 32 regmap = devm_regmap_init_spi(spi, &hts221_spi_regmap_config); 33 33 if (IS_ERR(regmap)) { 34 - dev_err(&spi->dev, "Failed to register spi regmap %d\n", 35 - (int)PTR_ERR(regmap)); 34 + dev_err(&spi->dev, "Failed to register spi regmap %ld\n", 35 + PTR_ERR(regmap)); 36 36 return PTR_ERR(regmap); 37 37 } 38 38 ··· 56 56 .driver = { 57 57 .name = "hts221_spi", 58 58 .pm = &hts221_pm_ops, 59 - .of_match_table = of_match_ptr(hts221_spi_of_match), 59 + .of_match_table = hts221_spi_of_match, 60 60 }, 61 61 .probe = hts221_spi_probe, 62 62 .id_table = hts221_spi_id_table,
+1 -1
drivers/iio/imu/adis.c
··· 419 419 420 420 if (prod_id != adis->data->prod_id) 421 421 dev_warn(&adis->spi->dev, 422 - "Device ID(%u) and product ID(%u) do not match.", 422 + "Device ID(%u) and product ID(%u) do not match.\n", 423 423 adis->data->prod_id, prod_id); 424 424 425 425 return 0;
+10 -9
drivers/iio/imu/adis16400.c
··· 258 258 259 259 return 0; 260 260 } 261 - DEFINE_SIMPLE_ATTRIBUTE(adis16400_product_id_fops, 261 + DEFINE_DEBUGFS_ATTRIBUTE(adis16400_product_id_fops, 262 262 adis16400_show_product_id, NULL, "%lld\n"); 263 263 264 264 static int adis16400_show_flash_count(void *arg, u64 *val) ··· 275 275 276 276 return 0; 277 277 } 278 - DEFINE_SIMPLE_ATTRIBUTE(adis16400_flash_count_fops, 278 + DEFINE_DEBUGFS_ATTRIBUTE(adis16400_flash_count_fops, 279 279 adis16400_show_flash_count, NULL, "%lld\n"); 280 280 281 281 static int adis16400_debugfs_init(struct iio_dev *indio_dev) ··· 283 283 struct adis16400_state *st = iio_priv(indio_dev); 284 284 285 285 if (st->variant->flags & ADIS16400_HAS_SERIAL_NUMBER) 286 - debugfs_create_file("serial_number", 0400, 287 - indio_dev->debugfs_dentry, st, 288 - &adis16400_serial_number_fops); 286 + debugfs_create_file_unsafe("serial_number", 0400, 287 + indio_dev->debugfs_dentry, st, 288 + &adis16400_serial_number_fops); 289 289 if (st->variant->flags & ADIS16400_HAS_PROD_ID) 290 - debugfs_create_file("product_id", 0400, 290 + debugfs_create_file_unsafe("product_id", 0400, 291 + indio_dev->debugfs_dentry, st, 292 + &adis16400_product_id_fops); 293 + debugfs_create_file_unsafe("flash_count", 0400, 291 294 indio_dev->debugfs_dentry, st, 292 - &adis16400_product_id_fops); 293 - debugfs_create_file("flash_count", 0400, indio_dev->debugfs_dentry, 294 - st, &adis16400_flash_count_fops); 295 + &adis16400_flash_count_fops); 295 296 296 297 return 0; 297 298 }
+15 -12
drivers/iio/imu/adis16460.c
··· 87 87 88 88 return 0; 89 89 } 90 - DEFINE_SIMPLE_ATTRIBUTE(adis16460_serial_number_fops, 91 - adis16460_show_serial_number, NULL, "0x%.4llx\n"); 90 + DEFINE_DEBUGFS_ATTRIBUTE(adis16460_serial_number_fops, 91 + adis16460_show_serial_number, NULL, "0x%.4llx\n"); 92 92 93 93 static int adis16460_show_product_id(void *arg, u64 *val) 94 94 { ··· 105 105 106 106 return 0; 107 107 } 108 - DEFINE_SIMPLE_ATTRIBUTE(adis16460_product_id_fops, 109 - adis16460_show_product_id, NULL, "%llu\n"); 108 + DEFINE_DEBUGFS_ATTRIBUTE(adis16460_product_id_fops, 109 + adis16460_show_product_id, NULL, "%llu\n"); 110 110 111 111 static int adis16460_show_flash_count(void *arg, u64 *val) 112 112 { ··· 123 123 124 124 return 0; 125 125 } 126 - DEFINE_SIMPLE_ATTRIBUTE(adis16460_flash_count_fops, 127 - adis16460_show_flash_count, NULL, "%lld\n"); 126 + DEFINE_DEBUGFS_ATTRIBUTE(adis16460_flash_count_fops, 127 + adis16460_show_flash_count, NULL, "%lld\n"); 128 128 129 129 static int adis16460_debugfs_init(struct iio_dev *indio_dev) 130 130 { 131 131 struct adis16460 *adis16460 = iio_priv(indio_dev); 132 132 133 - debugfs_create_file("serial_number", 0400, indio_dev->debugfs_dentry, 134 - adis16460, &adis16460_serial_number_fops); 135 - debugfs_create_file("product_id", 0400, indio_dev->debugfs_dentry, 136 - adis16460, &adis16460_product_id_fops); 137 - debugfs_create_file("flash_count", 0400, indio_dev->debugfs_dentry, 138 - adis16460, &adis16460_flash_count_fops); 133 + debugfs_create_file_unsafe("serial_number", 0400, 134 + indio_dev->debugfs_dentry, adis16460, 135 + &adis16460_serial_number_fops); 136 + debugfs_create_file_unsafe("product_id", 0400, 137 + indio_dev->debugfs_dentry, adis16460, 138 + &adis16460_product_id_fops); 139 + debugfs_create_file_unsafe("flash_count", 0400, 140 + indio_dev->debugfs_dentry, adis16460, 141 + &adis16460_flash_count_fops); 139 142 140 143 return 0; 141 144 }
+2 -2
drivers/iio/imu/bmi160/bmi160_i2c.c
··· 24 24 25 25 regmap = devm_regmap_init_i2c(client, &bmi160_regmap_config); 26 26 if (IS_ERR(regmap)) { 27 - dev_err(&client->dev, "Failed to register i2c regmap %d\n", 28 - (int)PTR_ERR(regmap)); 27 + dev_err(&client->dev, "Failed to register i2c regmap: %pe\n", 28 + regmap); 29 29 return PTR_ERR(regmap); 30 30 } 31 31
+2 -2
drivers/iio/imu/bmi160/bmi160_spi.c
··· 20 20 21 21 regmap = devm_regmap_init_spi(spi, &bmi160_regmap_config); 22 22 if (IS_ERR(regmap)) { 23 - dev_err(&spi->dev, "Failed to register spi regmap %d\n", 24 - (int)PTR_ERR(regmap)); 23 + dev_err(&spi->dev, "Failed to register spi regmap: %pe\n", 24 + regmap); 25 25 return PTR_ERR(regmap); 26 26 } 27 27 return bmi160_core_probe(&spi->dev, regmap, id->name, true);
+5 -3
drivers/iio/imu/inv_mpu6050/inv_mpu_acpi.c
··· 135 135 st->mux_client = NULL; 136 136 if (ACPI_HANDLE(&client->dev)) { 137 137 struct i2c_board_info info; 138 + struct i2c_client *mux_client; 138 139 struct acpi_device *adev; 139 140 int ret = -1; 140 141 ··· 173 172 } else 174 173 return 0; /* no secondary addr, which is OK */ 175 174 } 176 - st->mux_client = i2c_new_device(st->muxc->adapter[0], &info); 177 - if (!st->mux_client) 178 - return -ENODEV; 175 + mux_client = i2c_new_client_device(st->muxc->adapter[0], &info); 176 + if (IS_ERR(mux_client)) 177 + return PTR_ERR(mux_client); 178 + st->mux_client = mux_client; 179 179 } 180 180 181 181 return 0;
+21 -2
drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
··· 526 526 __be16 d = cpu_to_be16(val); 527 527 528 528 ind = (axis - IIO_MOD_X) * 2; 529 - result = regmap_bulk_write(st->map, reg + ind, (u8 *)&d, 2); 529 + result = regmap_bulk_write(st->map, reg + ind, &d, sizeof(d)); 530 530 if (result) 531 531 return -EINVAL; 532 532 ··· 540 540 __be16 d; 541 541 542 542 ind = (axis - IIO_MOD_X) * 2; 543 - result = regmap_bulk_read(st->map, reg + ind, (u8 *)&d, 2); 543 + result = regmap_bulk_read(st->map, reg + ind, &d, sizeof(d)); 544 544 if (result) 545 545 return -EINVAL; 546 546 *val = (short)be16_to_cpup(&d); ··· 1248 1248 .attrs = inv_attributes 1249 1249 }; 1250 1250 1251 + static int inv_mpu6050_reg_access(struct iio_dev *indio_dev, 1252 + unsigned int reg, 1253 + unsigned int writeval, 1254 + unsigned int *readval) 1255 + { 1256 + struct inv_mpu6050_state *st = iio_priv(indio_dev); 1257 + int ret; 1258 + 1259 + mutex_lock(&st->lock); 1260 + if (readval) 1261 + ret = regmap_read(st->map, reg, readval); 1262 + else 1263 + ret = regmap_write(st->map, reg, writeval); 1264 + mutex_unlock(&st->lock); 1265 + 1266 + return ret; 1267 + } 1268 + 1251 1269 static const struct iio_info mpu_info = { 1252 1270 .read_raw = &inv_mpu6050_read_raw, 1253 1271 .write_raw = &inv_mpu6050_write_raw, 1254 1272 .write_raw_get_fmt = &inv_write_raw_get_fmt, 1255 1273 .attrs = &inv_attribute_group, 1256 1274 .validate_trigger = inv_mpu6050_validate_trigger, 1275 + .debugfs_reg_access = &inv_mpu6050_reg_access, 1257 1276 }; 1258 1277 1259 1278 /**
+2 -2
drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c
··· 122 122 123 123 regmap = devm_regmap_init_i2c(client, &inv_mpu_regmap_config); 124 124 if (IS_ERR(regmap)) { 125 - dev_err(&client->dev, "Failed to register i2c regmap %d\n", 126 - (int)PTR_ERR(regmap)); 125 + dev_err(&client->dev, "Failed to register i2c regmap: %pe\n", 126 + regmap); 127 127 return PTR_ERR(regmap); 128 128 } 129 129
+2 -2
drivers/iio/imu/inv_mpu6050/inv_mpu_spi.c
··· 53 53 54 54 regmap = devm_regmap_init_spi(spi, &inv_mpu_regmap_config); 55 55 if (IS_ERR(regmap)) { 56 - dev_err(&spi->dev, "Failed to register spi regmap %d\n", 57 - (int)PTR_ERR(regmap)); 56 + dev_err(&spi->dev, "Failed to register spi regmap: %pe\n", 57 + regmap); 58 58 return PTR_ERR(regmap); 59 59 } 60 60
+1 -1
drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h
··· 111 111 u8 val; 112 112 }; 113 113 114 - #define ST_LSM6DSX_ODR_LIST_SIZE 6 114 + #define ST_LSM6DSX_ODR_LIST_SIZE 8 115 115 struct st_lsm6dsx_odr_table_entry { 116 116 struct st_lsm6dsx_reg reg; 117 117
+96
drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_shub.c
··· 88 88 .len = 6, 89 89 }, 90 90 }, 91 + /* LIS3MDL */ 92 + { 93 + .i2c_addr = { 0x1e }, 94 + .wai = { 95 + .addr = 0x0f, 96 + .val = 0x3d, 97 + }, 98 + .id = ST_LSM6DSX_ID_MAGN, 99 + .odr_table = { 100 + .reg = { 101 + .addr = 0x20, 102 + .mask = GENMASK(4, 2), 103 + }, 104 + .odr_avl[0] = { 1000, 0x0 }, 105 + .odr_avl[1] = { 2000, 0x1 }, 106 + .odr_avl[2] = { 3000, 0x2 }, 107 + .odr_avl[3] = { 5000, 0x3 }, 108 + .odr_avl[4] = { 10000, 0x4 }, 109 + .odr_avl[5] = { 20000, 0x5 }, 110 + .odr_avl[6] = { 40000, 0x6 }, 111 + .odr_avl[7] = { 80000, 0x7 }, 112 + .odr_len = 8, 113 + }, 114 + .fs_table = { 115 + .reg = { 116 + .addr = 0x21, 117 + .mask = GENMASK(6, 5), 118 + }, 119 + .fs_avl[0] = { 120 + .gain = 146, 121 + .val = 0x00, 122 + }, /* 4000 uG/LSB */ 123 + .fs_avl[1] = { 124 + .gain = 292, 125 + .val = 0x01, 126 + }, /* 8000 uG/LSB */ 127 + .fs_avl[2] = { 128 + .gain = 438, 129 + .val = 0x02, 130 + }, /* 12000 uG/LSB */ 131 + .fs_avl[3] = { 132 + .gain = 584, 133 + .val = 0x03, 134 + }, /* 16000 uG/LSB */ 135 + .fs_len = 4, 136 + }, 137 + .pwr_table = { 138 + .reg = { 139 + .addr = 0x22, 140 + .mask = GENMASK(1, 0), 141 + }, 142 + .off_val = 0x2, 143 + .on_val = 0x0, 144 + }, 145 + .bdu = { 146 + .addr = 0x24, 147 + .mask = BIT(6), 148 + }, 149 + .out = { 150 + .addr = 0x28, 151 + .len = 6, 152 + }, 153 + }, 91 154 }; 92 155 93 156 static void st_lsm6dsx_shub_wait_complete(struct st_lsm6dsx_hw *hw) ··· 581 518 } 582 519 583 520 static int 521 + st_lsm6dsx_shub_set_full_scale(struct st_lsm6dsx_sensor *sensor, 522 + u32 gain) 523 + { 524 + const struct st_lsm6dsx_fs_table_entry *fs_table; 525 + int i, err; 526 + 527 + fs_table = &sensor->ext_info.settings->fs_table; 528 + if (!fs_table->reg.addr) 529 + return -ENOTSUPP; 530 + 531 + for (i = 0; i < fs_table->fs_len; i++) { 532 + if (fs_table->fs_avl[i].gain == gain) 533 + break; 534 + } 535 + 536 + if (i == fs_table->fs_len) 537 + return -EINVAL; 538 + 539 + err = st_lsm6dsx_shub_write_with_mask(sensor, fs_table->reg.addr, 540 + fs_table->reg.mask, 541 + fs_table->fs_avl[i].val); 542 + if (err < 0) 543 + return err; 544 + 545 + sensor->gain = gain; 546 + 547 + return 0; 548 + } 549 + 550 + static int 584 551 st_lsm6dsx_shub_write_raw(struct iio_dev *iio_dev, 585 552 struct iio_chan_spec const *chan, 586 553 int val, int val2, long mask) ··· 632 539 sensor->odr = val; 633 540 break; 634 541 } 542 + case IIO_CHAN_INFO_SCALE: 543 + err = st_lsm6dsx_shub_set_full_scale(sensor, val2); 544 + break; 635 545 default: 636 546 err = -EINVAL; 637 547 break;
+8 -10
drivers/iio/industrialio-buffer.c
··· 316 316 const unsigned long *mask; 317 317 unsigned long *trialmask; 318 318 319 - trialmask = kcalloc(BITS_TO_LONGS(indio_dev->masklength), 320 - sizeof(*trialmask), GFP_KERNEL); 319 + trialmask = bitmap_zalloc(indio_dev->masklength, GFP_KERNEL); 321 320 if (trialmask == NULL) 322 321 return -ENOMEM; 323 322 if (!indio_dev->masklength) { ··· 685 686 struct iio_buffer *buffer; 686 687 bool scan_timestamp; 687 688 unsigned int modes; 689 + 690 + if (insert_buffer && 691 + bitmap_empty(insert_buffer->scan_mask, indio_dev->masklength)) { 692 + dev_dbg(&indio_dev->dev, 693 + "At least one scan element must be enabled first\n"); 694 + return -EINVAL; 695 + } 688 696 689 697 memset(config, 0, sizeof(*config)); 690 698 config->watermark = ~0; ··· 1283 1277 1284 1278 indio_dev->groups[indio_dev->groupcounter++] = &buffer->buffer_group; 1285 1279 1286 - if (buffer->scan_el_attrs != NULL) { 1287 - attr = buffer->scan_el_attrs->attrs; 1288 - while (*attr++ != NULL) 1289 - attrcount_orig++; 1290 - } 1291 1280 attrcount = attrcount_orig; 1292 1281 INIT_LIST_HEAD(&buffer->scan_el_dev_attr_list); 1293 1282 channels = indio_dev->channels; ··· 1320 1319 ret = -ENOMEM; 1321 1320 goto error_free_scan_mask; 1322 1321 } 1323 - if (buffer->scan_el_attrs) 1324 - memcpy(buffer->scan_el_group.attrs, buffer->scan_el_attrs, 1325 - sizeof(buffer->scan_el_group.attrs[0])*attrcount_orig); 1326 1322 attrn = attrcount_orig; 1327 1323 1328 1324 list_for_each_entry(p, &buffer->scan_el_dev_attr_list, l)
+20 -68
drivers/iio/industrialio-core.c
··· 572 572 573 573 switch (type) { 574 574 case IIO_VAL_INT: 575 - return snprintf(buf, len, "%d", vals[0]); 575 + return scnprintf(buf, len, "%d", vals[0]); 576 576 case IIO_VAL_INT_PLUS_MICRO_DB: 577 577 scale_db = true; 578 578 /* fall through */ 579 579 case IIO_VAL_INT_PLUS_MICRO: 580 580 if (vals[1] < 0) 581 - return snprintf(buf, len, "-%d.%06u%s", abs(vals[0]), 581 + return scnprintf(buf, len, "-%d.%06u%s", abs(vals[0]), 582 582 -vals[1], scale_db ? " dB" : ""); 583 583 else 584 - return snprintf(buf, len, "%d.%06u%s", vals[0], vals[1], 584 + return scnprintf(buf, len, "%d.%06u%s", vals[0], vals[1], 585 585 scale_db ? " dB" : ""); 586 586 case IIO_VAL_INT_PLUS_NANO: 587 587 if (vals[1] < 0) 588 - return snprintf(buf, len, "-%d.%09u", abs(vals[0]), 588 + return scnprintf(buf, len, "-%d.%09u", abs(vals[0]), 589 589 -vals[1]); 590 590 else 591 - return snprintf(buf, len, "%d.%09u", vals[0], vals[1]); 591 + return scnprintf(buf, len, "%d.%09u", vals[0], vals[1]); 592 592 case IIO_VAL_FRACTIONAL: 593 593 tmp = div_s64((s64)vals[0] * 1000000000LL, vals[1]); 594 594 tmp1 = vals[1]; 595 595 tmp0 = (int)div_s64_rem(tmp, 1000000000, &tmp1); 596 - return snprintf(buf, len, "%d.%09u", tmp0, abs(tmp1)); 596 + return scnprintf(buf, len, "%d.%09u", tmp0, abs(tmp1)); 597 597 case IIO_VAL_FRACTIONAL_LOG2: 598 598 tmp = shift_right((s64)vals[0] * 1000000000LL, vals[1]); 599 599 tmp0 = (int)div_s64_rem(tmp, 1000000000LL, &tmp1); 600 - return snprintf(buf, len, "%d.%09u", tmp0, abs(tmp1)); 600 + return scnprintf(buf, len, "%d.%09u", tmp0, abs(tmp1)); 601 601 case IIO_VAL_INT_MULTIPLE: 602 602 { 603 603 int i; 604 604 int l = 0; 605 605 606 606 for (i = 0; i < size; ++i) { 607 - l += snprintf(&buf[l], len - l, "%d ", vals[i]); 607 + l += scnprintf(&buf[l], len - l, "%d ", vals[i]); 608 608 if (l >= len) 609 609 break; 610 610 } 611 611 return l; 612 612 } 613 613 case IIO_VAL_CHAR: 614 - return snprintf(buf, len, "%c", (char)vals[0]); 614 + return scnprintf(buf, len, "%c", (char)vals[0]); 615 615 default: 616 616 return 0; 617 617 } ··· 682 682 if (len >= PAGE_SIZE) 683 683 return -EFBIG; 684 684 if (i < length - 1) 685 - len += snprintf(buf + len, PAGE_SIZE - len, 685 + len += scnprintf(buf + len, PAGE_SIZE - len, 686 686 " "); 687 687 else 688 - len += snprintf(buf + len, PAGE_SIZE - len, 688 + len += scnprintf(buf + len, PAGE_SIZE - len, 689 689 "\n"); 690 690 if (len >= PAGE_SIZE) 691 691 return -EFBIG; ··· 698 698 if (len >= PAGE_SIZE) 699 699 return -EFBIG; 700 700 if (i < length / 2 - 1) 701 - len += snprintf(buf + len, PAGE_SIZE - len, 701 + len += scnprintf(buf + len, PAGE_SIZE - len, 702 702 " "); 703 703 else 704 - len += snprintf(buf + len, PAGE_SIZE - len, 704 + len += scnprintf(buf + len, PAGE_SIZE - len, 705 705 "\n"); 706 706 if (len >= PAGE_SIZE) 707 707 return -EFBIG; ··· 725 725 if (len >= PAGE_SIZE) 726 726 return -EFBIG; 727 727 if (i < 2) 728 - len += snprintf(buf + len, PAGE_SIZE - len, 728 + len += scnprintf(buf + len, PAGE_SIZE - len, 729 729 " "); 730 730 else 731 - len += snprintf(buf + len, PAGE_SIZE - len, 731 + len += scnprintf(buf + len, PAGE_SIZE - len, 732 732 "]\n"); 733 733 if (len >= PAGE_SIZE) 734 734 return -EFBIG; ··· 741 741 if (len >= PAGE_SIZE) 742 742 return -EFBIG; 743 743 if (i < 2) 744 - len += snprintf(buf + len, PAGE_SIZE - len, 744 + len += scnprintf(buf + len, PAGE_SIZE - len, 745 745 " "); 746 746 else 747 - len += snprintf(buf + len, PAGE_SIZE - len, 747 + len += scnprintf(buf + len, PAGE_SIZE - len, 748 748 "]\n"); 749 749 if (len >= PAGE_SIZE) 750 750 return -EFBIG; ··· 1552 1552 iio_device_free(*(struct iio_dev **)res); 1553 1553 } 1554 1554 1555 - int devm_iio_device_match(struct device *dev, void *res, void *data) 1556 - { 1557 - struct iio_dev **r = res; 1558 - if (!r || !*r) { 1559 - WARN_ON(!r || !*r); 1560 - return 0; 1561 - } 1562 - return *r == data; 1563 - } 1564 - EXPORT_SYMBOL_GPL(devm_iio_device_match); 1565 - 1566 1555 /** 1567 1556 * devm_iio_device_alloc - Resource-managed iio_device_alloc() 1568 1557 * @dev: Device to allocate iio_dev for ··· 1559 1570 * 1560 1571 * Managed iio_device_alloc. iio_dev allocated with this function is 1561 1572 * automatically freed on driver detach. 1562 - * 1563 - * If an iio_dev allocated with this function needs to be freed separately, 1564 - * devm_iio_device_free() must be used. 1565 1573 * 1566 1574 * RETURNS: 1567 1575 * Pointer to allocated iio_dev on success, NULL on failure. ··· 1583 1597 return iio_dev; 1584 1598 } 1585 1599 EXPORT_SYMBOL_GPL(devm_iio_device_alloc); 1586 - 1587 - /** 1588 - * devm_iio_device_free - Resource-managed iio_device_free() 1589 - * @dev: Device this iio_dev belongs to 1590 - * @iio_dev: the iio_dev associated with the device 1591 - * 1592 - * Free iio_dev allocated with devm_iio_device_alloc(). 1593 - */ 1594 - void devm_iio_device_free(struct device *dev, struct iio_dev *iio_dev) 1595 - { 1596 - int rc; 1597 - 1598 - rc = devres_release(dev, devm_iio_device_release, 1599 - devm_iio_device_match, iio_dev); 1600 - WARN_ON(rc); 1601 - } 1602 - EXPORT_SYMBOL_GPL(devm_iio_device_free); 1603 1600 1604 1601 /** 1605 1602 * iio_chrdev_open() - chrdev file open for buffer access and ioctls ··· 1686 1717 { 1687 1718 int ret; 1688 1719 1720 + if (!indio_dev->info) 1721 + return -EINVAL; 1722 + 1689 1723 indio_dev->driver_module = this_mod; 1690 1724 /* If the calling driver did not initialize of_node, do it here */ 1691 1725 if (!indio_dev->dev.of_node && indio_dev->dev.parent) ··· 1700 1728 ret = iio_check_unique_scan_index(indio_dev); 1701 1729 if (ret < 0) 1702 1730 return ret; 1703 - 1704 - if (!indio_dev->info) 1705 - return -EINVAL; 1706 1731 1707 1732 /* configure elements for the chrdev */ 1708 1733 indio_dev->dev.devt = MKDEV(MAJOR(iio_devt), indio_dev->id); ··· 1804 1835 return ret; 1805 1836 } 1806 1837 EXPORT_SYMBOL_GPL(__devm_iio_device_register); 1807 - 1808 - /** 1809 - * devm_iio_device_unregister - Resource-managed iio_device_unregister() 1810 - * @dev: Device this iio_dev belongs to 1811 - * @indio_dev: the iio_dev associated with the device 1812 - * 1813 - * Unregister iio_dev registered with devm_iio_device_register(). 1814 - */ 1815 - void devm_iio_device_unregister(struct device *dev, struct iio_dev *indio_dev) 1816 - { 1817 - int rc; 1818 - 1819 - rc = devres_release(dev, devm_iio_device_unreg, 1820 - devm_iio_device_match, indio_dev); 1821 - WARN_ON(rc); 1822 - } 1823 - EXPORT_SYMBOL_GPL(devm_iio_device_unregister); 1824 1838 1825 1839 /** 1826 1840 * iio_device_claim_direct_mode - Keep device in direct mode
-53
drivers/iio/industrialio-trigger.c
··· 585 585 iio_trigger_free(*(struct iio_trigger **)res); 586 586 } 587 587 588 - static int devm_iio_trigger_match(struct device *dev, void *res, void *data) 589 - { 590 - struct iio_trigger **r = res; 591 - 592 - if (!r || !*r) { 593 - WARN_ON(!r || !*r); 594 - return 0; 595 - } 596 - 597 - return *r == data; 598 - } 599 - 600 588 /** 601 589 * devm_iio_trigger_alloc - Resource-managed iio_trigger_alloc() 602 590 * @dev: Device to allocate iio_trigger for ··· 595 607 * 596 608 * Managed iio_trigger_alloc. iio_trigger allocated with this function is 597 609 * automatically freed on driver detach. 598 - * 599 - * If an iio_trigger allocated with this function needs to be freed separately, 600 - * devm_iio_trigger_free() must be used. 601 610 * 602 611 * RETURNS: 603 612 * Pointer to allocated iio_trigger on success, NULL on failure. ··· 625 640 } 626 641 EXPORT_SYMBOL_GPL(devm_iio_trigger_alloc); 627 642 628 - /** 629 - * devm_iio_trigger_free - Resource-managed iio_trigger_free() 630 - * @dev: Device this iio_dev belongs to 631 - * @iio_trig: the iio_trigger associated with the device 632 - * 633 - * Free iio_trigger allocated with devm_iio_trigger_alloc(). 634 - */ 635 - void devm_iio_trigger_free(struct device *dev, struct iio_trigger *iio_trig) 636 - { 637 - int rc; 638 - 639 - rc = devres_release(dev, devm_iio_trigger_release, 640 - devm_iio_trigger_match, iio_trig); 641 - WARN_ON(rc); 642 - } 643 - EXPORT_SYMBOL_GPL(devm_iio_trigger_free); 644 - 645 643 static void devm_iio_trigger_unreg(struct device *dev, void *res) 646 644 { 647 645 iio_trigger_unregister(*(struct iio_trigger **)res); ··· 640 672 * function is automatically unregistered on driver detach. This function 641 673 * calls iio_trigger_register() internally. Refer to that function for more 642 674 * information. 643 - * 644 - * If an iio_trigger registered with this function needs to be unregistered 645 - * separately, devm_iio_trigger_unregister() must be used. 646 675 * 647 676 * RETURNS: 648 677 * 0 on success, negative error number on failure. ··· 665 700 return ret; 666 701 } 667 702 EXPORT_SYMBOL_GPL(__devm_iio_trigger_register); 668 - 669 - /** 670 - * devm_iio_trigger_unregister - Resource-managed iio_trigger_unregister() 671 - * @dev: device this iio_trigger belongs to 672 - * @trig_info: the trigger associated with the device 673 - * 674 - * Unregister trigger registered with devm_iio_trigger_register(). 675 - */ 676 - void devm_iio_trigger_unregister(struct device *dev, 677 - struct iio_trigger *trig_info) 678 - { 679 - int rc; 680 - 681 - rc = devres_release(dev, devm_iio_trigger_unreg, devm_iio_trigger_match, 682 - trig_info); 683 - WARN_ON(rc); 684 - } 685 - EXPORT_SYMBOL_GPL(devm_iio_trigger_unregister); 686 703 687 704 bool iio_trigger_using_own(struct iio_dev *indio_dev) 688 705 {
-27
drivers/iio/inkern.c
··· 360 360 iio_channel_release(channel); 361 361 } 362 362 363 - static int devm_iio_channel_match(struct device *dev, void *res, void *data) 364 - { 365 - struct iio_channel **r = res; 366 - 367 - if (!r || !*r) { 368 - WARN_ON(!r || !*r); 369 - return 0; 370 - } 371 - 372 - return *r == data; 373 - } 374 - 375 363 struct iio_channel *devm_iio_channel_get(struct device *dev, 376 364 const char *channel_name) 377 365 { ··· 381 393 return channel; 382 394 } 383 395 EXPORT_SYMBOL_GPL(devm_iio_channel_get); 384 - 385 - void devm_iio_channel_release(struct device *dev, struct iio_channel *channel) 386 - { 387 - WARN_ON(devres_release(dev, devm_iio_channel_free, 388 - devm_iio_channel_match, channel)); 389 - } 390 - EXPORT_SYMBOL_GPL(devm_iio_channel_release); 391 396 392 397 struct iio_channel *iio_channel_get_all(struct device *dev) 393 398 { ··· 494 513 return channels; 495 514 } 496 515 EXPORT_SYMBOL_GPL(devm_iio_channel_get_all); 497 - 498 - void devm_iio_channel_release_all(struct device *dev, 499 - struct iio_channel *channels) 500 - { 501 - WARN_ON(devres_release(dev, devm_iio_channel_free_all, 502 - devm_iio_channel_match, channels)); 503 - } 504 - EXPORT_SYMBOL_GPL(devm_iio_channel_release_all); 505 516 506 517 static int iio_channel_read(struct iio_channel *chan, int *val, int *val2, 507 518 enum iio_chan_info_enum info)
+19 -9
drivers/iio/light/isl29125.c
··· 213 213 .attrs = &isl29125_attribute_group, 214 214 }; 215 215 216 - static int isl29125_buffer_preenable(struct iio_dev *indio_dev) 216 + static int isl29125_buffer_postenable(struct iio_dev *indio_dev) 217 217 { 218 218 struct isl29125_data *data = iio_priv(indio_dev); 219 + int err; 220 + 221 + err = iio_triggered_buffer_postenable(indio_dev); 222 + if (err) 223 + return err; 219 224 220 225 data->conf1 |= ISL29125_MODE_RGB; 221 - return i2c_smbus_write_byte_data(data->client, ISL29125_CONF1, 226 + err = i2c_smbus_write_byte_data(data->client, ISL29125_CONF1, 222 227 data->conf1); 228 + if (err) { 229 + iio_triggered_buffer_predisable(indio_dev); 230 + return err; 231 + } 232 + 233 + return 0; 223 234 } 224 235 225 236 static int isl29125_buffer_predisable(struct iio_dev *indio_dev) ··· 238 227 struct isl29125_data *data = iio_priv(indio_dev); 239 228 int ret; 240 229 241 - ret = iio_triggered_buffer_predisable(indio_dev); 242 - if (ret < 0) 243 - return ret; 244 - 245 230 data->conf1 &= ~ISL29125_MODE_MASK; 246 231 data->conf1 |= ISL29125_MODE_PD; 247 - return i2c_smbus_write_byte_data(data->client, ISL29125_CONF1, 232 + ret = i2c_smbus_write_byte_data(data->client, ISL29125_CONF1, 248 233 data->conf1); 234 + 235 + iio_triggered_buffer_predisable(indio_dev); 236 + 237 + return ret; 249 238 } 250 239 251 240 static const struct iio_buffer_setup_ops isl29125_buffer_setup_ops = { 252 - .preenable = isl29125_buffer_preenable, 253 - .postenable = &iio_triggered_buffer_postenable, 241 + .postenable = isl29125_buffer_postenable, 254 242 .predisable = isl29125_buffer_predisable, 255 243 }; 256 244
+1 -1
drivers/iio/light/ltr501.c
··· 1263 1263 1264 1264 if (mask & LTR501_STATUS_ALS_RDY) { 1265 1265 ret = regmap_bulk_read(data->regmap, LTR501_ALS_DATA1, 1266 - (u8 *)als_buf, sizeof(als_buf)); 1266 + als_buf, sizeof(als_buf)); 1267 1267 if (ret < 0) 1268 1268 return ret; 1269 1269 if (test_bit(0, indio_dev->active_scan_mask))
+2 -2
drivers/iio/light/st_uvis25_i2c.c
··· 31 31 32 32 regmap = devm_regmap_init_i2c(client, &st_uvis25_i2c_regmap_config); 33 33 if (IS_ERR(regmap)) { 34 - dev_err(&client->dev, "Failed to register i2c regmap %d\n", 35 - (int)PTR_ERR(regmap)); 34 + dev_err(&client->dev, "Failed to register i2c regmap %ld\n", 35 + PTR_ERR(regmap)); 36 36 return PTR_ERR(regmap); 37 37 } 38 38
+2 -2
drivers/iio/light/st_uvis25_spi.c
··· 31 31 32 32 regmap = devm_regmap_init_spi(spi, &st_uvis25_spi_regmap_config); 33 33 if (IS_ERR(regmap)) { 34 - dev_err(&spi->dev, "Failed to register spi regmap %d\n", 35 - (int)PTR_ERR(regmap)); 34 + dev_err(&spi->dev, "Failed to register spi regmap %ld\n", 35 + PTR_ERR(regmap)); 36 36 return PTR_ERR(regmap); 37 37 } 38 38
+1 -1
drivers/iio/light/tsl2563.c
··· 69 69 #define TSL2563_TIMING_GAIN16 0x10 70 70 #define TSL2563_TIMING_GAIN1 0x00 71 71 72 - #define TSL2563_INT_DISBLED 0x00 72 + #define TSL2563_INT_DISABLED 0x00 73 73 #define TSL2563_INT_LEVEL 0x10 74 74 #define TSL2563_INT_PERSIST(n) ((n) & 0x0F) 75 75
+3 -3
drivers/iio/light/tsl2772.c
··· 932 932 { 933 933 struct tsl2772_chip *chip = iio_priv(dev_to_iio_dev(dev)); 934 934 935 - return snprintf(buf, PAGE_SIZE, "%d\n", chip->settings.als_cal_target); 935 + return scnprintf(buf, PAGE_SIZE, "%d\n", chip->settings.als_cal_target); 936 936 } 937 937 938 938 static ssize_t in_illuminance0_target_input_store(struct device *dev, ··· 986 986 int offset = 0; 987 987 988 988 while (i < TSL2772_MAX_LUX_TABLE_SIZE) { 989 - offset += snprintf(buf + offset, PAGE_SIZE, "%u,%u,", 989 + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%u,%u,", 990 990 chip->tsl2772_device_lux[i].ch0, 991 991 chip->tsl2772_device_lux[i].ch1); 992 992 if (chip->tsl2772_device_lux[i].ch0 == 0) { ··· 1000 1000 i++; 1001 1001 } 1002 1002 1003 - offset += snprintf(buf + offset, PAGE_SIZE, "\n"); 1003 + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "\n"); 1004 1004 return offset; 1005 1005 } 1006 1006
+25
drivers/iio/light/vcnl4000.c
··· 83 83 struct mutex vcnl4000_lock; 84 84 struct vcnl4200_channel vcnl4200_al; 85 85 struct vcnl4200_channel vcnl4200_ps; 86 + uint32_t near_level; 86 87 }; 87 88 88 89 struct vcnl4000_chip_spec { ··· 344 343 }, 345 344 }; 346 345 346 + static ssize_t vcnl4000_read_near_level(struct iio_dev *indio_dev, 347 + uintptr_t priv, 348 + const struct iio_chan_spec *chan, 349 + char *buf) 350 + { 351 + struct vcnl4000_data *data = iio_priv(indio_dev); 352 + 353 + return sprintf(buf, "%u\n", data->near_level); 354 + } 355 + 356 + static const struct iio_chan_spec_ext_info vcnl4000_ext_info[] = { 357 + { 358 + .name = "nearlevel", 359 + .shared = IIO_SEPARATE, 360 + .read = vcnl4000_read_near_level, 361 + }, 362 + { /* sentinel */ } 363 + }; 364 + 347 365 static const struct iio_chan_spec vcnl4000_channels[] = { 348 366 { 349 367 .type = IIO_LIGHT, ··· 371 351 }, { 372 352 .type = IIO_PROXIMITY, 373 353 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 354 + .ext_info = vcnl4000_ext_info, 374 355 } 375 356 }; 376 357 ··· 460 439 461 440 dev_dbg(&client->dev, "%s Ambient light/proximity sensor, Rev: %02x\n", 462 441 data->chip_spec->prod, data->rev); 442 + 443 + if (device_property_read_u32(&client->dev, "proximity-near-level", 444 + &data->near_level)) 445 + data->near_level = 0; 463 446 464 447 indio_dev->dev.parent = &client->dev; 465 448 indio_dev->info = &vcnl4000_info;
+6 -1
drivers/iio/magnetometer/ak8974.c
··· 746 746 ARRAY_SIZE(ak8974->regs), 747 747 ak8974->regs); 748 748 if (ret < 0) { 749 - dev_err(&i2c->dev, "cannot get regulators\n"); 749 + if (ret != -EPROBE_DEFER) 750 + dev_err(&i2c->dev, "cannot get regulators: %d\n", ret); 751 + else 752 + dev_dbg(&i2c->dev, 753 + "regulators unavailable, deferring probe\n"); 754 + 750 755 return ret; 751 756 } 752 757
+2 -2
drivers/iio/magnetometer/bmc150_magn_spi.c
··· 22 22 23 23 regmap = devm_regmap_init_spi(spi, &bmc150_magn_regmap_config); 24 24 if (IS_ERR(regmap)) { 25 - dev_err(&spi->dev, "Failed to register spi regmap %d\n", 26 - (int)PTR_ERR(regmap)); 25 + dev_err(&spi->dev, "Failed to register spi regmap: %pe\n", 26 + regmap); 27 27 return PTR_ERR(regmap); 28 28 } 29 29 return bmc150_magn_probe(&spi->dev, regmap, spi->irq, id->name);
+2 -2
drivers/iio/magnetometer/mmc35240.c
··· 239 239 return ret; 240 240 241 241 ret = regmap_bulk_read(data->regmap, MMC35240_OTP_START_ADDR, 242 - (u8 *)otp_data, sizeof(otp_data)); 242 + otp_data, sizeof(otp_data)); 243 243 if (ret < 0) 244 244 return ret; 245 245 ··· 295 295 if (ret < 0) 296 296 return ret; 297 297 298 - return regmap_bulk_read(data->regmap, MMC35240_REG_XOUT_L, (u8 *)buf, 298 + return regmap_bulk_read(data->regmap, MMC35240_REG_XOUT_L, buf, 299 299 3 * sizeof(__le16)); 300 300 } 301 301
+1 -2
drivers/iio/magnetometer/st_magn_core.c
··· 506 506 indio_dev->channels = mdata->sensor_settings->ch; 507 507 indio_dev->num_channels = ST_SENSORS_NUMBER_ALL_CHANNELS; 508 508 509 - mdata->current_fullscale = (struct st_sensor_fullscale_avl *) 510 - &mdata->sensor_settings->fs.fs_avl[0]; 509 + mdata->current_fullscale = &mdata->sensor_settings->fs.fs_avl[0]; 511 510 mdata->odr = mdata->sensor_settings->odr.odr_avl[0].hz; 512 511 513 512 err = st_sensors_init_sensor(indio_dev, NULL);
+39 -59
drivers/iio/pressure/bmp280-core.c
··· 337 337 __be32 tmp = 0; 338 338 s32 adc_temp, comp_temp; 339 339 340 - ret = regmap_bulk_read(data->regmap, BMP280_REG_TEMP_MSB, 341 - (u8 *) &tmp, 3); 340 + ret = regmap_bulk_read(data->regmap, BMP280_REG_TEMP_MSB, &tmp, 3); 342 341 if (ret < 0) { 343 342 dev_err(data->dev, "failed to read temperature\n"); 344 343 return ret; ··· 376 377 if (ret < 0) 377 378 return ret; 378 379 379 - ret = regmap_bulk_read(data->regmap, BMP280_REG_PRESS_MSB, 380 - (u8 *) &tmp, 3); 380 + ret = regmap_bulk_read(data->regmap, BMP280_REG_PRESS_MSB, &tmp, 3); 381 381 if (ret < 0) { 382 382 dev_err(data->dev, "failed to read pressure\n"); 383 383 return ret; ··· 398 400 399 401 static int bmp280_read_humid(struct bmp280_data *data, int *val, int *val2) 400 402 { 403 + __be16 tmp; 401 404 int ret; 402 - __be16 tmp = 0; 403 405 s32 adc_humidity; 404 406 u32 comp_humidity; 405 407 ··· 408 410 if (ret < 0) 409 411 return ret; 410 412 411 - ret = regmap_bulk_read(data->regmap, BMP280_REG_HUMIDITY_MSB, 412 - (u8 *) &tmp, 2); 413 + ret = regmap_bulk_read(data->regmap, BMP280_REG_HUMIDITY_MSB, &tmp, 2); 413 414 if (ret < 0) { 414 415 dev_err(data->dev, "failed to read humidity\n"); 415 416 return ret; ··· 572 575 return ret; 573 576 } 574 577 575 - static ssize_t bmp280_show_avail(char *buf, const int *vals, const int n) 578 + static int bmp280_read_avail(struct iio_dev *indio_dev, 579 + struct iio_chan_spec const *chan, 580 + const int **vals, int *type, int *length, 581 + long mask) 576 582 { 577 - size_t len = 0; 578 - int i; 583 + struct bmp280_data *data = iio_priv(indio_dev); 579 584 580 - for (i = 0; i < n; i++) 581 - len += scnprintf(buf + len, PAGE_SIZE - len, "%d ", vals[i]); 582 - 583 - buf[len - 1] = '\n'; 584 - 585 - return len; 585 + switch (mask) { 586 + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 587 + switch (chan->type) { 588 + case IIO_PRESSURE: 589 + *vals = data->chip_info->oversampling_press_avail; 590 + *length = data->chip_info->num_oversampling_press_avail; 591 + break; 592 + case IIO_TEMP: 593 + *vals = data->chip_info->oversampling_temp_avail; 594 + *length = data->chip_info->num_oversampling_temp_avail; 595 + break; 596 + default: 597 + return -EINVAL; 598 + } 599 + *type = IIO_VAL_INT; 600 + return IIO_AVAIL_LIST; 601 + default: 602 + return -EINVAL; 603 + } 586 604 } 587 - 588 - static ssize_t bmp280_show_temp_oversampling_avail(struct device *dev, 589 - struct device_attribute *attr, char *buf) 590 - { 591 - struct bmp280_data *data = iio_priv(dev_to_iio_dev(dev)); 592 - 593 - return bmp280_show_avail(buf, data->chip_info->oversampling_temp_avail, 594 - data->chip_info->num_oversampling_temp_avail); 595 - } 596 - 597 - static ssize_t bmp280_show_press_oversampling_avail(struct device *dev, 598 - struct device_attribute *attr, char *buf) 599 - { 600 - struct bmp280_data *data = iio_priv(dev_to_iio_dev(dev)); 601 - 602 - return bmp280_show_avail(buf, data->chip_info->oversampling_press_avail, 603 - data->chip_info->num_oversampling_press_avail); 604 - } 605 - 606 - static IIO_DEVICE_ATTR(in_temp_oversampling_ratio_available, 607 - S_IRUGO, bmp280_show_temp_oversampling_avail, NULL, 0); 608 - 609 - static IIO_DEVICE_ATTR(in_pressure_oversampling_ratio_available, 610 - S_IRUGO, bmp280_show_press_oversampling_avail, NULL, 0); 611 - 612 - static struct attribute *bmp280_attributes[] = { 613 - &iio_dev_attr_in_temp_oversampling_ratio_available.dev_attr.attr, 614 - &iio_dev_attr_in_pressure_oversampling_ratio_available.dev_attr.attr, 615 - NULL, 616 - }; 617 - 618 - static const struct attribute_group bmp280_attrs_group = { 619 - .attrs = bmp280_attributes, 620 - }; 621 605 622 606 static const struct iio_info bmp280_info = { 623 607 .read_raw = &bmp280_read_raw, 608 + .read_avail = &bmp280_read_avail, 624 609 .write_raw = &bmp280_write_raw, 625 - .attrs = &bmp280_attrs_group, 626 610 }; 627 611 628 612 static int bmp280_chip_config(struct bmp280_data *data) ··· 691 713 unsigned int ctrl; 692 714 693 715 if (data->use_eoc) 694 - init_completion(&data->done); 716 + reinit_completion(&data->done); 695 717 696 718 ret = regmap_write(data->regmap, BMP280_REG_CTRL_MEAS, ctrl_meas); 697 719 if (ret) ··· 730 752 731 753 static int bmp180_read_adc_temp(struct bmp280_data *data, int *val) 732 754 { 755 + __be16 tmp; 733 756 int ret; 734 - __be16 tmp = 0; 735 757 736 758 ret = bmp180_measure(data, BMP180_MEAS_TEMP); 737 759 if (ret) 738 760 return ret; 739 761 740 - ret = regmap_bulk_read(data->regmap, BMP180_REG_OUT_MSB, (u8 *)&tmp, 2); 762 + ret = regmap_bulk_read(data->regmap, BMP180_REG_OUT_MSB, &tmp, 2); 741 763 if (ret) 742 764 return ret; 743 765 ··· 834 856 if (ret) 835 857 return ret; 836 858 837 - ret = regmap_bulk_read(data->regmap, BMP180_REG_OUT_MSB, (u8 *)&tmp, 3); 859 + ret = regmap_bulk_read(data->regmap, BMP180_REG_OUT_MSB, &tmp, 3); 838 860 if (ret) 839 861 return ret; 840 862 ··· 943 965 944 966 irq_trig = irqd_get_trigger_type(irq_get_irq_data(irq)); 945 967 if (irq_trig != IRQF_TRIGGER_RISING) { 946 - dev_err(dev, "non-rising trigger given for EOC interrupt, " 947 - "trying to enforce it\n"); 968 + dev_err(dev, "non-rising trigger given for EOC interrupt, trying to enforce it\n"); 948 969 irq_trig = IRQF_TRIGGER_RISING; 949 970 } 971 + 972 + init_completion(&data->done); 973 + 950 974 ret = devm_request_threaded_irq(dev, 951 975 irq, 952 976 bmp085_eoc_irq, ··· 1062 1082 usleep_range(data->start_up_time, data->start_up_time + 100); 1063 1083 1064 1084 /* Bring chip out of reset if there is an assigned GPIO line */ 1065 - gpiod = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); 1085 + gpiod = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); 1066 1086 /* Deassert the signal */ 1067 - if (!IS_ERR(gpiod)) { 1087 + if (gpiod) { 1068 1088 dev_info(dev, "release reset\n"); 1069 1089 gpiod_set_value(gpiod, 0); 1070 1090 }
+2 -5
drivers/iio/pressure/st_pressure_core.c
··· 683 683 int st_press_common_probe(struct iio_dev *indio_dev) 684 684 { 685 685 struct st_sensor_data *press_data = iio_priv(indio_dev); 686 - struct st_sensors_platform_data *pdata = 687 - (struct st_sensors_platform_data *)press_data->dev->platform_data; 686 + struct st_sensors_platform_data *pdata = dev_get_platdata(press_data->dev); 688 687 int err; 689 688 690 689 indio_dev->modes = INDIO_DIRECT_MODE; ··· 707 708 indio_dev->channels = press_data->sensor_settings->ch; 708 709 indio_dev->num_channels = press_data->sensor_settings->num_ch; 709 710 710 - press_data->current_fullscale = 711 - (struct st_sensor_fullscale_avl *) 712 - &press_data->sensor_settings->fs.fs_avl[0]; 711 + press_data->current_fullscale = &press_data->sensor_settings->fs.fs_avl[0]; 713 712 714 713 press_data->odr = press_data->sensor_settings->odr.odr_avl[0].hz; 715 714
+13
drivers/iio/proximity/Kconfig
··· 101 101 To compile this driver as a module, choose M here: the 102 102 module will be called srf04. 103 103 104 + config SX9310 105 + tristate "SX9310/SX9311 Semtech proximity sensor" 106 + select IIO_BUFFER 107 + select IIO_TRIGGERED_BUFFER 108 + select REGMAP_I2C 109 + depends on I2C 110 + help 111 + Say Y here to build a driver for Semtech's SX9310/SX9311 capacitive 112 + proximity/button sensor. 113 + 114 + To compile this driver as a module, choose M here: the 115 + module will be called sx9310. 116 + 104 117 config SX9500 105 118 tristate "SX9500 Semtech proximity sensor" 106 119 select IIO_BUFFER
+1
drivers/iio/proximity/Makefile
··· 12 12 obj-$(CONFIG_RFD77402) += rfd77402.o 13 13 obj-$(CONFIG_SRF04) += srf04.o 14 14 obj-$(CONFIG_SRF08) += srf08.o 15 + obj-$(CONFIG_SX9310) += sx9310.o 15 16 obj-$(CONFIG_SX9500) += sx9500.o 16 17 obj-$(CONFIG_VL53L0X_I2C) += vl53l0x-i2c.o 17 18
+1069
drivers/iio/proximity/sx9310.c
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + /* 3 + * Copyright 2018 Google LLC. 4 + * 5 + * Driver for Semtech's SX9310/SX9311 capacitive proximity/button solution. 6 + * Based on SX9500 driver and Semtech driver using the input framework 7 + * <https://my.syncplicity.com/share/teouwsim8niiaud/ 8 + * linux-driver-SX9310_NoSmartHSensing>. 9 + * Reworked April 2019 by Evan Green <evgreen@chromium.org> 10 + * and January 2020 by Daniel Campello <campello@chromium.org> 11 + */ 12 + 13 + #include <linux/acpi.h> 14 + #include <linux/delay.h> 15 + #include <linux/i2c.h> 16 + #include <linux/irq.h> 17 + #include <linux/kernel.h> 18 + #include <linux/module.h> 19 + #include <linux/of.h> 20 + #include <linux/pm.h> 21 + #include <linux/regmap.h> 22 + #include <linux/slab.h> 23 + 24 + #include <linux/iio/buffer.h> 25 + #include <linux/iio/events.h> 26 + #include <linux/iio/iio.h> 27 + #include <linux/iio/sysfs.h> 28 + #include <linux/iio/trigger.h> 29 + #include <linux/iio/triggered_buffer.h> 30 + #include <linux/iio/trigger_consumer.h> 31 + 32 + /* Register definitions. */ 33 + #define SX9310_REG_IRQ_SRC 0x00 34 + #define SX9310_REG_STAT0 0x01 35 + #define SX9310_REG_STAT1 0x02 36 + #define SX9310_REG_IRQ_MSK 0x03 37 + #define SX9310_CONVDONE_IRQ BIT(3) 38 + #define SX9310_FAR_IRQ BIT(5) 39 + #define SX9310_CLOSE_IRQ BIT(6) 40 + #define SX9310_EVENT_IRQ (SX9310_FAR_IRQ | \ 41 + SX9310_CLOSE_IRQ) 42 + #define SX9310_REG_IRQ_FUNC 0x04 43 + 44 + #define SX9310_REG_PROX_CTRL0 0x10 45 + #define SX9310_REG_PROX_CTRL0_PROXSTAT2 0x10 46 + #define SX9310_REG_PROX_CTRL0_EN_MASK 0x0F 47 + #define SX9310_REG_PROX_CTRL1 0x11 48 + #define SX9310_REG_PROX_CTRL2 0x12 49 + #define SX9310_REG_PROX_CTRL2_COMBMODE_ALL 0x80 50 + #define SX9310_REG_PROX_CTRL2_SHIELDEN_DYNAMIC 0x04 51 + #define SX9310_REG_PROX_CTRL3 0x13 52 + #define SX9310_REG_PROX_CTRL3_GAIN0_X8 0x0c 53 + #define SX9310_REG_PROX_CTRL3_GAIN12_X4 0x02 54 + #define SX9310_REG_PROX_CTRL4 0x14 55 + #define SX9310_REG_PROX_CTRL4_RESOLUTION_FINEST 0x07 56 + #define SX9310_REG_PROX_CTRL5 0x15 57 + #define SX9310_REG_PROX_CTRL5_RANGE_SMALL 0xc0 58 + #define SX9310_REG_PROX_CTRL5_STARTUPSENS_CS1 0x04 59 + #define SX9310_REG_PROX_CTRL5_RAWFILT_1P25 0x02 60 + #define SX9310_REG_PROX_CTRL6 0x16 61 + #define SX9310_REG_PROX_CTRL6_COMP_COMMON 0x20 62 + #define SX9310_REG_PROX_CTRL7 0x17 63 + #define SX9310_REG_PROX_CTRL7_AVGNEGFILT_2 0x08 64 + #define SX9310_REG_PROX_CTRL7_AVGPOSFILT_512 0x05 65 + #define SX9310_REG_PROX_CTRL8 0x18 66 + #define SX9310_REG_PROX_CTRL9 0x19 67 + #define SX9310_REG_PROX_CTRL8_9_PTHRESH12_28 0x40 68 + #define SX9310_REG_PROX_CTRL8_9_PTHRESH_96 0x88 69 + #define SX9310_REG_PROX_CTRL8_9_BODYTHRESH_900 0x03 70 + #define SX9310_REG_PROX_CTRL8_9_BODYTHRESH_1500 0x05 71 + #define SX9310_REG_PROX_CTRL10 0x1a 72 + #define SX9310_REG_PROX_CTRL10_HYST_6PCT 0x10 73 + #define SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_8 0x12 74 + #define SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_8 0x03 75 + #define SX9310_REG_PROX_CTRL11 0x1b 76 + #define SX9310_REG_PROX_CTRL12 0x1c 77 + #define SX9310_REG_PROX_CTRL13 0x1d 78 + #define SX9310_REG_PROX_CTRL14 0x1e 79 + #define SX9310_REG_PROX_CTRL15 0x1f 80 + #define SX9310_REG_PROX_CTRL16 0x20 81 + #define SX9310_REG_PROX_CTRL17 0x21 82 + #define SX9310_REG_PROX_CTRL18 0x22 83 + #define SX9310_REG_PROX_CTRL19 0x23 84 + #define SX9310_REG_SAR_CTRL0 0x2a 85 + #define SX9310_REG_SAR_CTRL0_SARDEB_4_SAMPLES 0x40 86 + #define SX9310_REG_SAR_CTRL0_SARHYST_8 0x10 87 + #define SX9310_REG_SAR_CTRL1 0x2b 88 + /* Each increment of the slope register is 0.0078125. */ 89 + #define SX9310_REG_SAR_CTRL1_SLOPE(_hnslope) (_hnslope / 78125) 90 + #define SX9310_REG_SAR_CTRL2 0x2c 91 + #define SX9310_REG_SAR_CTRL2_SAROFFSET_DEFAULT 0x3c 92 + 93 + #define SX9310_REG_SENSOR_SEL 0x30 94 + 95 + #define SX9310_REG_USE_MSB 0x31 96 + #define SX9310_REG_USE_LSB 0x32 97 + 98 + #define SX9310_REG_AVG_MSB 0x33 99 + #define SX9310_REG_AVG_LSB 0x34 100 + 101 + #define SX9310_REG_DIFF_MSB 0x35 102 + #define SX9310_REG_DIFF_LSB 0x36 103 + 104 + #define SX9310_REG_OFFSET_MSB 0x37 105 + #define SX9310_REG_OFFSET_LSB 0x38 106 + 107 + #define SX9310_REG_SAR_MSB 0x39 108 + #define SX9310_REG_SAR_LSB 0x3a 109 + 110 + #define SX9310_REG_I2CADDR 0x40 111 + #define SX9310_REG_PAUSE 0x41 112 + #define SX9310_REG_WHOAMI 0x42 113 + #define SX9310_WHOAMI_VALUE 0x01 114 + #define SX9311_WHOAMI_VALUE 0x02 115 + 116 + #define SX9310_REG_RESET 0x7f 117 + #define SX9310_SOFT_RESET 0xde 118 + 119 + #define SX9310_SCAN_PERIOD_MASK GENMASK(7, 4) 120 + #define SX9310_SCAN_PERIOD_SHIFT 4 121 + 122 + #define SX9310_COMPSTAT_MASK GENMASK(3, 0) 123 + 124 + /* 4 hardware channels, as defined in STAT0: COMB, CS2, CS1 and CS0. */ 125 + #define SX9310_NUM_CHANNELS 4 126 + #define SX9310_CHAN_ENABLED_MASK GENMASK(3, 0) 127 + 128 + struct sx9310_data { 129 + /* Serialize access to registers and channel configuration */ 130 + struct mutex mutex; 131 + struct i2c_client *client; 132 + struct iio_trigger *trig; 133 + struct regmap *regmap; 134 + /* 135 + * Last reading of the proximity status for each channel. 136 + * We only send an event to user space when this changes. 137 + */ 138 + bool prox_stat[SX9310_NUM_CHANNELS]; 139 + bool trigger_enabled; 140 + __be16 buffer[SX9310_NUM_CHANNELS + 141 + 4]; /* 64-bit data + 64-bit timestamp */ 142 + /* Remember enabled channels and sample rate during suspend. */ 143 + unsigned int suspend_ctrl0; 144 + struct completion completion; 145 + unsigned int chan_read, chan_event; 146 + int channel_users[SX9310_NUM_CHANNELS]; 147 + int whoami; 148 + }; 149 + 150 + static const struct iio_event_spec sx9310_events[] = { 151 + { 152 + .type = IIO_EV_TYPE_THRESH, 153 + .dir = IIO_EV_DIR_EITHER, 154 + .mask_separate = BIT(IIO_EV_INFO_ENABLE), 155 + }, 156 + }; 157 + 158 + #define SX9310_NAMED_CHANNEL(idx, name) \ 159 + { \ 160 + .type = IIO_PROXIMITY, \ 161 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 162 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 163 + .indexed = 1, \ 164 + .channel = idx, \ 165 + .extend_name = name, \ 166 + .address = SX9310_REG_DIFF_MSB, \ 167 + .event_spec = sx9310_events, \ 168 + .num_event_specs = ARRAY_SIZE(sx9310_events), \ 169 + .scan_index = idx, \ 170 + .scan_type = { \ 171 + .sign = 's', \ 172 + .realbits = 12, \ 173 + .storagebits = 16, \ 174 + .endianness = IIO_BE, \ 175 + }, \ 176 + } 177 + #define SX9310_CHANNEL(idx) SX9310_NAMED_CHANNEL(idx, NULL) 178 + 179 + static const struct iio_chan_spec sx9310_channels[] = { 180 + SX9310_CHANNEL(0), /* CS0 */ 181 + SX9310_CHANNEL(1), /* CS1 */ 182 + SX9310_CHANNEL(2), /* CS2 */ 183 + SX9310_NAMED_CHANNEL(3, "comb"), /* COMB */ 184 + 185 + IIO_CHAN_SOFT_TIMESTAMP(4), 186 + }; 187 + 188 + /* 189 + * Each entry contains the integer part (val) and the fractional part, in micro 190 + * seconds. It conforms to the IIO output IIO_VAL_INT_PLUS_MICRO. 191 + */ 192 + static const struct { 193 + int val; 194 + int val2; 195 + } sx9310_samp_freq_table[] = { 196 + { 500, 0 }, /* 0000: Min (no idle time) */ 197 + { 66, 666666 }, /* 0001: 15 ms */ 198 + { 33, 333333 }, /* 0010: 30 ms (Typ.) */ 199 + { 22, 222222 }, /* 0011: 45 ms */ 200 + { 16, 666666 }, /* 0100: 60 ms */ 201 + { 11, 111111 }, /* 0101: 90 ms */ 202 + { 8, 333333 }, /* 0110: 120 ms */ 203 + { 5, 0 }, /* 0111: 200 ms */ 204 + { 2, 500000 }, /* 1000: 400 ms */ 205 + { 1, 666666 }, /* 1001: 600 ms */ 206 + { 1, 250000 }, /* 1010: 800 ms */ 207 + { 1, 0 }, /* 1011: 1 s */ 208 + { 0, 500000 }, /* 1100: 2 s */ 209 + { 0, 333333 }, /* 1101: 3 s */ 210 + { 0, 250000 }, /* 1110: 4 s */ 211 + { 0, 200000 }, /* 1111: 5 s */ 212 + }; 213 + static const unsigned int sx9310_scan_period_table[] = { 214 + 2, 15, 30, 45, 60, 90, 120, 200, 215 + 400, 600, 800, 1000, 2000, 3000, 4000, 5000, 216 + }; 217 + 218 + static ssize_t sx9310_show_samp_freq_avail(struct device *dev, 219 + struct device_attribute *attr, 220 + char *buf) 221 + { 222 + size_t len = 0; 223 + int i; 224 + 225 + for (i = 0; i < ARRAY_SIZE(sx9310_samp_freq_table); i++) 226 + len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%d ", 227 + sx9310_samp_freq_table[i].val, 228 + sx9310_samp_freq_table[i].val2); 229 + buf[len - 1] = '\n'; 230 + return len; 231 + } 232 + static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(sx9310_show_samp_freq_avail); 233 + 234 + static const struct regmap_range sx9310_writable_reg_ranges[] = { 235 + regmap_reg_range(SX9310_REG_IRQ_MSK, SX9310_REG_IRQ_FUNC), 236 + regmap_reg_range(SX9310_REG_PROX_CTRL0, SX9310_REG_PROX_CTRL19), 237 + regmap_reg_range(SX9310_REG_SAR_CTRL0, SX9310_REG_SAR_CTRL2), 238 + regmap_reg_range(SX9310_REG_SENSOR_SEL, SX9310_REG_SENSOR_SEL), 239 + regmap_reg_range(SX9310_REG_OFFSET_MSB, SX9310_REG_OFFSET_LSB), 240 + regmap_reg_range(SX9310_REG_PAUSE, SX9310_REG_PAUSE), 241 + regmap_reg_range(SX9310_REG_RESET, SX9310_REG_RESET), 242 + }; 243 + 244 + static const struct regmap_access_table sx9310_writeable_regs = { 245 + .yes_ranges = sx9310_writable_reg_ranges, 246 + .n_yes_ranges = ARRAY_SIZE(sx9310_writable_reg_ranges), 247 + }; 248 + 249 + static const struct regmap_range sx9310_readable_reg_ranges[] = { 250 + regmap_reg_range(SX9310_REG_IRQ_SRC, SX9310_REG_IRQ_FUNC), 251 + regmap_reg_range(SX9310_REG_PROX_CTRL0, SX9310_REG_PROX_CTRL19), 252 + regmap_reg_range(SX9310_REG_SAR_CTRL0, SX9310_REG_SAR_CTRL2), 253 + regmap_reg_range(SX9310_REG_SENSOR_SEL, SX9310_REG_SAR_LSB), 254 + regmap_reg_range(SX9310_REG_I2CADDR, SX9310_REG_WHOAMI), 255 + regmap_reg_range(SX9310_REG_RESET, SX9310_REG_RESET), 256 + }; 257 + 258 + static const struct regmap_access_table sx9310_readable_regs = { 259 + .yes_ranges = sx9310_readable_reg_ranges, 260 + .n_yes_ranges = ARRAY_SIZE(sx9310_readable_reg_ranges), 261 + }; 262 + 263 + static const struct regmap_range sx9310_volatile_reg_ranges[] = { 264 + regmap_reg_range(SX9310_REG_IRQ_SRC, SX9310_REG_STAT1), 265 + regmap_reg_range(SX9310_REG_USE_MSB, SX9310_REG_DIFF_LSB), 266 + regmap_reg_range(SX9310_REG_SAR_MSB, SX9310_REG_SAR_LSB), 267 + regmap_reg_range(SX9310_REG_RESET, SX9310_REG_RESET), 268 + }; 269 + 270 + static const struct regmap_access_table sx9310_volatile_regs = { 271 + .yes_ranges = sx9310_volatile_reg_ranges, 272 + .n_yes_ranges = ARRAY_SIZE(sx9310_volatile_reg_ranges), 273 + }; 274 + 275 + static const struct regmap_config sx9310_regmap_config = { 276 + .reg_bits = 8, 277 + .val_bits = 8, 278 + 279 + .max_register = SX9310_REG_RESET, 280 + .cache_type = REGCACHE_RBTREE, 281 + 282 + .wr_table = &sx9310_writeable_regs, 283 + .rd_table = &sx9310_readable_regs, 284 + .volatile_table = &sx9310_volatile_regs, 285 + }; 286 + 287 + static int sx9310_update_chan_en(struct sx9310_data *data, 288 + unsigned int chan_read, 289 + unsigned int chan_event) 290 + { 291 + int ret; 292 + 293 + if ((data->chan_read | data->chan_event) != (chan_read | chan_event)) { 294 + ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL0, 295 + SX9310_CHAN_ENABLED_MASK, 296 + chan_read | chan_event); 297 + if (ret) 298 + return ret; 299 + } 300 + data->chan_read = chan_read; 301 + data->chan_event = chan_event; 302 + return 0; 303 + } 304 + 305 + static int sx9310_get_read_channel(struct sx9310_data *data, int channel) 306 + { 307 + return sx9310_update_chan_en(data, data->chan_read | BIT(channel), 308 + data->chan_event); 309 + } 310 + 311 + static int sx9310_put_read_channel(struct sx9310_data *data, int channel) 312 + { 313 + return sx9310_update_chan_en(data, data->chan_read & ~BIT(channel), 314 + data->chan_event); 315 + } 316 + 317 + static int sx9310_get_event_channel(struct sx9310_data *data, int channel) 318 + { 319 + return sx9310_update_chan_en(data, data->chan_read, 320 + data->chan_event | BIT(channel)); 321 + } 322 + 323 + static int sx9310_put_event_channel(struct sx9310_data *data, int channel) 324 + { 325 + return sx9310_update_chan_en(data, data->chan_read, 326 + data->chan_event & ~BIT(channel)); 327 + } 328 + 329 + static int sx9310_enable_irq(struct sx9310_data *data, unsigned int irq) 330 + { 331 + return regmap_update_bits(data->regmap, SX9310_REG_IRQ_MSK, irq, irq); 332 + } 333 + 334 + static int sx9310_disable_irq(struct sx9310_data *data, unsigned int irq) 335 + { 336 + return regmap_update_bits(data->regmap, SX9310_REG_IRQ_MSK, irq, 0); 337 + } 338 + 339 + static int sx9310_read_prox_data(struct sx9310_data *data, 340 + const struct iio_chan_spec *chan, __be16 *val) 341 + { 342 + int ret; 343 + 344 + ret = regmap_write(data->regmap, SX9310_REG_SENSOR_SEL, chan->channel); 345 + if (ret < 0) 346 + return ret; 347 + 348 + return regmap_bulk_read(data->regmap, chan->address, val, 2); 349 + } 350 + 351 + /* 352 + * If we have no interrupt support, we have to wait for a scan period 353 + * after enabling a channel to get a result. 354 + */ 355 + static int sx9310_wait_for_sample(struct sx9310_data *data) 356 + { 357 + int ret; 358 + unsigned int val; 359 + 360 + ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, &val); 361 + if (ret < 0) 362 + return ret; 363 + 364 + val = (val & SX9310_SCAN_PERIOD_MASK) >> SX9310_SCAN_PERIOD_SHIFT; 365 + 366 + msleep(sx9310_scan_period_table[val]); 367 + 368 + return 0; 369 + } 370 + 371 + static int sx9310_read_proximity(struct sx9310_data *data, 372 + const struct iio_chan_spec *chan, int *val) 373 + { 374 + int ret = 0; 375 + __be16 rawval; 376 + 377 + mutex_lock(&data->mutex); 378 + 379 + ret = sx9310_get_read_channel(data, chan->channel); 380 + if (ret < 0) 381 + goto out; 382 + 383 + ret = sx9310_enable_irq(data, SX9310_CONVDONE_IRQ); 384 + if (ret < 0) 385 + goto out_put_channel; 386 + 387 + mutex_unlock(&data->mutex); 388 + 389 + if (data->client->irq > 0) { 390 + ret = wait_for_completion_interruptible(&data->completion); 391 + reinit_completion(&data->completion); 392 + } else { 393 + ret = sx9310_wait_for_sample(data); 394 + } 395 + 396 + mutex_lock(&data->mutex); 397 + 398 + if (ret < 0) 399 + goto out_disable_irq; 400 + 401 + ret = sx9310_read_prox_data(data, chan, &rawval); 402 + if (ret < 0) 403 + goto out_disable_irq; 404 + 405 + *val = sign_extend32(be16_to_cpu(rawval), 406 + (chan->address == SX9310_REG_DIFF_MSB ? 11 : 15)); 407 + 408 + ret = sx9310_disable_irq(data, SX9310_CONVDONE_IRQ); 409 + if (ret < 0) 410 + goto out_put_channel; 411 + 412 + ret = sx9310_put_read_channel(data, chan->channel); 413 + if (ret < 0) 414 + goto out; 415 + 416 + mutex_unlock(&data->mutex); 417 + 418 + return IIO_VAL_INT; 419 + 420 + out_disable_irq: 421 + sx9310_disable_irq(data, SX9310_CONVDONE_IRQ); 422 + out_put_channel: 423 + sx9310_put_read_channel(data, chan->channel); 424 + out: 425 + mutex_unlock(&data->mutex); 426 + 427 + return ret; 428 + } 429 + 430 + static int sx9310_read_samp_freq(struct sx9310_data *data, int *val, int *val2) 431 + { 432 + unsigned int regval; 433 + int ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, &regval); 434 + 435 + if (ret < 0) 436 + return ret; 437 + 438 + regval = (regval & SX9310_SCAN_PERIOD_MASK) >> SX9310_SCAN_PERIOD_SHIFT; 439 + *val = sx9310_samp_freq_table[regval].val; 440 + *val2 = sx9310_samp_freq_table[regval].val2; 441 + 442 + return IIO_VAL_INT_PLUS_MICRO; 443 + } 444 + 445 + static int sx9310_read_raw(struct iio_dev *indio_dev, 446 + const struct iio_chan_spec *chan, int *val, 447 + int *val2, long mask) 448 + { 449 + struct sx9310_data *data = iio_priv(indio_dev); 450 + int ret; 451 + 452 + if (chan->type != IIO_PROXIMITY) 453 + return -EINVAL; 454 + 455 + switch (mask) { 456 + case IIO_CHAN_INFO_RAW: 457 + ret = iio_device_claim_direct_mode(indio_dev); 458 + if (ret) 459 + return ret; 460 + 461 + ret = sx9310_read_proximity(data, chan, val); 462 + iio_device_release_direct_mode(indio_dev); 463 + return ret; 464 + case IIO_CHAN_INFO_SAMP_FREQ: 465 + return sx9310_read_samp_freq(data, val, val2); 466 + default: 467 + return -EINVAL; 468 + } 469 + } 470 + 471 + static int sx9310_set_samp_freq(struct sx9310_data *data, int val, int val2) 472 + { 473 + int i, ret; 474 + 475 + for (i = 0; i < ARRAY_SIZE(sx9310_samp_freq_table); i++) 476 + if (val == sx9310_samp_freq_table[i].val && 477 + val2 == sx9310_samp_freq_table[i].val2) 478 + break; 479 + 480 + if (i == ARRAY_SIZE(sx9310_samp_freq_table)) 481 + return -EINVAL; 482 + 483 + mutex_lock(&data->mutex); 484 + 485 + ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL0, 486 + SX9310_SCAN_PERIOD_MASK, 487 + i << SX9310_SCAN_PERIOD_SHIFT); 488 + 489 + mutex_unlock(&data->mutex); 490 + 491 + return ret; 492 + } 493 + 494 + static int sx9310_write_raw(struct iio_dev *indio_dev, 495 + const struct iio_chan_spec *chan, int val, int val2, 496 + long mask) 497 + { 498 + struct sx9310_data *data = iio_priv(indio_dev); 499 + 500 + if (chan->type != IIO_PROXIMITY) 501 + return -EINVAL; 502 + 503 + if (mask != IIO_CHAN_INFO_SAMP_FREQ) 504 + return -EINVAL; 505 + 506 + return sx9310_set_samp_freq(data, val, val2); 507 + } 508 + 509 + static irqreturn_t sx9310_irq_handler(int irq, void *private) 510 + { 511 + struct iio_dev *indio_dev = private; 512 + struct sx9310_data *data = iio_priv(indio_dev); 513 + 514 + if (data->trigger_enabled) 515 + iio_trigger_poll(data->trig); 516 + 517 + /* 518 + * Even if no event is enabled, we need to wake the thread to 519 + * clear the interrupt state by reading SX9310_REG_IRQ_SRC. It 520 + * is not possible to do that here because regmap_read takes a 521 + * mutex. 522 + */ 523 + return IRQ_WAKE_THREAD; 524 + } 525 + 526 + static void sx9310_push_events(struct iio_dev *indio_dev) 527 + { 528 + int ret; 529 + unsigned int val, chan; 530 + struct sx9310_data *data = iio_priv(indio_dev); 531 + s64 timestamp = iio_get_time_ns(indio_dev); 532 + 533 + /* Read proximity state on all channels */ 534 + ret = regmap_read(data->regmap, SX9310_REG_STAT0, &val); 535 + if (ret < 0) { 536 + dev_err(&data->client->dev, "i2c transfer error in irq\n"); 537 + return; 538 + } 539 + 540 + for (chan = 0; chan < SX9310_NUM_CHANNELS; chan++) { 541 + int dir; 542 + u64 ev; 543 + bool new_prox = val & BIT(chan); 544 + 545 + if (!(data->chan_event & BIT(chan))) 546 + continue; 547 + if (new_prox == data->prox_stat[chan]) 548 + /* No change on this channel. */ 549 + continue; 550 + 551 + dir = new_prox ? IIO_EV_DIR_FALLING : IIO_EV_DIR_RISING; 552 + ev = IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, chan, 553 + IIO_EV_TYPE_THRESH, dir); 554 + 555 + iio_push_event(indio_dev, ev, timestamp); 556 + data->prox_stat[chan] = new_prox; 557 + } 558 + } 559 + 560 + static irqreturn_t sx9310_irq_thread_handler(int irq, void *private) 561 + { 562 + struct iio_dev *indio_dev = private; 563 + struct sx9310_data *data = iio_priv(indio_dev); 564 + int ret; 565 + unsigned int val; 566 + 567 + mutex_lock(&data->mutex); 568 + 569 + ret = regmap_read(data->regmap, SX9310_REG_IRQ_SRC, &val); 570 + if (ret < 0) { 571 + dev_err(&data->client->dev, "i2c transfer error in irq\n"); 572 + goto out; 573 + } 574 + 575 + if (val & SX9310_EVENT_IRQ) 576 + sx9310_push_events(indio_dev); 577 + 578 + if (val & SX9310_CONVDONE_IRQ) 579 + complete(&data->completion); 580 + 581 + out: 582 + mutex_unlock(&data->mutex); 583 + 584 + return IRQ_HANDLED; 585 + } 586 + 587 + static int sx9310_read_event_config(struct iio_dev *indio_dev, 588 + const struct iio_chan_spec *chan, 589 + enum iio_event_type type, 590 + enum iio_event_direction dir) 591 + { 592 + struct sx9310_data *data = iio_priv(indio_dev); 593 + 594 + return !!(data->chan_event & BIT(chan->channel)); 595 + } 596 + 597 + static int sx9310_write_event_config(struct iio_dev *indio_dev, 598 + const struct iio_chan_spec *chan, 599 + enum iio_event_type type, 600 + enum iio_event_direction dir, int state) 601 + { 602 + struct sx9310_data *data = iio_priv(indio_dev); 603 + int ret; 604 + 605 + /* If the state hasn't changed, there's nothing to do. */ 606 + if (!!(data->chan_event & BIT(chan->channel)) == state) 607 + return 0; 608 + 609 + mutex_lock(&data->mutex); 610 + if (state) { 611 + ret = sx9310_get_event_channel(data, chan->channel); 612 + if (ret < 0) 613 + goto out_unlock; 614 + if (!(data->chan_event & ~BIT(chan->channel))) { 615 + ret = sx9310_enable_irq(data, SX9310_EVENT_IRQ); 616 + if (ret < 0) 617 + sx9310_put_event_channel(data, chan->channel); 618 + } 619 + } else { 620 + ret = sx9310_put_event_channel(data, chan->channel); 621 + if (ret < 0) 622 + goto out_unlock; 623 + if (!data->chan_event) { 624 + ret = sx9310_disable_irq(data, SX9310_EVENT_IRQ); 625 + if (ret < 0) 626 + sx9310_get_event_channel(data, chan->channel); 627 + } 628 + } 629 + 630 + out_unlock: 631 + mutex_unlock(&data->mutex); 632 + return ret; 633 + } 634 + 635 + static struct attribute *sx9310_attributes[] = { 636 + &iio_dev_attr_sampling_frequency_available.dev_attr.attr, 637 + NULL, 638 + }; 639 + 640 + static const struct attribute_group sx9310_attribute_group = { 641 + .attrs = sx9310_attributes, 642 + }; 643 + 644 + static const struct iio_info sx9310_info = { 645 + .attrs = &sx9310_attribute_group, 646 + .read_raw = sx9310_read_raw, 647 + .write_raw = sx9310_write_raw, 648 + .read_event_config = sx9310_read_event_config, 649 + .write_event_config = sx9310_write_event_config, 650 + }; 651 + 652 + static int sx9310_set_trigger_state(struct iio_trigger *trig, bool state) 653 + { 654 + struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 655 + struct sx9310_data *data = iio_priv(indio_dev); 656 + int ret = 0; 657 + 658 + mutex_lock(&data->mutex); 659 + 660 + if (state) 661 + ret = sx9310_enable_irq(data, SX9310_CONVDONE_IRQ); 662 + else if (!data->chan_read) 663 + ret = sx9310_disable_irq(data, SX9310_CONVDONE_IRQ); 664 + if (ret < 0) 665 + goto out; 666 + 667 + data->trigger_enabled = state; 668 + 669 + out: 670 + mutex_unlock(&data->mutex); 671 + 672 + return ret; 673 + } 674 + 675 + static const struct iio_trigger_ops sx9310_trigger_ops = { 676 + .set_trigger_state = sx9310_set_trigger_state, 677 + }; 678 + 679 + static irqreturn_t sx9310_trigger_handler(int irq, void *private) 680 + { 681 + struct iio_poll_func *pf = private; 682 + struct iio_dev *indio_dev = pf->indio_dev; 683 + struct sx9310_data *data = iio_priv(indio_dev); 684 + __be16 val; 685 + int bit, ret, i = 0; 686 + 687 + mutex_lock(&data->mutex); 688 + 689 + for_each_set_bit(bit, indio_dev->active_scan_mask, 690 + indio_dev->masklength) { 691 + ret = sx9310_read_prox_data(data, &indio_dev->channels[bit], 692 + &val); 693 + if (ret < 0) 694 + goto out; 695 + 696 + data->buffer[i++] = val; 697 + } 698 + 699 + iio_push_to_buffers_with_timestamp(indio_dev, data->buffer, 700 + pf->timestamp); 701 + 702 + out: 703 + mutex_unlock(&data->mutex); 704 + 705 + iio_trigger_notify_done(indio_dev->trig); 706 + 707 + return IRQ_HANDLED; 708 + } 709 + 710 + static int sx9310_buffer_preenable(struct iio_dev *indio_dev) 711 + { 712 + struct sx9310_data *data = iio_priv(indio_dev); 713 + unsigned int channels = 0; 714 + int bit, ret; 715 + 716 + mutex_lock(&data->mutex); 717 + for_each_set_bit(bit, indio_dev->active_scan_mask, 718 + indio_dev->masklength) 719 + channels |= BIT(indio_dev->channels[bit].channel); 720 + 721 + ret = sx9310_update_chan_en(data, channels, data->chan_event); 722 + mutex_unlock(&data->mutex); 723 + return ret; 724 + } 725 + 726 + static int sx9310_buffer_postdisable(struct iio_dev *indio_dev) 727 + { 728 + struct sx9310_data *data = iio_priv(indio_dev); 729 + int ret; 730 + 731 + mutex_lock(&data->mutex); 732 + ret = sx9310_update_chan_en(data, 0, data->chan_event); 733 + mutex_unlock(&data->mutex); 734 + return ret; 735 + } 736 + 737 + static const struct iio_buffer_setup_ops sx9310_buffer_setup_ops = { 738 + .preenable = sx9310_buffer_preenable, 739 + .postenable = iio_triggered_buffer_postenable, 740 + .predisable = iio_triggered_buffer_predisable, 741 + .postdisable = sx9310_buffer_postdisable, 742 + }; 743 + 744 + struct sx9310_reg_default { 745 + u8 reg; 746 + u8 def; 747 + }; 748 + 749 + #define SX_INIT(_reg, _def) \ 750 + { \ 751 + .reg = SX9310_REG_##_reg, \ 752 + .def = _def, \ 753 + } 754 + 755 + static const struct sx9310_reg_default sx9310_default_regs[] = { 756 + SX_INIT(IRQ_MSK, 0x00), 757 + SX_INIT(IRQ_FUNC, 0x00), 758 + /* 759 + * The lower 4 bits should not be set as it enable sensors measurements. 760 + * Turning the detection on before the configuration values are set to 761 + * good values can cause the device to return erroneous readings. 762 + */ 763 + SX_INIT(PROX_CTRL0, SX9310_REG_PROX_CTRL0_PROXSTAT2), 764 + SX_INIT(PROX_CTRL1, 0x00), 765 + SX_INIT(PROX_CTRL2, SX9310_REG_PROX_CTRL2_COMBMODE_ALL | 766 + SX9310_REG_PROX_CTRL2_SHIELDEN_DYNAMIC), 767 + SX_INIT(PROX_CTRL3, SX9310_REG_PROX_CTRL3_GAIN0_X8 | 768 + SX9310_REG_PROX_CTRL3_GAIN12_X4), 769 + SX_INIT(PROX_CTRL4, SX9310_REG_PROX_CTRL4_RESOLUTION_FINEST), 770 + SX_INIT(PROX_CTRL5, SX9310_REG_PROX_CTRL5_RANGE_SMALL | 771 + SX9310_REG_PROX_CTRL5_STARTUPSENS_CS1 | 772 + SX9310_REG_PROX_CTRL5_RAWFILT_1P25), 773 + SX_INIT(PROX_CTRL6, SX9310_REG_PROX_CTRL6_COMP_COMMON), 774 + SX_INIT(PROX_CTRL7, SX9310_REG_PROX_CTRL7_AVGNEGFILT_2 | 775 + SX9310_REG_PROX_CTRL7_AVGPOSFILT_512), 776 + SX_INIT(PROX_CTRL8, SX9310_REG_PROX_CTRL8_9_PTHRESH_96 | 777 + SX9310_REG_PROX_CTRL8_9_BODYTHRESH_1500), 778 + SX_INIT(PROX_CTRL9, SX9310_REG_PROX_CTRL8_9_PTHRESH12_28 | 779 + SX9310_REG_PROX_CTRL8_9_BODYTHRESH_900), 780 + SX_INIT(PROX_CTRL10, SX9310_REG_PROX_CTRL10_HYST_6PCT | 781 + SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_8 | 782 + SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_8), 783 + SX_INIT(PROX_CTRL11, 0x00), 784 + SX_INIT(PROX_CTRL12, 0x00), 785 + SX_INIT(PROX_CTRL13, 0x00), 786 + SX_INIT(PROX_CTRL14, 0x00), 787 + SX_INIT(PROX_CTRL15, 0x00), 788 + SX_INIT(PROX_CTRL16, 0x00), 789 + SX_INIT(PROX_CTRL17, 0x00), 790 + SX_INIT(PROX_CTRL18, 0x00), 791 + SX_INIT(PROX_CTRL19, 0x00), 792 + SX_INIT(SAR_CTRL0, SX9310_REG_SAR_CTRL0_SARDEB_4_SAMPLES | 793 + SX9310_REG_SAR_CTRL0_SARHYST_8), 794 + SX_INIT(SAR_CTRL1, SX9310_REG_SAR_CTRL1_SLOPE(10781250)), 795 + SX_INIT(SAR_CTRL2, SX9310_REG_SAR_CTRL2_SAROFFSET_DEFAULT), 796 + }; 797 + 798 + /* Activate all channels and perform an initial compensation. */ 799 + static int sx9310_init_compensation(struct iio_dev *indio_dev) 800 + { 801 + struct sx9310_data *data = iio_priv(indio_dev); 802 + int i, ret; 803 + unsigned int val; 804 + unsigned int ctrl0; 805 + 806 + ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, &ctrl0); 807 + if (ret < 0) 808 + return ret; 809 + 810 + /* run the compensation phase on all channels */ 811 + ret = regmap_write(data->regmap, SX9310_REG_PROX_CTRL0, 812 + ctrl0 | SX9310_REG_PROX_CTRL0_EN_MASK); 813 + if (ret < 0) 814 + return ret; 815 + 816 + for (i = 100; i >= 0; i--) { 817 + msleep(20); 818 + ret = regmap_read(data->regmap, SX9310_REG_STAT1, &val); 819 + if (ret < 0) 820 + goto out; 821 + if (!(val & SX9310_COMPSTAT_MASK)) 822 + break; 823 + } 824 + 825 + if (i < 0) { 826 + dev_err(&data->client->dev, 827 + "initial compensation timed out: 0x%02x", val); 828 + ret = -ETIMEDOUT; 829 + } 830 + 831 + out: 832 + regmap_write(data->regmap, SX9310_REG_PROX_CTRL0, ctrl0); 833 + return ret; 834 + } 835 + 836 + static int sx9310_init_device(struct iio_dev *indio_dev) 837 + { 838 + struct sx9310_data *data = iio_priv(indio_dev); 839 + const struct sx9310_reg_default *initval; 840 + int ret; 841 + unsigned int i, val; 842 + 843 + ret = regmap_write(data->regmap, SX9310_REG_RESET, SX9310_SOFT_RESET); 844 + if (ret < 0) 845 + return ret; 846 + 847 + usleep_range(1000, 2000); /* power-up time is ~1ms. */ 848 + 849 + /* Clear reset interrupt state by reading SX9310_REG_IRQ_SRC. */ 850 + ret = regmap_read(data->regmap, SX9310_REG_IRQ_SRC, &val); 851 + if (ret < 0) 852 + return ret; 853 + 854 + /* Program some sane defaults. */ 855 + for (i = 0; i < ARRAY_SIZE(sx9310_default_regs); i++) { 856 + initval = &sx9310_default_regs[i]; 857 + ret = regmap_write(data->regmap, initval->reg, initval->def); 858 + if (ret < 0) 859 + return ret; 860 + } 861 + 862 + return sx9310_init_compensation(indio_dev); 863 + } 864 + 865 + static int sx9310_set_indio_dev_name(struct device *dev, 866 + struct iio_dev *indio_dev, 867 + const struct i2c_device_id *id, int whoami) 868 + { 869 + const struct acpi_device_id *acpi_id; 870 + 871 + /* id will be NULL when enumerated via ACPI */ 872 + if (id) { 873 + if (id->driver_data != whoami) 874 + dev_err(dev, "WHOAMI does not match i2c_device_id: %s", 875 + id->name); 876 + } else if (ACPI_HANDLE(dev)) { 877 + acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev); 878 + if (!acpi_id) 879 + return -ENODEV; 880 + if (acpi_id->driver_data != whoami) 881 + dev_err(dev, "WHOAMI does not match acpi_device_id: %s", 882 + acpi_id->id); 883 + } else 884 + return -ENODEV; 885 + 886 + switch (whoami) { 887 + case SX9310_WHOAMI_VALUE: 888 + indio_dev->name = "sx9310"; 889 + break; 890 + case SX9311_WHOAMI_VALUE: 891 + indio_dev->name = "sx9311"; 892 + break; 893 + default: 894 + dev_err(dev, "unexpected WHOAMI response: %u", whoami); 895 + return -ENODEV; 896 + } 897 + 898 + return 0; 899 + } 900 + 901 + static int sx9310_probe(struct i2c_client *client, 902 + const struct i2c_device_id *id) 903 + { 904 + int ret; 905 + struct iio_dev *indio_dev; 906 + struct sx9310_data *data; 907 + 908 + indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 909 + if (indio_dev == NULL) 910 + return -ENOMEM; 911 + 912 + data = iio_priv(indio_dev); 913 + data->client = client; 914 + mutex_init(&data->mutex); 915 + init_completion(&data->completion); 916 + 917 + data->regmap = devm_regmap_init_i2c(client, &sx9310_regmap_config); 918 + if (IS_ERR(data->regmap)) 919 + return PTR_ERR(data->regmap); 920 + 921 + ret = regmap_read(data->regmap, SX9310_REG_WHOAMI, &data->whoami); 922 + if (ret < 0) { 923 + dev_err(&client->dev, "error in reading WHOAMI register: %d", 924 + ret); 925 + return ret; 926 + } 927 + 928 + ret = sx9310_set_indio_dev_name(&client->dev, indio_dev, id, 929 + data->whoami); 930 + if (ret < 0) 931 + return ret; 932 + 933 + ACPI_COMPANION_SET(&indio_dev->dev, ACPI_COMPANION(&client->dev)); 934 + indio_dev->dev.parent = &client->dev; 935 + indio_dev->channels = sx9310_channels; 936 + indio_dev->num_channels = ARRAY_SIZE(sx9310_channels); 937 + indio_dev->info = &sx9310_info; 938 + indio_dev->modes = INDIO_DIRECT_MODE; 939 + i2c_set_clientdata(client, indio_dev); 940 + 941 + ret = sx9310_init_device(indio_dev); 942 + if (ret < 0) 943 + return ret; 944 + 945 + if (client->irq) { 946 + ret = devm_request_threaded_irq(&client->dev, client->irq, 947 + sx9310_irq_handler, 948 + sx9310_irq_thread_handler, 949 + IRQF_TRIGGER_LOW | IRQF_ONESHOT, 950 + "sx9310_event", indio_dev); 951 + if (ret < 0) 952 + return ret; 953 + 954 + data->trig = 955 + devm_iio_trigger_alloc(&client->dev, "%s-dev%d", 956 + indio_dev->name, indio_dev->id); 957 + if (!data->trig) 958 + return -ENOMEM; 959 + 960 + data->trig->dev.parent = &client->dev; 961 + data->trig->ops = &sx9310_trigger_ops; 962 + iio_trigger_set_drvdata(data->trig, indio_dev); 963 + 964 + ret = devm_iio_trigger_register(&client->dev, data->trig); 965 + if (ret) 966 + return ret; 967 + } 968 + 969 + ret = devm_iio_triggered_buffer_setup(&client->dev, indio_dev, 970 + iio_pollfunc_store_time, 971 + sx9310_trigger_handler, 972 + &sx9310_buffer_setup_ops); 973 + if (ret < 0) 974 + return ret; 975 + 976 + return devm_iio_device_register(&client->dev, indio_dev); 977 + } 978 + 979 + static int __maybe_unused sx9310_suspend(struct device *dev) 980 + { 981 + struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 982 + struct sx9310_data *data = iio_priv(indio_dev); 983 + u8 ctrl0; 984 + int ret; 985 + 986 + disable_irq_nosync(data->client->irq); 987 + 988 + mutex_lock(&data->mutex); 989 + ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, 990 + &data->suspend_ctrl0); 991 + 992 + if (ret) 993 + goto out; 994 + 995 + ctrl0 = data->suspend_ctrl0 & ~SX9310_REG_PROX_CTRL0_EN_MASK; 996 + ret = regmap_write(data->regmap, SX9310_REG_PROX_CTRL0, ctrl0); 997 + if (ret) 998 + goto out; 999 + 1000 + ret = regmap_write(data->regmap, SX9310_REG_PAUSE, 0); 1001 + 1002 + out: 1003 + mutex_unlock(&data->mutex); 1004 + return ret; 1005 + } 1006 + 1007 + static int __maybe_unused sx9310_resume(struct device *dev) 1008 + { 1009 + struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1010 + struct sx9310_data *data = iio_priv(indio_dev); 1011 + int ret; 1012 + 1013 + mutex_lock(&data->mutex); 1014 + ret = regmap_write(data->regmap, SX9310_REG_PAUSE, 1); 1015 + if (ret) 1016 + goto out; 1017 + 1018 + ret = regmap_write(data->regmap, SX9310_REG_PROX_CTRL0, 1019 + data->suspend_ctrl0); 1020 + 1021 + out: 1022 + mutex_unlock(&data->mutex); 1023 + 1024 + enable_irq(data->client->irq); 1025 + 1026 + return ret; 1027 + } 1028 + 1029 + static const struct dev_pm_ops sx9310_pm_ops = { 1030 + SET_SYSTEM_SLEEP_PM_OPS(sx9310_suspend, sx9310_resume) 1031 + }; 1032 + 1033 + static const struct acpi_device_id sx9310_acpi_match[] = { 1034 + { "STH9310", SX9310_WHOAMI_VALUE }, 1035 + { "STH9311", SX9311_WHOAMI_VALUE }, 1036 + {}, 1037 + }; 1038 + MODULE_DEVICE_TABLE(acpi, sx9310_acpi_match); 1039 + 1040 + static const struct of_device_id sx9310_of_match[] = { 1041 + { .compatible = "semtech,sx9310" }, 1042 + { .compatible = "semtech,sx9311" }, 1043 + {}, 1044 + }; 1045 + MODULE_DEVICE_TABLE(of, sx9310_of_match); 1046 + 1047 + static const struct i2c_device_id sx9310_id[] = { 1048 + { "sx9310", SX9310_WHOAMI_VALUE }, 1049 + { "sx9311", SX9311_WHOAMI_VALUE }, 1050 + {}, 1051 + }; 1052 + MODULE_DEVICE_TABLE(i2c, sx9310_id); 1053 + 1054 + static struct i2c_driver sx9310_driver = { 1055 + .driver = { 1056 + .name = "sx9310", 1057 + .acpi_match_table = ACPI_PTR(sx9310_acpi_match), 1058 + .of_match_table = of_match_ptr(sx9310_of_match), 1059 + .pm = &sx9310_pm_ops, 1060 + }, 1061 + .probe = sx9310_probe, 1062 + .id_table = sx9310_id, 1063 + }; 1064 + module_i2c_driver(sx9310_driver); 1065 + 1066 + MODULE_AUTHOR("Gwendal Grignou <gwendal@chromium.org>"); 1067 + MODULE_AUTHOR("Daniel Campello <campello@chromium.org>"); 1068 + MODULE_DESCRIPTION("Driver for Semtech SX9310/SX9311 proximity sensor"); 1069 + MODULE_LICENSE("GPL v2");
+2 -2
drivers/iio/temperature/ltc2983.c
··· 390 390 * For custom steinhart, the full u32 is taken. For all the others 391 391 * the MSB is discarded. 392 392 */ 393 - const u8 n_size = (is_steinhart == true) ? 4 : 3; 394 - const u8 e_size = (is_steinhart == true) ? sizeof(u32) : sizeof(u64); 393 + const u8 n_size = is_steinhart ? 4 : 3; 394 + const u8 e_size = is_steinhart ? sizeof(u32) : sizeof(u64); 395 395 396 396 n_entries = of_property_count_elems_of_size(np, propname, e_size); 397 397 /* n_entries must be an even number */
+1 -1
drivers/iio/trigger/iio-trig-hrtimer.c
··· 4 4 * 5 5 * Copyright (C) Intuitive Aerial AB 6 6 * Written by Marten Svanfeldt, marten@intuitiveaerial.com 7 - * Copyright (C) 2012, Analog Device Inc. 7 + * Copyright (C) 2012, Analog Devices Inc. 8 8 * Author: Lars-Peter Clausen <lars@metafoo.de> 9 9 * Copyright (C) 2015, Intel Corporation 10 10 */
+1 -1
drivers/staging/iio/Documentation/overview.txt
··· 34 34 fifo / ring buffers on the sensor chip. These greatly reduce the load 35 35 on the host CPU by buffering relatively large numbers of data samples 36 36 based on an internal sampling clock. Examples include VTI SCA3000 37 - series and Analog Device ADXL345 accelerometers. Each buffer supports 37 + series and Analog Devices ADXL345 accelerometers. Each buffer supports 38 38 polling to establish when data is available. 39 39 40 40 * Trigger and software buffer support. In many data analysis
+5 -1
include/linux/fpga/adi-axi-common.h
··· 11 11 #ifndef ADI_AXI_COMMON_H_ 12 12 #define ADI_AXI_COMMON_H_ 13 13 14 - #define ADI_AXI_REG_VERSION 0x0000 14 + #define ADI_AXI_REG_VERSION 0x0000 15 15 16 16 #define ADI_AXI_PCORE_VER(major, minor, patch) \ 17 17 (((major) << 16) | ((minor) << 8) | (patch)) 18 + 19 + #define ADI_AXI_PCORE_VER_MAJOR(version) (((version) >> 16) & 0xff) 20 + #define ADI_AXI_PCORE_VER_MINOR(version) (((version) >> 8) & 0xff) 21 + #define ADI_AXI_PCORE_VER_PATCH(version) ((version) & 0xff) 18 22 19 23 #endif /* ADI_AXI_COMMON_H_ */
-58
include/linux/iio/adc/ad_sigma_delta.h
··· 133 133 134 134 int ad_sd_validate_trigger(struct iio_dev *indio_dev, struct iio_trigger *trig); 135 135 136 - #define __AD_SD_CHANNEL(_si, _channel1, _channel2, _address, _bits, \ 137 - _storagebits, _shift, _extend_name, _type, _mask_all) \ 138 - { \ 139 - .type = (_type), \ 140 - .differential = (_channel2 == -1 ? 0 : 1), \ 141 - .indexed = 1, \ 142 - .channel = (_channel1), \ 143 - .channel2 = (_channel2), \ 144 - .address = (_address), \ 145 - .extend_name = (_extend_name), \ 146 - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 147 - BIT(IIO_CHAN_INFO_OFFSET), \ 148 - .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 149 - .info_mask_shared_by_all = _mask_all, \ 150 - .scan_index = (_si), \ 151 - .scan_type = { \ 152 - .sign = 'u', \ 153 - .realbits = (_bits), \ 154 - .storagebits = (_storagebits), \ 155 - .shift = (_shift), \ 156 - .endianness = IIO_BE, \ 157 - }, \ 158 - } 159 - 160 - #define AD_SD_DIFF_CHANNEL(_si, _channel1, _channel2, _address, _bits, \ 161 - _storagebits, _shift) \ 162 - __AD_SD_CHANNEL(_si, _channel1, _channel2, _address, _bits, \ 163 - _storagebits, _shift, NULL, IIO_VOLTAGE, \ 164 - BIT(IIO_CHAN_INFO_SAMP_FREQ)) 165 - 166 - #define AD_SD_SHORTED_CHANNEL(_si, _channel, _address, _bits, \ 167 - _storagebits, _shift) \ 168 - __AD_SD_CHANNEL(_si, _channel, _channel, _address, _bits, \ 169 - _storagebits, _shift, "shorted", IIO_VOLTAGE, \ 170 - BIT(IIO_CHAN_INFO_SAMP_FREQ)) 171 - 172 - #define AD_SD_CHANNEL(_si, _channel, _address, _bits, \ 173 - _storagebits, _shift) \ 174 - __AD_SD_CHANNEL(_si, _channel, -1, _address, _bits, \ 175 - _storagebits, _shift, NULL, IIO_VOLTAGE, \ 176 - BIT(IIO_CHAN_INFO_SAMP_FREQ)) 177 - 178 - #define AD_SD_CHANNEL_NO_SAMP_FREQ(_si, _channel, _address, _bits, \ 179 - _storagebits, _shift) \ 180 - __AD_SD_CHANNEL(_si, _channel, -1, _address, _bits, \ 181 - _storagebits, _shift, NULL, IIO_VOLTAGE, 0) 182 - 183 - #define AD_SD_TEMP_CHANNEL(_si, _address, _bits, _storagebits, _shift) \ 184 - __AD_SD_CHANNEL(_si, 0, -1, _address, _bits, \ 185 - _storagebits, _shift, NULL, IIO_TEMP, \ 186 - BIT(IIO_CHAN_INFO_SAMP_FREQ)) 187 - 188 - #define AD_SD_SUPPLY_CHANNEL(_si, _channel, _address, _bits, _storagebits, \ 189 - _shift) \ 190 - __AD_SD_CHANNEL(_si, _channel, -1, _address, _bits, \ 191 - _storagebits, _shift, "supply", IIO_VOLTAGE, \ 192 - BIT(IIO_CHAN_INFO_SAMP_FREQ)) 193 - 194 136 #endif
+64
include/linux/iio/adc/adi-axi-adc.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0 */ 2 + /* 3 + * Analog Devices Generic AXI ADC IP core driver/library 4 + * Link: https://wiki.analog.com/resources/fpga/docs/axi_adc_ip 5 + * 6 + * Copyright 2012-2020 Analog Devices Inc. 7 + */ 8 + #ifndef __ADI_AXI_ADC_H__ 9 + #define __ADI_AXI_ADC_H__ 10 + 11 + struct device; 12 + struct iio_chan_spec; 13 + 14 + /** 15 + * struct adi_axi_adc_chip_info - Chip specific information 16 + * @name Chip name 17 + * @id Chip ID (usually product ID) 18 + * @channels Channel specifications of type @struct axi_adc_chan_spec 19 + * @num_channels Number of @channels 20 + * @scale_table Supported scales by the chip; tuples of 2 ints 21 + * @num_scales Number of scales in the table 22 + * @max_rate Maximum sampling rate supported by the device 23 + */ 24 + struct adi_axi_adc_chip_info { 25 + const char *name; 26 + unsigned int id; 27 + 28 + const struct iio_chan_spec *channels; 29 + unsigned int num_channels; 30 + 31 + const unsigned int (*scale_table)[2]; 32 + int num_scales; 33 + 34 + unsigned long max_rate; 35 + }; 36 + 37 + /** 38 + * struct adi_axi_adc_conv - data of the ADC attached to the AXI ADC 39 + * @chip_info chip info details for the client ADC 40 + * @preenable_setup op to run in the client before enabling the AXI ADC 41 + * @reg_access IIO debugfs_reg_access hook for the client ADC 42 + * @read_raw IIO read_raw hook for the client ADC 43 + * @write_raw IIO write_raw hook for the client ADC 44 + */ 45 + struct adi_axi_adc_conv { 46 + const struct adi_axi_adc_chip_info *chip_info; 47 + 48 + int (*preenable_setup)(struct adi_axi_adc_conv *conv); 49 + int (*reg_access)(struct adi_axi_adc_conv *conv, unsigned int reg, 50 + unsigned int writeval, unsigned int *readval); 51 + int (*read_raw)(struct adi_axi_adc_conv *conv, 52 + struct iio_chan_spec const *chan, 53 + int *val, int *val2, long mask); 54 + int (*write_raw)(struct adi_axi_adc_conv *conv, 55 + struct iio_chan_spec const *chan, 56 + int val, int val2, long mask); 57 + }; 58 + 59 + struct adi_axi_adc_conv *devm_adi_axi_adc_conv_register(struct device *dev, 60 + size_t sizeof_priv); 61 + 62 + void *adi_axi_adc_conv_priv(struct adi_axi_adc_conv *conv); 63 + 64 + #endif
+1 -1
include/linux/iio/buffer-dma.h
··· 11 11 #include <linux/kref.h> 12 12 #include <linux/spinlock.h> 13 13 #include <linux/mutex.h> 14 - #include <linux/iio/buffer.h> 14 + #include <linux/iio/buffer_impl.h> 15 15 16 16 struct iio_dma_buffer_queue; 17 17 struct iio_dma_buffer_ops;
+3
include/linux/iio/buffer-dmaengine.h
··· 14 14 const char *channel); 15 15 void iio_dmaengine_buffer_free(struct iio_buffer *buffer); 16 16 17 + struct iio_buffer *devm_iio_dmaengine_buffer_alloc(struct device *dev, 18 + const char *channel); 19 + 17 20 #endif
-9
include/linux/iio/buffer_impl.h
··· 94 94 unsigned int watermark; 95 95 96 96 /* private: */ 97 - /* 98 - * @scan_el_attrs: Control of scan elements if that scan mode 99 - * control method is used. 100 - */ 101 - struct attribute_group *scan_el_attrs; 102 - 103 97 /* @scan_timestamp: Does the scan mode include a timestamp. */ 104 98 bool scan_timestamp; 105 99 ··· 108 114 * created from the iio_chan_info array. 109 115 */ 110 116 struct attribute_group scan_el_group; 111 - 112 - /* @stufftoread: Flag to indicate new data. */ 113 - bool stufftoread; 114 117 115 118 /* @attrs: Standard attributes of the buffer. */ 116 119 const struct attribute **attrs;
-18
include/linux/iio/consumer.h
··· 64 64 struct iio_channel *devm_iio_channel_get(struct device *dev, 65 65 const char *consumer_channel); 66 66 /** 67 - * devm_iio_channel_release() - Resource managed version of 68 - * iio_channel_release(). 69 - * @dev: Pointer to consumer device for which resource 70 - * is allocared. 71 - * @chan: The channel to be released. 72 - */ 73 - void devm_iio_channel_release(struct device *dev, struct iio_channel *chan); 74 - 75 - /** 76 67 * iio_channel_get_all() - get all channels associated with a client 77 68 * @dev: Pointer to consumer device. 78 69 * ··· 96 105 * unbounded. 97 106 */ 98 107 struct iio_channel *devm_iio_channel_get_all(struct device *dev); 99 - 100 - /** 101 - * devm_iio_channel_release_all() - Resource managed version of 102 - * iio_channel_release_all(). 103 - * @dev: Pointer to consumer device for which resource 104 - * is allocared. 105 - * @chan: Array channel to be released. 106 - */ 107 - void devm_iio_channel_release_all(struct device *dev, struct iio_channel *chan); 108 108 109 109 struct iio_cb_buffer; 110 110 /**
-1
include/linux/iio/hw-consumer.h
··· 14 14 struct iio_hw_consumer *iio_hw_consumer_alloc(struct device *dev); 15 15 void iio_hw_consumer_free(struct iio_hw_consumer *hwc); 16 16 struct iio_hw_consumer *devm_iio_hw_consumer_alloc(struct device *dev); 17 - void devm_iio_hw_consumer_free(struct device *dev, struct iio_hw_consumer *hwc); 18 17 int iio_hw_consumer_enable(struct iio_hw_consumer *hwc); 19 18 void iio_hw_consumer_disable(struct iio_hw_consumer *hwc); 20 19
+1 -9
include/linux/iio/iio.h
··· 492 492 * @buffer: [DRIVER] any buffer present 493 493 * @buffer_list: [INTERN] list of all buffers currently attached 494 494 * @scan_bytes: [INTERN] num bytes captured to be fed to buffer demux 495 - * @mlock: [DRIVER] lock used to prevent simultaneous device state 495 + * @mlock: [INTERN] lock used to prevent simultaneous device state 496 496 * changes 497 497 * @available_scan_masks: [DRIVER] optional array of allowed bitmasks 498 498 * @masklength: [INTERN] the length of the mask established from ··· 593 593 * calls iio_device_register() internally. Refer to that function for more 594 594 * information. 595 595 * 596 - * If an iio_dev registered with this function needs to be unregistered 597 - * separately, devm_iio_device_unregister() must be used. 598 - * 599 596 * RETURNS: 600 597 * 0 on success, negative error number on failure. 601 598 */ ··· 600 603 __devm_iio_device_register((dev), (indio_dev), THIS_MODULE); 601 604 int __devm_iio_device_register(struct device *dev, struct iio_dev *indio_dev, 602 605 struct module *this_mod); 603 - void devm_iio_device_unregister(struct device *dev, struct iio_dev *indio_dev); 604 606 int iio_push_event(struct iio_dev *indio_dev, u64 ev_code, s64 timestamp); 605 607 int iio_device_claim_direct_mode(struct iio_dev *indio_dev); 606 608 void iio_device_release_direct_mode(struct iio_dev *indio_dev); ··· 690 694 } 691 695 692 696 void iio_device_free(struct iio_dev *indio_dev); 693 - int devm_iio_device_match(struct device *dev, void *res, void *data); 694 697 struct iio_dev *devm_iio_device_alloc(struct device *dev, int sizeof_priv); 695 - void devm_iio_device_free(struct device *dev, struct iio_dev *indio_dev); 696 698 struct iio_trigger *devm_iio_trigger_alloc(struct device *dev, 697 699 const char *fmt, ...); 698 - void devm_iio_trigger_free(struct device *dev, struct iio_trigger *iio_trig); 699 - 700 700 /** 701 701 * iio_buffer_enabled() - helper function to test if the buffer is enabled 702 702 * @indio_dev: IIO device structure for device
-1
include/linux/iio/kfifo_buf.h
··· 9 9 void iio_kfifo_free(struct iio_buffer *r); 10 10 11 11 struct iio_buffer *devm_iio_kfifo_allocate(struct device *dev); 12 - void devm_iio_kfifo_free(struct device *dev, struct iio_buffer *r); 13 12 14 13 #endif
-3
include/linux/iio/trigger.h
··· 141 141 **/ 142 142 void iio_trigger_unregister(struct iio_trigger *trig_info); 143 143 144 - void devm_iio_trigger_unregister(struct device *dev, 145 - struct iio_trigger *trig_info); 146 - 147 144 /** 148 145 * iio_trigger_set_immutable() - set an immutable trigger on destination 149 146 *
-2
include/linux/iio/triggered_buffer.h
··· 18 18 irqreturn_t (*h)(int irq, void *p), 19 19 irqreturn_t (*thread)(int irq, void *p), 20 20 const struct iio_buffer_setup_ops *ops); 21 - void devm_iio_triggered_buffer_cleanup(struct device *dev, 22 - struct iio_dev *indio_dev); 23 21 24 22 #endif