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clk: rockchip: add more rk3188 graphics clock ids
Add ids for cif, v{d/e}pu clocks on rk3188. ACLK_CIF does get a needed
1 at it's end but that should be safe because no driver for the camera
interface has surfaced so far and the old vendor kernels for these socs
are based on linux-3.0 and still used board files then, so there really
are no previous users anywhere to be found.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+7
-2
+7
-2
include/dt-bindings/clock/rk3188-cru-common.h
+7
-2
include/dt-bindings/clock/rk3188-cru-common.h
···
68
68
#define ACLK_LCDC1 196
69
69
#define ACLK_GPU 197
70
70
#define ACLK_SMC 198
71
-
#define ACLK_CIF 199
71
+
#define ACLK_CIF1 199
72
72
#define ACLK_IPP 200
73
73
#define ACLK_RGA 201
74
74
#define ACLK_CIF0 202
75
75
#define ACLK_CPU 203
76
76
#define ACLK_PERI 204
77
+
#define ACLK_VEPU 205
78
+
#define ACLK_VDPU 206
77
79
78
80
/* pclk gates */
79
81
#define PCLK_GRF 320
···
136
134
#define HCLK_NANDC0 467
137
135
#define HCLK_CPU 468
138
136
#define HCLK_PERI 469
137
+
#define HCLK_CIF1 470
138
+
#define HCLK_VEPU 471
139
+
#define HCLK_VDPU 472
139
140
140
-
#define CLK_NR_CLKS (HCLK_PERI + 1)
141
+
#define CLK_NR_CLKS (HCLK_VDPU + 1)
141
142
142
143
/* soft-reset indices */
143
144
#define SRST_MCORE 2