tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Blackfin: push gpio (port) defines into common headers
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+282
-601
+25
arch/blackfin/include/mach-common/ports-a.h
+25
arch/blackfin/include/mach-common/ports-a.h
···
1
+
/*
2
+
* Port A Masks
3
+
*/
4
+
5
+
#ifndef __BFIN_PERIPHERAL_PORT_A__
6
+
#define __BFIN_PERIPHERAL_PORT_A__
7
+
8
+
#define PA0 (1 << 0)
9
+
#define PA1 (1 << 1)
10
+
#define PA2 (1 << 2)
11
+
#define PA3 (1 << 3)
12
+
#define PA4 (1 << 4)
13
+
#define PA5 (1 << 5)
14
+
#define PA6 (1 << 6)
15
+
#define PA7 (1 << 7)
16
+
#define PA8 (1 << 8)
17
+
#define PA9 (1 << 9)
18
+
#define PA10 (1 << 10)
19
+
#define PA11 (1 << 11)
20
+
#define PA12 (1 << 12)
21
+
#define PA13 (1 << 13)
22
+
#define PA14 (1 << 14)
23
+
#define PA15 (1 << 15)
24
+
25
+
#endif
+25
arch/blackfin/include/mach-common/ports-b.h
+25
arch/blackfin/include/mach-common/ports-b.h
···
1
+
/*
2
+
* Port B Masks
3
+
*/
4
+
5
+
#ifndef __BFIN_PERIPHERAL_PORT_B__
6
+
#define __BFIN_PERIPHERAL_PORT_B__
7
+
8
+
#define PB0 (1 << 0)
9
+
#define PB1 (1 << 1)
10
+
#define PB2 (1 << 2)
11
+
#define PB3 (1 << 3)
12
+
#define PB4 (1 << 4)
13
+
#define PB5 (1 << 5)
14
+
#define PB6 (1 << 6)
15
+
#define PB7 (1 << 7)
16
+
#define PB8 (1 << 8)
17
+
#define PB9 (1 << 9)
18
+
#define PB10 (1 << 10)
19
+
#define PB11 (1 << 11)
20
+
#define PB12 (1 << 12)
21
+
#define PB13 (1 << 13)
22
+
#define PB14 (1 << 14)
23
+
#define PB15 (1 << 15)
24
+
25
+
#endif
+25
arch/blackfin/include/mach-common/ports-c.h
+25
arch/blackfin/include/mach-common/ports-c.h
···
1
+
/*
2
+
* Port C Masks
3
+
*/
4
+
5
+
#ifndef __BFIN_PERIPHERAL_PORT_C__
6
+
#define __BFIN_PERIPHERAL_PORT_C__
7
+
8
+
#define PC0 (1 << 0)
9
+
#define PC1 (1 << 1)
10
+
#define PC2 (1 << 2)
11
+
#define PC3 (1 << 3)
12
+
#define PC4 (1 << 4)
13
+
#define PC5 (1 << 5)
14
+
#define PC6 (1 << 6)
15
+
#define PC7 (1 << 7)
16
+
#define PC8 (1 << 8)
17
+
#define PC9 (1 << 9)
18
+
#define PC10 (1 << 10)
19
+
#define PC11 (1 << 11)
20
+
#define PC12 (1 << 12)
21
+
#define PC13 (1 << 13)
22
+
#define PC14 (1 << 14)
23
+
#define PC15 (1 << 15)
24
+
25
+
#endif
+25
arch/blackfin/include/mach-common/ports-d.h
+25
arch/blackfin/include/mach-common/ports-d.h
···
1
+
/*
2
+
* Port D Masks
3
+
*/
4
+
5
+
#ifndef __BFIN_PERIPHERAL_PORT_D__
6
+
#define __BFIN_PERIPHERAL_PORT_D__
7
+
8
+
#define PD0 (1 << 0)
9
+
#define PD1 (1 << 1)
10
+
#define PD2 (1 << 2)
11
+
#define PD3 (1 << 3)
12
+
#define PD4 (1 << 4)
13
+
#define PD5 (1 << 5)
14
+
#define PD6 (1 << 6)
15
+
#define PD7 (1 << 7)
16
+
#define PD8 (1 << 8)
17
+
#define PD9 (1 << 9)
18
+
#define PD10 (1 << 10)
19
+
#define PD11 (1 << 11)
20
+
#define PD12 (1 << 12)
21
+
#define PD13 (1 << 13)
22
+
#define PD14 (1 << 14)
23
+
#define PD15 (1 << 15)
24
+
25
+
#endif
+25
arch/blackfin/include/mach-common/ports-e.h
+25
arch/blackfin/include/mach-common/ports-e.h
···
1
+
/*
2
+
* Port E Masks
3
+
*/
4
+
5
+
#ifndef __BFIN_PERIPHERAL_PORT_E__
6
+
#define __BFIN_PERIPHERAL_PORT_E__
7
+
8
+
#define PE0 (1 << 0)
9
+
#define PE1 (1 << 1)
10
+
#define PE2 (1 << 2)
11
+
#define PE3 (1 << 3)
12
+
#define PE4 (1 << 4)
13
+
#define PE5 (1 << 5)
14
+
#define PE6 (1 << 6)
15
+
#define PE7 (1 << 7)
16
+
#define PE8 (1 << 8)
17
+
#define PE9 (1 << 9)
18
+
#define PE10 (1 << 10)
19
+
#define PE11 (1 << 11)
20
+
#define PE12 (1 << 12)
21
+
#define PE13 (1 << 13)
22
+
#define PE14 (1 << 14)
23
+
#define PE15 (1 << 15)
24
+
25
+
#endif
+25
arch/blackfin/include/mach-common/ports-f.h
+25
arch/blackfin/include/mach-common/ports-f.h
···
1
+
/*
2
+
* Port F Masks
3
+
*/
4
+
5
+
#ifndef __BFIN_PERIPHERAL_PORT_F__
6
+
#define __BFIN_PERIPHERAL_PORT_F__
7
+
8
+
#define PF0 (1 << 0)
9
+
#define PF1 (1 << 1)
10
+
#define PF2 (1 << 2)
11
+
#define PF3 (1 << 3)
12
+
#define PF4 (1 << 4)
13
+
#define PF5 (1 << 5)
14
+
#define PF6 (1 << 6)
15
+
#define PF7 (1 << 7)
16
+
#define PF8 (1 << 8)
17
+
#define PF9 (1 << 9)
18
+
#define PF10 (1 << 10)
19
+
#define PF11 (1 << 11)
20
+
#define PF12 (1 << 12)
21
+
#define PF13 (1 << 13)
22
+
#define PF14 (1 << 14)
23
+
#define PF15 (1 << 15)
24
+
25
+
#endif
+25
arch/blackfin/include/mach-common/ports-g.h
+25
arch/blackfin/include/mach-common/ports-g.h
···
1
+
/*
2
+
* Port G Masks
3
+
*/
4
+
5
+
#ifndef __BFIN_PERIPHERAL_PORT_G__
6
+
#define __BFIN_PERIPHERAL_PORT_G__
7
+
8
+
#define PG0 (1 << 0)
9
+
#define PG1 (1 << 1)
10
+
#define PG2 (1 << 2)
11
+
#define PG3 (1 << 3)
12
+
#define PG4 (1 << 4)
13
+
#define PG5 (1 << 5)
14
+
#define PG6 (1 << 6)
15
+
#define PG7 (1 << 7)
16
+
#define PG8 (1 << 8)
17
+
#define PG9 (1 << 9)
18
+
#define PG10 (1 << 10)
19
+
#define PG11 (1 << 11)
20
+
#define PG12 (1 << 12)
21
+
#define PG13 (1 << 13)
22
+
#define PG14 (1 << 14)
23
+
#define PG15 (1 << 15)
24
+
25
+
#endif
+25
arch/blackfin/include/mach-common/ports-h.h
+25
arch/blackfin/include/mach-common/ports-h.h
···
1
+
/*
2
+
* Port H Masks
3
+
*/
4
+
5
+
#ifndef __BFIN_PERIPHERAL_PORT_H__
6
+
#define __BFIN_PERIPHERAL_PORT_H__
7
+
8
+
#define PH0 (1 << 0)
9
+
#define PH1 (1 << 1)
10
+
#define PH2 (1 << 2)
11
+
#define PH3 (1 << 3)
12
+
#define PH4 (1 << 4)
13
+
#define PH5 (1 << 5)
14
+
#define PH6 (1 << 6)
15
+
#define PH7 (1 << 7)
16
+
#define PH8 (1 << 8)
17
+
#define PH9 (1 << 9)
18
+
#define PH10 (1 << 10)
19
+
#define PH11 (1 << 11)
20
+
#define PH12 (1 << 12)
21
+
#define PH13 (1 << 13)
22
+
#define PH14 (1 << 14)
23
+
#define PH15 (1 << 15)
24
+
25
+
#endif
+25
arch/blackfin/include/mach-common/ports-i.h
+25
arch/blackfin/include/mach-common/ports-i.h
···
1
+
/*
2
+
* Port I Masks
3
+
*/
4
+
5
+
#ifndef __BFIN_PERIPHERAL_PORT_I__
6
+
#define __BFIN_PERIPHERAL_PORT_I__
7
+
8
+
#define PI0 (1 << 0)
9
+
#define PI1 (1 << 1)
10
+
#define PI2 (1 << 2)
11
+
#define PI3 (1 << 3)
12
+
#define PI4 (1 << 4)
13
+
#define PI5 (1 << 5)
14
+
#define PI6 (1 << 6)
15
+
#define PI7 (1 << 7)
16
+
#define PI8 (1 << 8)
17
+
#define PI9 (1 << 9)
18
+
#define PI10 (1 << 10)
19
+
#define PI11 (1 << 11)
20
+
#define PI12 (1 << 12)
21
+
#define PI13 (1 << 13)
22
+
#define PI14 (1 << 14)
23
+
#define PI15 (1 << 15)
24
+
25
+
#endif
+25
arch/blackfin/include/mach-common/ports-j.h
+25
arch/blackfin/include/mach-common/ports-j.h
···
1
+
/*
2
+
* Port J Masks
3
+
*/
4
+
5
+
#ifndef __BFIN_PERIPHERAL_PORT_J__
6
+
#define __BFIN_PERIPHERAL_PORT_J__
7
+
8
+
#define PJ0 (1 << 0)
9
+
#define PJ1 (1 << 1)
10
+
#define PJ2 (1 << 2)
11
+
#define PJ3 (1 << 3)
12
+
#define PJ4 (1 << 4)
13
+
#define PJ5 (1 << 5)
14
+
#define PJ6 (1 << 6)
15
+
#define PJ7 (1 << 7)
16
+
#define PJ8 (1 << 8)
17
+
#define PJ9 (1 << 9)
18
+
#define PJ10 (1 << 10)
19
+
#define PJ11 (1 << 11)
20
+
#define PJ12 (1 << 12)
21
+
#define PJ13 (1 << 13)
22
+
#define PJ14 (1 << 14)
23
+
#define PJ15 (1 << 15)
24
+
25
+
#endif
-49
arch/blackfin/mach-bf518/include/mach/defBF51x_base.h
-49
arch/blackfin/mach-bf518/include/mach/defBF51x_base.h
···
770
770
#define EMU_RUN 0x0200 /* Emulation Behavior Select */
771
771
#define ERR_TYP 0xC000 /* Error Type */
772
772
773
-
774
-
/* ****************** GPIO PORTS F, G, H MASKS ***********************/
775
-
/* General Purpose IO (0xFFC00700 - 0xFFC007FF) Masks */
776
-
/* Port F Masks */
777
-
#define PF0 0x0001
778
-
#define PF1 0x0002
779
-
#define PF2 0x0004
780
-
#define PF3 0x0008
781
-
#define PF4 0x0010
782
-
#define PF5 0x0020
783
-
#define PF6 0x0040
784
-
#define PF7 0x0080
785
-
#define PF8 0x0100
786
-
#define PF9 0x0200
787
-
#define PF10 0x0400
788
-
#define PF11 0x0800
789
-
#define PF12 0x1000
790
-
#define PF13 0x2000
791
-
#define PF14 0x4000
792
-
#define PF15 0x8000
793
-
794
-
/* Port G Masks */
795
-
#define PG0 0x0001
796
-
#define PG1 0x0002
797
-
#define PG2 0x0004
798
-
#define PG3 0x0008
799
-
#define PG4 0x0010
800
-
#define PG5 0x0020
801
-
#define PG6 0x0040
802
-
#define PG7 0x0080
803
-
#define PG8 0x0100
804
-
#define PG9 0x0200
805
-
#define PG10 0x0400
806
-
#define PG11 0x0800
807
-
#define PG12 0x1000
808
-
#define PG13 0x2000
809
-
#define PG14 0x4000
810
-
#define PG15 0x8000
811
-
812
-
/* Port H Masks */
813
-
#define PH0 0x0001
814
-
#define PH1 0x0002
815
-
#define PH2 0x0004
816
-
#define PH3 0x0008
817
-
#define PH4 0x0010
818
-
#define PH5 0x0020
819
-
#define PH6 0x0040
820
-
#define PH7 0x0080
821
-
822
773
/* ********************* ASYNCHRONOUS MEMORY CONTROLLER MASKS *************************/
823
774
/* EBIU_AMGCTL Masks */
824
775
#define AMCKEN 0x0001 /* Enable CLKOUT */
+4
arch/blackfin/mach-bf518/include/mach/gpio.h
+4
arch/blackfin/mach-bf518/include/mach/gpio.h
-57
arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
-57
arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
···
771
771
#define EMU_RUN 0x0200 /* Emulation Behavior Select */
772
772
#define ERR_TYP 0xC000 /* Error Type */
773
773
774
-
775
-
/* ****************** GPIO PORTS F, G, H MASKS ***********************/
776
-
/* General Purpose IO (0xFFC00700 - 0xFFC007FF) Masks */
777
-
/* Port F Masks */
778
-
#define PF0 0x0001
779
-
#define PF1 0x0002
780
-
#define PF2 0x0004
781
-
#define PF3 0x0008
782
-
#define PF4 0x0010
783
-
#define PF5 0x0020
784
-
#define PF6 0x0040
785
-
#define PF7 0x0080
786
-
#define PF8 0x0100
787
-
#define PF9 0x0200
788
-
#define PF10 0x0400
789
-
#define PF11 0x0800
790
-
#define PF12 0x1000
791
-
#define PF13 0x2000
792
-
#define PF14 0x4000
793
-
#define PF15 0x8000
794
-
795
-
/* Port G Masks */
796
-
#define PG0 0x0001
797
-
#define PG1 0x0002
798
-
#define PG2 0x0004
799
-
#define PG3 0x0008
800
-
#define PG4 0x0010
801
-
#define PG5 0x0020
802
-
#define PG6 0x0040
803
-
#define PG7 0x0080
804
-
#define PG8 0x0100
805
-
#define PG9 0x0200
806
-
#define PG10 0x0400
807
-
#define PG11 0x0800
808
-
#define PG12 0x1000
809
-
#define PG13 0x2000
810
-
#define PG14 0x4000
811
-
#define PG15 0x8000
812
-
813
-
/* Port H Masks */
814
-
#define PH0 0x0001
815
-
#define PH1 0x0002
816
-
#define PH2 0x0004
817
-
#define PH3 0x0008
818
-
#define PH4 0x0010
819
-
#define PH5 0x0020
820
-
#define PH6 0x0040
821
-
#define PH7 0x0080
822
-
#define PH8 0x0100
823
-
#define PH9 0x0200
824
-
#define PH10 0x0400
825
-
#define PH11 0x0800
826
-
#define PH12 0x1000
827
-
#define PH13 0x2000
828
-
#define PH14 0x4000
829
-
#define PH15 0x8000
830
-
831
774
/* ********************* ASYNCHRONOUS MEMORY CONTROLLER MASKS *************************/
832
775
/* EBIU_AMGCTL Masks */
833
776
#define AMCKEN 0x0001 /* Enable CLKOUT */
+4
arch/blackfin/mach-bf527/include/mach/gpio.h
+4
arch/blackfin/mach-bf527/include/mach/gpio.h
-38
arch/blackfin/mach-bf533/include/mach/defBF532.h
-38
arch/blackfin/mach-bf533/include/mach/defBF532.h
···
562
562
#define ERR_TYP_P0 0x0E
563
563
#define ERR_TYP_P1 0x0F
564
564
565
-
/*/ ****************** PROGRAMMABLE FLAG MASKS ********************* */
566
-
567
-
/* General Purpose IO (0xFFC00700 - 0xFFC007FF) Masks */
568
-
#define PF0 0x0001
569
-
#define PF1 0x0002
570
-
#define PF2 0x0004
571
-
#define PF3 0x0008
572
-
#define PF4 0x0010
573
-
#define PF5 0x0020
574
-
#define PF6 0x0040
575
-
#define PF7 0x0080
576
-
#define PF8 0x0100
577
-
#define PF9 0x0200
578
-
#define PF10 0x0400
579
-
#define PF11 0x0800
580
-
#define PF12 0x1000
581
-
#define PF13 0x2000
582
-
#define PF14 0x4000
583
-
#define PF15 0x8000
584
-
585
-
/* General Purpose IO (0xFFC00700 - 0xFFC007FF) BIT POSITIONS */
586
-
#define PF0_P 0
587
-
#define PF1_P 1
588
-
#define PF2_P 2
589
-
#define PF3_P 3
590
-
#define PF4_P 4
591
-
#define PF5_P 5
592
-
#define PF6_P 6
593
-
#define PF7_P 7
594
-
#define PF8_P 8
595
-
#define PF9_P 9
596
-
#define PF10_P 10
597
-
#define PF11_P 11
598
-
#define PF12_P 12
599
-
#define PF13_P 13
600
-
#define PF14_P 14
601
-
#define PF15_P 15
602
-
603
565
/* ********************* ASYNCHRONOUS MEMORY CONTROLLER MASKS ************* */
604
566
605
567
/* AMGCTL Masks */
+2
arch/blackfin/mach-bf533/include/mach/gpio.h
+2
arch/blackfin/mach-bf533/include/mach/gpio.h
-56
arch/blackfin/mach-bf537/include/mach/defBF534.h
-56
arch/blackfin/mach-bf537/include/mach/defBF534.h
···
1095
1095
#define EMU_RUN 0x0200 /* Emulation Behavior Select */
1096
1096
#define ERR_TYP 0xC000 /* Error Type */
1097
1097
1098
-
/* ****************** GPIO PORTS F, G, H MASKS ***********************/
1099
-
/* General Purpose IO (0xFFC00700 - 0xFFC007FF) Masks */
1100
-
/* Port F Masks */
1101
-
#define PF0 0x0001
1102
-
#define PF1 0x0002
1103
-
#define PF2 0x0004
1104
-
#define PF3 0x0008
1105
-
#define PF4 0x0010
1106
-
#define PF5 0x0020
1107
-
#define PF6 0x0040
1108
-
#define PF7 0x0080
1109
-
#define PF8 0x0100
1110
-
#define PF9 0x0200
1111
-
#define PF10 0x0400
1112
-
#define PF11 0x0800
1113
-
#define PF12 0x1000
1114
-
#define PF13 0x2000
1115
-
#define PF14 0x4000
1116
-
#define PF15 0x8000
1117
-
1118
-
/* Port G Masks */
1119
-
#define PG0 0x0001
1120
-
#define PG1 0x0002
1121
-
#define PG2 0x0004
1122
-
#define PG3 0x0008
1123
-
#define PG4 0x0010
1124
-
#define PG5 0x0020
1125
-
#define PG6 0x0040
1126
-
#define PG7 0x0080
1127
-
#define PG8 0x0100
1128
-
#define PG9 0x0200
1129
-
#define PG10 0x0400
1130
-
#define PG11 0x0800
1131
-
#define PG12 0x1000
1132
-
#define PG13 0x2000
1133
-
#define PG14 0x4000
1134
-
#define PG15 0x8000
1135
-
1136
-
/* Port H Masks */
1137
-
#define PH0 0x0001
1138
-
#define PH1 0x0002
1139
-
#define PH2 0x0004
1140
-
#define PH3 0x0008
1141
-
#define PH4 0x0010
1142
-
#define PH5 0x0020
1143
-
#define PH6 0x0040
1144
-
#define PH7 0x0080
1145
-
#define PH8 0x0100
1146
-
#define PH9 0x0200
1147
-
#define PH10 0x0400
1148
-
#define PH11 0x0800
1149
-
#define PH12 0x1000
1150
-
#define PH13 0x2000
1151
-
#define PH14 0x4000
1152
-
#define PH15 0x8000
1153
-
1154
1098
/* ********************* ASYNCHRONOUS MEMORY CONTROLLER MASKS *************************/
1155
1099
/* EBIU_AMGCTL Masks */
1156
1100
#define AMCKEN 0x0001 /* Enable CLKOUT */
+4
arch/blackfin/mach-bf537/include/mach/gpio.h
+4
arch/blackfin/mach-bf537/include/mach/gpio.h
-129
arch/blackfin/mach-bf538/include/mach/defBF539.h
-129
arch/blackfin/mach-bf538/include/mach/defBF539.h
···
1627
1627
#define ERR_TYP_P0 0x0E
1628
1628
#define ERR_TYP_P1 0x0F
1629
1629
1630
-
1631
-
/*/ ****************** GENERAL-PURPOSE I/O ********************* */
1632
-
/* Flag I/O (FIO_) Masks */
1633
-
#define PF0 0x0001
1634
-
#define PF1 0x0002
1635
-
#define PF2 0x0004
1636
-
#define PF3 0x0008
1637
-
#define PF4 0x0010
1638
-
#define PF5 0x0020
1639
-
#define PF6 0x0040
1640
-
#define PF7 0x0080
1641
-
#define PF8 0x0100
1642
-
#define PF9 0x0200
1643
-
#define PF10 0x0400
1644
-
#define PF11 0x0800
1645
-
#define PF12 0x1000
1646
-
#define PF13 0x2000
1647
-
#define PF14 0x4000
1648
-
#define PF15 0x8000
1649
-
1650
-
/* PORT F BIT POSITIONS */
1651
-
#define PF0_P 0x0
1652
-
#define PF1_P 0x1
1653
-
#define PF2_P 0x2
1654
-
#define PF3_P 0x3
1655
-
#define PF4_P 0x4
1656
-
#define PF5_P 0x5
1657
-
#define PF6_P 0x6
1658
-
#define PF7_P 0x7
1659
-
#define PF8_P 0x8
1660
-
#define PF9_P 0x9
1661
-
#define PF10_P 0xA
1662
-
#define PF11_P 0xB
1663
-
#define PF12_P 0xC
1664
-
#define PF13_P 0xD
1665
-
#define PF14_P 0xE
1666
-
#define PF15_P 0xF
1667
-
1668
-
1669
-
/******************* GPIO MASKS *********************/
1670
-
/* Port C Masks */
1671
-
#define PC0 0x0001
1672
-
#define PC1 0x0002
1673
-
#define PC4 0x0010
1674
-
#define PC5 0x0020
1675
-
#define PC6 0x0040
1676
-
#define PC7 0x0080
1677
-
#define PC8 0x0100
1678
-
#define PC9 0x0200
1679
-
/* Port C Bit Positions */
1680
-
#define PC0_P 0x0
1681
-
#define PC1_P 0x1
1682
-
#define PC4_P 0x4
1683
-
#define PC5_P 0x5
1684
-
#define PC6_P 0x6
1685
-
#define PC7_P 0x7
1686
-
#define PC8_P 0x8
1687
-
#define PC9_P 0x9
1688
-
1689
-
/* Port D */
1690
-
#define PD0 0x0001
1691
-
#define PD1 0x0002
1692
-
#define PD2 0x0004
1693
-
#define PD3 0x0008
1694
-
#define PD4 0x0010
1695
-
#define PD5 0x0020
1696
-
#define PD6 0x0040
1697
-
#define PD7 0x0080
1698
-
#define PD8 0x0100
1699
-
#define PD9 0x0200
1700
-
#define PD10 0x0400
1701
-
#define PD11 0x0800
1702
-
#define PD12 0x1000
1703
-
#define PD13 0x2000
1704
-
#define PD14 0x4000
1705
-
#define PD15 0x8000
1706
-
/* Port D Bit Positions */
1707
-
#define PD0_P 0x0
1708
-
#define PD1_P 0x1
1709
-
#define PD2_P 0x2
1710
-
#define PD3_P 0x3
1711
-
#define PD4_P 0x4
1712
-
#define PD5_P 0x5
1713
-
#define PD6_P 0x6
1714
-
#define PD7_P 0x7
1715
-
#define PD8_P 0x8
1716
-
#define PD9_P 0x9
1717
-
#define PD10_P 0xA
1718
-
#define PD11_P 0xB
1719
-
#define PD12_P 0xC
1720
-
#define PD13_P 0xD
1721
-
#define PD14_P 0xE
1722
-
#define PD15_P 0xF
1723
-
1724
-
/* Port E */
1725
-
#define PE0 0x0001
1726
-
#define PE1 0x0002
1727
-
#define PE2 0x0004
1728
-
#define PE3 0x0008
1729
-
#define PE4 0x0010
1730
-
#define PE5 0x0020
1731
-
#define PE6 0x0040
1732
-
#define PE7 0x0080
1733
-
#define PE8 0x0100
1734
-
#define PE9 0x0200
1735
-
#define PE10 0x0400
1736
-
#define PE11 0x0800
1737
-
#define PE12 0x1000
1738
-
#define PE13 0x2000
1739
-
#define PE14 0x4000
1740
-
#define PE15 0x8000
1741
-
/* Port E Bit Positions */
1742
-
#define PE0_P 0x0
1743
-
#define PE1_P 0x1
1744
-
#define PE2_P 0x2
1745
-
#define PE3_P 0x3
1746
-
#define PE4_P 0x4
1747
-
#define PE5_P 0x5
1748
-
#define PE6_P 0x6
1749
-
#define PE7_P 0x7
1750
-
#define PE8_P 0x8
1751
-
#define PE9_P 0x9
1752
-
#define PE10_P 0xA
1753
-
#define PE11_P 0xB
1754
-
#define PE12_P 0xC
1755
-
#define PE13_P 0xD
1756
-
#define PE14_P 0xE
1757
-
#define PE15_P 0xF
1758
-
1759
1630
/* ********************* ASYNCHRONOUS MEMORY CONTROLLER MASKS ************* */
1760
1631
/* EBIU_AMGCTL Masks */
1761
1632
#define AMCKEN 0x0001 /* Enable CLKOUT */
+5
arch/blackfin/mach-bf538/include/mach/gpio.h
+5
arch/blackfin/mach-bf538/include/mach/gpio.h
-234
arch/blackfin/mach-bf548/include/mach/defBF54x_base.h
-234
arch/blackfin/mach-bf548/include/mach/defBF54x_base.h
···
2231
2231
#define PIQ30 0x40000000
2232
2232
#define PIQ31 0x80000000
2233
2233
2234
-
/* PORT A Bit Definitions for the registers
2235
-
PORTA, PORTA_SET, PORTA_CLEAR,
2236
-
PORTA_DIR_SET, PORTA_DIR_CLEAR, PORTA_INEN,
2237
-
PORTA_FER registers
2238
-
*/
2239
-
2240
-
#define PA0 0x0001
2241
-
#define PA1 0x0002
2242
-
#define PA2 0x0004
2243
-
#define PA3 0x0008
2244
-
#define PA4 0x0010
2245
-
#define PA5 0x0020
2246
-
#define PA6 0x0040
2247
-
#define PA7 0x0080
2248
-
#define PA8 0x0100
2249
-
#define PA9 0x0200
2250
-
#define PA10 0x0400
2251
-
#define PA11 0x0800
2252
-
#define PA12 0x1000
2253
-
#define PA13 0x2000
2254
-
#define PA14 0x4000
2255
-
#define PA15 0x8000
2256
-
2257
-
/* PORT B Bit Definitions for the registers
2258
-
PORTB, PORTB_SET, PORTB_CLEAR,
2259
-
PORTB_DIR_SET, PORTB_DIR_CLEAR, PORTB_INEN,
2260
-
PORTB_FER registers
2261
-
*/
2262
-
2263
-
#define PB0 0x0001
2264
-
#define PB1 0x0002
2265
-
#define PB2 0x0004
2266
-
#define PB3 0x0008
2267
-
#define PB4 0x0010
2268
-
#define PB5 0x0020
2269
-
#define PB6 0x0040
2270
-
#define PB7 0x0080
2271
-
#define PB8 0x0100
2272
-
#define PB9 0x0200
2273
-
#define PB10 0x0400
2274
-
#define PB11 0x0800
2275
-
#define PB12 0x1000
2276
-
#define PB13 0x2000
2277
-
#define PB14 0x4000
2278
-
2279
-
2280
-
/* PORT C Bit Definitions for the registers
2281
-
PORTC, PORTC_SET, PORTC_CLEAR,
2282
-
PORTC_DIR_SET, PORTC_DIR_CLEAR, PORTC_INEN,
2283
-
PORTC_FER registers
2284
-
*/
2285
-
2286
-
2287
-
#define PC0 0x0001
2288
-
#define PC1 0x0002
2289
-
#define PC2 0x0004
2290
-
#define PC3 0x0008
2291
-
#define PC4 0x0010
2292
-
#define PC5 0x0020
2293
-
#define PC6 0x0040
2294
-
#define PC7 0x0080
2295
-
#define PC8 0x0100
2296
-
#define PC9 0x0200
2297
-
#define PC10 0x0400
2298
-
#define PC11 0x0800
2299
-
#define PC12 0x1000
2300
-
#define PC13 0x2000
2301
-
2302
-
2303
-
/* PORT D Bit Definitions for the registers
2304
-
PORTD, PORTD_SET, PORTD_CLEAR,
2305
-
PORTD_DIR_SET, PORTD_DIR_CLEAR, PORTD_INEN,
2306
-
PORTD_FER registers
2307
-
*/
2308
-
2309
-
#define PD0 0x0001
2310
-
#define PD1 0x0002
2311
-
#define PD2 0x0004
2312
-
#define PD3 0x0008
2313
-
#define PD4 0x0010
2314
-
#define PD5 0x0020
2315
-
#define PD6 0x0040
2316
-
#define PD7 0x0080
2317
-
#define PD8 0x0100
2318
-
#define PD9 0x0200
2319
-
#define PD10 0x0400
2320
-
#define PD11 0x0800
2321
-
#define PD12 0x1000
2322
-
#define PD13 0x2000
2323
-
#define PD14 0x4000
2324
-
#define PD15 0x8000
2325
-
2326
-
/* PORT E Bit Definitions for the registers
2327
-
PORTE, PORTE_SET, PORTE_CLEAR,
2328
-
PORTE_DIR_SET, PORTE_DIR_CLEAR, PORTE_INEN,
2329
-
PORTE_FER registers
2330
-
*/
2331
-
2332
-
2333
-
#define PE0 0x0001
2334
-
#define PE1 0x0002
2335
-
#define PE2 0x0004
2336
-
#define PE3 0x0008
2337
-
#define PE4 0x0010
2338
-
#define PE5 0x0020
2339
-
#define PE6 0x0040
2340
-
#define PE7 0x0080
2341
-
#define PE8 0x0100
2342
-
#define PE9 0x0200
2343
-
#define PE10 0x0400
2344
-
#define PE11 0x0800
2345
-
#define PE12 0x1000
2346
-
#define PE13 0x2000
2347
-
#define PE14 0x4000
2348
-
#define PE15 0x8000
2349
-
2350
-
/* PORT F Bit Definitions for the registers
2351
-
PORTF, PORTF_SET, PORTF_CLEAR,
2352
-
PORTF_DIR_SET, PORTF_DIR_CLEAR, PORTF_INEN,
2353
-
PORTF_FER registers
2354
-
*/
2355
-
2356
-
2357
-
#define PF0 0x0001
2358
-
#define PF1 0x0002
2359
-
#define PF2 0x0004
2360
-
#define PF3 0x0008
2361
-
#define PF4 0x0010
2362
-
#define PF5 0x0020
2363
-
#define PF6 0x0040
2364
-
#define PF7 0x0080
2365
-
#define PF8 0x0100
2366
-
#define PF9 0x0200
2367
-
#define PF10 0x0400
2368
-
#define PF11 0x0800
2369
-
#define PF12 0x1000
2370
-
#define PF13 0x2000
2371
-
#define PF14 0x4000
2372
-
#define PF15 0x8000
2373
-
2374
-
/* PORT G Bit Definitions for the registers
2375
-
PORTG, PORTG_SET, PORTG_CLEAR,
2376
-
PORTG_DIR_SET, PORTG_DIR_CLEAR, PORTG_INEN,
2377
-
PORTG_FER registers
2378
-
*/
2379
-
2380
-
2381
-
#define PG0 0x0001
2382
-
#define PG1 0x0002
2383
-
#define PG2 0x0004
2384
-
#define PG3 0x0008
2385
-
#define PG4 0x0010
2386
-
#define PG5 0x0020
2387
-
#define PG6 0x0040
2388
-
#define PG7 0x0080
2389
-
#define PG8 0x0100
2390
-
#define PG9 0x0200
2391
-
#define PG10 0x0400
2392
-
#define PG11 0x0800
2393
-
#define PG12 0x1000
2394
-
#define PG13 0x2000
2395
-
#define PG14 0x4000
2396
-
#define PG15 0x8000
2397
-
2398
-
/* PORT H Bit Definitions for the registers
2399
-
PORTH, PORTH_SET, PORTH_CLEAR,
2400
-
PORTH_DIR_SET, PORTH_DIR_CLEAR, PORTH_INEN,
2401
-
PORTH_FER registers
2402
-
*/
2403
-
2404
-
2405
-
#define PH0 0x0001
2406
-
#define PH1 0x0002
2407
-
#define PH2 0x0004
2408
-
#define PH3 0x0008
2409
-
#define PH4 0x0010
2410
-
#define PH5 0x0020
2411
-
#define PH6 0x0040
2412
-
#define PH7 0x0080
2413
-
#define PH8 0x0100
2414
-
#define PH9 0x0200
2415
-
#define PH10 0x0400
2416
-
#define PH11 0x0800
2417
-
#define PH12 0x1000
2418
-
#define PH13 0x2000
2419
-
2420
-
2421
-
/* PORT I Bit Definitions for the registers
2422
-
PORTI, PORTI_SET, PORTI_CLEAR,
2423
-
PORTI_DIR_SET, PORTI_DIR_CLEAR, PORTI_INEN,
2424
-
PORTI_FER registers
2425
-
*/
2426
-
2427
-
2428
-
#define PI0 0x0001
2429
-
#define PI1 0x0002
2430
-
#define PI2 0x0004
2431
-
#define PI3 0x0008
2432
-
#define PI4 0x0010
2433
-
#define PI5 0x0020
2434
-
#define PI6 0x0040
2435
-
#define PI7 0x0080
2436
-
#define PI8 0x0100
2437
-
#define PI9 0x0200
2438
-
#define PI10 0x0400
2439
-
#define PI11 0x0800
2440
-
#define PI12 0x1000
2441
-
#define PI13 0x2000
2442
-
#define PI14 0x4000
2443
-
#define PI15 0x8000
2444
-
2445
-
/* PORT J Bit Definitions for the registers
2446
-
PORTJ, PORTJ_SET, PORTJ_CLEAR,
2447
-
PORTJ_DIR_SET, PORTJ_DIR_CLEAR, PORTJ_INEN,
2448
-
PORTJ_FER registers
2449
-
*/
2450
-
2451
-
2452
-
#define PJ0 0x0001
2453
-
#define PJ1 0x0002
2454
-
#define PJ2 0x0004
2455
-
#define PJ3 0x0008
2456
-
#define PJ4 0x0010
2457
-
#define PJ5 0x0020
2458
-
#define PJ6 0x0040
2459
-
#define PJ7 0x0080
2460
-
#define PJ8 0x0100
2461
-
#define PJ9 0x0200
2462
-
#define PJ10 0x0400
2463
-
#define PJ11 0x0800
2464
-
#define PJ12 0x1000
2465
-
#define PJ13 0x2000
2466
-
2467
-
2468
2234
/* Port Muxing Bit Fields for PORTx_MUX Registers */
2469
2235
2470
2236
#define MUX0 0x00000003
+11
arch/blackfin/mach-bf548/include/mach/gpio.h
+11
arch/blackfin/mach-bf548/include/mach/gpio.h
···
200
200
201
201
#endif
202
202
203
+
#include <mach-common/ports-a.h>
204
+
#include <mach-common/ports-b.h>
205
+
#include <mach-common/ports-c.h>
206
+
#include <mach-common/ports-d.h>
207
+
#include <mach-common/ports-e.h>
208
+
#include <mach-common/ports-f.h>
209
+
#include <mach-common/ports-g.h>
210
+
#include <mach-common/ports-h.h>
211
+
#include <mach-common/ports-i.h>
212
+
#include <mach-common/ports-j.h>
213
+
203
214
#endif /* _MACH_GPIO_H_ */
-38
arch/blackfin/mach-bf561/include/mach/defBF561.h
-38
arch/blackfin/mach-bf561/include/mach/defBF561.h
···
1097
1097
#define ERR_TYP_P0 0x0E
1098
1098
#define ERR_TYP_P1 0x0F
1099
1099
1100
-
/*/ ****************** PROGRAMMABLE FLAG MASKS ********************* */
1101
-
1102
-
/* General Purpose IO (0xFFC00700 - 0xFFC007FF) Masks */
1103
-
#define PF0 0x0001
1104
-
#define PF1 0x0002
1105
-
#define PF2 0x0004
1106
-
#define PF3 0x0008
1107
-
#define PF4 0x0010
1108
-
#define PF5 0x0020
1109
-
#define PF6 0x0040
1110
-
#define PF7 0x0080
1111
-
#define PF8 0x0100
1112
-
#define PF9 0x0200
1113
-
#define PF10 0x0400
1114
-
#define PF11 0x0800
1115
-
#define PF12 0x1000
1116
-
#define PF13 0x2000
1117
-
#define PF14 0x4000
1118
-
#define PF15 0x8000
1119
-
1120
-
/* General Purpose IO (0xFFC00700 - 0xFFC007FF) BIT POSITIONS */
1121
-
#define PF0_P 0
1122
-
#define PF1_P 1
1123
-
#define PF2_P 2
1124
-
#define PF3_P 3
1125
-
#define PF4_P 4
1126
-
#define PF5_P 5
1127
-
#define PF6_P 6
1128
-
#define PF7_P 7
1129
-
#define PF8_P 8
1130
-
#define PF9_P 9
1131
-
#define PF10_P 10
1132
-
#define PF11_P 11
1133
-
#define PF12_P 12
1134
-
#define PF13_P 13
1135
-
#define PF14_P 14
1136
-
#define PF15_P 15
1137
-
1138
1100
/* ********************* ASYNCHRONOUS MEMORY CONTROLLER MASKS ************* */
1139
1101
1140
1102
/* AMGCTL Masks */