Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

of: unittest: Add tests for address translations

Add tests to exercise address translations based on ranges properties.

Tests added cover "default" (2cell) address translations, "default
flags" (3cell) address translations and PCI address translations.
They also cover PCI BAR translations introduced in commit 407d1a51921e
("PCI: Create device tree node for bridge").

Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Link: https://lore.kernel.org/r/20231017110221.189299-4-herve.codina@bootlin.com
Signed-off-by: Rob Herring <robh@kernel.org>

authored by

Herve Codina and committed by
Rob Herring
4d9ec5f0 3eb030c6

+178
+101
drivers/of/unittest-data/tests-address.dtsi
··· 51 51 }; 52 52 53 53 }; 54 + 55 + address-tests2 { 56 + #address-cells = <2>; 57 + #size-cells = <1>; 58 + 59 + ranges = <0x10000000 0x01000000 0xa0000000 0x01000000>, 60 + <0x10000000 0x02000000 0xb0000000 0x01000000>, 61 + <0x20000000 0x01000000 0xc0000000 0x01000000>, 62 + <0x20000000 0x02000000 0xd0000000 0x01000000>, 63 + <0x00000000 0xd1000000 0xd1000000 0x01000000>, 64 + <0x00000000 0xe8000000 0xe8000000 0x07f00000>, 65 + <0x00000000 0xefff0000 0xefff0000 0x00010000>; 66 + 67 + bus-2cell@10000000 { 68 + #address-cells = <2>; 69 + #size-cells = <1>; 70 + ranges = <0x100000 0x10000 0x10000000 0x1a00000 0x10000>, 71 + <0x100000 0x20000 0x10000000 0x1b00000 0x10000>, 72 + <0x200000 0x10000 0x20000000 0x1c00000 0x10000>, 73 + <0x200000 0x20000 0x20000000 0x2d00000 0x10000>; 74 + 75 + device@100000 { 76 + reg = <0x100000 0x11000 0x100>, 77 + <0x100000 0x12000 0x100>, 78 + <0x200000 0x11000 0x100>, 79 + <0x200000 0x21000 0x100>; 80 + }; 81 + }; 82 + 83 + bus-3cell@20000000 { 84 + #address-cells = <3>; 85 + #size-cells = <1>; 86 + ranges = <0x1 0x100000 0x10000 0x10000000 0x1a00000 0x10000>, 87 + <0x2 0x100000 0x10000 0x10000000 0x1b00000 0x10000>, 88 + <0x3 0x200000 0x10000 0x20000000 0x1c00000 0x10000>, 89 + <0x4 0x200000 0x20000 0x20000000 0x2d00000 0x10000>; 90 + 91 + local-bus@100000 { 92 + #address-cells = <1>; 93 + #size-cells = <1>; 94 + ranges = <0xf1000000 0x1 0x100000 0x10000 0x10000>, 95 + <0xf2000000 0x2 0x100000 0x10000 0x10000>, 96 + <0xf3000000 0x3 0x200000 0x10000 0x08000>, 97 + <0xf3800000 0x3 0x200000 0x18000 0x08000>, 98 + <0xf4000000 0x4 0x200000 0x20000 0x10000>; 99 + 100 + device@f1001000 { 101 + reg = <0xf1001000 0x100>, 102 + <0xf2002000 0x100>, 103 + <0xf3001000 0x100>, 104 + <0xf3801000 0x100>, 105 + <0xf4001000 0x100>; 106 + }; 107 + }; 108 + }; 109 + 110 + pcie@d1070000 { 111 + #address-cells = <0x03>; 112 + #size-cells = <0x02>; 113 + bus-range = <0x00 0xff>; 114 + device_type = "pci"; 115 + ranges = <0x82000000 0 0xe8000000 0 0xe8000000 0 0x7f00000>, 116 + <0x81000000 0 0x00000000 0 0xefff0000 0 0x0010000>; 117 + reg = <0x00000000 0xd1070000 0x20000>; 118 + 119 + pci@0,0 { 120 + #address-cells = <0x03>; 121 + #size-cells = <0x02>; 122 + bus-range = <0x01 0x01>; 123 + device_type = "pci"; 124 + ranges = <0x82000000 0 0xe8000000 125 + 0x82000000 0 0xe8000000 126 + 0 0x4400000>; 127 + reg = <0x00 0x00 0x00 0x00 0x00>; 128 + 129 + dev@0,0 { 130 + #address-cells = <0x03>; 131 + #size-cells = <0x02>; 132 + ranges = <0 0 0 0x82010000 0 0xe8000000 0 0x2000000>, 133 + <1 0 0 0x82010000 0 0xea000000 0 0x1000000>, 134 + <2 0 0 0x82010000 0 0xeb000000 0 0x0800000>, 135 + <3 0 0 0x82010000 0 0xeb800000 0 0x0800000>, 136 + <4 0 0 0x82010000 0 0xec000000 0 0x0020000>, 137 + <5 0 0 0x82010000 0 0xec020000 0 0x0002000>; 138 + reg = <0x10000 0x00 0x00 0x00 0x00>; 139 + 140 + local-bus@0 { 141 + #address-cells = <0x01>; 142 + #size-cells = <0x01>; 143 + ranges = <0xa0000000 0 0 0 0x2000000>, 144 + <0xb0000000 1 0 0 0x1000000>; 145 + 146 + dev@e0000000 { 147 + reg = <0xa0001000 0x1000>, 148 + <0xb0002000 0x2000>; 149 + }; 150 + }; 151 + }; 152 + }; 153 + }; 154 + }; 54 155 }; 55 156 };
+77
drivers/of/unittest.c
··· 1186 1186 of_node_put(np); 1187 1187 } 1188 1188 1189 + struct of_unittest_expected_res { 1190 + int index; 1191 + struct resource res; 1192 + }; 1193 + 1194 + static void __init of_unittest_check_addr(const char *node_path, 1195 + const struct of_unittest_expected_res *tab_exp, 1196 + unsigned int tab_exp_count) 1197 + { 1198 + const struct of_unittest_expected_res *expected; 1199 + struct device_node *np; 1200 + struct resource res; 1201 + unsigned int count; 1202 + int ret; 1203 + 1204 + if (!IS_ENABLED(CONFIG_OF_ADDRESS)) 1205 + return; 1206 + 1207 + np = of_find_node_by_path(node_path); 1208 + if (!np) { 1209 + pr_err("missing testcase data (%s)\n", node_path); 1210 + return; 1211 + } 1212 + 1213 + expected = tab_exp; 1214 + count = tab_exp_count; 1215 + while (count--) { 1216 + ret = of_address_to_resource(np, expected->index, &res); 1217 + unittest(!ret, "of_address_to_resource(%pOF, %d) returned error %d\n", 1218 + np, expected->index, ret); 1219 + unittest(resource_type(&res) == resource_type(&expected->res) && 1220 + res.start == expected->res.start && 1221 + resource_size(&res) == resource_size(&expected->res), 1222 + "of_address_to_resource(%pOF, %d) wrong resource %pR, expected %pR\n", 1223 + np, expected->index, &res, &expected->res); 1224 + expected++; 1225 + } 1226 + 1227 + of_node_put(np); 1228 + } 1229 + 1230 + static const struct of_unittest_expected_res of_unittest_reg_2cell_expected_res[] = { 1231 + {.index = 0, .res = DEFINE_RES_MEM(0xa0a01000, 0x100) }, 1232 + {.index = 1, .res = DEFINE_RES_MEM(0xa0a02000, 0x100) }, 1233 + {.index = 2, .res = DEFINE_RES_MEM(0xc0c01000, 0x100) }, 1234 + {.index = 3, .res = DEFINE_RES_MEM(0xd0d01000, 0x100) }, 1235 + }; 1236 + 1237 + static const struct of_unittest_expected_res of_unittest_reg_3cell_expected_res[] = { 1238 + {.index = 0, .res = DEFINE_RES_MEM(0xa0a01000, 0x100) }, 1239 + {.index = 1, .res = DEFINE_RES_MEM(0xa0b02000, 0x100) }, 1240 + {.index = 2, .res = DEFINE_RES_MEM(0xc0c01000, 0x100) }, 1241 + {.index = 3, .res = DEFINE_RES_MEM(0xc0c09000, 0x100) }, 1242 + {.index = 4, .res = DEFINE_RES_MEM(0xd0d01000, 0x100) }, 1243 + }; 1244 + 1245 + static const struct of_unittest_expected_res of_unittest_reg_pci_expected_res[] = { 1246 + {.index = 0, .res = DEFINE_RES_MEM(0xe8001000, 0x1000) }, 1247 + {.index = 1, .res = DEFINE_RES_MEM(0xea002000, 0x2000) }, 1248 + }; 1249 + 1250 + static void __init of_unittest_translate_addr(void) 1251 + { 1252 + of_unittest_check_addr("/testcase-data/address-tests2/bus-2cell@10000000/device@100000", 1253 + of_unittest_reg_2cell_expected_res, 1254 + ARRAY_SIZE(of_unittest_reg_2cell_expected_res)); 1255 + 1256 + of_unittest_check_addr("/testcase-data/address-tests2/bus-3cell@20000000/local-bus@100000/device@f1001000", 1257 + of_unittest_reg_3cell_expected_res, 1258 + ARRAY_SIZE(of_unittest_reg_3cell_expected_res)); 1259 + 1260 + of_unittest_check_addr("/testcase-data/address-tests2/pcie@d1070000/pci@0,0/dev@0,0/local-bus@0/dev@e0000000", 1261 + of_unittest_reg_pci_expected_res, 1262 + ARRAY_SIZE(of_unittest_reg_pci_expected_res)); 1263 + } 1264 + 1189 1265 static void __init of_unittest_parse_interrupts(void) 1190 1266 { 1191 1267 struct device_node *np; ··· 4110 4034 of_unittest_bus_ranges(); 4111 4035 of_unittest_bus_3cell_ranges(); 4112 4036 of_unittest_reg(); 4037 + of_unittest_translate_addr(); 4113 4038 of_unittest_match_node(); 4114 4039 of_unittest_platform_populate(); 4115 4040 of_unittest_overlay();