intel-agp: fixup resource handling in flush code.

The flush code resource handling was having problems where some BIOS
reserve the resource in a pnp block and some don't.

Also there was a bug in that configure was being called at resume
and resetting some of the structs.

Signed-off-by: Dave Airlie <airlied@linux.ie>

authored by Dave Airlie and committed by Dave Airlie 4d64dd9e 4e8b6e25

+23 -10
+23 -10
drivers/char/agp/intel-agp.c
··· 126 }; 127 struct page *i8xx_page; 128 struct resource ifp_resource; 129 } intel_private; 130 131 static int intel_i810_fetch_size(void) ··· 604 flush_agp_mappings(); 605 606 __free_page(intel_private.i8xx_page); 607 } 608 609 static void intel_i830_setup_flush(void) 610 { 611 612 intel_private.i8xx_page = alloc_page(GFP_KERNEL | __GFP_ZERO | GFP_DMA32); 613 if (!intel_private.i8xx_page) { ··· 851 pci_read_config_dword(agp_bridge->dev, I915_IFPADDR, &temp); 852 if (!(temp & 0x1)) { 853 intel_alloc_chipset_flush_resource(); 854 - 855 pci_write_config_dword(agp_bridge->dev, I915_IFPADDR, (intel_private.ifp_resource.start & 0xffffffff) | 0x1); 856 } else { 857 temp &= ~1; 858 859 intel_private.ifp_resource.start = temp; 860 intel_private.ifp_resource.end = temp + PAGE_SIZE; 861 ret = request_resource(&iomem_resource, &intel_private.ifp_resource); 862 - if (ret) { 863 - intel_private.ifp_resource.start = 0; 864 - printk("Failed inserting resource into tree\n"); 865 - } 866 } 867 } 868 ··· 878 879 intel_alloc_chipset_flush_resource(); 880 881 pci_write_config_dword(agp_bridge->dev, I965_IFPADDR + 4, 882 upper_32_bits(intel_private.ifp_resource.start)); 883 pci_write_config_dword(agp_bridge->dev, I965_IFPADDR, (intel_private.ifp_resource.start & 0xffffffff) | 0x1); ··· 888 temp_lo &= ~0x1; 889 l64 = ((u64)temp_hi << 32) | temp_lo; 890 891 intel_private.ifp_resource.start = l64; 892 intel_private.ifp_resource.end = l64 + PAGE_SIZE; 893 ret = request_resource(&iomem_resource, &intel_private.ifp_resource); 894 - if (!ret) { 895 - printk("Failed inserting resource into tree - continuing\n"); 896 - } 897 } 898 } 899 900 static void intel_i9xx_setup_flush(void) 901 { 902 - /* setup a resource for this object */ 903 - memset(&intel_private.ifp_resource, 0, sizeof(intel_private.ifp_resource)); 904 905 intel_private.ifp_resource.name = "Intel Flush Page"; 906 intel_private.ifp_resource.flags = IORESOURCE_MEM; 907 ··· 960 { 961 if (intel_private.i9xx_flush_page) 962 iounmap(intel_private.i9xx_flush_page); 963 iounmap(intel_private.gtt); 964 iounmap(intel_private.registers); 965 }
··· 126 }; 127 struct page *i8xx_page; 128 struct resource ifp_resource; 129 + int resource_valid; 130 } intel_private; 131 132 static int intel_i810_fetch_size(void) ··· 603 flush_agp_mappings(); 604 605 __free_page(intel_private.i8xx_page); 606 + intel_private.i8xx_page = NULL; 607 } 608 609 static void intel_i830_setup_flush(void) 610 { 611 + /* return if we've already set the flush mechanism up */ 612 + if (intel_private.i8xx_page) 613 + return; 614 615 intel_private.i8xx_page = alloc_page(GFP_KERNEL | __GFP_ZERO | GFP_DMA32); 616 if (!intel_private.i8xx_page) { ··· 846 pci_read_config_dword(agp_bridge->dev, I915_IFPADDR, &temp); 847 if (!(temp & 0x1)) { 848 intel_alloc_chipset_flush_resource(); 849 + intel_private.resource_valid = 1; 850 pci_write_config_dword(agp_bridge->dev, I915_IFPADDR, (intel_private.ifp_resource.start & 0xffffffff) | 0x1); 851 } else { 852 temp &= ~1; 853 854 + intel_private.resource_valid = 1; 855 intel_private.ifp_resource.start = temp; 856 intel_private.ifp_resource.end = temp + PAGE_SIZE; 857 ret = request_resource(&iomem_resource, &intel_private.ifp_resource); 858 + /* some BIOSes reserve this area in a pnp some don't */ 859 + if (ret) 860 + intel_private.resource_valid = 0; 861 } 862 } 863 ··· 873 874 intel_alloc_chipset_flush_resource(); 875 876 + intel_private.resource_valid = 1; 877 pci_write_config_dword(agp_bridge->dev, I965_IFPADDR + 4, 878 upper_32_bits(intel_private.ifp_resource.start)); 879 pci_write_config_dword(agp_bridge->dev, I965_IFPADDR, (intel_private.ifp_resource.start & 0xffffffff) | 0x1); ··· 882 temp_lo &= ~0x1; 883 l64 = ((u64)temp_hi << 32) | temp_lo; 884 885 + intel_private.resource_valid = 1; 886 intel_private.ifp_resource.start = l64; 887 intel_private.ifp_resource.end = l64 + PAGE_SIZE; 888 ret = request_resource(&iomem_resource, &intel_private.ifp_resource); 889 + /* some BIOSes reserve this area in a pnp some don't */ 890 + if (ret) 891 + intel_private.resource_valid = 0; 892 } 893 } 894 895 static void intel_i9xx_setup_flush(void) 896 { 897 + /* return if already configured */ 898 + if (intel_private.ifp_resource.start) 899 + return; 900 901 + /* setup a resource for this object */ 902 intel_private.ifp_resource.name = "Intel Flush Page"; 903 intel_private.ifp_resource.flags = IORESOURCE_MEM; 904 ··· 951 { 952 if (intel_private.i9xx_flush_page) 953 iounmap(intel_private.i9xx_flush_page); 954 + if (intel_private.resource_valid) 955 + release_resource(&intel_private.ifp_resource); 956 + intel_private.ifp_resource.start = 0; 957 + intel_private.resource_valid = 0; 958 iounmap(intel_private.gtt); 959 iounmap(intel_private.registers); 960 }