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kernel
os
linux
ASoC: da7218: Add da7218 codec driver
This adds support for DA7217 and DA7218 audio codecs.
Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
authored by
Adam Thomson
and committed by
Mark Brown
4d50934a
ee4105a5
+4834
+109
include/sound/da7218.h
+109
include/sound/da7218.h
···
1
+
/*
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+
* da7218.h - DA7218 ASoC Codec Driver Platform Data
3
+
*
4
+
* Copyright (c) 2015 Dialog Semiconductor
5
+
*
6
+
* Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
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+
*
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* This program is free software; you can redistribute it and/or modify it
9
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* under the terms of the GNU General Public License as published by the
10
+
* Free Software Foundation; either version 2 of the License, or (at your
11
+
* option) any later version.
12
+
*/
13
+
14
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#ifndef _DA7218_PDATA_H
15
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#define _DA7218_PDATA_H
16
+
17
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/* Mic Bias */
18
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enum da7218_micbias_voltage {
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DA7218_MICBIAS_1_2V = -1,
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DA7218_MICBIAS_1_6V,
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DA7218_MICBIAS_1_8V,
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DA7218_MICBIAS_2_0V,
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DA7218_MICBIAS_2_2V,
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DA7218_MICBIAS_2_4V,
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DA7218_MICBIAS_2_6V,
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DA7218_MICBIAS_2_8V,
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DA7218_MICBIAS_3_0V,
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};
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+
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enum da7218_mic_amp_in_sel {
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DA7218_MIC_AMP_IN_SEL_DIFF = 0,
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DA7218_MIC_AMP_IN_SEL_SE_P,
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DA7218_MIC_AMP_IN_SEL_SE_N,
34
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};
35
+
36
+
/* DMIC */
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enum da7218_dmic_data_sel {
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DA7218_DMIC_DATA_LRISE_RFALL = 0,
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DA7218_DMIC_DATA_LFALL_RRISE,
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};
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+
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enum da7218_dmic_samplephase {
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DA7218_DMIC_SAMPLE_ON_CLKEDGE = 0,
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DA7218_DMIC_SAMPLE_BETWEEN_CLKEDGE,
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};
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+
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enum da7218_dmic_clk_rate {
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DA7218_DMIC_CLK_3_0MHZ = 0,
49
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DA7218_DMIC_CLK_1_5MHZ,
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};
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+
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/* Headphone Detect */
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enum da7218_hpldet_jack_rate {
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DA7218_HPLDET_JACK_RATE_5US = 0,
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DA7218_HPLDET_JACK_RATE_10US,
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DA7218_HPLDET_JACK_RATE_20US,
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DA7218_HPLDET_JACK_RATE_40US,
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DA7218_HPLDET_JACK_RATE_80US,
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DA7218_HPLDET_JACK_RATE_160US,
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DA7218_HPLDET_JACK_RATE_320US,
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DA7218_HPLDET_JACK_RATE_640US,
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};
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+
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enum da7218_hpldet_jack_debounce {
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DA7218_HPLDET_JACK_DEBOUNCE_OFF = 0,
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DA7218_HPLDET_JACK_DEBOUNCE_2,
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DA7218_HPLDET_JACK_DEBOUNCE_3,
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DA7218_HPLDET_JACK_DEBOUNCE_4,
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};
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+
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enum da7218_hpldet_jack_thr {
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DA7218_HPLDET_JACK_THR_84PCT = 0,
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DA7218_HPLDET_JACK_THR_88PCT,
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DA7218_HPLDET_JACK_THR_92PCT,
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DA7218_HPLDET_JACK_THR_96PCT,
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};
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+
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struct da7218_hpldet_pdata {
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enum da7218_hpldet_jack_rate jack_rate;
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enum da7218_hpldet_jack_debounce jack_debounce;
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enum da7218_hpldet_jack_thr jack_thr;
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bool comp_inv;
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bool hyst;
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bool discharge;
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};
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+
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struct da7218_pdata {
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/* Mic */
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enum da7218_micbias_voltage micbias1_lvl;
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enum da7218_micbias_voltage micbias2_lvl;
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enum da7218_mic_amp_in_sel mic1_amp_in_sel;
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enum da7218_mic_amp_in_sel mic2_amp_in_sel;
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+
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/* DMIC */
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enum da7218_dmic_data_sel dmic1_data_sel;
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enum da7218_dmic_data_sel dmic2_data_sel;
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enum da7218_dmic_samplephase dmic1_samplephase;
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enum da7218_dmic_samplephase dmic2_samplephase;
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enum da7218_dmic_clk_rate dmic1_clk_rate;
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enum da7218_dmic_clk_rate dmic2_clk_rate;
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+
102
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/* HP Diff Supply - DA7217 only */
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bool hp_diff_single_supply;
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+
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/* HP Detect - DA7218 only */
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struct da7218_hpldet_pdata *hpldet_pdata;
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};
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+
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#endif /* _DA7218_PDATA_H */
+4
sound/soc/codecs/Kconfig
+4
sound/soc/codecs/Kconfig
···
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select SND_SOC_CX20442 if TTY
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select SND_SOC_DA7210 if SND_SOC_I2C_AND_SPI
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select SND_SOC_DA7213 if I2C
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select SND_SOC_DA7218 if I2C
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select SND_SOC_DA7219 if I2C
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select SND_SOC_DA732X if I2C
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select SND_SOC_DA9055 if I2C
···
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config SND_SOC_DA7213
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tristate
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+
442
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config SND_SOC_DA7218
443
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tristate
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config SND_SOC_DA7219
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tristate
+2
sound/soc/codecs/Makefile
+2
sound/soc/codecs/Makefile
···
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snd-soc-cx20442-objs := cx20442.o
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snd-soc-da7210-objs := da7210.o
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snd-soc-da7213-objs := da7213.o
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snd-soc-da7218-objs := da7218.o
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snd-soc-da7219-objs := da7219.o da7219-aad.o
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snd-soc-da732x-objs := da732x.o
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snd-soc-da9055-objs := da9055.o
···
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obj-$(CONFIG_SND_SOC_CX20442) += snd-soc-cx20442.o
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obj-$(CONFIG_SND_SOC_DA7210) += snd-soc-da7210.o
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obj-$(CONFIG_SND_SOC_DA7213) += snd-soc-da7213.o
248
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obj-$(CONFIG_SND_SOC_DA7218) += snd-soc-da7218.o
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obj-$(CONFIG_SND_SOC_DA7219) += snd-soc-da7219.o
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obj-$(CONFIG_SND_SOC_DA732X) += snd-soc-da732x.o
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obj-$(CONFIG_SND_SOC_DA9055) += snd-soc-da9055.o
+3305
sound/soc/codecs/da7218.c
+3305
sound/soc/codecs/da7218.c
···
1
+
/*
2
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* da7218.c - DA7218 ALSA SoC Codec Driver
3
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*
4
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* Copyright (c) 2015 Dialog Semiconductor
5
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*
6
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* Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
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*
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* This program is free software; you can redistribute it and/or modify it
9
+
* under the terms of the GNU General Public License as published by the
10
+
* Free Software Foundation; either version 2 of the License, or (at your
11
+
* option) any later version.
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+
*/
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+
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#include <linux/clk.h>
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#include <linux/i2c.h>
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+
#include <linux/of_device.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <linux/pm.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/regulator/consumer.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/soc-dapm.h>
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#include <sound/jack.h>
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#include <sound/initval.h>
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#include <sound/tlv.h>
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#include <asm/div64.h>
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+
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#include <sound/da7218.h>
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#include "da7218.h"
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+
35
+
36
+
/*
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* TLVs and Enums
38
+
*/
39
+
40
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/* Input TLVs */
41
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static const DECLARE_TLV_DB_SCALE(da7218_mic_gain_tlv, -600, 600, 0);
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static const DECLARE_TLV_DB_SCALE(da7218_mixin_gain_tlv, -450, 150, 0);
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static const DECLARE_TLV_DB_SCALE(da7218_in_dig_gain_tlv, -8325, 75, 0);
44
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static const DECLARE_TLV_DB_SCALE(da7218_ags_trigger_tlv, -9000, 600, 0);
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static const DECLARE_TLV_DB_SCALE(da7218_ags_att_max_tlv, 0, 600, 0);
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static const DECLARE_TLV_DB_SCALE(da7218_alc_threshold_tlv, -9450, 150, 0);
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static const DECLARE_TLV_DB_SCALE(da7218_alc_gain_tlv, 0, 600, 0);
48
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static const DECLARE_TLV_DB_SCALE(da7218_alc_ana_gain_tlv, 0, 600, 0);
49
+
50
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/* Input/Output TLVs */
51
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static const DECLARE_TLV_DB_SCALE(da7218_dmix_gain_tlv, -4200, 150, 0);
52
+
53
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/* Output TLVs */
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static const DECLARE_TLV_DB_SCALE(da7218_dgs_trigger_tlv, -9450, 150, 0);
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static const DECLARE_TLV_DB_SCALE(da7218_dgs_anticlip_tlv, -4200, 600, 0);
56
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static const DECLARE_TLV_DB_SCALE(da7218_dgs_signal_tlv, -9000, 600, 0);
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static const DECLARE_TLV_DB_SCALE(da7218_out_eq_band_tlv, -1050, 150, 0);
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static const DECLARE_TLV_DB_SCALE(da7218_out_dig_gain_tlv, -8325, 75, 0);
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static const DECLARE_TLV_DB_SCALE(da7218_dac_ng_threshold_tlv, -10200, 600, 0);
60
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static const DECLARE_TLV_DB_SCALE(da7218_mixout_gain_tlv, -100, 50, 0);
61
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static const DECLARE_TLV_DB_SCALE(da7218_hp_gain_tlv, -5700, 150, 0);
62
+
63
+
/* Input Enums */
64
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static const char * const da7218_alc_attack_rate_txt[] = {
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"7.33/fs", "14.66/fs", "29.32/fs", "58.64/fs", "117.3/fs", "234.6/fs",
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"469.1/fs", "938.2/fs", "1876/fs", "3753/fs", "7506/fs", "15012/fs",
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"30024/fs",
68
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};
69
+
70
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static const struct soc_enum da7218_alc_attack_rate =
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SOC_ENUM_SINGLE(DA7218_ALC_CTRL2, DA7218_ALC_ATTACK_SHIFT,
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DA7218_ALC_ATTACK_MAX, da7218_alc_attack_rate_txt);
73
+
74
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static const char * const da7218_alc_release_rate_txt[] = {
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"28.66/fs", "57.33/fs", "114.6/fs", "229.3/fs", "458.6/fs", "917.1/fs",
76
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"1834/fs", "3668/fs", "7337/fs", "14674/fs", "29348/fs",
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};
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+
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static const struct soc_enum da7218_alc_release_rate =
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SOC_ENUM_SINGLE(DA7218_ALC_CTRL2, DA7218_ALC_RELEASE_SHIFT,
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DA7218_ALC_RELEASE_MAX, da7218_alc_release_rate_txt);
82
+
83
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static const char * const da7218_alc_hold_time_txt[] = {
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"62/fs", "124/fs", "248/fs", "496/fs", "992/fs", "1984/fs", "3968/fs",
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"7936/fs", "15872/fs", "31744/fs", "63488/fs", "126976/fs",
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"253952/fs", "507904/fs", "1015808/fs", "2031616/fs"
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};
88
+
89
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static const struct soc_enum da7218_alc_hold_time =
90
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SOC_ENUM_SINGLE(DA7218_ALC_CTRL3, DA7218_ALC_HOLD_SHIFT,
91
+
DA7218_ALC_HOLD_MAX, da7218_alc_hold_time_txt);
92
+
93
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static const char * const da7218_alc_anticlip_step_txt[] = {
94
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"0.034dB/fs", "0.068dB/fs", "0.136dB/fs", "0.272dB/fs",
95
+
};
96
+
97
+
static const struct soc_enum da7218_alc_anticlip_step =
98
+
SOC_ENUM_SINGLE(DA7218_ALC_ANTICLIP_CTRL,
99
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DA7218_ALC_ANTICLIP_STEP_SHIFT,
100
+
DA7218_ALC_ANTICLIP_STEP_MAX,
101
+
da7218_alc_anticlip_step_txt);
102
+
103
+
static const char * const da7218_integ_rate_txt[] = {
104
+
"1/4", "1/16", "1/256", "1/65536"
105
+
};
106
+
107
+
static const struct soc_enum da7218_integ_attack_rate =
108
+
SOC_ENUM_SINGLE(DA7218_ENV_TRACK_CTRL, DA7218_INTEG_ATTACK_SHIFT,
109
+
DA7218_INTEG_MAX, da7218_integ_rate_txt);
110
+
111
+
static const struct soc_enum da7218_integ_release_rate =
112
+
SOC_ENUM_SINGLE(DA7218_ENV_TRACK_CTRL, DA7218_INTEG_RELEASE_SHIFT,
113
+
DA7218_INTEG_MAX, da7218_integ_rate_txt);
114
+
115
+
/* Input/Output Enums */
116
+
static const char * const da7218_gain_ramp_rate_txt[] = {
117
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"Nominal Rate * 8", "Nominal Rate", "Nominal Rate / 8",
118
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"Nominal Rate / 16",
119
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};
120
+
121
+
static const struct soc_enum da7218_gain_ramp_rate =
122
+
SOC_ENUM_SINGLE(DA7218_GAIN_RAMP_CTRL, DA7218_GAIN_RAMP_RATE_SHIFT,
123
+
DA7218_GAIN_RAMP_RATE_MAX, da7218_gain_ramp_rate_txt);
124
+
125
+
static const char * const da7218_hpf_mode_txt[] = {
126
+
"Disabled", "Audio", "Voice",
127
+
};
128
+
129
+
static const unsigned int da7218_hpf_mode_val[] = {
130
+
DA7218_HPF_DISABLED, DA7218_HPF_AUDIO_EN, DA7218_HPF_VOICE_EN,
131
+
};
132
+
133
+
static const struct soc_enum da7218_in1_hpf_mode =
134
+
SOC_VALUE_ENUM_SINGLE(DA7218_IN_1_HPF_FILTER_CTRL,
135
+
DA7218_HPF_MODE_SHIFT, DA7218_HPF_MODE_MASK,
136
+
DA7218_HPF_MODE_MAX, da7218_hpf_mode_txt,
137
+
da7218_hpf_mode_val);
138
+
139
+
static const struct soc_enum da7218_in2_hpf_mode =
140
+
SOC_VALUE_ENUM_SINGLE(DA7218_IN_2_HPF_FILTER_CTRL,
141
+
DA7218_HPF_MODE_SHIFT, DA7218_HPF_MODE_MASK,
142
+
DA7218_HPF_MODE_MAX, da7218_hpf_mode_txt,
143
+
da7218_hpf_mode_val);
144
+
145
+
static const struct soc_enum da7218_out1_hpf_mode =
146
+
SOC_VALUE_ENUM_SINGLE(DA7218_OUT_1_HPF_FILTER_CTRL,
147
+
DA7218_HPF_MODE_SHIFT, DA7218_HPF_MODE_MASK,
148
+
DA7218_HPF_MODE_MAX, da7218_hpf_mode_txt,
149
+
da7218_hpf_mode_val);
150
+
151
+
static const char * const da7218_audio_hpf_corner_txt[] = {
152
+
"2Hz", "4Hz", "8Hz", "16Hz",
153
+
};
154
+
155
+
static const struct soc_enum da7218_in1_audio_hpf_corner =
156
+
SOC_ENUM_SINGLE(DA7218_IN_1_HPF_FILTER_CTRL,
157
+
DA7218_IN_1_AUDIO_HPF_CORNER_SHIFT,
158
+
DA7218_AUDIO_HPF_CORNER_MAX,
159
+
da7218_audio_hpf_corner_txt);
160
+
161
+
static const struct soc_enum da7218_in2_audio_hpf_corner =
162
+
SOC_ENUM_SINGLE(DA7218_IN_2_HPF_FILTER_CTRL,
163
+
DA7218_IN_2_AUDIO_HPF_CORNER_SHIFT,
164
+
DA7218_AUDIO_HPF_CORNER_MAX,
165
+
da7218_audio_hpf_corner_txt);
166
+
167
+
static const struct soc_enum da7218_out1_audio_hpf_corner =
168
+
SOC_ENUM_SINGLE(DA7218_OUT_1_HPF_FILTER_CTRL,
169
+
DA7218_OUT_1_AUDIO_HPF_CORNER_SHIFT,
170
+
DA7218_AUDIO_HPF_CORNER_MAX,
171
+
da7218_audio_hpf_corner_txt);
172
+
173
+
static const char * const da7218_voice_hpf_corner_txt[] = {
174
+
"2.5Hz", "25Hz", "50Hz", "100Hz", "150Hz", "200Hz", "300Hz", "400Hz",
175
+
};
176
+
177
+
static const struct soc_enum da7218_in1_voice_hpf_corner =
178
+
SOC_ENUM_SINGLE(DA7218_IN_1_HPF_FILTER_CTRL,
179
+
DA7218_IN_1_VOICE_HPF_CORNER_SHIFT,
180
+
DA7218_VOICE_HPF_CORNER_MAX,
181
+
da7218_voice_hpf_corner_txt);
182
+
183
+
static const struct soc_enum da7218_in2_voice_hpf_corner =
184
+
SOC_ENUM_SINGLE(DA7218_IN_2_HPF_FILTER_CTRL,
185
+
DA7218_IN_2_VOICE_HPF_CORNER_SHIFT,
186
+
DA7218_VOICE_HPF_CORNER_MAX,
187
+
da7218_voice_hpf_corner_txt);
188
+
189
+
static const struct soc_enum da7218_out1_voice_hpf_corner =
190
+
SOC_ENUM_SINGLE(DA7218_OUT_1_HPF_FILTER_CTRL,
191
+
DA7218_OUT_1_VOICE_HPF_CORNER_SHIFT,
192
+
DA7218_VOICE_HPF_CORNER_MAX,
193
+
da7218_voice_hpf_corner_txt);
194
+
195
+
static const char * const da7218_tonegen_dtmf_key_txt[] = {
196
+
"0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "A", "B", "C", "D",
197
+
"*", "#"
198
+
};
199
+
200
+
static const struct soc_enum da7218_tonegen_dtmf_key =
201
+
SOC_ENUM_SINGLE(DA7218_TONE_GEN_CFG1, DA7218_DTMF_REG_SHIFT,
202
+
DA7218_DTMF_REG_MAX, da7218_tonegen_dtmf_key_txt);
203
+
204
+
static const char * const da7218_tonegen_swg_sel_txt[] = {
205
+
"Sum", "SWG1", "SWG2", "SWG1_1-Cos"
206
+
};
207
+
208
+
static const struct soc_enum da7218_tonegen_swg_sel =
209
+
SOC_ENUM_SINGLE(DA7218_TONE_GEN_CFG2, DA7218_SWG_SEL_SHIFT,
210
+
DA7218_SWG_SEL_MAX, da7218_tonegen_swg_sel_txt);
211
+
212
+
/* Output Enums */
213
+
static const char * const da7218_dgs_rise_coeff_txt[] = {
214
+
"1/1", "1/16", "1/64", "1/256", "1/1024", "1/4096", "1/16384",
215
+
};
216
+
217
+
static const struct soc_enum da7218_dgs_rise_coeff =
218
+
SOC_ENUM_SINGLE(DA7218_DGS_RISE_FALL, DA7218_DGS_RISE_COEFF_SHIFT,
219
+
DA7218_DGS_RISE_COEFF_MAX, da7218_dgs_rise_coeff_txt);
220
+
221
+
static const char * const da7218_dgs_fall_coeff_txt[] = {
222
+
"1/4", "1/16", "1/64", "1/256", "1/1024", "1/4096", "1/16384", "1/65536",
223
+
};
224
+
225
+
static const struct soc_enum da7218_dgs_fall_coeff =
226
+
SOC_ENUM_SINGLE(DA7218_DGS_RISE_FALL, DA7218_DGS_FALL_COEFF_SHIFT,
227
+
DA7218_DGS_FALL_COEFF_MAX, da7218_dgs_fall_coeff_txt);
228
+
229
+
static const char * const da7218_dac_ng_setup_time_txt[] = {
230
+
"256 Samples", "512 Samples", "1024 Samples", "2048 Samples"
231
+
};
232
+
233
+
static const struct soc_enum da7218_dac_ng_setup_time =
234
+
SOC_ENUM_SINGLE(DA7218_DAC_NG_SETUP_TIME,
235
+
DA7218_DAC_NG_SETUP_TIME_SHIFT,
236
+
DA7218_DAC_NG_SETUP_TIME_MAX,
237
+
da7218_dac_ng_setup_time_txt);
238
+
239
+
static const char * const da7218_dac_ng_rampup_txt[] = {
240
+
"0.22ms/dB", "0.0138ms/dB"
241
+
};
242
+
243
+
static const struct soc_enum da7218_dac_ng_rampup_rate =
244
+
SOC_ENUM_SINGLE(DA7218_DAC_NG_SETUP_TIME,
245
+
DA7218_DAC_NG_RAMPUP_RATE_SHIFT,
246
+
DA7218_DAC_NG_RAMPUP_RATE_MAX,
247
+
da7218_dac_ng_rampup_txt);
248
+
249
+
static const char * const da7218_dac_ng_rampdown_txt[] = {
250
+
"0.88ms/dB", "14.08ms/dB"
251
+
};
252
+
253
+
static const struct soc_enum da7218_dac_ng_rampdown_rate =
254
+
SOC_ENUM_SINGLE(DA7218_DAC_NG_SETUP_TIME,
255
+
DA7218_DAC_NG_RAMPDN_RATE_SHIFT,
256
+
DA7218_DAC_NG_RAMPDN_RATE_MAX,
257
+
da7218_dac_ng_rampdown_txt);
258
+
259
+
static const char * const da7218_cp_mchange_txt[] = {
260
+
"Largest Volume", "DAC Volume", "Signal Magnitude"
261
+
};
262
+
263
+
static const unsigned int da7218_cp_mchange_val[] = {
264
+
DA7218_CP_MCHANGE_LARGEST_VOL, DA7218_CP_MCHANGE_DAC_VOL,
265
+
DA7218_CP_MCHANGE_SIG_MAG
266
+
};
267
+
268
+
static const struct soc_enum da7218_cp_mchange =
269
+
SOC_VALUE_ENUM_SINGLE(DA7218_CP_CTRL, DA7218_CP_MCHANGE_SHIFT,
270
+
DA7218_CP_MCHANGE_REL_MASK, DA7218_CP_MCHANGE_MAX,
271
+
da7218_cp_mchange_txt, da7218_cp_mchange_val);
272
+
273
+
static const char * const da7218_cp_fcontrol_txt[] = {
274
+
"1MHz", "500KHz", "250KHz", "125KHz", "63KHz", "0KHz"
275
+
};
276
+
277
+
static const struct soc_enum da7218_cp_fcontrol =
278
+
SOC_ENUM_SINGLE(DA7218_CP_DELAY, DA7218_CP_FCONTROL_SHIFT,
279
+
DA7218_CP_FCONTROL_MAX, da7218_cp_fcontrol_txt);
280
+
281
+
static const char * const da7218_cp_tau_delay_txt[] = {
282
+
"0ms", "2ms", "4ms", "16ms", "64ms", "128ms", "256ms", "512ms"
283
+
};
284
+
285
+
static const struct soc_enum da7218_cp_tau_delay =
286
+
SOC_ENUM_SINGLE(DA7218_CP_DELAY, DA7218_CP_TAU_DELAY_SHIFT,
287
+
DA7218_CP_TAU_DELAY_MAX, da7218_cp_tau_delay_txt);
288
+
289
+
/*
290
+
* Control Functions
291
+
*/
292
+
293
+
/* ALC */
294
+
static void da7218_alc_calib(struct snd_soc_codec *codec)
295
+
{
296
+
u8 mic_1_ctrl, mic_2_ctrl;
297
+
u8 mixin_1_ctrl, mixin_2_ctrl;
298
+
u8 in_1l_filt_ctrl, in_1r_filt_ctrl, in_2l_filt_ctrl, in_2r_filt_ctrl;
299
+
u8 in_1_hpf_ctrl, in_2_hpf_ctrl;
300
+
u8 calib_ctrl;
301
+
int i = 0;
302
+
bool calibrated = false;
303
+
304
+
/* Save current state of MIC control registers */
305
+
mic_1_ctrl = snd_soc_read(codec, DA7218_MIC_1_CTRL);
306
+
mic_2_ctrl = snd_soc_read(codec, DA7218_MIC_2_CTRL);
307
+
308
+
/* Save current state of input mixer control registers */
309
+
mixin_1_ctrl = snd_soc_read(codec, DA7218_MIXIN_1_CTRL);
310
+
mixin_2_ctrl = snd_soc_read(codec, DA7218_MIXIN_2_CTRL);
311
+
312
+
/* Save current state of input filter control registers */
313
+
in_1l_filt_ctrl = snd_soc_read(codec, DA7218_IN_1L_FILTER_CTRL);
314
+
in_1r_filt_ctrl = snd_soc_read(codec, DA7218_IN_1R_FILTER_CTRL);
315
+
in_2l_filt_ctrl = snd_soc_read(codec, DA7218_IN_2L_FILTER_CTRL);
316
+
in_2r_filt_ctrl = snd_soc_read(codec, DA7218_IN_2R_FILTER_CTRL);
317
+
318
+
/* Save current state of input HPF control registers */
319
+
in_1_hpf_ctrl = snd_soc_read(codec, DA7218_IN_1_HPF_FILTER_CTRL);
320
+
in_2_hpf_ctrl = snd_soc_read(codec, DA7218_IN_2_HPF_FILTER_CTRL);
321
+
322
+
/* Enable then Mute MIC PGAs */
323
+
snd_soc_update_bits(codec, DA7218_MIC_1_CTRL, DA7218_MIC_1_AMP_EN_MASK,
324
+
DA7218_MIC_1_AMP_EN_MASK);
325
+
snd_soc_update_bits(codec, DA7218_MIC_2_CTRL, DA7218_MIC_2_AMP_EN_MASK,
326
+
DA7218_MIC_2_AMP_EN_MASK);
327
+
snd_soc_update_bits(codec, DA7218_MIC_1_CTRL,
328
+
DA7218_MIC_1_AMP_MUTE_EN_MASK,
329
+
DA7218_MIC_1_AMP_MUTE_EN_MASK);
330
+
snd_soc_update_bits(codec, DA7218_MIC_2_CTRL,
331
+
DA7218_MIC_2_AMP_MUTE_EN_MASK,
332
+
DA7218_MIC_2_AMP_MUTE_EN_MASK);
333
+
334
+
/* Enable input mixers unmuted */
335
+
snd_soc_update_bits(codec, DA7218_MIXIN_1_CTRL,
336
+
DA7218_MIXIN_1_AMP_EN_MASK |
337
+
DA7218_MIXIN_1_AMP_MUTE_EN_MASK,
338
+
DA7218_MIXIN_1_AMP_EN_MASK);
339
+
snd_soc_update_bits(codec, DA7218_MIXIN_2_CTRL,
340
+
DA7218_MIXIN_2_AMP_EN_MASK |
341
+
DA7218_MIXIN_2_AMP_MUTE_EN_MASK,
342
+
DA7218_MIXIN_2_AMP_EN_MASK);
343
+
344
+
/* Enable input filters unmuted */
345
+
snd_soc_update_bits(codec, DA7218_IN_1L_FILTER_CTRL,
346
+
DA7218_IN_1L_FILTER_EN_MASK |
347
+
DA7218_IN_1L_MUTE_EN_MASK,
348
+
DA7218_IN_1L_FILTER_EN_MASK);
349
+
snd_soc_update_bits(codec, DA7218_IN_1R_FILTER_CTRL,
350
+
DA7218_IN_1R_FILTER_EN_MASK |
351
+
DA7218_IN_1R_MUTE_EN_MASK,
352
+
DA7218_IN_1R_FILTER_EN_MASK);
353
+
snd_soc_update_bits(codec, DA7218_IN_2L_FILTER_CTRL,
354
+
DA7218_IN_2L_FILTER_EN_MASK |
355
+
DA7218_IN_2L_MUTE_EN_MASK,
356
+
DA7218_IN_2L_FILTER_EN_MASK);
357
+
snd_soc_update_bits(codec, DA7218_IN_2R_FILTER_CTRL,
358
+
DA7218_IN_2R_FILTER_EN_MASK |
359
+
DA7218_IN_2R_MUTE_EN_MASK,
360
+
DA7218_IN_2R_FILTER_EN_MASK);
361
+
362
+
/*
363
+
* Make sure input HPFs voice mode is disabled, otherwise for sampling
364
+
* rates above 32KHz the ADC signals will be stopped and will cause
365
+
* calibration to lock up.
366
+
*/
367
+
snd_soc_update_bits(codec, DA7218_IN_1_HPF_FILTER_CTRL,
368
+
DA7218_IN_1_VOICE_EN_MASK, 0);
369
+
snd_soc_update_bits(codec, DA7218_IN_2_HPF_FILTER_CTRL,
370
+
DA7218_IN_2_VOICE_EN_MASK, 0);
371
+
372
+
/* Perform auto calibration */
373
+
snd_soc_update_bits(codec, DA7218_CALIB_CTRL, DA7218_CALIB_AUTO_EN_MASK,
374
+
DA7218_CALIB_AUTO_EN_MASK);
375
+
do {
376
+
calib_ctrl = snd_soc_read(codec, DA7218_CALIB_CTRL);
377
+
if (calib_ctrl & DA7218_CALIB_AUTO_EN_MASK) {
378
+
++i;
379
+
usleep_range(DA7218_ALC_CALIB_DELAY_MIN,
380
+
DA7218_ALC_CALIB_DELAY_MAX);
381
+
} else {
382
+
calibrated = true;
383
+
}
384
+
385
+
} while ((i < DA7218_ALC_CALIB_MAX_TRIES) && (!calibrated));
386
+
387
+
/* If auto calibration fails, disable DC offset, hybrid ALC */
388
+
if ((!calibrated) || (calib_ctrl & DA7218_CALIB_OVERFLOW_MASK)) {
389
+
dev_warn(codec->dev,
390
+
"ALC auto calibration failed - %s\n",
391
+
(calibrated) ? "overflow" : "timeout");
392
+
snd_soc_update_bits(codec, DA7218_CALIB_CTRL,
393
+
DA7218_CALIB_OFFSET_EN_MASK, 0);
394
+
snd_soc_update_bits(codec, DA7218_ALC_CTRL1,
395
+
DA7218_ALC_SYNC_MODE_MASK, 0);
396
+
397
+
} else {
398
+
/* Enable DC offset cancellation */
399
+
snd_soc_update_bits(codec, DA7218_CALIB_CTRL,
400
+
DA7218_CALIB_OFFSET_EN_MASK,
401
+
DA7218_CALIB_OFFSET_EN_MASK);
402
+
403
+
/* Enable ALC hybrid mode */
404
+
snd_soc_update_bits(codec, DA7218_ALC_CTRL1,
405
+
DA7218_ALC_SYNC_MODE_MASK,
406
+
DA7218_ALC_SYNC_MODE_CH1 |
407
+
DA7218_ALC_SYNC_MODE_CH2);
408
+
}
409
+
410
+
/* Restore input HPF control registers to original states */
411
+
snd_soc_write(codec, DA7218_IN_1_HPF_FILTER_CTRL, in_1_hpf_ctrl);
412
+
snd_soc_write(codec, DA7218_IN_2_HPF_FILTER_CTRL, in_2_hpf_ctrl);
413
+
414
+
/* Restore input filter control registers to original states */
415
+
snd_soc_write(codec, DA7218_IN_1L_FILTER_CTRL, in_1l_filt_ctrl);
416
+
snd_soc_write(codec, DA7218_IN_1R_FILTER_CTRL, in_1r_filt_ctrl);
417
+
snd_soc_write(codec, DA7218_IN_2L_FILTER_CTRL, in_2l_filt_ctrl);
418
+
snd_soc_write(codec, DA7218_IN_2R_FILTER_CTRL, in_2r_filt_ctrl);
419
+
420
+
/* Restore input mixer control registers to original state */
421
+
snd_soc_write(codec, DA7218_MIXIN_1_CTRL, mixin_1_ctrl);
422
+
snd_soc_write(codec, DA7218_MIXIN_2_CTRL, mixin_2_ctrl);
423
+
424
+
/* Restore MIC control registers to original states */
425
+
snd_soc_write(codec, DA7218_MIC_1_CTRL, mic_1_ctrl);
426
+
snd_soc_write(codec, DA7218_MIC_2_CTRL, mic_2_ctrl);
427
+
}
428
+
429
+
static int da7218_mixin_gain_put(struct snd_kcontrol *kcontrol,
430
+
struct snd_ctl_elem_value *ucontrol)
431
+
{
432
+
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
433
+
struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
434
+
int ret;
435
+
436
+
ret = snd_soc_put_volsw(kcontrol, ucontrol);
437
+
438
+
/*
439
+
* If ALC in operation and value of control has been updated,
440
+
* make sure calibrated offsets are updated.
441
+
*/
442
+
if ((ret == 1) && (da7218->alc_en))
443
+
da7218_alc_calib(codec);
444
+
445
+
return ret;
446
+
}
447
+
448
+
static int da7218_alc_sw_put(struct snd_kcontrol *kcontrol,
449
+
struct snd_ctl_elem_value *ucontrol)
450
+
{
451
+
struct soc_mixer_control *mc =
452
+
(struct soc_mixer_control *) kcontrol->private_value;
453
+
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
454
+
struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
455
+
unsigned int lvalue = ucontrol->value.integer.value[0];
456
+
unsigned int rvalue = ucontrol->value.integer.value[1];
457
+
unsigned int lshift = mc->shift;
458
+
unsigned int rshift = mc->rshift;
459
+
unsigned int mask = (mc->max << lshift) | (mc->max << rshift);
460
+
461
+
/* Force ALC offset calibration if enabling ALC */
462
+
if ((lvalue || rvalue) && (!da7218->alc_en))
463
+
da7218_alc_calib(codec);
464
+
465
+
/* Update bits to detail which channels are enabled/disabled */
466
+
da7218->alc_en &= ~mask;
467
+
da7218->alc_en |= (lvalue << lshift) | (rvalue << rshift);
468
+
469
+
return snd_soc_put_volsw(kcontrol, ucontrol);
470
+
}
471
+
472
+
/* ToneGen */
473
+
static int da7218_tonegen_freq_get(struct snd_kcontrol *kcontrol,
474
+
struct snd_ctl_elem_value *ucontrol)
475
+
{
476
+
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
477
+
struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
478
+
struct soc_mixer_control *mixer_ctrl =
479
+
(struct soc_mixer_control *) kcontrol->private_value;
480
+
unsigned int reg = mixer_ctrl->reg;
481
+
u16 val;
482
+
int ret;
483
+
484
+
/*
485
+
* Frequency value spans two 8-bit registers, lower then upper byte.
486
+
* Therefore we need to convert to host endianness here.
487
+
*/
488
+
ret = regmap_raw_read(da7218->regmap, reg, &val, 2);
489
+
if (ret)
490
+
return ret;
491
+
492
+
ucontrol->value.integer.value[0] = le16_to_cpu(val);
493
+
494
+
return 0;
495
+
}
496
+
497
+
static int da7218_tonegen_freq_put(struct snd_kcontrol *kcontrol,
498
+
struct snd_ctl_elem_value *ucontrol)
499
+
{
500
+
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
501
+
struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
502
+
struct soc_mixer_control *mixer_ctrl =
503
+
(struct soc_mixer_control *) kcontrol->private_value;
504
+
unsigned int reg = mixer_ctrl->reg;
505
+
u16 val;
506
+
507
+
/*
508
+
* Frequency value spans two 8-bit registers, lower then upper byte.
509
+
* Therefore we need to convert to little endian here to align with
510
+
* HW registers.
511
+
*/
512
+
val = cpu_to_le16(ucontrol->value.integer.value[0]);
513
+
514
+
return regmap_raw_write(da7218->regmap, reg, &val, 2);
515
+
}
516
+
517
+
static int da7218_mic_lvl_det_sw_put(struct snd_kcontrol *kcontrol,
518
+
struct snd_ctl_elem_value *ucontrol)
519
+
{
520
+
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
521
+
struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
522
+
struct soc_mixer_control *mixer_ctrl =
523
+
(struct soc_mixer_control *) kcontrol->private_value;
524
+
unsigned int lvalue = ucontrol->value.integer.value[0];
525
+
unsigned int rvalue = ucontrol->value.integer.value[1];
526
+
unsigned int lshift = mixer_ctrl->shift;
527
+
unsigned int rshift = mixer_ctrl->rshift;
528
+
unsigned int mask = (mixer_ctrl->max << lshift) |
529
+
(mixer_ctrl->max << rshift);
530
+
da7218->mic_lvl_det_en &= ~mask;
531
+
da7218->mic_lvl_det_en |= (lvalue << lshift) | (rvalue << rshift);
532
+
533
+
/*
534
+
* Here we only enable the feature on paths which are already
535
+
* powered. If a channel is enabled here for level detect, but that path
536
+
* isn't powered, then the channel will actually be enabled when we do
537
+
* power the path (IN_FILTER widget events). This handling avoids
538
+
* unwanted level detect events.
539
+
*/
540
+
return snd_soc_write(codec, mixer_ctrl->reg,
541
+
(da7218->in_filt_en & da7218->mic_lvl_det_en));
542
+
}
543
+
544
+
static int da7218_mic_lvl_det_sw_get(struct snd_kcontrol *kcontrol,
545
+
struct snd_ctl_elem_value *ucontrol)
546
+
{
547
+
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
548
+
struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
549
+
struct soc_mixer_control *mixer_ctrl =
550
+
(struct soc_mixer_control *) kcontrol->private_value;
551
+
unsigned int lshift = mixer_ctrl->shift;
552
+
unsigned int rshift = mixer_ctrl->rshift;
553
+
unsigned int lmask = (mixer_ctrl->max << lshift);
554
+
unsigned int rmask = (mixer_ctrl->max << rshift);
555
+
556
+
ucontrol->value.integer.value[0] =
557
+
(da7218->mic_lvl_det_en & lmask) >> lshift;
558
+
ucontrol->value.integer.value[1] =
559
+
(da7218->mic_lvl_det_en & rmask) >> rshift;
560
+
561
+
return 0;
562
+
}
563
+
564
+
static int da7218_biquad_coeff_get(struct snd_kcontrol *kcontrol,
565
+
struct snd_ctl_elem_value *ucontrol)
566
+
{
567
+
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
568
+
struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
569
+
struct soc_bytes_ext *bytes_ext =
570
+
(struct soc_bytes_ext *) kcontrol->private_value;
571
+
572
+
/* Determine which BiQuads we're setting based on size of config data */
573
+
switch (bytes_ext->max) {
574
+
case DA7218_OUT_1_BIQ_5STAGE_CFG_SIZE:
575
+
memcpy(ucontrol->value.bytes.data, da7218->biq_5stage_coeff,
576
+
bytes_ext->max);
577
+
break;
578
+
case DA7218_SIDETONE_BIQ_3STAGE_CFG_SIZE:
579
+
memcpy(ucontrol->value.bytes.data, da7218->stbiq_3stage_coeff,
580
+
bytes_ext->max);
581
+
break;
582
+
default:
583
+
return -EINVAL;
584
+
}
585
+
586
+
return 0;
587
+
}
588
+
589
+
static int da7218_biquad_coeff_put(struct snd_kcontrol *kcontrol,
590
+
struct snd_ctl_elem_value *ucontrol)
591
+
{
592
+
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
593
+
struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
594
+
struct soc_bytes_ext *bytes_ext =
595
+
(struct soc_bytes_ext *) kcontrol->private_value;
596
+
u8 reg, out_filt1l;
597
+
u8 cfg[DA7218_BIQ_CFG_SIZE];
598
+
int i;
599
+
600
+
/*
601
+
* Determine which BiQuads we're setting based on size of config data,
602
+
* and stored the data for use by get function.
603
+
*/
604
+
switch (bytes_ext->max) {
605
+
case DA7218_OUT_1_BIQ_5STAGE_CFG_SIZE:
606
+
reg = DA7218_OUT_1_BIQ_5STAGE_DATA;
607
+
memcpy(da7218->biq_5stage_coeff, ucontrol->value.bytes.data,
608
+
bytes_ext->max);
609
+
break;
610
+
case DA7218_SIDETONE_BIQ_3STAGE_CFG_SIZE:
611
+
reg = DA7218_SIDETONE_BIQ_3STAGE_DATA;
612
+
memcpy(da7218->stbiq_3stage_coeff, ucontrol->value.bytes.data,
613
+
bytes_ext->max);
614
+
break;
615
+
default:
616
+
return -EINVAL;
617
+
}
618
+
619
+
/* Make sure at least out filter1 enabled to allow programming */
620
+
out_filt1l = snd_soc_read(codec, DA7218_OUT_1L_FILTER_CTRL);
621
+
snd_soc_write(codec, DA7218_OUT_1L_FILTER_CTRL,
622
+
out_filt1l | DA7218_OUT_1L_FILTER_EN_MASK);
623
+
624
+
for (i = 0; i < bytes_ext->max; ++i) {
625
+
cfg[DA7218_BIQ_CFG_DATA] = ucontrol->value.bytes.data[i];
626
+
cfg[DA7218_BIQ_CFG_ADDR] = i;
627
+
regmap_raw_write(da7218->regmap, reg, cfg, DA7218_BIQ_CFG_SIZE);
628
+
}
629
+
630
+
/* Restore filter to previous setting */
631
+
snd_soc_write(codec, DA7218_OUT_1L_FILTER_CTRL, out_filt1l);
632
+
633
+
return 0;
634
+
}
635
+
636
+
637
+
/*
638
+
* KControls
639
+
*/
640
+
641
+
static const struct snd_kcontrol_new da7218_snd_controls[] = {
642
+
/* Mics */
643
+
SOC_SINGLE_TLV("Mic1 Volume", DA7218_MIC_1_GAIN,
644
+
DA7218_MIC_1_AMP_GAIN_SHIFT, DA7218_MIC_AMP_GAIN_MAX,
645
+
DA7218_NO_INVERT, da7218_mic_gain_tlv),
646
+
SOC_SINGLE("Mic1 Switch", DA7218_MIC_1_CTRL,
647
+
DA7218_MIC_1_AMP_MUTE_EN_SHIFT, DA7218_SWITCH_EN_MAX,
648
+
DA7218_INVERT),
649
+
SOC_SINGLE_TLV("Mic2 Volume", DA7218_MIC_2_GAIN,
650
+
DA7218_MIC_2_AMP_GAIN_SHIFT, DA7218_MIC_AMP_GAIN_MAX,
651
+
DA7218_NO_INVERT, da7218_mic_gain_tlv),
652
+
SOC_SINGLE("Mic2 Switch", DA7218_MIC_2_CTRL,
653
+
DA7218_MIC_2_AMP_MUTE_EN_SHIFT, DA7218_SWITCH_EN_MAX,
654
+
DA7218_INVERT),
655
+
656
+
/* Mixer Input */
657
+
SOC_SINGLE_EXT_TLV("Mixin1 Volume", DA7218_MIXIN_1_GAIN,
658
+
DA7218_MIXIN_1_AMP_GAIN_SHIFT,
659
+
DA7218_MIXIN_AMP_GAIN_MAX, DA7218_NO_INVERT,
660
+
snd_soc_get_volsw, da7218_mixin_gain_put,
661
+
da7218_mixin_gain_tlv),
662
+
SOC_SINGLE("Mixin1 Switch", DA7218_MIXIN_1_CTRL,
663
+
DA7218_MIXIN_1_AMP_MUTE_EN_SHIFT, DA7218_SWITCH_EN_MAX,
664
+
DA7218_INVERT),
665
+
SOC_SINGLE("Mixin1 Gain Ramp Switch", DA7218_MIXIN_1_CTRL,
666
+
DA7218_MIXIN_1_AMP_RAMP_EN_SHIFT, DA7218_SWITCH_EN_MAX,
667
+
DA7218_NO_INVERT),
668
+
SOC_SINGLE("Mixin1 ZC Gain Switch", DA7218_MIXIN_1_CTRL,
669
+
DA7218_MIXIN_1_AMP_ZC_EN_SHIFT, DA7218_SWITCH_EN_MAX,
670
+
DA7218_NO_INVERT),
671
+
SOC_SINGLE_EXT_TLV("Mixin2 Volume", DA7218_MIXIN_2_GAIN,
672
+
DA7218_MIXIN_2_AMP_GAIN_SHIFT,
673
+
DA7218_MIXIN_AMP_GAIN_MAX, DA7218_NO_INVERT,
674
+
snd_soc_get_volsw, da7218_mixin_gain_put,
675
+
da7218_mixin_gain_tlv),
676
+
SOC_SINGLE("Mixin2 Switch", DA7218_MIXIN_2_CTRL,
677
+
DA7218_MIXIN_2_AMP_MUTE_EN_SHIFT, DA7218_SWITCH_EN_MAX,
678
+
DA7218_INVERT),
679
+
SOC_SINGLE("Mixin2 Gain Ramp Switch", DA7218_MIXIN_2_CTRL,
680
+
DA7218_MIXIN_2_AMP_RAMP_EN_SHIFT, DA7218_SWITCH_EN_MAX,
681
+
DA7218_NO_INVERT),
682
+
SOC_SINGLE("Mixin2 ZC Gain Switch", DA7218_MIXIN_2_CTRL,
683
+
DA7218_MIXIN_2_AMP_ZC_EN_SHIFT, DA7218_SWITCH_EN_MAX,
684
+
DA7218_NO_INVERT),
685
+
686
+
/* ADCs */
687
+
SOC_SINGLE("ADC1 AAF Switch", DA7218_ADC_1_CTRL,
688
+
DA7218_ADC_1_AAF_EN_SHIFT, DA7218_SWITCH_EN_MAX,
689
+
DA7218_NO_INVERT),
690
+
SOC_SINGLE("ADC2 AAF Switch", DA7218_ADC_2_CTRL,
691
+
DA7218_ADC_2_AAF_EN_SHIFT, DA7218_SWITCH_EN_MAX,
692
+
DA7218_NO_INVERT),
693
+
SOC_SINGLE("ADC LP Mode Switch", DA7218_ADC_MODE,
694
+
DA7218_ADC_LP_MODE_SHIFT, DA7218_SWITCH_EN_MAX,
695
+
DA7218_NO_INVERT),
696
+
697
+
/* Input Filters */
698
+
SOC_SINGLE_TLV("In Filter1L Volume", DA7218_IN_1L_GAIN,
699
+
DA7218_IN_1L_DIGITAL_GAIN_SHIFT,
700
+
DA7218_IN_DIGITAL_GAIN_MAX, DA7218_NO_INVERT,
701
+
da7218_in_dig_gain_tlv),
702
+
SOC_SINGLE("In Filter1L Switch", DA7218_IN_1L_FILTER_CTRL,
703
+
DA7218_IN_1L_MUTE_EN_SHIFT, DA7218_SWITCH_EN_MAX,
704
+
DA7218_INVERT),
705
+
SOC_SINGLE("In Filter1L Gain Ramp Switch", DA7218_IN_1L_FILTER_CTRL,
706
+
DA7218_IN_1L_RAMP_EN_SHIFT, DA7218_SWITCH_EN_MAX,
707
+
DA7218_NO_INVERT),
708
+
SOC_SINGLE_TLV("In Filter1R Volume", DA7218_IN_1R_GAIN,
709
+
DA7218_IN_1R_DIGITAL_GAIN_SHIFT,
710
+
DA7218_IN_DIGITAL_GAIN_MAX, DA7218_NO_INVERT,
711
+
da7218_in_dig_gain_tlv),
712
+
SOC_SINGLE("In Filter1R Switch", DA7218_IN_1R_FILTER_CTRL,
713
+
DA7218_IN_1R_MUTE_EN_SHIFT, DA7218_SWITCH_EN_MAX,
714
+
DA7218_INVERT),
715
+
SOC_SINGLE("In Filter1R Gain Ramp Switch",
716
+
DA7218_IN_1R_FILTER_CTRL, DA7218_IN_1R_RAMP_EN_SHIFT,
717
+
DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT),
718
+
SOC_SINGLE_TLV("In Filter2L Volume", DA7218_IN_2L_GAIN,
719
+
DA7218_IN_2L_DIGITAL_GAIN_SHIFT,
720
+
DA7218_IN_DIGITAL_GAIN_MAX, DA7218_NO_INVERT,
721
+
da7218_in_dig_gain_tlv),
722
+
SOC_SINGLE("In Filter2L Switch", DA7218_IN_2L_FILTER_CTRL,
723
+
DA7218_IN_2L_MUTE_EN_SHIFT, DA7218_SWITCH_EN_MAX,
724
+
DA7218_INVERT),
725
+
SOC_SINGLE("In Filter2L Gain Ramp Switch", DA7218_IN_2L_FILTER_CTRL,
726
+
DA7218_IN_2L_RAMP_EN_SHIFT, DA7218_SWITCH_EN_MAX,
727
+
DA7218_NO_INVERT),
728
+
SOC_SINGLE_TLV("In Filter2R Volume", DA7218_IN_2R_GAIN,
729
+
DA7218_IN_2R_DIGITAL_GAIN_SHIFT,
730
+
DA7218_IN_DIGITAL_GAIN_MAX, DA7218_NO_INVERT,
731
+
da7218_in_dig_gain_tlv),
732
+
SOC_SINGLE("In Filter2R Switch", DA7218_IN_2R_FILTER_CTRL,
733
+
DA7218_IN_2R_MUTE_EN_SHIFT, DA7218_SWITCH_EN_MAX,
734
+
DA7218_INVERT),
735
+
SOC_SINGLE("In Filter2R Gain Ramp Switch",
736
+
DA7218_IN_2R_FILTER_CTRL, DA7218_IN_2R_RAMP_EN_SHIFT,
737
+
DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT),
738
+
739
+
/* AGS */
740
+
SOC_SINGLE_TLV("AGS Trigger", DA7218_AGS_TRIGGER,
741
+
DA7218_AGS_TRIGGER_SHIFT, DA7218_AGS_TRIGGER_MAX,
742
+
DA7218_INVERT, da7218_ags_trigger_tlv),
743
+
SOC_SINGLE_TLV("AGS Max Attenuation", DA7218_AGS_ATT_MAX,
744
+
DA7218_AGS_ATT_MAX_SHIFT, DA7218_AGS_ATT_MAX_MAX,
745
+
DA7218_NO_INVERT, da7218_ags_att_max_tlv),
746
+
SOC_SINGLE("AGS Anticlip Switch", DA7218_AGS_ANTICLIP_CTRL,
747
+
DA7218_AGS_ANTICLIP_EN_SHIFT, DA7218_SWITCH_EN_MAX,
748
+
DA7218_NO_INVERT),
749
+
SOC_SINGLE("AGS Channel1 Switch", DA7218_AGS_ENABLE,
750
+
DA7218_AGS_ENABLE_CHAN1_SHIFT, DA7218_SWITCH_EN_MAX,
751
+
DA7218_NO_INVERT),
752
+
SOC_SINGLE("AGS Channel2 Switch", DA7218_AGS_ENABLE,
753
+
DA7218_AGS_ENABLE_CHAN2_SHIFT, DA7218_SWITCH_EN_MAX,
754
+
DA7218_NO_INVERT),
755
+
756
+
/* ALC */
757
+
SOC_ENUM("ALC Attack Rate", da7218_alc_attack_rate),
758
+
SOC_ENUM("ALC Release Rate", da7218_alc_release_rate),
759
+
SOC_ENUM("ALC Hold Time", da7218_alc_hold_time),
760
+
SOC_SINGLE_TLV("ALC Noise Threshold", DA7218_ALC_NOISE,
761
+
DA7218_ALC_NOISE_SHIFT, DA7218_ALC_THRESHOLD_MAX,
762
+
DA7218_INVERT, da7218_alc_threshold_tlv),
763
+
SOC_SINGLE_TLV("ALC Min Threshold", DA7218_ALC_TARGET_MIN,
764
+
DA7218_ALC_THRESHOLD_MIN_SHIFT, DA7218_ALC_THRESHOLD_MAX,
765
+
DA7218_INVERT, da7218_alc_threshold_tlv),
766
+
SOC_SINGLE_TLV("ALC Max Threshold", DA7218_ALC_TARGET_MAX,
767
+
DA7218_ALC_THRESHOLD_MAX_SHIFT, DA7218_ALC_THRESHOLD_MAX,
768
+
DA7218_INVERT, da7218_alc_threshold_tlv),
769
+
SOC_SINGLE_TLV("ALC Max Attenuation", DA7218_ALC_GAIN_LIMITS,
770
+
DA7218_ALC_ATTEN_MAX_SHIFT, DA7218_ALC_ATTEN_GAIN_MAX,
771
+
DA7218_NO_INVERT, da7218_alc_gain_tlv),
772
+
SOC_SINGLE_TLV("ALC Max Gain", DA7218_ALC_GAIN_LIMITS,
773
+
DA7218_ALC_GAIN_MAX_SHIFT, DA7218_ALC_ATTEN_GAIN_MAX,
774
+
DA7218_NO_INVERT, da7218_alc_gain_tlv),
775
+
SOC_SINGLE_RANGE_TLV("ALC Min Analog Gain", DA7218_ALC_ANA_GAIN_LIMITS,
776
+
DA7218_ALC_ANA_GAIN_MIN_SHIFT,
777
+
DA7218_ALC_ANA_GAIN_MIN, DA7218_ALC_ANA_GAIN_MAX,
778
+
DA7218_NO_INVERT, da7218_alc_ana_gain_tlv),
779
+
SOC_SINGLE_RANGE_TLV("ALC Max Analog Gain", DA7218_ALC_ANA_GAIN_LIMITS,
780
+
DA7218_ALC_ANA_GAIN_MAX_SHIFT,
781
+
DA7218_ALC_ANA_GAIN_MIN, DA7218_ALC_ANA_GAIN_MAX,
782
+
DA7218_NO_INVERT, da7218_alc_ana_gain_tlv),
783
+
SOC_ENUM("ALC Anticlip Step", da7218_alc_anticlip_step),
784
+
SOC_SINGLE("ALC Anticlip Switch", DA7218_ALC_ANTICLIP_CTRL,
785
+
DA7218_ALC_ANTICLIP_EN_SHIFT, DA7218_SWITCH_EN_MAX,
786
+
DA7218_NO_INVERT),
787
+
SOC_DOUBLE_EXT("ALC Channel1 Switch", DA7218_ALC_CTRL1,
788
+
DA7218_ALC_CHAN1_L_EN_SHIFT, DA7218_ALC_CHAN1_R_EN_SHIFT,
789
+
DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT,
790
+
snd_soc_get_volsw, da7218_alc_sw_put),
791
+
SOC_DOUBLE_EXT("ALC Channel2 Switch", DA7218_ALC_CTRL1,
792
+
DA7218_ALC_CHAN2_L_EN_SHIFT, DA7218_ALC_CHAN2_R_EN_SHIFT,
793
+
DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT,
794
+
snd_soc_get_volsw, da7218_alc_sw_put),
795
+
796
+
/* Envelope Tracking */
797
+
SOC_ENUM("Envelope Tracking Attack Rate", da7218_integ_attack_rate),
798
+
SOC_ENUM("Envelope Tracking Release Rate", da7218_integ_release_rate),
799
+
800
+
/* Input High-Pass Filters */
801
+
SOC_ENUM("In Filter1 HPF Mode", da7218_in1_hpf_mode),
802
+
SOC_ENUM("In Filter1 HPF Corner Audio", da7218_in1_audio_hpf_corner),
803
+
SOC_ENUM("In Filter1 HPF Corner Voice", da7218_in1_voice_hpf_corner),
804
+
SOC_ENUM("In Filter2 HPF Mode", da7218_in2_hpf_mode),
805
+
SOC_ENUM("In Filter2 HPF Corner Audio", da7218_in2_audio_hpf_corner),
806
+
SOC_ENUM("In Filter2 HPF Corner Voice", da7218_in2_voice_hpf_corner),
807
+
808
+
/* Mic Level Detect */
809
+
SOC_DOUBLE_EXT("Mic Level Detect Channel1 Switch", DA7218_LVL_DET_CTRL,
810
+
DA7218_LVL_DET_EN_CHAN1L_SHIFT,
811
+
DA7218_LVL_DET_EN_CHAN1R_SHIFT, DA7218_SWITCH_EN_MAX,
812
+
DA7218_NO_INVERT, da7218_mic_lvl_det_sw_get,
813
+
da7218_mic_lvl_det_sw_put),
814
+
SOC_DOUBLE_EXT("Mic Level Detect Channel2 Switch", DA7218_LVL_DET_CTRL,
815
+
DA7218_LVL_DET_EN_CHAN2L_SHIFT,
816
+
DA7218_LVL_DET_EN_CHAN2R_SHIFT, DA7218_SWITCH_EN_MAX,
817
+
DA7218_NO_INVERT, da7218_mic_lvl_det_sw_get,
818
+
da7218_mic_lvl_det_sw_put),
819
+
SOC_SINGLE("Mic Level Detect Level", DA7218_LVL_DET_LEVEL,
820
+
DA7218_LVL_DET_LEVEL_SHIFT, DA7218_LVL_DET_LEVEL_MAX,
821
+
DA7218_NO_INVERT),
822
+
823
+
/* Digital Mixer (Input) */
824
+
SOC_SINGLE_TLV("DMix In Filter1L Out1 DAIL Volume",
825
+
DA7218_DMIX_OUTDAI_1L_INFILT_1L_GAIN,
826
+
DA7218_OUTDAI_1L_INFILT_1L_GAIN_SHIFT,
827
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
828
+
da7218_dmix_gain_tlv),
829
+
SOC_SINGLE_TLV("DMix In Filter1L Out1 DAIR Volume",
830
+
DA7218_DMIX_OUTDAI_1R_INFILT_1L_GAIN,
831
+
DA7218_OUTDAI_1R_INFILT_1L_GAIN_SHIFT,
832
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
833
+
da7218_dmix_gain_tlv),
834
+
SOC_SINGLE_TLV("DMix In Filter1L Out2 DAIL Volume",
835
+
DA7218_DMIX_OUTDAI_2L_INFILT_1L_GAIN,
836
+
DA7218_OUTDAI_2L_INFILT_1L_GAIN_SHIFT,
837
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
838
+
da7218_dmix_gain_tlv),
839
+
SOC_SINGLE_TLV("DMix In Filter1L Out2 DAIR Volume",
840
+
DA7218_DMIX_OUTDAI_2R_INFILT_1L_GAIN,
841
+
DA7218_OUTDAI_2R_INFILT_1L_GAIN_SHIFT,
842
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
843
+
da7218_dmix_gain_tlv),
844
+
845
+
SOC_SINGLE_TLV("DMix In Filter1R Out1 DAIL Volume",
846
+
DA7218_DMIX_OUTDAI_1L_INFILT_1R_GAIN,
847
+
DA7218_OUTDAI_1L_INFILT_1R_GAIN_SHIFT,
848
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
849
+
da7218_dmix_gain_tlv),
850
+
SOC_SINGLE_TLV("DMix In Filter1R Out1 DAIR Volume",
851
+
DA7218_DMIX_OUTDAI_1R_INFILT_1R_GAIN,
852
+
DA7218_OUTDAI_1R_INFILT_1R_GAIN_SHIFT,
853
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
854
+
da7218_dmix_gain_tlv),
855
+
SOC_SINGLE_TLV("DMix In Filter1R Out2 DAIL Volume",
856
+
DA7218_DMIX_OUTDAI_2L_INFILT_1R_GAIN,
857
+
DA7218_OUTDAI_2L_INFILT_1R_GAIN_SHIFT,
858
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
859
+
da7218_dmix_gain_tlv),
860
+
SOC_SINGLE_TLV("DMix In Filter1R Out2 DAIR Volume",
861
+
DA7218_DMIX_OUTDAI_2R_INFILT_1R_GAIN,
862
+
DA7218_OUTDAI_2R_INFILT_1R_GAIN_SHIFT,
863
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
864
+
da7218_dmix_gain_tlv),
865
+
866
+
SOC_SINGLE_TLV("DMix In Filter2L Out1 DAIL Volume",
867
+
DA7218_DMIX_OUTDAI_1L_INFILT_2L_GAIN,
868
+
DA7218_OUTDAI_1L_INFILT_2L_GAIN_SHIFT,
869
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
870
+
da7218_dmix_gain_tlv),
871
+
SOC_SINGLE_TLV("DMix In Filter2L Out1 DAIR Volume",
872
+
DA7218_DMIX_OUTDAI_1R_INFILT_2L_GAIN,
873
+
DA7218_OUTDAI_1R_INFILT_2L_GAIN_SHIFT,
874
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
875
+
da7218_dmix_gain_tlv),
876
+
SOC_SINGLE_TLV("DMix In Filter2L Out2 DAIL Volume",
877
+
DA7218_DMIX_OUTDAI_2L_INFILT_2L_GAIN,
878
+
DA7218_OUTDAI_2L_INFILT_2L_GAIN_SHIFT,
879
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
880
+
da7218_dmix_gain_tlv),
881
+
SOC_SINGLE_TLV("DMix In Filter2L Out2 DAIR Volume",
882
+
DA7218_DMIX_OUTDAI_2R_INFILT_2L_GAIN,
883
+
DA7218_OUTDAI_2R_INFILT_2L_GAIN_SHIFT,
884
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
885
+
da7218_dmix_gain_tlv),
886
+
887
+
SOC_SINGLE_TLV("DMix In Filter2R Out1 DAIL Volume",
888
+
DA7218_DMIX_OUTDAI_1L_INFILT_2R_GAIN,
889
+
DA7218_OUTDAI_1L_INFILT_2R_GAIN_SHIFT,
890
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
891
+
da7218_dmix_gain_tlv),
892
+
SOC_SINGLE_TLV("DMix In Filter2R Out1 DAIR Volume",
893
+
DA7218_DMIX_OUTDAI_1R_INFILT_2R_GAIN,
894
+
DA7218_OUTDAI_1R_INFILT_2R_GAIN_SHIFT,
895
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
896
+
da7218_dmix_gain_tlv),
897
+
SOC_SINGLE_TLV("DMix In Filter2R Out2 DAIL Volume",
898
+
DA7218_DMIX_OUTDAI_2L_INFILT_2R_GAIN,
899
+
DA7218_OUTDAI_2L_INFILT_2R_GAIN_SHIFT,
900
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
901
+
da7218_dmix_gain_tlv),
902
+
SOC_SINGLE_TLV("DMix In Filter2R Out2 DAIR Volume",
903
+
DA7218_DMIX_OUTDAI_2R_INFILT_2R_GAIN,
904
+
DA7218_OUTDAI_2R_INFILT_2R_GAIN_SHIFT,
905
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
906
+
da7218_dmix_gain_tlv),
907
+
908
+
SOC_SINGLE_TLV("DMix ToneGen Out1 DAIL Volume",
909
+
DA7218_DMIX_OUTDAI_1L_TONEGEN_GAIN,
910
+
DA7218_OUTDAI_1L_TONEGEN_GAIN_SHIFT,
911
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
912
+
da7218_dmix_gain_tlv),
913
+
SOC_SINGLE_TLV("DMix ToneGen Out1 DAIR Volume",
914
+
DA7218_DMIX_OUTDAI_1R_TONEGEN_GAIN,
915
+
DA7218_OUTDAI_1R_TONEGEN_GAIN_SHIFT,
916
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
917
+
da7218_dmix_gain_tlv),
918
+
SOC_SINGLE_TLV("DMix ToneGen Out2 DAIL Volume",
919
+
DA7218_DMIX_OUTDAI_2L_TONEGEN_GAIN,
920
+
DA7218_OUTDAI_2L_TONEGEN_GAIN_SHIFT,
921
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
922
+
da7218_dmix_gain_tlv),
923
+
SOC_SINGLE_TLV("DMix ToneGen Out2 DAIR Volume",
924
+
DA7218_DMIX_OUTDAI_2R_TONEGEN_GAIN,
925
+
DA7218_OUTDAI_2R_TONEGEN_GAIN_SHIFT,
926
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
927
+
da7218_dmix_gain_tlv),
928
+
929
+
SOC_SINGLE_TLV("DMix In DAIL Out1 DAIL Volume",
930
+
DA7218_DMIX_OUTDAI_1L_INDAI_1L_GAIN,
931
+
DA7218_OUTDAI_1L_INDAI_1L_GAIN_SHIFT,
932
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
933
+
da7218_dmix_gain_tlv),
934
+
SOC_SINGLE_TLV("DMix In DAIL Out1 DAIR Volume",
935
+
DA7218_DMIX_OUTDAI_1R_INDAI_1L_GAIN,
936
+
DA7218_OUTDAI_1R_INDAI_1L_GAIN_SHIFT,
937
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
938
+
da7218_dmix_gain_tlv),
939
+
SOC_SINGLE_TLV("DMix In DAIL Out2 DAIL Volume",
940
+
DA7218_DMIX_OUTDAI_2L_INDAI_1L_GAIN,
941
+
DA7218_OUTDAI_2L_INDAI_1L_GAIN_SHIFT,
942
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
943
+
da7218_dmix_gain_tlv),
944
+
SOC_SINGLE_TLV("DMix In DAIL Out2 DAIR Volume",
945
+
DA7218_DMIX_OUTDAI_2R_INDAI_1L_GAIN,
946
+
DA7218_OUTDAI_2R_INDAI_1L_GAIN_SHIFT,
947
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
948
+
da7218_dmix_gain_tlv),
949
+
950
+
SOC_SINGLE_TLV("DMix In DAIR Out1 DAIL Volume",
951
+
DA7218_DMIX_OUTDAI_1L_INDAI_1R_GAIN,
952
+
DA7218_OUTDAI_1L_INDAI_1R_GAIN_SHIFT,
953
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
954
+
da7218_dmix_gain_tlv),
955
+
SOC_SINGLE_TLV("DMix In DAIR Out1 DAIR Volume",
956
+
DA7218_DMIX_OUTDAI_1R_INDAI_1R_GAIN,
957
+
DA7218_OUTDAI_1R_INDAI_1R_GAIN_SHIFT,
958
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
959
+
da7218_dmix_gain_tlv),
960
+
SOC_SINGLE_TLV("DMix In DAIR Out2 DAIL Volume",
961
+
DA7218_DMIX_OUTDAI_2L_INDAI_1R_GAIN,
962
+
DA7218_OUTDAI_2L_INDAI_1R_GAIN_SHIFT,
963
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
964
+
da7218_dmix_gain_tlv),
965
+
SOC_SINGLE_TLV("DMix In DAIR Out2 DAIR Volume",
966
+
DA7218_DMIX_OUTDAI_2R_INDAI_1R_GAIN,
967
+
DA7218_OUTDAI_2R_INDAI_1R_GAIN_SHIFT,
968
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
969
+
da7218_dmix_gain_tlv),
970
+
971
+
/* Digital Mixer (Output) */
972
+
SOC_SINGLE_TLV("DMix In Filter1L Out FilterL Volume",
973
+
DA7218_DMIX_OUTFILT_1L_INFILT_1L_GAIN,
974
+
DA7218_OUTFILT_1L_INFILT_1L_GAIN_SHIFT,
975
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
976
+
da7218_dmix_gain_tlv),
977
+
SOC_SINGLE_TLV("DMix In Filter1L Out FilterR Volume",
978
+
DA7218_DMIX_OUTFILT_1R_INFILT_1L_GAIN,
979
+
DA7218_OUTFILT_1R_INFILT_1L_GAIN_SHIFT,
980
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
981
+
da7218_dmix_gain_tlv),
982
+
983
+
SOC_SINGLE_TLV("DMix In Filter1R Out FilterL Volume",
984
+
DA7218_DMIX_OUTFILT_1L_INFILT_1R_GAIN,
985
+
DA7218_OUTFILT_1L_INFILT_1R_GAIN_SHIFT,
986
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
987
+
da7218_dmix_gain_tlv),
988
+
SOC_SINGLE_TLV("DMix In Filter1R Out FilterR Volume",
989
+
DA7218_DMIX_OUTFILT_1R_INFILT_1R_GAIN,
990
+
DA7218_OUTFILT_1R_INFILT_1R_GAIN_SHIFT,
991
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
992
+
da7218_dmix_gain_tlv),
993
+
994
+
SOC_SINGLE_TLV("DMix In Filter2L Out FilterL Volume",
995
+
DA7218_DMIX_OUTFILT_1L_INFILT_2L_GAIN,
996
+
DA7218_OUTFILT_1L_INFILT_2L_GAIN_SHIFT,
997
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
998
+
da7218_dmix_gain_tlv),
999
+
SOC_SINGLE_TLV("DMix In Filter2L Out FilterR Volume",
1000
+
DA7218_DMIX_OUTFILT_1R_INFILT_2L_GAIN,
1001
+
DA7218_OUTFILT_1R_INFILT_2L_GAIN_SHIFT,
1002
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
1003
+
da7218_dmix_gain_tlv),
1004
+
1005
+
SOC_SINGLE_TLV("DMix In Filter2R Out FilterL Volume",
1006
+
DA7218_DMIX_OUTFILT_1L_INFILT_2R_GAIN,
1007
+
DA7218_OUTFILT_1L_INFILT_2R_GAIN_SHIFT,
1008
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
1009
+
da7218_dmix_gain_tlv),
1010
+
SOC_SINGLE_TLV("DMix In Filter2R Out FilterR Volume",
1011
+
DA7218_DMIX_OUTFILT_1R_INFILT_2R_GAIN,
1012
+
DA7218_OUTFILT_1R_INFILT_2R_GAIN_SHIFT,
1013
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
1014
+
da7218_dmix_gain_tlv),
1015
+
1016
+
SOC_SINGLE_TLV("DMix ToneGen Out FilterL Volume",
1017
+
DA7218_DMIX_OUTFILT_1L_TONEGEN_GAIN,
1018
+
DA7218_OUTFILT_1L_TONEGEN_GAIN_SHIFT,
1019
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
1020
+
da7218_dmix_gain_tlv),
1021
+
SOC_SINGLE_TLV("DMix ToneGen Out FilterR Volume",
1022
+
DA7218_DMIX_OUTFILT_1R_TONEGEN_GAIN,
1023
+
DA7218_OUTFILT_1R_TONEGEN_GAIN_SHIFT,
1024
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
1025
+
da7218_dmix_gain_tlv),
1026
+
1027
+
SOC_SINGLE_TLV("DMix In DAIL Out FilterL Volume",
1028
+
DA7218_DMIX_OUTFILT_1L_INDAI_1L_GAIN,
1029
+
DA7218_OUTFILT_1L_INDAI_1L_GAIN_SHIFT,
1030
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
1031
+
da7218_dmix_gain_tlv),
1032
+
SOC_SINGLE_TLV("DMix In DAIL Out FilterR Volume",
1033
+
DA7218_DMIX_OUTFILT_1R_INDAI_1L_GAIN,
1034
+
DA7218_OUTFILT_1R_INDAI_1L_GAIN_SHIFT,
1035
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
1036
+
da7218_dmix_gain_tlv),
1037
+
1038
+
SOC_SINGLE_TLV("DMix In DAIR Out FilterL Volume",
1039
+
DA7218_DMIX_OUTFILT_1L_INDAI_1R_GAIN,
1040
+
DA7218_OUTFILT_1L_INDAI_1R_GAIN_SHIFT,
1041
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
1042
+
da7218_dmix_gain_tlv),
1043
+
SOC_SINGLE_TLV("DMix In DAIR Out FilterR Volume",
1044
+
DA7218_DMIX_OUTFILT_1R_INDAI_1R_GAIN,
1045
+
DA7218_OUTFILT_1R_INDAI_1R_GAIN_SHIFT,
1046
+
DA7218_DMIX_GAIN_MAX, DA7218_NO_INVERT,
1047
+
da7218_dmix_gain_tlv),
1048
+
1049
+
/* Sidetone Filter */
1050
+
SND_SOC_BYTES_EXT("Sidetone BiQuad Coefficients",
1051
+
DA7218_SIDETONE_BIQ_3STAGE_CFG_SIZE,
1052
+
da7218_biquad_coeff_get, da7218_biquad_coeff_put),
1053
+
SOC_SINGLE_TLV("Sidetone Volume", DA7218_SIDETONE_GAIN,
1054
+
DA7218_SIDETONE_GAIN_SHIFT, DA7218_DMIX_GAIN_MAX,
1055
+
DA7218_NO_INVERT, da7218_dmix_gain_tlv),
1056
+
SOC_SINGLE("Sidetone Switch", DA7218_SIDETONE_CTRL,
1057
+
DA7218_SIDETONE_MUTE_EN_SHIFT, DA7218_SWITCH_EN_MAX,
1058
+
DA7218_INVERT),
1059
+
1060
+
/* Tone Generator */
1061
+
SOC_ENUM("ToneGen DTMF Key", da7218_tonegen_dtmf_key),
1062
+
SOC_SINGLE("ToneGen DTMF Switch", DA7218_TONE_GEN_CFG1,
1063
+
DA7218_DTMF_EN_SHIFT, DA7218_SWITCH_EN_MAX,
1064
+
DA7218_NO_INVERT),
1065
+
SOC_ENUM("ToneGen Sinewave Gen Type", da7218_tonegen_swg_sel),
1066
+
SOC_SINGLE_EXT("ToneGen Sinewave1 Freq", DA7218_TONE_GEN_FREQ1_L,
1067
+
DA7218_FREQ1_L_SHIFT, DA7218_FREQ_MAX, DA7218_NO_INVERT,
1068
+
da7218_tonegen_freq_get, da7218_tonegen_freq_put),
1069
+
SOC_SINGLE_EXT("ToneGen Sinewave2 Freq", DA7218_TONE_GEN_FREQ2_L,
1070
+
DA7218_FREQ2_L_SHIFT, DA7218_FREQ_MAX, DA7218_NO_INVERT,
1071
+
da7218_tonegen_freq_get, da7218_tonegen_freq_put),
1072
+
SOC_SINGLE("ToneGen On Time", DA7218_TONE_GEN_ON_PER,
1073
+
DA7218_BEEP_ON_PER_SHIFT, DA7218_BEEP_ON_OFF_MAX,
1074
+
DA7218_NO_INVERT),
1075
+
SOC_SINGLE("ToneGen Off Time", DA7218_TONE_GEN_OFF_PER,
1076
+
DA7218_BEEP_OFF_PER_SHIFT, DA7218_BEEP_ON_OFF_MAX,
1077
+
DA7218_NO_INVERT),
1078
+
1079
+
/* Gain ramping */
1080
+
SOC_ENUM("Gain Ramp Rate", da7218_gain_ramp_rate),
1081
+
1082
+
/* DGS */
1083
+
SOC_SINGLE_TLV("DGS Trigger", DA7218_DGS_TRIGGER,
1084
+
DA7218_DGS_TRIGGER_LVL_SHIFT, DA7218_DGS_TRIGGER_MAX,
1085
+
DA7218_INVERT, da7218_dgs_trigger_tlv),
1086
+
SOC_ENUM("DGS Rise Coefficient", da7218_dgs_rise_coeff),
1087
+
SOC_ENUM("DGS Fall Coefficient", da7218_dgs_fall_coeff),
1088
+
SOC_SINGLE("DGS Sync Delay", DA7218_DGS_SYNC_DELAY,
1089
+
DA7218_DGS_SYNC_DELAY_SHIFT, DA7218_DGS_SYNC_DELAY_MAX,
1090
+
DA7218_NO_INVERT),
1091
+
SOC_SINGLE("DGS Fast SR Sync Delay", DA7218_DGS_SYNC_DELAY2,
1092
+
DA7218_DGS_SYNC_DELAY2_SHIFT, DA7218_DGS_SYNC_DELAY_MAX,
1093
+
DA7218_NO_INVERT),
1094
+
SOC_SINGLE("DGS Voice Filter Sync Delay", DA7218_DGS_SYNC_DELAY3,
1095
+
DA7218_DGS_SYNC_DELAY3_SHIFT, DA7218_DGS_SYNC_DELAY3_MAX,
1096
+
DA7218_NO_INVERT),
1097
+
SOC_SINGLE_TLV("DGS Anticlip Level", DA7218_DGS_LEVELS,
1098
+
DA7218_DGS_ANTICLIP_LVL_SHIFT,
1099
+
DA7218_DGS_ANTICLIP_LVL_MAX, DA7218_INVERT,
1100
+
da7218_dgs_anticlip_tlv),
1101
+
SOC_SINGLE_TLV("DGS Signal Level", DA7218_DGS_LEVELS,
1102
+
DA7218_DGS_SIGNAL_LVL_SHIFT, DA7218_DGS_SIGNAL_LVL_MAX,
1103
+
DA7218_INVERT, da7218_dgs_signal_tlv),
1104
+
SOC_SINGLE("DGS Gain Subrange Switch", DA7218_DGS_GAIN_CTRL,
1105
+
DA7218_DGS_SUBR_EN_SHIFT, DA7218_SWITCH_EN_MAX,
1106
+
DA7218_NO_INVERT),
1107
+
SOC_SINGLE("DGS Gain Ramp Switch", DA7218_DGS_GAIN_CTRL,
1108
+
DA7218_DGS_RAMP_EN_SHIFT, DA7218_SWITCH_EN_MAX,
1109
+
DA7218_NO_INVERT),
1110
+
SOC_SINGLE("DGS Gain Steps", DA7218_DGS_GAIN_CTRL,
1111
+
DA7218_DGS_STEPS_SHIFT, DA7218_DGS_STEPS_MAX,
1112
+
DA7218_NO_INVERT),
1113
+
SOC_DOUBLE("DGS Switch", DA7218_DGS_ENABLE, DA7218_DGS_ENABLE_L_SHIFT,
1114
+
DA7218_DGS_ENABLE_R_SHIFT, DA7218_SWITCH_EN_MAX,
1115
+
DA7218_NO_INVERT),
1116
+
1117
+
/* Output High-Pass Filter */
1118
+
SOC_ENUM("Out Filter HPF Mode", da7218_out1_hpf_mode),
1119
+
SOC_ENUM("Out Filter HPF Corner Audio", da7218_out1_audio_hpf_corner),
1120
+
SOC_ENUM("Out Filter HPF Corner Voice", da7218_out1_voice_hpf_corner),
1121
+
1122
+
/* 5-Band Equaliser */
1123
+
SOC_SINGLE_TLV("Out EQ Band1 Volume", DA7218_OUT_1_EQ_12_FILTER_CTRL,
1124
+
DA7218_OUT_1_EQ_BAND1_SHIFT, DA7218_OUT_EQ_BAND_MAX,
1125
+
DA7218_NO_INVERT, da7218_out_eq_band_tlv),
1126
+
SOC_SINGLE_TLV("Out EQ Band2 Volume", DA7218_OUT_1_EQ_12_FILTER_CTRL,
1127
+
DA7218_OUT_1_EQ_BAND2_SHIFT, DA7218_OUT_EQ_BAND_MAX,
1128
+
DA7218_NO_INVERT, da7218_out_eq_band_tlv),
1129
+
SOC_SINGLE_TLV("Out EQ Band3 Volume", DA7218_OUT_1_EQ_34_FILTER_CTRL,
1130
+
DA7218_OUT_1_EQ_BAND3_SHIFT, DA7218_OUT_EQ_BAND_MAX,
1131
+
DA7218_NO_INVERT, da7218_out_eq_band_tlv),
1132
+
SOC_SINGLE_TLV("Out EQ Band4 Volume", DA7218_OUT_1_EQ_34_FILTER_CTRL,
1133
+
DA7218_OUT_1_EQ_BAND4_SHIFT, DA7218_OUT_EQ_BAND_MAX,
1134
+
DA7218_NO_INVERT, da7218_out_eq_band_tlv),
1135
+
SOC_SINGLE_TLV("Out EQ Band5 Volume", DA7218_OUT_1_EQ_5_FILTER_CTRL,
1136
+
DA7218_OUT_1_EQ_BAND5_SHIFT, DA7218_OUT_EQ_BAND_MAX,
1137
+
DA7218_NO_INVERT, da7218_out_eq_band_tlv),
1138
+
SOC_SINGLE("Out EQ Switch", DA7218_OUT_1_EQ_5_FILTER_CTRL,
1139
+
DA7218_OUT_1_EQ_EN_SHIFT, DA7218_SWITCH_EN_MAX,
1140
+
DA7218_NO_INVERT),
1141
+
1142
+
/* BiQuad Filters */
1143
+
SND_SOC_BYTES_EXT("BiQuad Coefficients",
1144
+
DA7218_OUT_1_BIQ_5STAGE_CFG_SIZE,
1145
+
da7218_biquad_coeff_get, da7218_biquad_coeff_put),
1146
+
SOC_SINGLE("BiQuad Filter Switch", DA7218_OUT_1_BIQ_5STAGE_CTRL,
1147
+
DA7218_OUT_1_BIQ_5STAGE_MUTE_EN_SHIFT, DA7218_SWITCH_EN_MAX,
1148
+
DA7218_INVERT),
1149
+
1150
+
/* Output Filters */
1151
+
SOC_DOUBLE_R_RANGE_TLV("Out Filter Volume", DA7218_OUT_1L_GAIN,
1152
+
DA7218_OUT_1R_GAIN,
1153
+
DA7218_OUT_1L_DIGITAL_GAIN_SHIFT,
1154
+
DA7218_OUT_DIGITAL_GAIN_MIN,
1155
+
DA7218_OUT_DIGITAL_GAIN_MAX, DA7218_NO_INVERT,
1156
+
da7218_out_dig_gain_tlv),
1157
+
SOC_DOUBLE_R("Out Filter Switch", DA7218_OUT_1L_FILTER_CTRL,
1158
+
DA7218_OUT_1R_FILTER_CTRL, DA7218_OUT_1L_MUTE_EN_SHIFT,
1159
+
DA7218_SWITCH_EN_MAX, DA7218_INVERT),
1160
+
SOC_DOUBLE_R("Out Filter Gain Subrange Switch",
1161
+
DA7218_OUT_1L_FILTER_CTRL, DA7218_OUT_1R_FILTER_CTRL,
1162
+
DA7218_OUT_1L_SUBRANGE_EN_SHIFT, DA7218_SWITCH_EN_MAX,
1163
+
DA7218_NO_INVERT),
1164
+
SOC_DOUBLE_R("Out Filter Gain Ramp Switch", DA7218_OUT_1L_FILTER_CTRL,
1165
+
DA7218_OUT_1R_FILTER_CTRL, DA7218_OUT_1L_RAMP_EN_SHIFT,
1166
+
DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT),
1167
+
1168
+
/* Mixer Output */
1169
+
SOC_DOUBLE_R_RANGE_TLV("Mixout Volume", DA7218_MIXOUT_L_GAIN,
1170
+
DA7218_MIXOUT_R_GAIN,
1171
+
DA7218_MIXOUT_L_AMP_GAIN_SHIFT,
1172
+
DA7218_MIXOUT_AMP_GAIN_MIN,
1173
+
DA7218_MIXOUT_AMP_GAIN_MAX, DA7218_NO_INVERT,
1174
+
da7218_mixout_gain_tlv),
1175
+
1176
+
/* DAC Noise Gate */
1177
+
SOC_ENUM("DAC NG Setup Time", da7218_dac_ng_setup_time),
1178
+
SOC_ENUM("DAC NG Rampup Rate", da7218_dac_ng_rampup_rate),
1179
+
SOC_ENUM("DAC NG Rampdown Rate", da7218_dac_ng_rampdown_rate),
1180
+
SOC_SINGLE_TLV("DAC NG Off Threshold", DA7218_DAC_NG_OFF_THRESH,
1181
+
DA7218_DAC_NG_OFF_THRESHOLD_SHIFT,
1182
+
DA7218_DAC_NG_THRESHOLD_MAX, DA7218_NO_INVERT,
1183
+
da7218_dac_ng_threshold_tlv),
1184
+
SOC_SINGLE_TLV("DAC NG On Threshold", DA7218_DAC_NG_ON_THRESH,
1185
+
DA7218_DAC_NG_ON_THRESHOLD_SHIFT,
1186
+
DA7218_DAC_NG_THRESHOLD_MAX, DA7218_NO_INVERT,
1187
+
da7218_dac_ng_threshold_tlv),
1188
+
SOC_SINGLE("DAC NG Switch", DA7218_DAC_NG_CTRL, DA7218_DAC_NG_EN_SHIFT,
1189
+
DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT),
1190
+
1191
+
/* CP */
1192
+
SOC_ENUM("Charge Pump Track Mode", da7218_cp_mchange),
1193
+
SOC_ENUM("Charge Pump Frequency", da7218_cp_fcontrol),
1194
+
SOC_ENUM("Charge Pump Decay Rate", da7218_cp_tau_delay),
1195
+
SOC_SINGLE("Charge Pump Threshold", DA7218_CP_VOL_THRESHOLD1,
1196
+
DA7218_CP_THRESH_VDD2_SHIFT, DA7218_CP_THRESH_VDD2_MAX,
1197
+
DA7218_NO_INVERT),
1198
+
1199
+
/* Headphones */
1200
+
SOC_DOUBLE_R_RANGE_TLV("Headphone Volume", DA7218_HP_L_GAIN,
1201
+
DA7218_HP_R_GAIN, DA7218_HP_L_AMP_GAIN_SHIFT,
1202
+
DA7218_HP_AMP_GAIN_MIN, DA7218_HP_AMP_GAIN_MAX,
1203
+
DA7218_NO_INVERT, da7218_hp_gain_tlv),
1204
+
SOC_DOUBLE_R("Headphone Switch", DA7218_HP_L_CTRL, DA7218_HP_R_CTRL,
1205
+
DA7218_HP_L_AMP_MUTE_EN_SHIFT, DA7218_SWITCH_EN_MAX,
1206
+
DA7218_INVERT),
1207
+
SOC_DOUBLE_R("Headphone Gain Ramp Switch", DA7218_HP_L_CTRL,
1208
+
DA7218_HP_R_CTRL, DA7218_HP_L_AMP_RAMP_EN_SHIFT,
1209
+
DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT),
1210
+
SOC_DOUBLE_R("Headphone ZC Gain Switch", DA7218_HP_L_CTRL,
1211
+
DA7218_HP_R_CTRL, DA7218_HP_L_AMP_ZC_EN_SHIFT,
1212
+
DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT),
1213
+
};
1214
+
1215
+
1216
+
/*
1217
+
* DAPM Mux Controls
1218
+
*/
1219
+
1220
+
static const char * const da7218_mic_sel_text[] = { "Analog", "Digital" };
1221
+
1222
+
static const struct soc_enum da7218_mic1_sel =
1223
+
SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(da7218_mic_sel_text),
1224
+
da7218_mic_sel_text);
1225
+
1226
+
static const struct snd_kcontrol_new da7218_mic1_sel_mux =
1227
+
SOC_DAPM_ENUM("Mic1 Mux", da7218_mic1_sel);
1228
+
1229
+
static const struct soc_enum da7218_mic2_sel =
1230
+
SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(da7218_mic_sel_text),
1231
+
da7218_mic_sel_text);
1232
+
1233
+
static const struct snd_kcontrol_new da7218_mic2_sel_mux =
1234
+
SOC_DAPM_ENUM("Mic2 Mux", da7218_mic2_sel);
1235
+
1236
+
static const char * const da7218_sidetone_in_sel_txt[] = {
1237
+
"In Filter1L", "In Filter1R", "In Filter2L", "In Filter2R"
1238
+
};
1239
+
1240
+
static const struct soc_enum da7218_sidetone_in_sel =
1241
+
SOC_ENUM_SINGLE(DA7218_SIDETONE_IN_SELECT,
1242
+
DA7218_SIDETONE_IN_SELECT_SHIFT,
1243
+
DA7218_SIDETONE_IN_SELECT_MAX,
1244
+
da7218_sidetone_in_sel_txt);
1245
+
1246
+
static const struct snd_kcontrol_new da7218_sidetone_in_sel_mux =
1247
+
SOC_DAPM_ENUM("Sidetone Mux", da7218_sidetone_in_sel);
1248
+
1249
+
static const char * const da7218_out_filt_biq_sel_txt[] = {
1250
+
"Bypass", "Enabled"
1251
+
};
1252
+
1253
+
static const struct soc_enum da7218_out_filtl_biq_sel =
1254
+
SOC_ENUM_SINGLE(DA7218_OUT_1L_FILTER_CTRL,
1255
+
DA7218_OUT_1L_BIQ_5STAGE_SEL_SHIFT,
1256
+
DA7218_OUT_BIQ_5STAGE_SEL_MAX,
1257
+
da7218_out_filt_biq_sel_txt);
1258
+
1259
+
static const struct snd_kcontrol_new da7218_out_filtl_biq_sel_mux =
1260
+
SOC_DAPM_ENUM("Out FilterL BiQuad Mux", da7218_out_filtl_biq_sel);
1261
+
1262
+
static const struct soc_enum da7218_out_filtr_biq_sel =
1263
+
SOC_ENUM_SINGLE(DA7218_OUT_1R_FILTER_CTRL,
1264
+
DA7218_OUT_1R_BIQ_5STAGE_SEL_SHIFT,
1265
+
DA7218_OUT_BIQ_5STAGE_SEL_MAX,
1266
+
da7218_out_filt_biq_sel_txt);
1267
+
1268
+
static const struct snd_kcontrol_new da7218_out_filtr_biq_sel_mux =
1269
+
SOC_DAPM_ENUM("Out FilterR BiQuad Mux", da7218_out_filtr_biq_sel);
1270
+
1271
+
1272
+
/*
1273
+
* DAPM Mixer Controls
1274
+
*/
1275
+
1276
+
#define DA7218_DMIX_CTRLS(reg) \
1277
+
SOC_DAPM_SINGLE("In Filter1L Switch", reg, \
1278
+
DA7218_DMIX_SRC_INFILT1L, \
1279
+
DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT), \
1280
+
SOC_DAPM_SINGLE("In Filter1R Switch", reg, \
1281
+
DA7218_DMIX_SRC_INFILT1R, \
1282
+
DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT), \
1283
+
SOC_DAPM_SINGLE("In Filter2L Switch", reg, \
1284
+
DA7218_DMIX_SRC_INFILT2L, \
1285
+
DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT), \
1286
+
SOC_DAPM_SINGLE("In Filter2R Switch", reg, \
1287
+
DA7218_DMIX_SRC_INFILT2R, \
1288
+
DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT), \
1289
+
SOC_DAPM_SINGLE("ToneGen Switch", reg, \
1290
+
DA7218_DMIX_SRC_TONEGEN, \
1291
+
DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT), \
1292
+
SOC_DAPM_SINGLE("DAIL Switch", reg, DA7218_DMIX_SRC_DAIL, \
1293
+
DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT), \
1294
+
SOC_DAPM_SINGLE("DAIR Switch", reg, DA7218_DMIX_SRC_DAIR, \
1295
+
DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT)
1296
+
1297
+
static const struct snd_kcontrol_new da7218_out_dai1l_mix_controls[] = {
1298
+
DA7218_DMIX_CTRLS(DA7218_DROUTING_OUTDAI_1L),
1299
+
};
1300
+
1301
+
static const struct snd_kcontrol_new da7218_out_dai1r_mix_controls[] = {
1302
+
DA7218_DMIX_CTRLS(DA7218_DROUTING_OUTDAI_1R),
1303
+
};
1304
+
1305
+
static const struct snd_kcontrol_new da7218_out_dai2l_mix_controls[] = {
1306
+
DA7218_DMIX_CTRLS(DA7218_DROUTING_OUTDAI_2L),
1307
+
};
1308
+
1309
+
static const struct snd_kcontrol_new da7218_out_dai2r_mix_controls[] = {
1310
+
DA7218_DMIX_CTRLS(DA7218_DROUTING_OUTDAI_2R),
1311
+
};
1312
+
1313
+
static const struct snd_kcontrol_new da7218_out_filtl_mix_controls[] = {
1314
+
DA7218_DMIX_CTRLS(DA7218_DROUTING_OUTFILT_1L),
1315
+
};
1316
+
1317
+
static const struct snd_kcontrol_new da7218_out_filtr_mix_controls[] = {
1318
+
DA7218_DMIX_CTRLS(DA7218_DROUTING_OUTFILT_1R),
1319
+
};
1320
+
1321
+
#define DA7218_DMIX_ST_CTRLS(reg) \
1322
+
SOC_DAPM_SINGLE("Out FilterL Switch", reg, \
1323
+
DA7218_DMIX_ST_SRC_OUTFILT1L, \
1324
+
DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT), \
1325
+
SOC_DAPM_SINGLE("Out FilterR Switch", reg, \
1326
+
DA7218_DMIX_ST_SRC_OUTFILT1R, \
1327
+
DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT), \
1328
+
SOC_DAPM_SINGLE("Sidetone Switch", reg, \
1329
+
DA7218_DMIX_ST_SRC_SIDETONE, \
1330
+
DA7218_SWITCH_EN_MAX, DA7218_NO_INVERT) \
1331
+
1332
+
static const struct snd_kcontrol_new da7218_st_out_filtl_mix_controls[] = {
1333
+
DA7218_DMIX_ST_CTRLS(DA7218_DROUTING_ST_OUTFILT_1L),
1334
+
};
1335
+
1336
+
static const struct snd_kcontrol_new da7218_st_out_filtr_mix_controls[] = {
1337
+
DA7218_DMIX_ST_CTRLS(DA7218_DROUTING_ST_OUTFILT_1R),
1338
+
};
1339
+
1340
+
1341
+
/*
1342
+
* DAPM Events
1343
+
*/
1344
+
1345
+
/*
1346
+
* We keep track of which input filters are enabled. This is used in the logic
1347
+
* for controlling the mic level detect feature.
1348
+
*/
1349
+
static int da7218_in_filter_event(struct snd_soc_dapm_widget *w,
1350
+
struct snd_kcontrol *kcontrol, int event)
1351
+
{
1352
+
struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1353
+
struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
1354
+
u8 mask;
1355
+
1356
+
switch (w->reg) {
1357
+
case DA7218_IN_1L_FILTER_CTRL:
1358
+
mask = (1 << DA7218_LVL_DET_EN_CHAN1L_SHIFT);
1359
+
break;
1360
+
case DA7218_IN_1R_FILTER_CTRL:
1361
+
mask = (1 << DA7218_LVL_DET_EN_CHAN1R_SHIFT);
1362
+
break;
1363
+
case DA7218_IN_2L_FILTER_CTRL:
1364
+
mask = (1 << DA7218_LVL_DET_EN_CHAN2L_SHIFT);
1365
+
break;
1366
+
case DA7218_IN_2R_FILTER_CTRL:
1367
+
mask = (1 << DA7218_LVL_DET_EN_CHAN2R_SHIFT);
1368
+
break;
1369
+
default:
1370
+
return -EINVAL;
1371
+
}
1372
+
1373
+
switch (event) {
1374
+
case SND_SOC_DAPM_POST_PMU:
1375
+
da7218->in_filt_en |= mask;
1376
+
/*
1377
+
* If we're enabling path for mic level detect, wait for path
1378
+
* to settle before enabling feature to avoid incorrect and
1379
+
* unwanted detect events.
1380
+
*/
1381
+
if (mask & da7218->mic_lvl_det_en)
1382
+
msleep(DA7218_MIC_LVL_DET_DELAY);
1383
+
break;
1384
+
case SND_SOC_DAPM_PRE_PMD:
1385
+
da7218->in_filt_en &= ~mask;
1386
+
break;
1387
+
default:
1388
+
return -EINVAL;
1389
+
}
1390
+
1391
+
/* Enable configured level detection paths */
1392
+
snd_soc_write(codec, DA7218_LVL_DET_CTRL,
1393
+
(da7218->in_filt_en & da7218->mic_lvl_det_en));
1394
+
1395
+
return 0;
1396
+
}
1397
+
1398
+
static int da7218_dai_event(struct snd_soc_dapm_widget *w,
1399
+
struct snd_kcontrol *kcontrol, int event)
1400
+
{
1401
+
struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1402
+
struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
1403
+
u8 pll_ctrl, pll_status, refosc_cal;
1404
+
int i;
1405
+
bool success;
1406
+
1407
+
switch (event) {
1408
+
case SND_SOC_DAPM_POST_PMU:
1409
+
if (da7218->master)
1410
+
/* Enable DAI clks for master mode */
1411
+
snd_soc_update_bits(codec, DA7218_DAI_CLK_MODE,
1412
+
DA7218_DAI_CLK_EN_MASK,
1413
+
DA7218_DAI_CLK_EN_MASK);
1414
+
1415
+
/* Tune reference oscillator */
1416
+
snd_soc_write(codec, DA7218_PLL_REFOSC_CAL,
1417
+
DA7218_PLL_REFOSC_CAL_START_MASK);
1418
+
snd_soc_write(codec, DA7218_PLL_REFOSC_CAL,
1419
+
DA7218_PLL_REFOSC_CAL_START_MASK |
1420
+
DA7218_PLL_REFOSC_CAL_EN_MASK);
1421
+
1422
+
/* Check tuning complete */
1423
+
i = 0;
1424
+
success = false;
1425
+
do {
1426
+
refosc_cal = snd_soc_read(codec, DA7218_PLL_REFOSC_CAL);
1427
+
if (!(refosc_cal & DA7218_PLL_REFOSC_CAL_START_MASK)) {
1428
+
success = true;
1429
+
} else {
1430
+
++i;
1431
+
usleep_range(DA7218_REF_OSC_CHECK_DELAY_MIN,
1432
+
DA7218_REF_OSC_CHECK_DELAY_MAX);
1433
+
}
1434
+
} while ((i < DA7218_REF_OSC_CHECK_TRIES) && (!success));
1435
+
1436
+
if (!success)
1437
+
dev_warn(codec->dev,
1438
+
"Reference oscillator failed calibration\n");
1439
+
1440
+
/* PC synchronised to DAI */
1441
+
snd_soc_write(codec, DA7218_PC_COUNT,
1442
+
DA7218_PC_RESYNC_AUTO_MASK);
1443
+
1444
+
/* If SRM not enabled, we don't need to check status */
1445
+
pll_ctrl = snd_soc_read(codec, DA7218_PLL_CTRL);
1446
+
if ((pll_ctrl & DA7218_PLL_MODE_MASK) != DA7218_PLL_MODE_SRM)
1447
+
return 0;
1448
+
1449
+
/* Check SRM has locked */
1450
+
i = 0;
1451
+
success = false;
1452
+
do {
1453
+
pll_status = snd_soc_read(codec, DA7218_PLL_STATUS);
1454
+
if (pll_status & DA7218_PLL_SRM_STATUS_SRM_LOCK) {
1455
+
success = true;
1456
+
} else {
1457
+
++i;
1458
+
msleep(DA7218_SRM_CHECK_DELAY);
1459
+
}
1460
+
} while ((i < DA7218_SRM_CHECK_TRIES) & (!success));
1461
+
1462
+
if (!success)
1463
+
dev_warn(codec->dev, "SRM failed to lock\n");
1464
+
1465
+
return 0;
1466
+
case SND_SOC_DAPM_POST_PMD:
1467
+
/* PC free-running */
1468
+
snd_soc_write(codec, DA7218_PC_COUNT, DA7218_PC_FREERUN_MASK);
1469
+
1470
+
if (da7218->master)
1471
+
/* Disable DAI clks for master mode */
1472
+
snd_soc_update_bits(codec, DA7218_DAI_CLK_MODE,
1473
+
DA7218_DAI_CLK_EN_MASK, 0);
1474
+
1475
+
return 0;
1476
+
default:
1477
+
return -EINVAL;
1478
+
}
1479
+
}
1480
+
1481
+
static int da7218_cp_event(struct snd_soc_dapm_widget *w,
1482
+
struct snd_kcontrol *kcontrol, int event)
1483
+
{
1484
+
struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1485
+
struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
1486
+
1487
+
/*
1488
+
* If this is DA7217 and we're using single supply for differential
1489
+
* output, we really don't want to touch the charge pump.
1490
+
*/
1491
+
if (da7218->hp_single_supply)
1492
+
return 0;
1493
+
1494
+
switch (event) {
1495
+
case SND_SOC_DAPM_PRE_PMU:
1496
+
snd_soc_update_bits(codec, DA7218_CP_CTRL, DA7218_CP_EN_MASK,
1497
+
DA7218_CP_EN_MASK);
1498
+
return 0;
1499
+
case SND_SOC_DAPM_PRE_PMD:
1500
+
snd_soc_update_bits(codec, DA7218_CP_CTRL, DA7218_CP_EN_MASK,
1501
+
0);
1502
+
return 0;
1503
+
default:
1504
+
return -EINVAL;
1505
+
}
1506
+
}
1507
+
1508
+
static int da7218_hp_pga_event(struct snd_soc_dapm_widget *w,
1509
+
struct snd_kcontrol *kcontrol, int event)
1510
+
{
1511
+
struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1512
+
1513
+
switch (event) {
1514
+
case SND_SOC_DAPM_POST_PMU:
1515
+
/* Enable headphone output */
1516
+
snd_soc_update_bits(codec, w->reg, DA7218_HP_AMP_OE_MASK,
1517
+
DA7218_HP_AMP_OE_MASK);
1518
+
return 0;
1519
+
case SND_SOC_DAPM_PRE_PMD:
1520
+
/* Headphone output high impedance */
1521
+
snd_soc_update_bits(codec, w->reg, DA7218_HP_AMP_OE_MASK, 0);
1522
+
return 0;
1523
+
default:
1524
+
return -EINVAL;
1525
+
}
1526
+
}
1527
+
1528
+
1529
+
/*
1530
+
* DAPM Widgets
1531
+
*/
1532
+
1533
+
static const struct snd_soc_dapm_widget da7218_dapm_widgets[] = {
1534
+
/* Input Supplies */
1535
+
SND_SOC_DAPM_SUPPLY("Mic Bias1", DA7218_MICBIAS_EN,
1536
+
DA7218_MICBIAS_1_EN_SHIFT, DA7218_NO_INVERT,
1537
+
NULL, 0),
1538
+
SND_SOC_DAPM_SUPPLY("Mic Bias2", DA7218_MICBIAS_EN,
1539
+
DA7218_MICBIAS_2_EN_SHIFT, DA7218_NO_INVERT,
1540
+
NULL, 0),
1541
+
SND_SOC_DAPM_SUPPLY("DMic1 Left", DA7218_DMIC_1_CTRL,
1542
+
DA7218_DMIC_1L_EN_SHIFT, DA7218_NO_INVERT,
1543
+
NULL, 0),
1544
+
SND_SOC_DAPM_SUPPLY("DMic1 Right", DA7218_DMIC_1_CTRL,
1545
+
DA7218_DMIC_1R_EN_SHIFT, DA7218_NO_INVERT,
1546
+
NULL, 0),
1547
+
SND_SOC_DAPM_SUPPLY("DMic2 Left", DA7218_DMIC_2_CTRL,
1548
+
DA7218_DMIC_2L_EN_SHIFT, DA7218_NO_INVERT,
1549
+
NULL, 0),
1550
+
SND_SOC_DAPM_SUPPLY("DMic2 Right", DA7218_DMIC_2_CTRL,
1551
+
DA7218_DMIC_2R_EN_SHIFT, DA7218_NO_INVERT,
1552
+
NULL, 0),
1553
+
1554
+
/* Inputs */
1555
+
SND_SOC_DAPM_INPUT("MIC1"),
1556
+
SND_SOC_DAPM_INPUT("MIC2"),
1557
+
SND_SOC_DAPM_INPUT("DMIC1L"),
1558
+
SND_SOC_DAPM_INPUT("DMIC1R"),
1559
+
SND_SOC_DAPM_INPUT("DMIC2L"),
1560
+
SND_SOC_DAPM_INPUT("DMIC2R"),
1561
+
1562
+
/* Input Mixer Supplies */
1563
+
SND_SOC_DAPM_SUPPLY("Mixin1 Supply", DA7218_MIXIN_1_CTRL,
1564
+
DA7218_MIXIN_1_MIX_SEL_SHIFT, DA7218_NO_INVERT,
1565
+
NULL, 0),
1566
+
SND_SOC_DAPM_SUPPLY("Mixin2 Supply", DA7218_MIXIN_2_CTRL,
1567
+
DA7218_MIXIN_2_MIX_SEL_SHIFT, DA7218_NO_INVERT,
1568
+
NULL, 0),
1569
+
1570
+
/* Input PGAs */
1571
+
SND_SOC_DAPM_PGA("Mic1 PGA", DA7218_MIC_1_CTRL,
1572
+
DA7218_MIC_1_AMP_EN_SHIFT, DA7218_NO_INVERT,
1573
+
NULL, 0),
1574
+
SND_SOC_DAPM_PGA("Mic2 PGA", DA7218_MIC_2_CTRL,
1575
+
DA7218_MIC_2_AMP_EN_SHIFT, DA7218_NO_INVERT,
1576
+
NULL, 0),
1577
+
SND_SOC_DAPM_PGA("Mixin1 PGA", DA7218_MIXIN_1_CTRL,
1578
+
DA7218_MIXIN_1_AMP_EN_SHIFT, DA7218_NO_INVERT,
1579
+
NULL, 0),
1580
+
SND_SOC_DAPM_PGA("Mixin2 PGA", DA7218_MIXIN_2_CTRL,
1581
+
DA7218_MIXIN_2_AMP_EN_SHIFT, DA7218_NO_INVERT,
1582
+
NULL, 0),
1583
+
1584
+
/* Mic/DMic Muxes */
1585
+
SND_SOC_DAPM_MUX("Mic1 Mux", SND_SOC_NOPM, 0, 0, &da7218_mic1_sel_mux),
1586
+
SND_SOC_DAPM_MUX("Mic2 Mux", SND_SOC_NOPM, 0, 0, &da7218_mic2_sel_mux),
1587
+
1588
+
/* Input Filters */
1589
+
SND_SOC_DAPM_ADC_E("In Filter1L", NULL, DA7218_IN_1L_FILTER_CTRL,
1590
+
DA7218_IN_1L_FILTER_EN_SHIFT, DA7218_NO_INVERT,
1591
+
da7218_in_filter_event,
1592
+
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1593
+
SND_SOC_DAPM_ADC_E("In Filter1R", NULL, DA7218_IN_1R_FILTER_CTRL,
1594
+
DA7218_IN_1R_FILTER_EN_SHIFT, DA7218_NO_INVERT,
1595
+
da7218_in_filter_event,
1596
+
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1597
+
SND_SOC_DAPM_ADC_E("In Filter2L", NULL, DA7218_IN_2L_FILTER_CTRL,
1598
+
DA7218_IN_2L_FILTER_EN_SHIFT, DA7218_NO_INVERT,
1599
+
da7218_in_filter_event,
1600
+
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1601
+
SND_SOC_DAPM_ADC_E("In Filter2R", NULL, DA7218_IN_2R_FILTER_CTRL,
1602
+
DA7218_IN_2R_FILTER_EN_SHIFT, DA7218_NO_INVERT,
1603
+
da7218_in_filter_event,
1604
+
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1605
+
1606
+
/* Tone Generator */
1607
+
SND_SOC_DAPM_SIGGEN("TONE"),
1608
+
SND_SOC_DAPM_PGA("Tone Generator", DA7218_TONE_GEN_CFG1,
1609
+
DA7218_START_STOPN_SHIFT, DA7218_NO_INVERT, NULL, 0),
1610
+
1611
+
/* Sidetone Input */
1612
+
SND_SOC_DAPM_MUX("Sidetone Mux", SND_SOC_NOPM, 0, 0,
1613
+
&da7218_sidetone_in_sel_mux),
1614
+
SND_SOC_DAPM_ADC("Sidetone Filter", NULL, DA7218_SIDETONE_CTRL,
1615
+
DA7218_SIDETONE_FILTER_EN_SHIFT, DA7218_NO_INVERT),
1616
+
1617
+
/* Input Mixers */
1618
+
SND_SOC_DAPM_MIXER("Mixer DAI1L", SND_SOC_NOPM, 0, 0,
1619
+
da7218_out_dai1l_mix_controls,
1620
+
ARRAY_SIZE(da7218_out_dai1l_mix_controls)),
1621
+
SND_SOC_DAPM_MIXER("Mixer DAI1R", SND_SOC_NOPM, 0, 0,
1622
+
da7218_out_dai1r_mix_controls,
1623
+
ARRAY_SIZE(da7218_out_dai1r_mix_controls)),
1624
+
SND_SOC_DAPM_MIXER("Mixer DAI2L", SND_SOC_NOPM, 0, 0,
1625
+
da7218_out_dai2l_mix_controls,
1626
+
ARRAY_SIZE(da7218_out_dai2l_mix_controls)),
1627
+
SND_SOC_DAPM_MIXER("Mixer DAI2R", SND_SOC_NOPM, 0, 0,
1628
+
da7218_out_dai2r_mix_controls,
1629
+
ARRAY_SIZE(da7218_out_dai2r_mix_controls)),
1630
+
1631
+
/* DAI Supply */
1632
+
SND_SOC_DAPM_SUPPLY("DAI", DA7218_DAI_CTRL, DA7218_DAI_EN_SHIFT,
1633
+
DA7218_NO_INVERT, da7218_dai_event,
1634
+
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1635
+
1636
+
/* DAI */
1637
+
SND_SOC_DAPM_AIF_OUT("DAIOUT", "Capture", 0, SND_SOC_NOPM, 0, 0),
1638
+
SND_SOC_DAPM_AIF_IN("DAIIN", "Playback", 0, SND_SOC_NOPM, 0, 0),
1639
+
1640
+
/* Output Mixers */
1641
+
SND_SOC_DAPM_MIXER("Mixer Out FilterL", SND_SOC_NOPM, 0, 0,
1642
+
da7218_out_filtl_mix_controls,
1643
+
ARRAY_SIZE(da7218_out_filtl_mix_controls)),
1644
+
SND_SOC_DAPM_MIXER("Mixer Out FilterR", SND_SOC_NOPM, 0, 0,
1645
+
da7218_out_filtr_mix_controls,
1646
+
ARRAY_SIZE(da7218_out_filtr_mix_controls)),
1647
+
1648
+
/* BiQuad Filters */
1649
+
SND_SOC_DAPM_MUX("Out FilterL BiQuad Mux", SND_SOC_NOPM, 0, 0,
1650
+
&da7218_out_filtl_biq_sel_mux),
1651
+
SND_SOC_DAPM_MUX("Out FilterR BiQuad Mux", SND_SOC_NOPM, 0, 0,
1652
+
&da7218_out_filtr_biq_sel_mux),
1653
+
SND_SOC_DAPM_DAC("BiQuad Filter", NULL, DA7218_OUT_1_BIQ_5STAGE_CTRL,
1654
+
DA7218_OUT_1_BIQ_5STAGE_FILTER_EN_SHIFT,
1655
+
DA7218_NO_INVERT),
1656
+
1657
+
/* Sidetone Mixers */
1658
+
SND_SOC_DAPM_MIXER("ST Mixer Out FilterL", SND_SOC_NOPM, 0, 0,
1659
+
da7218_st_out_filtl_mix_controls,
1660
+
ARRAY_SIZE(da7218_st_out_filtl_mix_controls)),
1661
+
SND_SOC_DAPM_MIXER("ST Mixer Out FilterR", SND_SOC_NOPM, 0, 0,
1662
+
da7218_st_out_filtr_mix_controls,
1663
+
ARRAY_SIZE(da7218_st_out_filtr_mix_controls)),
1664
+
1665
+
/* Output Filters */
1666
+
SND_SOC_DAPM_DAC("Out FilterL", NULL, DA7218_OUT_1L_FILTER_CTRL,
1667
+
DA7218_OUT_1L_FILTER_EN_SHIFT, DA7218_NO_INVERT),
1668
+
SND_SOC_DAPM_DAC("Out FilterR", NULL, DA7218_OUT_1R_FILTER_CTRL,
1669
+
DA7218_IN_1R_FILTER_EN_SHIFT, DA7218_NO_INVERT),
1670
+
1671
+
/* Output PGAs */
1672
+
SND_SOC_DAPM_PGA("Mixout Left PGA", DA7218_MIXOUT_L_CTRL,
1673
+
DA7218_MIXOUT_L_AMP_EN_SHIFT, DA7218_NO_INVERT,
1674
+
NULL, 0),
1675
+
SND_SOC_DAPM_PGA("Mixout Right PGA", DA7218_MIXOUT_R_CTRL,
1676
+
DA7218_MIXOUT_R_AMP_EN_SHIFT, DA7218_NO_INVERT,
1677
+
NULL, 0),
1678
+
SND_SOC_DAPM_PGA_E("Headphone Left PGA", DA7218_HP_L_CTRL,
1679
+
DA7218_HP_L_AMP_EN_SHIFT, DA7218_NO_INVERT, NULL, 0,
1680
+
da7218_hp_pga_event,
1681
+
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1682
+
SND_SOC_DAPM_PGA_E("Headphone Right PGA", DA7218_HP_R_CTRL,
1683
+
DA7218_HP_R_AMP_EN_SHIFT, DA7218_NO_INVERT, NULL, 0,
1684
+
da7218_hp_pga_event,
1685
+
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1686
+
1687
+
/* Output Supplies */
1688
+
SND_SOC_DAPM_SUPPLY("Charge Pump", SND_SOC_NOPM, 0, 0, da7218_cp_event,
1689
+
SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
1690
+
1691
+
/* Outputs */
1692
+
SND_SOC_DAPM_OUTPUT("HPL"),
1693
+
SND_SOC_DAPM_OUTPUT("HPR"),
1694
+
};
1695
+
1696
+
1697
+
/*
1698
+
* DAPM Mixer Routes
1699
+
*/
1700
+
1701
+
#define DA7218_DMIX_ROUTES(name) \
1702
+
{name, "In Filter1L Switch", "In Filter1L"}, \
1703
+
{name, "In Filter1R Switch", "In Filter1R"}, \
1704
+
{name, "In Filter2L Switch", "In Filter2L"}, \
1705
+
{name, "In Filter2R Switch", "In Filter2R"}, \
1706
+
{name, "ToneGen Switch", "Tone Generator"}, \
1707
+
{name, "DAIL Switch", "DAIIN"}, \
1708
+
{name, "DAIR Switch", "DAIIN"}
1709
+
1710
+
#define DA7218_DMIX_ST_ROUTES(name) \
1711
+
{name, "Out FilterL Switch", "Out FilterL BiQuad Mux"}, \
1712
+
{name, "Out FilterR Switch", "Out FilterR BiQuad Mux"}, \
1713
+
{name, "Sidetone Switch", "Sidetone Filter"}
1714
+
1715
+
1716
+
/*
1717
+
* DAPM audio route definition
1718
+
*/
1719
+
1720
+
static const struct snd_soc_dapm_route da7218_audio_map[] = {
1721
+
/* Input paths */
1722
+
{"MIC1", NULL, "Mic Bias1"},
1723
+
{"MIC2", NULL, "Mic Bias2"},
1724
+
{"DMIC1L", NULL, "Mic Bias1"},
1725
+
{"DMIC1L", NULL, "DMic1 Left"},
1726
+
{"DMIC1R", NULL, "Mic Bias1"},
1727
+
{"DMIC1R", NULL, "DMic1 Right"},
1728
+
{"DMIC2L", NULL, "Mic Bias2"},
1729
+
{"DMIC2L", NULL, "DMic2 Left"},
1730
+
{"DMIC2R", NULL, "Mic Bias2"},
1731
+
{"DMIC2R", NULL, "DMic2 Right"},
1732
+
1733
+
{"Mic1 PGA", NULL, "MIC1"},
1734
+
{"Mic2 PGA", NULL, "MIC2"},
1735
+
1736
+
{"Mixin1 PGA", NULL, "Mixin1 Supply"},
1737
+
{"Mixin2 PGA", NULL, "Mixin2 Supply"},
1738
+
1739
+
{"Mixin1 PGA", NULL, "Mic1 PGA"},
1740
+
{"Mixin2 PGA", NULL, "Mic2 PGA"},
1741
+
1742
+
{"Mic1 Mux", "Analog", "Mixin1 PGA"},
1743
+
{"Mic1 Mux", "Digital", "DMIC1L"},
1744
+
{"Mic1 Mux", "Digital", "DMIC1R"},
1745
+
{"Mic2 Mux", "Analog", "Mixin2 PGA"},
1746
+
{"Mic2 Mux", "Digital", "DMIC2L"},
1747
+
{"Mic2 Mux", "Digital", "DMIC2R"},
1748
+
1749
+
{"In Filter1L", NULL, "Mic1 Mux"},
1750
+
{"In Filter1R", NULL, "Mic1 Mux"},
1751
+
{"In Filter2L", NULL, "Mic2 Mux"},
1752
+
{"In Filter2R", NULL, "Mic2 Mux"},
1753
+
1754
+
{"Tone Generator", NULL, "TONE"},
1755
+
1756
+
{"Sidetone Mux", "In Filter1L", "In Filter1L"},
1757
+
{"Sidetone Mux", "In Filter1R", "In Filter1R"},
1758
+
{"Sidetone Mux", "In Filter2L", "In Filter2L"},
1759
+
{"Sidetone Mux", "In Filter2R", "In Filter2R"},
1760
+
{"Sidetone Filter", NULL, "Sidetone Mux"},
1761
+
1762
+
DA7218_DMIX_ROUTES("Mixer DAI1L"),
1763
+
DA7218_DMIX_ROUTES("Mixer DAI1R"),
1764
+
DA7218_DMIX_ROUTES("Mixer DAI2L"),
1765
+
DA7218_DMIX_ROUTES("Mixer DAI2R"),
1766
+
1767
+
{"DAIOUT", NULL, "Mixer DAI1L"},
1768
+
{"DAIOUT", NULL, "Mixer DAI1R"},
1769
+
{"DAIOUT", NULL, "Mixer DAI2L"},
1770
+
{"DAIOUT", NULL, "Mixer DAI2R"},
1771
+
1772
+
{"DAIOUT", NULL, "DAI"},
1773
+
1774
+
/* Output paths */
1775
+
{"DAIIN", NULL, "DAI"},
1776
+
1777
+
DA7218_DMIX_ROUTES("Mixer Out FilterL"),
1778
+
DA7218_DMIX_ROUTES("Mixer Out FilterR"),
1779
+
1780
+
{"BiQuad Filter", NULL, "Mixer Out FilterL"},
1781
+
{"BiQuad Filter", NULL, "Mixer Out FilterR"},
1782
+
1783
+
{"Out FilterL BiQuad Mux", "Bypass", "Mixer Out FilterL"},
1784
+
{"Out FilterL BiQuad Mux", "Enabled", "BiQuad Filter"},
1785
+
{"Out FilterR BiQuad Mux", "Bypass", "Mixer Out FilterR"},
1786
+
{"Out FilterR BiQuad Mux", "Enabled", "BiQuad Filter"},
1787
+
1788
+
DA7218_DMIX_ST_ROUTES("ST Mixer Out FilterL"),
1789
+
DA7218_DMIX_ST_ROUTES("ST Mixer Out FilterR"),
1790
+
1791
+
{"Out FilterL", NULL, "ST Mixer Out FilterL"},
1792
+
{"Out FilterR", NULL, "ST Mixer Out FilterR"},
1793
+
1794
+
{"Mixout Left PGA", NULL, "Out FilterL"},
1795
+
{"Mixout Right PGA", NULL, "Out FilterR"},
1796
+
1797
+
{"Headphone Left PGA", NULL, "Mixout Left PGA"},
1798
+
{"Headphone Right PGA", NULL, "Mixout Right PGA"},
1799
+
1800
+
{"HPL", NULL, "Headphone Left PGA"},
1801
+
{"HPR", NULL, "Headphone Right PGA"},
1802
+
1803
+
{"HPL", NULL, "Charge Pump"},
1804
+
{"HPR", NULL, "Charge Pump"},
1805
+
};
1806
+
1807
+
1808
+
/*
1809
+
* DAI operations
1810
+
*/
1811
+
1812
+
static int da7218_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1813
+
int clk_id, unsigned int freq, int dir)
1814
+
{
1815
+
struct snd_soc_codec *codec = codec_dai->codec;
1816
+
struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
1817
+
int ret;
1818
+
1819
+
if (da7218->mclk_rate == freq)
1820
+
return 0;
1821
+
1822
+
if (((freq < 2000000) && (freq != 32768)) || (freq > 54000000)) {
1823
+
dev_err(codec_dai->dev, "Unsupported MCLK value %d\n",
1824
+
freq);
1825
+
return -EINVAL;
1826
+
}
1827
+
1828
+
switch (clk_id) {
1829
+
case DA7218_CLKSRC_MCLK_SQR:
1830
+
snd_soc_update_bits(codec, DA7218_PLL_CTRL,
1831
+
DA7218_PLL_MCLK_SQR_EN_MASK,
1832
+
DA7218_PLL_MCLK_SQR_EN_MASK);
1833
+
break;
1834
+
case DA7218_CLKSRC_MCLK:
1835
+
snd_soc_update_bits(codec, DA7218_PLL_CTRL,
1836
+
DA7218_PLL_MCLK_SQR_EN_MASK, 0);
1837
+
break;
1838
+
default:
1839
+
dev_err(codec_dai->dev, "Unknown clock source %d\n", clk_id);
1840
+
return -EINVAL;
1841
+
}
1842
+
1843
+
if (da7218->mclk) {
1844
+
freq = clk_round_rate(da7218->mclk, freq);
1845
+
ret = clk_set_rate(da7218->mclk, freq);
1846
+
if (ret) {
1847
+
dev_err(codec_dai->dev, "Failed to set clock rate %d\n",
1848
+
freq);
1849
+
return ret;
1850
+
}
1851
+
}
1852
+
1853
+
da7218->mclk_rate = freq;
1854
+
1855
+
return 0;
1856
+
}
1857
+
1858
+
static int da7218_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
1859
+
int source, unsigned int fref, unsigned int fout)
1860
+
{
1861
+
struct snd_soc_codec *codec = codec_dai->codec;
1862
+
struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
1863
+
1864
+
u8 pll_ctrl, indiv_bits, indiv;
1865
+
u8 pll_frac_top, pll_frac_bot, pll_integer;
1866
+
u32 freq_ref;
1867
+
u64 frac_div;
1868
+
1869
+
/* Verify 32KHz, 2MHz - 54MHz MCLK provided, and set input divider */
1870
+
if (da7218->mclk_rate == 32768) {
1871
+
indiv_bits = DA7218_PLL_INDIV_2_5_MHZ;
1872
+
indiv = DA7218_PLL_INDIV_2_10_MHZ_VAL;
1873
+
} else if (da7218->mclk_rate < 2000000) {
1874
+
dev_err(codec->dev, "PLL input clock %d below valid range\n",
1875
+
da7218->mclk_rate);
1876
+
return -EINVAL;
1877
+
} else if (da7218->mclk_rate <= 5000000) {
1878
+
indiv_bits = DA7218_PLL_INDIV_2_5_MHZ;
1879
+
indiv = DA7218_PLL_INDIV_2_10_MHZ_VAL;
1880
+
} else if (da7218->mclk_rate <= 10000000) {
1881
+
indiv_bits = DA7218_PLL_INDIV_5_10_MHZ;
1882
+
indiv = DA7218_PLL_INDIV_2_10_MHZ_VAL;
1883
+
} else if (da7218->mclk_rate <= 20000000) {
1884
+
indiv_bits = DA7218_PLL_INDIV_10_20_MHZ;
1885
+
indiv = DA7218_PLL_INDIV_10_20_MHZ_VAL;
1886
+
} else if (da7218->mclk_rate <= 40000000) {
1887
+
indiv_bits = DA7218_PLL_INDIV_20_40_MHZ;
1888
+
indiv = DA7218_PLL_INDIV_20_40_MHZ_VAL;
1889
+
} else if (da7218->mclk_rate <= 54000000) {
1890
+
indiv_bits = DA7218_PLL_INDIV_40_54_MHZ;
1891
+
indiv = DA7218_PLL_INDIV_40_54_MHZ_VAL;
1892
+
} else {
1893
+
dev_err(codec->dev, "PLL input clock %d above valid range\n",
1894
+
da7218->mclk_rate);
1895
+
return -EINVAL;
1896
+
}
1897
+
freq_ref = (da7218->mclk_rate / indiv);
1898
+
pll_ctrl = indiv_bits;
1899
+
1900
+
/* Configure PLL */
1901
+
switch (source) {
1902
+
case DA7218_SYSCLK_MCLK:
1903
+
pll_ctrl |= DA7218_PLL_MODE_BYPASS;
1904
+
snd_soc_update_bits(codec, DA7218_PLL_CTRL,
1905
+
DA7218_PLL_INDIV_MASK |
1906
+
DA7218_PLL_MODE_MASK, pll_ctrl);
1907
+
return 0;
1908
+
case DA7218_SYSCLK_PLL:
1909
+
pll_ctrl |= DA7218_PLL_MODE_NORMAL;
1910
+
break;
1911
+
case DA7218_SYSCLK_PLL_SRM:
1912
+
pll_ctrl |= DA7218_PLL_MODE_SRM;
1913
+
break;
1914
+
case DA7218_SYSCLK_PLL_32KHZ:
1915
+
pll_ctrl |= DA7218_PLL_MODE_32KHZ;
1916
+
break;
1917
+
default:
1918
+
dev_err(codec->dev, "Invalid PLL config\n");
1919
+
return -EINVAL;
1920
+
}
1921
+
1922
+
/* Calculate dividers for PLL */
1923
+
pll_integer = fout / freq_ref;
1924
+
frac_div = (u64)(fout % freq_ref) * 8192ULL;
1925
+
do_div(frac_div, freq_ref);
1926
+
pll_frac_top = (frac_div >> DA7218_BYTE_SHIFT) & DA7218_BYTE_MASK;
1927
+
pll_frac_bot = (frac_div) & DA7218_BYTE_MASK;
1928
+
1929
+
/* Write PLL config & dividers */
1930
+
snd_soc_write(codec, DA7218_PLL_FRAC_TOP, pll_frac_top);
1931
+
snd_soc_write(codec, DA7218_PLL_FRAC_BOT, pll_frac_bot);
1932
+
snd_soc_write(codec, DA7218_PLL_INTEGER, pll_integer);
1933
+
snd_soc_update_bits(codec, DA7218_PLL_CTRL,
1934
+
DA7218_PLL_MODE_MASK | DA7218_PLL_INDIV_MASK,
1935
+
pll_ctrl);
1936
+
1937
+
return 0;
1938
+
}
1939
+
1940
+
static int da7218_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
1941
+
{
1942
+
struct snd_soc_codec *codec = codec_dai->codec;
1943
+
struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
1944
+
u8 dai_clk_mode = 0, dai_ctrl = 0;
1945
+
1946
+
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1947
+
case SND_SOC_DAIFMT_CBM_CFM:
1948
+
da7218->master = true;
1949
+
break;
1950
+
case SND_SOC_DAIFMT_CBS_CFS:
1951
+
da7218->master = false;
1952
+
break;
1953
+
default:
1954
+
return -EINVAL;
1955
+
}
1956
+
1957
+
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1958
+
case SND_SOC_DAIFMT_NB_NF:
1959
+
break;
1960
+
case SND_SOC_DAIFMT_NB_IF:
1961
+
dai_clk_mode |= DA7218_DAI_WCLK_POL_INV;
1962
+
break;
1963
+
case SND_SOC_DAIFMT_IB_NF:
1964
+
dai_clk_mode |= DA7218_DAI_CLK_POL_INV;
1965
+
break;
1966
+
case SND_SOC_DAIFMT_IB_IF:
1967
+
dai_clk_mode |= DA7218_DAI_WCLK_POL_INV | DA7218_DAI_CLK_POL_INV;
1968
+
break;
1969
+
default:
1970
+
return -EINVAL;
1971
+
}
1972
+
1973
+
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1974
+
case SND_SOC_DAIFMT_I2S:
1975
+
dai_ctrl |= DA7218_DAI_FORMAT_I2S;
1976
+
break;
1977
+
case SND_SOC_DAIFMT_LEFT_J:
1978
+
dai_ctrl |= DA7218_DAI_FORMAT_LEFT_J;
1979
+
break;
1980
+
case SND_SOC_DAIFMT_RIGHT_J:
1981
+
dai_ctrl |= DA7218_DAI_FORMAT_RIGHT_J;
1982
+
break;
1983
+
case SND_SOC_DAIFMT_DSP_B:
1984
+
dai_ctrl |= DA7218_DAI_FORMAT_DSP;
1985
+
break;
1986
+
default:
1987
+
return -EINVAL;
1988
+
}
1989
+
1990
+
/* By default 64 BCLKs per WCLK is supported */
1991
+
dai_clk_mode |= DA7218_DAI_BCLKS_PER_WCLK_64;
1992
+
1993
+
snd_soc_write(codec, DA7218_DAI_CLK_MODE, dai_clk_mode);
1994
+
snd_soc_update_bits(codec, DA7218_DAI_CTRL, DA7218_DAI_FORMAT_MASK,
1995
+
dai_ctrl);
1996
+
1997
+
return 0;
1998
+
}
1999
+
2000
+
static int da7218_set_dai_tdm_slot(struct snd_soc_dai *dai,
2001
+
unsigned int tx_mask, unsigned int rx_mask,
2002
+
int slots, int slot_width)
2003
+
{
2004
+
struct snd_soc_codec *codec = dai->codec;
2005
+
u8 dai_bclks_per_wclk;
2006
+
u32 frame_size;
2007
+
2008
+
/* No channels enabled so disable TDM, revert to 64-bit frames */
2009
+
if (!tx_mask) {
2010
+
snd_soc_update_bits(codec, DA7218_DAI_TDM_CTRL,
2011
+
DA7218_DAI_TDM_CH_EN_MASK |
2012
+
DA7218_DAI_TDM_MODE_EN_MASK, 0);
2013
+
snd_soc_update_bits(codec, DA7218_DAI_CLK_MODE,
2014
+
DA7218_DAI_BCLKS_PER_WCLK_MASK,
2015
+
DA7218_DAI_BCLKS_PER_WCLK_64);
2016
+
return 0;
2017
+
}
2018
+
2019
+
/* Check we have valid slots */
2020
+
if (fls(tx_mask) > DA7218_DAI_TDM_MAX_SLOTS) {
2021
+
dev_err(codec->dev, "Invalid number of slots, max = %d\n",
2022
+
DA7218_DAI_TDM_MAX_SLOTS);
2023
+
return -EINVAL;
2024
+
}
2025
+
2026
+
/* Check we have a valid offset given (first 2 bytes of rx_mask) */
2027
+
if (rx_mask >> DA7218_2BYTE_SHIFT) {
2028
+
dev_err(codec->dev, "Invalid slot offset, max = %d\n",
2029
+
DA7218_2BYTE_MASK);
2030
+
return -EINVAL;
2031
+
}
2032
+
2033
+
/* Calculate & validate frame size based on slot info provided. */
2034
+
frame_size = slots * slot_width;
2035
+
switch (frame_size) {
2036
+
case 32:
2037
+
dai_bclks_per_wclk = DA7218_DAI_BCLKS_PER_WCLK_32;
2038
+
break;
2039
+
case 64:
2040
+
dai_bclks_per_wclk = DA7218_DAI_BCLKS_PER_WCLK_64;
2041
+
break;
2042
+
case 128:
2043
+
dai_bclks_per_wclk = DA7218_DAI_BCLKS_PER_WCLK_128;
2044
+
break;
2045
+
case 256:
2046
+
dai_bclks_per_wclk = DA7218_DAI_BCLKS_PER_WCLK_256;
2047
+
break;
2048
+
default:
2049
+
dev_err(codec->dev, "Invalid frame size\n");
2050
+
return -EINVAL;
2051
+
}
2052
+
2053
+
snd_soc_update_bits(codec, DA7218_DAI_CLK_MODE,
2054
+
DA7218_DAI_BCLKS_PER_WCLK_MASK,
2055
+
dai_bclks_per_wclk);
2056
+
snd_soc_write(codec, DA7218_DAI_OFFSET_LOWER,
2057
+
(rx_mask & DA7218_BYTE_MASK));
2058
+
snd_soc_write(codec, DA7218_DAI_OFFSET_UPPER,
2059
+
((rx_mask >> DA7218_BYTE_SHIFT) & DA7218_BYTE_MASK));
2060
+
snd_soc_update_bits(codec, DA7218_DAI_TDM_CTRL,
2061
+
DA7218_DAI_TDM_CH_EN_MASK |
2062
+
DA7218_DAI_TDM_MODE_EN_MASK,
2063
+
(tx_mask << DA7218_DAI_TDM_CH_EN_SHIFT) |
2064
+
DA7218_DAI_TDM_MODE_EN_MASK);
2065
+
2066
+
return 0;
2067
+
}
2068
+
2069
+
static int da7218_hw_params(struct snd_pcm_substream *substream,
2070
+
struct snd_pcm_hw_params *params,
2071
+
struct snd_soc_dai *dai)
2072
+
{
2073
+
struct snd_soc_codec *codec = dai->codec;
2074
+
u8 dai_ctrl = 0, fs;
2075
+
unsigned int channels;
2076
+
2077
+
switch (params_width(params)) {
2078
+
case 16:
2079
+
dai_ctrl |= DA7218_DAI_WORD_LENGTH_S16_LE;
2080
+
break;
2081
+
case 20:
2082
+
dai_ctrl |= DA7218_DAI_WORD_LENGTH_S20_LE;
2083
+
break;
2084
+
case 24:
2085
+
dai_ctrl |= DA7218_DAI_WORD_LENGTH_S24_LE;
2086
+
break;
2087
+
case 32:
2088
+
dai_ctrl |= DA7218_DAI_WORD_LENGTH_S32_LE;
2089
+
break;
2090
+
default:
2091
+
return -EINVAL;
2092
+
}
2093
+
2094
+
channels = params_channels(params);
2095
+
if ((channels < 1) || (channels > DA7218_DAI_CH_NUM_MAX)) {
2096
+
dev_err(codec->dev,
2097
+
"Invalid number of channels, only 1 to %d supported\n",
2098
+
DA7218_DAI_CH_NUM_MAX);
2099
+
return -EINVAL;
2100
+
}
2101
+
dai_ctrl |= channels << DA7218_DAI_CH_NUM_SHIFT;
2102
+
2103
+
switch (params_rate(params)) {
2104
+
case 8000:
2105
+
fs = DA7218_SR_8000;
2106
+
break;
2107
+
case 11025:
2108
+
fs = DA7218_SR_11025;
2109
+
break;
2110
+
case 12000:
2111
+
fs = DA7218_SR_12000;
2112
+
break;
2113
+
case 16000:
2114
+
fs = DA7218_SR_16000;
2115
+
break;
2116
+
case 22050:
2117
+
fs = DA7218_SR_22050;
2118
+
break;
2119
+
case 24000:
2120
+
fs = DA7218_SR_24000;
2121
+
break;
2122
+
case 32000:
2123
+
fs = DA7218_SR_32000;
2124
+
break;
2125
+
case 44100:
2126
+
fs = DA7218_SR_44100;
2127
+
break;
2128
+
case 48000:
2129
+
fs = DA7218_SR_48000;
2130
+
break;
2131
+
case 88200:
2132
+
fs = DA7218_SR_88200;
2133
+
break;
2134
+
case 96000:
2135
+
fs = DA7218_SR_96000;
2136
+
break;
2137
+
default:
2138
+
return -EINVAL;
2139
+
}
2140
+
2141
+
snd_soc_update_bits(codec, DA7218_DAI_CTRL,
2142
+
DA7218_DAI_WORD_LENGTH_MASK | DA7218_DAI_CH_NUM_MASK,
2143
+
dai_ctrl);
2144
+
/* SRs tied for ADCs and DACs. */
2145
+
snd_soc_write(codec, DA7218_SR,
2146
+
(fs << DA7218_SR_DAC_SHIFT) | (fs << DA7218_SR_ADC_SHIFT));
2147
+
2148
+
return 0;
2149
+
}
2150
+
2151
+
static const struct snd_soc_dai_ops da7218_dai_ops = {
2152
+
.hw_params = da7218_hw_params,
2153
+
.set_sysclk = da7218_set_dai_sysclk,
2154
+
.set_pll = da7218_set_dai_pll,
2155
+
.set_fmt = da7218_set_dai_fmt,
2156
+
.set_tdm_slot = da7218_set_dai_tdm_slot,
2157
+
};
2158
+
2159
+
#define DA7218_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
2160
+
SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
2161
+
2162
+
static struct snd_soc_dai_driver da7218_dai = {
2163
+
.name = "da7218-hifi",
2164
+
.playback = {
2165
+
.stream_name = "Playback",
2166
+
.channels_min = 1,
2167
+
.channels_max = 4, /* Only 2 channels of data */
2168
+
.rates = SNDRV_PCM_RATE_8000_96000,
2169
+
.formats = DA7218_FORMATS,
2170
+
},
2171
+
.capture = {
2172
+
.stream_name = "Capture",
2173
+
.channels_min = 1,
2174
+
.channels_max = 4,
2175
+
.rates = SNDRV_PCM_RATE_8000_96000,
2176
+
.formats = DA7218_FORMATS,
2177
+
},
2178
+
.ops = &da7218_dai_ops,
2179
+
.symmetric_rates = 1,
2180
+
.symmetric_channels = 1,
2181
+
.symmetric_samplebits = 1,
2182
+
};
2183
+
2184
+
2185
+
/*
2186
+
* HP Detect
2187
+
*/
2188
+
2189
+
int da7218_hpldet(struct snd_soc_codec *codec, struct snd_soc_jack *jack)
2190
+
{
2191
+
struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
2192
+
2193
+
if (da7218->dev_id == DA7217_DEV_ID)
2194
+
return -EINVAL;
2195
+
2196
+
da7218->jack = jack;
2197
+
snd_soc_update_bits(codec, DA7218_HPLDET_JACK,
2198
+
DA7218_HPLDET_JACK_EN_MASK,
2199
+
jack ? DA7218_HPLDET_JACK_EN_MASK : 0);
2200
+
2201
+
return 0;
2202
+
}
2203
+
EXPORT_SYMBOL_GPL(da7218_hpldet);
2204
+
2205
+
static void da7218_hpldet_irq(struct snd_soc_codec *codec)
2206
+
{
2207
+
struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
2208
+
u8 jack_status;
2209
+
int report;
2210
+
2211
+
jack_status = snd_soc_read(codec, DA7218_EVENT_STATUS);
2212
+
2213
+
if (jack_status & DA7218_HPLDET_JACK_STS_MASK)
2214
+
report = SND_JACK_HEADPHONE;
2215
+
else
2216
+
report = 0;
2217
+
2218
+
snd_soc_jack_report(da7218->jack, report, SND_JACK_HEADPHONE);
2219
+
}
2220
+
2221
+
/*
2222
+
* IRQ
2223
+
*/
2224
+
2225
+
static irqreturn_t da7218_irq_thread(int irq, void *data)
2226
+
{
2227
+
struct snd_soc_codec *codec = data;
2228
+
u8 status;
2229
+
2230
+
/* Read IRQ status reg */
2231
+
status = snd_soc_read(codec, DA7218_EVENT);
2232
+
if (!status)
2233
+
return IRQ_NONE;
2234
+
2235
+
/* HP detect */
2236
+
if (status & DA7218_HPLDET_JACK_EVENT_MASK)
2237
+
da7218_hpldet_irq(codec);
2238
+
2239
+
/* Clear interrupts */
2240
+
snd_soc_write(codec, DA7218_EVENT, status);
2241
+
2242
+
return IRQ_HANDLED;
2243
+
}
2244
+
2245
+
/*
2246
+
* DT
2247
+
*/
2248
+
2249
+
static const struct of_device_id da7218_of_match[] = {
2250
+
{ .compatible = "dlg,da7217", .data = (void *) DA7217_DEV_ID },
2251
+
{ .compatible = "dlg,da7218", .data = (void *) DA7218_DEV_ID },
2252
+
{ }
2253
+
};
2254
+
MODULE_DEVICE_TABLE(of, da7218_of_match);
2255
+
2256
+
static inline int da7218_of_get_id(struct device *dev)
2257
+
{
2258
+
const struct of_device_id *id = of_match_device(da7218_of_match, dev);
2259
+
2260
+
if (id)
2261
+
return (int) id->data;
2262
+
else
2263
+
return -EINVAL;
2264
+
}
2265
+
2266
+
static enum da7218_micbias_voltage
2267
+
da7218_of_micbias_lvl(struct snd_soc_codec *codec, u32 val)
2268
+
{
2269
+
switch (val) {
2270
+
case 1200:
2271
+
return DA7218_MICBIAS_1_2V;
2272
+
case 1600:
2273
+
return DA7218_MICBIAS_1_6V;
2274
+
case 1800:
2275
+
return DA7218_MICBIAS_1_8V;
2276
+
case 2000:
2277
+
return DA7218_MICBIAS_2_0V;
2278
+
case 2200:
2279
+
return DA7218_MICBIAS_2_2V;
2280
+
case 2400:
2281
+
return DA7218_MICBIAS_2_4V;
2282
+
case 2600:
2283
+
return DA7218_MICBIAS_2_6V;
2284
+
case 2800:
2285
+
return DA7218_MICBIAS_2_8V;
2286
+
case 3000:
2287
+
return DA7218_MICBIAS_3_0V;
2288
+
default:
2289
+
dev_warn(codec->dev, "Invalid micbias level");
2290
+
return DA7218_MICBIAS_1_6V;
2291
+
}
2292
+
}
2293
+
2294
+
static enum da7218_mic_amp_in_sel
2295
+
da7218_of_mic_amp_in_sel(struct snd_soc_codec *codec, const char *str)
2296
+
{
2297
+
if (!strcmp(str, "diff")) {
2298
+
return DA7218_MIC_AMP_IN_SEL_DIFF;
2299
+
} else if (!strcmp(str, "se_p")) {
2300
+
return DA7218_MIC_AMP_IN_SEL_SE_P;
2301
+
} else if (!strcmp(str, "se_n")) {
2302
+
return DA7218_MIC_AMP_IN_SEL_SE_N;
2303
+
} else {
2304
+
dev_warn(codec->dev, "Invalid mic input type selection");
2305
+
return DA7218_MIC_AMP_IN_SEL_DIFF;
2306
+
}
2307
+
}
2308
+
2309
+
static enum da7218_dmic_data_sel
2310
+
da7218_of_dmic_data_sel(struct snd_soc_codec *codec, const char *str)
2311
+
{
2312
+
if (!strcmp(str, "lrise_rfall")) {
2313
+
return DA7218_DMIC_DATA_LRISE_RFALL;
2314
+
} else if (!strcmp(str, "lfall_rrise")) {
2315
+
return DA7218_DMIC_DATA_LFALL_RRISE;
2316
+
} else {
2317
+
dev_warn(codec->dev, "Invalid DMIC data type selection");
2318
+
return DA7218_DMIC_DATA_LRISE_RFALL;
2319
+
}
2320
+
}
2321
+
2322
+
static enum da7218_dmic_samplephase
2323
+
da7218_of_dmic_samplephase(struct snd_soc_codec *codec, const char *str)
2324
+
{
2325
+
if (!strcmp(str, "on_clkedge")) {
2326
+
return DA7218_DMIC_SAMPLE_ON_CLKEDGE;
2327
+
} else if (!strcmp(str, "between_clkedge")) {
2328
+
return DA7218_DMIC_SAMPLE_BETWEEN_CLKEDGE;
2329
+
} else {
2330
+
dev_warn(codec->dev, "Invalid DMIC sample phase");
2331
+
return DA7218_DMIC_SAMPLE_ON_CLKEDGE;
2332
+
}
2333
+
}
2334
+
2335
+
static enum da7218_dmic_clk_rate
2336
+
da7218_of_dmic_clkrate(struct snd_soc_codec *codec, u32 val)
2337
+
{
2338
+
switch (val) {
2339
+
case 1500000:
2340
+
return DA7218_DMIC_CLK_1_5MHZ;
2341
+
case 3000000:
2342
+
return DA7218_DMIC_CLK_3_0MHZ;
2343
+
default:
2344
+
dev_warn(codec->dev, "Invalid DMIC clock rate");
2345
+
return DA7218_DMIC_CLK_3_0MHZ;
2346
+
}
2347
+
}
2348
+
2349
+
static enum da7218_hpldet_jack_rate
2350
+
da7218_of_jack_rate(struct snd_soc_codec *codec, u32 val)
2351
+
{
2352
+
switch (val) {
2353
+
case 5:
2354
+
return DA7218_HPLDET_JACK_RATE_5US;
2355
+
case 10:
2356
+
return DA7218_HPLDET_JACK_RATE_10US;
2357
+
case 20:
2358
+
return DA7218_HPLDET_JACK_RATE_20US;
2359
+
case 40:
2360
+
return DA7218_HPLDET_JACK_RATE_40US;
2361
+
case 80:
2362
+
return DA7218_HPLDET_JACK_RATE_80US;
2363
+
case 160:
2364
+
return DA7218_HPLDET_JACK_RATE_160US;
2365
+
case 320:
2366
+
return DA7218_HPLDET_JACK_RATE_320US;
2367
+
case 640:
2368
+
return DA7218_HPLDET_JACK_RATE_640US;
2369
+
default:
2370
+
dev_warn(codec->dev, "Invalid jack detect rate");
2371
+
return DA7218_HPLDET_JACK_RATE_40US;
2372
+
}
2373
+
}
2374
+
2375
+
static enum da7218_hpldet_jack_debounce
2376
+
da7218_of_jack_debounce(struct snd_soc_codec *codec, u32 val)
2377
+
{
2378
+
switch (val) {
2379
+
case 0:
2380
+
return DA7218_HPLDET_JACK_DEBOUNCE_OFF;
2381
+
case 2:
2382
+
return DA7218_HPLDET_JACK_DEBOUNCE_2;
2383
+
case 3:
2384
+
return DA7218_HPLDET_JACK_DEBOUNCE_3;
2385
+
case 4:
2386
+
return DA7218_HPLDET_JACK_DEBOUNCE_4;
2387
+
default:
2388
+
dev_warn(codec->dev, "Invalid jack debounce");
2389
+
return DA7218_HPLDET_JACK_DEBOUNCE_2;
2390
+
}
2391
+
}
2392
+
2393
+
static enum da7218_hpldet_jack_thr
2394
+
da7218_of_jack_thr(struct snd_soc_codec *codec, u32 val)
2395
+
{
2396
+
switch (val) {
2397
+
case 84:
2398
+
return DA7218_HPLDET_JACK_THR_84PCT;
2399
+
case 88:
2400
+
return DA7218_HPLDET_JACK_THR_88PCT;
2401
+
case 92:
2402
+
return DA7218_HPLDET_JACK_THR_92PCT;
2403
+
case 96:
2404
+
return DA7218_HPLDET_JACK_THR_96PCT;
2405
+
default:
2406
+
dev_warn(codec->dev, "Invalid jack threshold level");
2407
+
return DA7218_HPLDET_JACK_THR_84PCT;
2408
+
}
2409
+
}
2410
+
2411
+
static struct da7218_pdata *da7218_of_to_pdata(struct snd_soc_codec *codec)
2412
+
{
2413
+
struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
2414
+
struct device_node *np = codec->dev->of_node;
2415
+
struct device_node *hpldet_np;
2416
+
struct da7218_pdata *pdata;
2417
+
struct da7218_hpldet_pdata *hpldet_pdata;
2418
+
const char *of_str;
2419
+
u32 of_val32;
2420
+
2421
+
pdata = devm_kzalloc(codec->dev, sizeof(*pdata), GFP_KERNEL);
2422
+
if (!pdata) {
2423
+
dev_warn(codec->dev, "Failed to allocate memory for pdata\n");
2424
+
return NULL;
2425
+
}
2426
+
2427
+
if (of_property_read_u32(np, "dlg,micbias1-lvl-millivolt", &of_val32) >= 0)
2428
+
pdata->micbias1_lvl = da7218_of_micbias_lvl(codec, of_val32);
2429
+
else
2430
+
pdata->micbias1_lvl = DA7218_MICBIAS_1_6V;
2431
+
2432
+
if (of_property_read_u32(np, "dlg,micbias2-lvl-millivolt", &of_val32) >= 0)
2433
+
pdata->micbias2_lvl = da7218_of_micbias_lvl(codec, of_val32);
2434
+
else
2435
+
pdata->micbias2_lvl = DA7218_MICBIAS_1_6V;
2436
+
2437
+
if (!of_property_read_string(np, "dlg,mic1-amp-in-sel", &of_str))
2438
+
pdata->mic1_amp_in_sel =
2439
+
da7218_of_mic_amp_in_sel(codec, of_str);
2440
+
else
2441
+
pdata->mic1_amp_in_sel = DA7218_MIC_AMP_IN_SEL_DIFF;
2442
+
2443
+
if (!of_property_read_string(np, "dlg,mic2-amp-in-sel", &of_str))
2444
+
pdata->mic2_amp_in_sel =
2445
+
da7218_of_mic_amp_in_sel(codec, of_str);
2446
+
else
2447
+
pdata->mic2_amp_in_sel = DA7218_MIC_AMP_IN_SEL_DIFF;
2448
+
2449
+
if (!of_property_read_string(np, "dlg,dmic1-data-sel", &of_str))
2450
+
pdata->dmic1_data_sel = da7218_of_dmic_data_sel(codec, of_str);
2451
+
else
2452
+
pdata->dmic1_data_sel = DA7218_DMIC_DATA_LRISE_RFALL;
2453
+
2454
+
if (!of_property_read_string(np, "dlg,dmic1-samplephase", &of_str))
2455
+
pdata->dmic1_samplephase =
2456
+
da7218_of_dmic_samplephase(codec, of_str);
2457
+
else
2458
+
pdata->dmic1_samplephase = DA7218_DMIC_SAMPLE_ON_CLKEDGE;
2459
+
2460
+
if (of_property_read_u32(np, "dlg,dmic1-clkrate-hz", &of_val32) >= 0)
2461
+
pdata->dmic1_clk_rate = da7218_of_dmic_clkrate(codec, of_val32);
2462
+
else
2463
+
pdata->dmic1_clk_rate = DA7218_DMIC_CLK_3_0MHZ;
2464
+
2465
+
if (!of_property_read_string(np, "dlg,dmic2-data-sel", &of_str))
2466
+
pdata->dmic2_data_sel = da7218_of_dmic_data_sel(codec, of_str);
2467
+
else
2468
+
pdata->dmic2_data_sel = DA7218_DMIC_DATA_LRISE_RFALL;
2469
+
2470
+
if (!of_property_read_string(np, "dlg,dmic2-samplephase", &of_str))
2471
+
pdata->dmic2_samplephase =
2472
+
da7218_of_dmic_samplephase(codec, of_str);
2473
+
else
2474
+
pdata->dmic2_samplephase = DA7218_DMIC_SAMPLE_ON_CLKEDGE;
2475
+
2476
+
if (of_property_read_u32(np, "dlg,dmic2-clkrate-hz", &of_val32) >= 0)
2477
+
pdata->dmic2_clk_rate = da7218_of_dmic_clkrate(codec, of_val32);
2478
+
else
2479
+
pdata->dmic2_clk_rate = DA7218_DMIC_CLK_3_0MHZ;
2480
+
2481
+
if (da7218->dev_id == DA7217_DEV_ID) {
2482
+
if (of_property_read_bool(np, "dlg,hp-diff-single-supply"))
2483
+
pdata->hp_diff_single_supply = true;
2484
+
}
2485
+
2486
+
if (da7218->dev_id == DA7218_DEV_ID) {
2487
+
hpldet_np = of_find_node_by_name(np, "da7218_hpldet");
2488
+
if (!hpldet_np)
2489
+
return pdata;
2490
+
2491
+
hpldet_pdata = devm_kzalloc(codec->dev, sizeof(*hpldet_pdata),
2492
+
GFP_KERNEL);
2493
+
if (!hpldet_pdata) {
2494
+
dev_warn(codec->dev,
2495
+
"Failed to allocate memory for hpldet pdata\n");
2496
+
of_node_put(hpldet_np);
2497
+
return pdata;
2498
+
}
2499
+
pdata->hpldet_pdata = hpldet_pdata;
2500
+
2501
+
if (of_property_read_u32(hpldet_np, "dlg,jack-rate-us",
2502
+
&of_val32) >= 0)
2503
+
hpldet_pdata->jack_rate =
2504
+
da7218_of_jack_rate(codec, of_val32);
2505
+
else
2506
+
hpldet_pdata->jack_rate = DA7218_HPLDET_JACK_RATE_40US;
2507
+
2508
+
if (of_property_read_u32(hpldet_np, "dlg,jack-debounce",
2509
+
&of_val32) >= 0)
2510
+
hpldet_pdata->jack_debounce =
2511
+
da7218_of_jack_debounce(codec, of_val32);
2512
+
else
2513
+
hpldet_pdata->jack_debounce =
2514
+
DA7218_HPLDET_JACK_DEBOUNCE_2;
2515
+
2516
+
if (of_property_read_u32(hpldet_np, "dlg,jack-threshold-pct",
2517
+
&of_val32) >= 0)
2518
+
hpldet_pdata->jack_thr =
2519
+
da7218_of_jack_thr(codec, of_val32);
2520
+
else
2521
+
hpldet_pdata->jack_thr = DA7218_HPLDET_JACK_THR_84PCT;
2522
+
2523
+
if (of_property_read_bool(hpldet_np, "dlg,comp-inv"))
2524
+
hpldet_pdata->comp_inv = true;
2525
+
2526
+
if (of_property_read_bool(hpldet_np, "dlg,hyst"))
2527
+
hpldet_pdata->hyst = true;
2528
+
2529
+
if (of_property_read_bool(hpldet_np, "dlg,discharge"))
2530
+
hpldet_pdata->discharge = true;
2531
+
2532
+
of_node_put(hpldet_np);
2533
+
}
2534
+
2535
+
return pdata;
2536
+
}
2537
+
2538
+
2539
+
/*
2540
+
* Codec driver functions
2541
+
*/
2542
+
2543
+
static int da7218_set_bias_level(struct snd_soc_codec *codec,
2544
+
enum snd_soc_bias_level level)
2545
+
{
2546
+
struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
2547
+
int ret;
2548
+
2549
+
switch (level) {
2550
+
case SND_SOC_BIAS_ON:
2551
+
case SND_SOC_BIAS_PREPARE:
2552
+
break;
2553
+
case SND_SOC_BIAS_STANDBY:
2554
+
if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
2555
+
/* MCLK */
2556
+
if (da7218->mclk) {
2557
+
ret = clk_prepare_enable(da7218->mclk);
2558
+
if (ret) {
2559
+
dev_err(codec->dev,
2560
+
"Failed to enable mclk\n");
2561
+
return ret;
2562
+
}
2563
+
}
2564
+
2565
+
/* Master bias */
2566
+
snd_soc_update_bits(codec, DA7218_REFERENCES,
2567
+
DA7218_BIAS_EN_MASK,
2568
+
DA7218_BIAS_EN_MASK);
2569
+
2570
+
/* Internal LDO */
2571
+
snd_soc_update_bits(codec, DA7218_LDO_CTRL,
2572
+
DA7218_LDO_EN_MASK,
2573
+
DA7218_LDO_EN_MASK);
2574
+
}
2575
+
break;
2576
+
case SND_SOC_BIAS_OFF:
2577
+
/* Only disable if jack detection disabled */
2578
+
if (!da7218->jack) {
2579
+
/* Internal LDO */
2580
+
snd_soc_update_bits(codec, DA7218_LDO_CTRL,
2581
+
DA7218_LDO_EN_MASK, 0);
2582
+
2583
+
/* Master bias */
2584
+
snd_soc_update_bits(codec, DA7218_REFERENCES,
2585
+
DA7218_BIAS_EN_MASK, 0);
2586
+
}
2587
+
2588
+
/* MCLK */
2589
+
if (da7218->mclk)
2590
+
clk_disable_unprepare(da7218->mclk);
2591
+
break;
2592
+
}
2593
+
2594
+
return 0;
2595
+
}
2596
+
2597
+
static const char *da7218_supply_names[DA7218_NUM_SUPPLIES] = {
2598
+
[DA7218_SUPPLY_VDD] = "VDD",
2599
+
[DA7218_SUPPLY_VDDMIC] = "VDDMIC",
2600
+
[DA7218_SUPPLY_VDDIO] = "VDDIO",
2601
+
};
2602
+
2603
+
static int da7218_handle_supplies(struct snd_soc_codec *codec)
2604
+
{
2605
+
struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
2606
+
struct regulator *vddio;
2607
+
u8 io_voltage_lvl = DA7218_IO_VOLTAGE_LEVEL_2_5V_3_6V;
2608
+
int i, ret;
2609
+
2610
+
/* Get required supplies */
2611
+
for (i = 0; i < DA7218_NUM_SUPPLIES; ++i)
2612
+
da7218->supplies[i].supply = da7218_supply_names[i];
2613
+
2614
+
ret = devm_regulator_bulk_get(codec->dev, DA7218_NUM_SUPPLIES,
2615
+
da7218->supplies);
2616
+
if (ret) {
2617
+
dev_err(codec->dev, "Failed to get supplies\n");
2618
+
return ret;
2619
+
}
2620
+
2621
+
/* Determine VDDIO voltage provided */
2622
+
vddio = da7218->supplies[DA7218_SUPPLY_VDDIO].consumer;
2623
+
ret = regulator_get_voltage(vddio);
2624
+
if (ret < 1500000)
2625
+
dev_warn(codec->dev, "Invalid VDDIO voltage\n");
2626
+
else if (ret < 2500000)
2627
+
io_voltage_lvl = DA7218_IO_VOLTAGE_LEVEL_1_5V_2_5V;
2628
+
2629
+
/* Enable main supplies */
2630
+
ret = regulator_bulk_enable(DA7218_NUM_SUPPLIES, da7218->supplies);
2631
+
if (ret) {
2632
+
dev_err(codec->dev, "Failed to enable supplies\n");
2633
+
return ret;
2634
+
}
2635
+
2636
+
/* Ensure device in active mode */
2637
+
snd_soc_write(codec, DA7218_SYSTEM_ACTIVE, DA7218_SYSTEM_ACTIVE_MASK);
2638
+
2639
+
/* Update IO voltage level range */
2640
+
snd_soc_write(codec, DA7218_IO_CTRL, io_voltage_lvl);
2641
+
2642
+
return 0;
2643
+
}
2644
+
2645
+
static void da7218_handle_pdata(struct snd_soc_codec *codec)
2646
+
{
2647
+
struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
2648
+
struct da7218_pdata *pdata = da7218->pdata;
2649
+
2650
+
if (pdata) {
2651
+
u8 micbias_lvl = 0, dmic_cfg = 0;
2652
+
2653
+
/* Mic Bias voltages */
2654
+
switch (pdata->micbias1_lvl) {
2655
+
case DA7218_MICBIAS_1_2V:
2656
+
micbias_lvl |= DA7218_MICBIAS_1_LP_MODE_MASK;
2657
+
break;
2658
+
case DA7218_MICBIAS_1_6V:
2659
+
case DA7218_MICBIAS_1_8V:
2660
+
case DA7218_MICBIAS_2_0V:
2661
+
case DA7218_MICBIAS_2_2V:
2662
+
case DA7218_MICBIAS_2_4V:
2663
+
case DA7218_MICBIAS_2_6V:
2664
+
case DA7218_MICBIAS_2_8V:
2665
+
case DA7218_MICBIAS_3_0V:
2666
+
micbias_lvl |= (pdata->micbias1_lvl <<
2667
+
DA7218_MICBIAS_1_LEVEL_SHIFT);
2668
+
break;
2669
+
}
2670
+
2671
+
switch (pdata->micbias2_lvl) {
2672
+
case DA7218_MICBIAS_1_2V:
2673
+
micbias_lvl |= DA7218_MICBIAS_2_LP_MODE_MASK;
2674
+
break;
2675
+
case DA7218_MICBIAS_1_6V:
2676
+
case DA7218_MICBIAS_1_8V:
2677
+
case DA7218_MICBIAS_2_0V:
2678
+
case DA7218_MICBIAS_2_2V:
2679
+
case DA7218_MICBIAS_2_4V:
2680
+
case DA7218_MICBIAS_2_6V:
2681
+
case DA7218_MICBIAS_2_8V:
2682
+
case DA7218_MICBIAS_3_0V:
2683
+
micbias_lvl |= (pdata->micbias2_lvl <<
2684
+
DA7218_MICBIAS_2_LEVEL_SHIFT);
2685
+
break;
2686
+
}
2687
+
2688
+
snd_soc_write(codec, DA7218_MICBIAS_CTRL, micbias_lvl);
2689
+
2690
+
/* Mic */
2691
+
switch (pdata->mic1_amp_in_sel) {
2692
+
case DA7218_MIC_AMP_IN_SEL_DIFF:
2693
+
case DA7218_MIC_AMP_IN_SEL_SE_P:
2694
+
case DA7218_MIC_AMP_IN_SEL_SE_N:
2695
+
snd_soc_write(codec, DA7218_MIC_1_SELECT,
2696
+
pdata->mic1_amp_in_sel);
2697
+
break;
2698
+
}
2699
+
2700
+
switch (pdata->mic2_amp_in_sel) {
2701
+
case DA7218_MIC_AMP_IN_SEL_DIFF:
2702
+
case DA7218_MIC_AMP_IN_SEL_SE_P:
2703
+
case DA7218_MIC_AMP_IN_SEL_SE_N:
2704
+
snd_soc_write(codec, DA7218_MIC_2_SELECT,
2705
+
pdata->mic2_amp_in_sel);
2706
+
break;
2707
+
}
2708
+
2709
+
/* DMic */
2710
+
switch (pdata->dmic1_data_sel) {
2711
+
case DA7218_DMIC_DATA_LFALL_RRISE:
2712
+
case DA7218_DMIC_DATA_LRISE_RFALL:
2713
+
dmic_cfg |= (pdata->dmic1_data_sel <<
2714
+
DA7218_DMIC_1_DATA_SEL_SHIFT);
2715
+
break;
2716
+
}
2717
+
2718
+
switch (pdata->dmic1_samplephase) {
2719
+
case DA7218_DMIC_SAMPLE_ON_CLKEDGE:
2720
+
case DA7218_DMIC_SAMPLE_BETWEEN_CLKEDGE:
2721
+
dmic_cfg |= (pdata->dmic1_samplephase <<
2722
+
DA7218_DMIC_1_SAMPLEPHASE_SHIFT);
2723
+
break;
2724
+
}
2725
+
2726
+
switch (pdata->dmic1_clk_rate) {
2727
+
case DA7218_DMIC_CLK_3_0MHZ:
2728
+
case DA7218_DMIC_CLK_1_5MHZ:
2729
+
dmic_cfg |= (pdata->dmic1_clk_rate <<
2730
+
DA7218_DMIC_1_CLK_RATE_SHIFT);
2731
+
break;
2732
+
}
2733
+
2734
+
snd_soc_update_bits(codec, DA7218_DMIC_1_CTRL,
2735
+
DA7218_DMIC_1_DATA_SEL_MASK |
2736
+
DA7218_DMIC_1_SAMPLEPHASE_MASK |
2737
+
DA7218_DMIC_1_CLK_RATE_MASK, dmic_cfg);
2738
+
2739
+
dmic_cfg = 0;
2740
+
switch (pdata->dmic2_data_sel) {
2741
+
case DA7218_DMIC_DATA_LFALL_RRISE:
2742
+
case DA7218_DMIC_DATA_LRISE_RFALL:
2743
+
dmic_cfg |= (pdata->dmic2_data_sel <<
2744
+
DA7218_DMIC_2_DATA_SEL_SHIFT);
2745
+
break;
2746
+
}
2747
+
2748
+
switch (pdata->dmic2_samplephase) {
2749
+
case DA7218_DMIC_SAMPLE_ON_CLKEDGE:
2750
+
case DA7218_DMIC_SAMPLE_BETWEEN_CLKEDGE:
2751
+
dmic_cfg |= (pdata->dmic2_samplephase <<
2752
+
DA7218_DMIC_2_SAMPLEPHASE_SHIFT);
2753
+
break;
2754
+
}
2755
+
2756
+
switch (pdata->dmic2_clk_rate) {
2757
+
case DA7218_DMIC_CLK_3_0MHZ:
2758
+
case DA7218_DMIC_CLK_1_5MHZ:
2759
+
dmic_cfg |= (pdata->dmic2_clk_rate <<
2760
+
DA7218_DMIC_2_CLK_RATE_SHIFT);
2761
+
break;
2762
+
}
2763
+
2764
+
snd_soc_update_bits(codec, DA7218_DMIC_2_CTRL,
2765
+
DA7218_DMIC_2_DATA_SEL_MASK |
2766
+
DA7218_DMIC_2_SAMPLEPHASE_MASK |
2767
+
DA7218_DMIC_2_CLK_RATE_MASK, dmic_cfg);
2768
+
2769
+
/* DA7217 Specific */
2770
+
if (da7218->dev_id == DA7217_DEV_ID) {
2771
+
da7218->hp_single_supply =
2772
+
pdata->hp_diff_single_supply;
2773
+
2774
+
if (da7218->hp_single_supply) {
2775
+
snd_soc_write(codec, DA7218_HP_DIFF_UNLOCK,
2776
+
DA7218_HP_DIFF_UNLOCK_VAL);
2777
+
snd_soc_update_bits(codec, DA7218_HP_DIFF_CTRL,
2778
+
DA7218_HP_AMP_SINGLE_SUPPLY_EN_MASK,
2779
+
DA7218_HP_AMP_SINGLE_SUPPLY_EN_MASK);
2780
+
}
2781
+
}
2782
+
2783
+
/* DA7218 Specific */
2784
+
if ((da7218->dev_id == DA7218_DEV_ID) &&
2785
+
(pdata->hpldet_pdata)) {
2786
+
struct da7218_hpldet_pdata *hpldet_pdata =
2787
+
pdata->hpldet_pdata;
2788
+
u8 hpldet_cfg = 0;
2789
+
2790
+
switch (hpldet_pdata->jack_rate) {
2791
+
case DA7218_HPLDET_JACK_RATE_5US:
2792
+
case DA7218_HPLDET_JACK_RATE_10US:
2793
+
case DA7218_HPLDET_JACK_RATE_20US:
2794
+
case DA7218_HPLDET_JACK_RATE_40US:
2795
+
case DA7218_HPLDET_JACK_RATE_80US:
2796
+
case DA7218_HPLDET_JACK_RATE_160US:
2797
+
case DA7218_HPLDET_JACK_RATE_320US:
2798
+
case DA7218_HPLDET_JACK_RATE_640US:
2799
+
hpldet_cfg |=
2800
+
(hpldet_pdata->jack_rate <<
2801
+
DA7218_HPLDET_JACK_RATE_SHIFT);
2802
+
break;
2803
+
}
2804
+
2805
+
switch (hpldet_pdata->jack_debounce) {
2806
+
case DA7218_HPLDET_JACK_DEBOUNCE_OFF:
2807
+
case DA7218_HPLDET_JACK_DEBOUNCE_2:
2808
+
case DA7218_HPLDET_JACK_DEBOUNCE_3:
2809
+
case DA7218_HPLDET_JACK_DEBOUNCE_4:
2810
+
hpldet_cfg |=
2811
+
(hpldet_pdata->jack_debounce <<
2812
+
DA7218_HPLDET_JACK_DEBOUNCE_SHIFT);
2813
+
break;
2814
+
}
2815
+
2816
+
switch (hpldet_pdata->jack_thr) {
2817
+
case DA7218_HPLDET_JACK_THR_84PCT:
2818
+
case DA7218_HPLDET_JACK_THR_88PCT:
2819
+
case DA7218_HPLDET_JACK_THR_92PCT:
2820
+
case DA7218_HPLDET_JACK_THR_96PCT:
2821
+
hpldet_cfg |=
2822
+
(hpldet_pdata->jack_thr <<
2823
+
DA7218_HPLDET_JACK_THR_SHIFT);
2824
+
break;
2825
+
}
2826
+
snd_soc_update_bits(codec, DA7218_HPLDET_JACK,
2827
+
DA7218_HPLDET_JACK_RATE_MASK |
2828
+
DA7218_HPLDET_JACK_DEBOUNCE_MASK |
2829
+
DA7218_HPLDET_JACK_THR_MASK,
2830
+
hpldet_cfg);
2831
+
2832
+
hpldet_cfg = 0;
2833
+
if (hpldet_pdata->comp_inv)
2834
+
hpldet_cfg |= DA7218_HPLDET_COMP_INV_MASK;
2835
+
2836
+
if (hpldet_pdata->hyst)
2837
+
hpldet_cfg |= DA7218_HPLDET_HYST_EN_MASK;
2838
+
2839
+
if (hpldet_pdata->discharge)
2840
+
hpldet_cfg |= DA7218_HPLDET_DISCHARGE_EN_MASK;
2841
+
2842
+
snd_soc_write(codec, DA7218_HPLDET_CTRL, hpldet_cfg);
2843
+
}
2844
+
}
2845
+
}
2846
+
2847
+
static int da7218_probe(struct snd_soc_codec *codec)
2848
+
{
2849
+
struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
2850
+
int ret;
2851
+
2852
+
/* Regulator configuration */
2853
+
ret = da7218_handle_supplies(codec);
2854
+
if (ret)
2855
+
return ret;
2856
+
2857
+
/* Handle DT/Platform data */
2858
+
if (codec->dev->of_node)
2859
+
da7218->pdata = da7218_of_to_pdata(codec);
2860
+
else
2861
+
da7218->pdata = dev_get_platdata(codec->dev);
2862
+
2863
+
da7218_handle_pdata(codec);
2864
+
2865
+
/* Check if MCLK provided, if not the clock is NULL */
2866
+
da7218->mclk = devm_clk_get(codec->dev, "mclk");
2867
+
if (IS_ERR(da7218->mclk)) {
2868
+
if (PTR_ERR(da7218->mclk) != -ENOENT) {
2869
+
ret = PTR_ERR(da7218->mclk);
2870
+
goto err_disable_reg;
2871
+
} else {
2872
+
da7218->mclk = NULL;
2873
+
}
2874
+
}
2875
+
2876
+
/* Default PC to free-running */
2877
+
snd_soc_write(codec, DA7218_PC_COUNT, DA7218_PC_FREERUN_MASK);
2878
+
2879
+
/*
2880
+
* Default Output Filter mixers to off otherwise DAPM will power
2881
+
* Mic to HP passthrough paths by default at startup.
2882
+
*/
2883
+
snd_soc_write(codec, DA7218_DROUTING_OUTFILT_1L, 0);
2884
+
snd_soc_write(codec, DA7218_DROUTING_OUTFILT_1R, 0);
2885
+
2886
+
/* Default CP to normal load, power mode */
2887
+
snd_soc_update_bits(codec, DA7218_CP_CTRL,
2888
+
DA7218_CP_SMALL_SWITCH_FREQ_EN_MASK, 0);
2889
+
2890
+
/* Default gain ramping */
2891
+
snd_soc_update_bits(codec, DA7218_MIXIN_1_CTRL,
2892
+
DA7218_MIXIN_1_AMP_RAMP_EN_MASK,
2893
+
DA7218_MIXIN_1_AMP_RAMP_EN_MASK);
2894
+
snd_soc_update_bits(codec, DA7218_MIXIN_2_CTRL,
2895
+
DA7218_MIXIN_2_AMP_RAMP_EN_MASK,
2896
+
DA7218_MIXIN_2_AMP_RAMP_EN_MASK);
2897
+
snd_soc_update_bits(codec, DA7218_IN_1L_FILTER_CTRL,
2898
+
DA7218_IN_1L_RAMP_EN_MASK,
2899
+
DA7218_IN_1L_RAMP_EN_MASK);
2900
+
snd_soc_update_bits(codec, DA7218_IN_1R_FILTER_CTRL,
2901
+
DA7218_IN_1R_RAMP_EN_MASK,
2902
+
DA7218_IN_1R_RAMP_EN_MASK);
2903
+
snd_soc_update_bits(codec, DA7218_IN_2L_FILTER_CTRL,
2904
+
DA7218_IN_2L_RAMP_EN_MASK,
2905
+
DA7218_IN_2L_RAMP_EN_MASK);
2906
+
snd_soc_update_bits(codec, DA7218_IN_2R_FILTER_CTRL,
2907
+
DA7218_IN_2R_RAMP_EN_MASK,
2908
+
DA7218_IN_2R_RAMP_EN_MASK);
2909
+
snd_soc_update_bits(codec, DA7218_DGS_GAIN_CTRL,
2910
+
DA7218_DGS_RAMP_EN_MASK, DA7218_DGS_RAMP_EN_MASK);
2911
+
snd_soc_update_bits(codec, DA7218_OUT_1L_FILTER_CTRL,
2912
+
DA7218_OUT_1L_RAMP_EN_MASK,
2913
+
DA7218_OUT_1L_RAMP_EN_MASK);
2914
+
snd_soc_update_bits(codec, DA7218_OUT_1R_FILTER_CTRL,
2915
+
DA7218_OUT_1R_RAMP_EN_MASK,
2916
+
DA7218_OUT_1R_RAMP_EN_MASK);
2917
+
snd_soc_update_bits(codec, DA7218_HP_L_CTRL,
2918
+
DA7218_HP_L_AMP_RAMP_EN_MASK,
2919
+
DA7218_HP_L_AMP_RAMP_EN_MASK);
2920
+
snd_soc_update_bits(codec, DA7218_HP_R_CTRL,
2921
+
DA7218_HP_R_AMP_RAMP_EN_MASK,
2922
+
DA7218_HP_R_AMP_RAMP_EN_MASK);
2923
+
2924
+
/* Default infinite tone gen, start/stop by Kcontrol */
2925
+
snd_soc_write(codec, DA7218_TONE_GEN_CYCLES, DA7218_BEEP_CYCLES_MASK);
2926
+
2927
+
/* DA7217 specific config */
2928
+
if (da7218->dev_id == DA7217_DEV_ID) {
2929
+
snd_soc_update_bits(codec, DA7218_HP_DIFF_CTRL,
2930
+
DA7218_HP_AMP_DIFF_MODE_EN_MASK,
2931
+
DA7218_HP_AMP_DIFF_MODE_EN_MASK);
2932
+
2933
+
/* Only DA7218 supports HP detect, mask off for DA7217 */
2934
+
snd_soc_write(codec, DA7218_EVENT_MASK,
2935
+
DA7218_HPLDET_JACK_EVENT_IRQ_MSK_MASK);
2936
+
}
2937
+
2938
+
if (da7218->irq) {
2939
+
/* Mask off mic level events, currently not handled */
2940
+
snd_soc_update_bits(codec, DA7218_EVENT_MASK,
2941
+
DA7218_LVL_DET_EVENT_MSK_MASK,
2942
+
DA7218_LVL_DET_EVENT_MSK_MASK);
2943
+
2944
+
ret = devm_request_threaded_irq(codec->dev, da7218->irq, NULL,
2945
+
da7218_irq_thread,
2946
+
IRQF_TRIGGER_LOW | IRQF_ONESHOT,
2947
+
"da7218", codec);
2948
+
if (ret != 0) {
2949
+
dev_err(codec->dev, "Failed to request IRQ %d: %d\n",
2950
+
da7218->irq, ret);
2951
+
goto err_disable_reg;
2952
+
}
2953
+
2954
+
}
2955
+
2956
+
return 0;
2957
+
2958
+
err_disable_reg:
2959
+
regulator_bulk_disable(DA7218_NUM_SUPPLIES, da7218->supplies);
2960
+
2961
+
return ret;
2962
+
}
2963
+
2964
+
static int da7218_remove(struct snd_soc_codec *codec)
2965
+
{
2966
+
struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
2967
+
2968
+
regulator_bulk_disable(DA7218_NUM_SUPPLIES, da7218->supplies);
2969
+
2970
+
return 0;
2971
+
}
2972
+
2973
+
#ifdef CONFIG_PM
2974
+
static int da7218_suspend(struct snd_soc_codec *codec)
2975
+
{
2976
+
struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
2977
+
2978
+
da7218_set_bias_level(codec, SND_SOC_BIAS_OFF);
2979
+
2980
+
/* Put device into standby mode if jack detection disabled */
2981
+
if (!da7218->jack)
2982
+
snd_soc_write(codec, DA7218_SYSTEM_ACTIVE, 0);
2983
+
2984
+
return 0;
2985
+
}
2986
+
2987
+
static int da7218_resume(struct snd_soc_codec *codec)
2988
+
{
2989
+
struct da7218_priv *da7218 = snd_soc_codec_get_drvdata(codec);
2990
+
2991
+
/* Put device into active mode if previously moved to standby */
2992
+
if (!da7218->jack)
2993
+
snd_soc_write(codec, DA7218_SYSTEM_ACTIVE,
2994
+
DA7218_SYSTEM_ACTIVE_MASK);
2995
+
2996
+
da7218_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
2997
+
2998
+
return 0;
2999
+
}
3000
+
#else
3001
+
#define da7218_suspend NULL
3002
+
#define da7218_resume NULL
3003
+
#endif
3004
+
3005
+
static struct snd_soc_codec_driver soc_codec_dev_da7218 = {
3006
+
.probe = da7218_probe,
3007
+
.remove = da7218_remove,
3008
+
.suspend = da7218_suspend,
3009
+
.resume = da7218_resume,
3010
+
.set_bias_level = da7218_set_bias_level,
3011
+
3012
+
.controls = da7218_snd_controls,
3013
+
.num_controls = ARRAY_SIZE(da7218_snd_controls),
3014
+
3015
+
.dapm_widgets = da7218_dapm_widgets,
3016
+
.num_dapm_widgets = ARRAY_SIZE(da7218_dapm_widgets),
3017
+
.dapm_routes = da7218_audio_map,
3018
+
.num_dapm_routes = ARRAY_SIZE(da7218_audio_map),
3019
+
};
3020
+
3021
+
3022
+
/*
3023
+
* Regmap configs
3024
+
*/
3025
+
3026
+
static struct reg_default da7218_reg_defaults[] = {
3027
+
{ DA7218_SYSTEM_ACTIVE, 0x00 },
3028
+
{ DA7218_CIF_CTRL, 0x00 },
3029
+
{ DA7218_SPARE1, 0x00 },
3030
+
{ DA7218_SR, 0xAA },
3031
+
{ DA7218_PC_COUNT, 0x02 },
3032
+
{ DA7218_GAIN_RAMP_CTRL, 0x00 },
3033
+
{ DA7218_CIF_TIMEOUT_CTRL, 0x01 },
3034
+
{ DA7218_SYSTEM_MODES_INPUT, 0x00 },
3035
+
{ DA7218_SYSTEM_MODES_OUTPUT, 0x00 },
3036
+
{ DA7218_IN_1L_FILTER_CTRL, 0x00 },
3037
+
{ DA7218_IN_1R_FILTER_CTRL, 0x00 },
3038
+
{ DA7218_IN_2L_FILTER_CTRL, 0x00 },
3039
+
{ DA7218_IN_2R_FILTER_CTRL, 0x00 },
3040
+
{ DA7218_OUT_1L_FILTER_CTRL, 0x40 },
3041
+
{ DA7218_OUT_1R_FILTER_CTRL, 0x40 },
3042
+
{ DA7218_OUT_1_HPF_FILTER_CTRL, 0x80 },
3043
+
{ DA7218_OUT_1_EQ_12_FILTER_CTRL, 0x77 },
3044
+
{ DA7218_OUT_1_EQ_34_FILTER_CTRL, 0x77 },
3045
+
{ DA7218_OUT_1_EQ_5_FILTER_CTRL, 0x07 },
3046
+
{ DA7218_OUT_1_BIQ_5STAGE_CTRL, 0x40 },
3047
+
{ DA7218_OUT_1_BIQ_5STAGE_DATA, 0x00 },
3048
+
{ DA7218_OUT_1_BIQ_5STAGE_ADDR, 0x00 },
3049
+
{ DA7218_MIXIN_1_CTRL, 0x48 },
3050
+
{ DA7218_MIXIN_1_GAIN, 0x03 },
3051
+
{ DA7218_MIXIN_2_CTRL, 0x48 },
3052
+
{ DA7218_MIXIN_2_GAIN, 0x03 },
3053
+
{ DA7218_ALC_CTRL1, 0x00 },
3054
+
{ DA7218_ALC_CTRL2, 0x00 },
3055
+
{ DA7218_ALC_CTRL3, 0x00 },
3056
+
{ DA7218_ALC_NOISE, 0x3F },
3057
+
{ DA7218_ALC_TARGET_MIN, 0x3F },
3058
+
{ DA7218_ALC_TARGET_MAX, 0x00 },
3059
+
{ DA7218_ALC_GAIN_LIMITS, 0xFF },
3060
+
{ DA7218_ALC_ANA_GAIN_LIMITS, 0x71 },
3061
+
{ DA7218_ALC_ANTICLIP_CTRL, 0x00 },
3062
+
{ DA7218_AGS_ENABLE, 0x00 },
3063
+
{ DA7218_AGS_TRIGGER, 0x09 },
3064
+
{ DA7218_AGS_ATT_MAX, 0x00 },
3065
+
{ DA7218_AGS_TIMEOUT, 0x00 },
3066
+
{ DA7218_AGS_ANTICLIP_CTRL, 0x00 },
3067
+
{ DA7218_ENV_TRACK_CTRL, 0x00 },
3068
+
{ DA7218_LVL_DET_CTRL, 0x00 },
3069
+
{ DA7218_LVL_DET_LEVEL, 0x7F },
3070
+
{ DA7218_DGS_TRIGGER, 0x24 },
3071
+
{ DA7218_DGS_ENABLE, 0x00 },
3072
+
{ DA7218_DGS_RISE_FALL, 0x50 },
3073
+
{ DA7218_DGS_SYNC_DELAY, 0xA3 },
3074
+
{ DA7218_DGS_SYNC_DELAY2, 0x31 },
3075
+
{ DA7218_DGS_SYNC_DELAY3, 0x11 },
3076
+
{ DA7218_DGS_LEVELS, 0x01 },
3077
+
{ DA7218_DGS_GAIN_CTRL, 0x74 },
3078
+
{ DA7218_DROUTING_OUTDAI_1L, 0x01 },
3079
+
{ DA7218_DMIX_OUTDAI_1L_INFILT_1L_GAIN, 0x1C },
3080
+
{ DA7218_DMIX_OUTDAI_1L_INFILT_1R_GAIN, 0x1C },
3081
+
{ DA7218_DMIX_OUTDAI_1L_INFILT_2L_GAIN, 0x1C },
3082
+
{ DA7218_DMIX_OUTDAI_1L_INFILT_2R_GAIN, 0x1C },
3083
+
{ DA7218_DMIX_OUTDAI_1L_TONEGEN_GAIN, 0x1C },
3084
+
{ DA7218_DMIX_OUTDAI_1L_INDAI_1L_GAIN, 0x1C },
3085
+
{ DA7218_DMIX_OUTDAI_1L_INDAI_1R_GAIN, 0x1C },
3086
+
{ DA7218_DROUTING_OUTDAI_1R, 0x04 },
3087
+
{ DA7218_DMIX_OUTDAI_1R_INFILT_1L_GAIN, 0x1C },
3088
+
{ DA7218_DMIX_OUTDAI_1R_INFILT_1R_GAIN, 0x1C },
3089
+
{ DA7218_DMIX_OUTDAI_1R_INFILT_2L_GAIN, 0x1C },
3090
+
{ DA7218_DMIX_OUTDAI_1R_INFILT_2R_GAIN, 0x1C },
3091
+
{ DA7218_DMIX_OUTDAI_1R_TONEGEN_GAIN, 0x1C },
3092
+
{ DA7218_DMIX_OUTDAI_1R_INDAI_1L_GAIN, 0x1C },
3093
+
{ DA7218_DMIX_OUTDAI_1R_INDAI_1R_GAIN, 0x1C },
3094
+
{ DA7218_DROUTING_OUTFILT_1L, 0x01 },
3095
+
{ DA7218_DMIX_OUTFILT_1L_INFILT_1L_GAIN, 0x1C },
3096
+
{ DA7218_DMIX_OUTFILT_1L_INFILT_1R_GAIN, 0x1C },
3097
+
{ DA7218_DMIX_OUTFILT_1L_INFILT_2L_GAIN, 0x1C },
3098
+
{ DA7218_DMIX_OUTFILT_1L_INFILT_2R_GAIN, 0x1C },
3099
+
{ DA7218_DMIX_OUTFILT_1L_TONEGEN_GAIN, 0x1C },
3100
+
{ DA7218_DMIX_OUTFILT_1L_INDAI_1L_GAIN, 0x1C },
3101
+
{ DA7218_DMIX_OUTFILT_1L_INDAI_1R_GAIN, 0x1C },
3102
+
{ DA7218_DROUTING_OUTFILT_1R, 0x04 },
3103
+
{ DA7218_DMIX_OUTFILT_1R_INFILT_1L_GAIN, 0x1C },
3104
+
{ DA7218_DMIX_OUTFILT_1R_INFILT_1R_GAIN, 0x1C },
3105
+
{ DA7218_DMIX_OUTFILT_1R_INFILT_2L_GAIN, 0x1C },
3106
+
{ DA7218_DMIX_OUTFILT_1R_INFILT_2R_GAIN, 0x1C },
3107
+
{ DA7218_DMIX_OUTFILT_1R_TONEGEN_GAIN, 0x1C },
3108
+
{ DA7218_DMIX_OUTFILT_1R_INDAI_1L_GAIN, 0x1C },
3109
+
{ DA7218_DMIX_OUTFILT_1R_INDAI_1R_GAIN, 0x1C },
3110
+
{ DA7218_DROUTING_OUTDAI_2L, 0x04 },
3111
+
{ DA7218_DMIX_OUTDAI_2L_INFILT_1L_GAIN, 0x1C },
3112
+
{ DA7218_DMIX_OUTDAI_2L_INFILT_1R_GAIN, 0x1C },
3113
+
{ DA7218_DMIX_OUTDAI_2L_INFILT_2L_GAIN, 0x1C },
3114
+
{ DA7218_DMIX_OUTDAI_2L_INFILT_2R_GAIN, 0x1C },
3115
+
{ DA7218_DMIX_OUTDAI_2L_TONEGEN_GAIN, 0x1C },
3116
+
{ DA7218_DMIX_OUTDAI_2L_INDAI_1L_GAIN, 0x1C },
3117
+
{ DA7218_DMIX_OUTDAI_2L_INDAI_1R_GAIN, 0x1C },
3118
+
{ DA7218_DROUTING_OUTDAI_2R, 0x08 },
3119
+
{ DA7218_DMIX_OUTDAI_2R_INFILT_1L_GAIN, 0x1C },
3120
+
{ DA7218_DMIX_OUTDAI_2R_INFILT_1R_GAIN, 0x1C },
3121
+
{ DA7218_DMIX_OUTDAI_2R_INFILT_2L_GAIN, 0x1C },
3122
+
{ DA7218_DMIX_OUTDAI_2R_INFILT_2R_GAIN, 0x1C },
3123
+
{ DA7218_DMIX_OUTDAI_2R_TONEGEN_GAIN, 0x1C },
3124
+
{ DA7218_DMIX_OUTDAI_2R_INDAI_1L_GAIN, 0x1C },
3125
+
{ DA7218_DMIX_OUTDAI_2R_INDAI_1R_GAIN, 0x1C },
3126
+
{ DA7218_DAI_CTRL, 0x28 },
3127
+
{ DA7218_DAI_TDM_CTRL, 0x40 },
3128
+
{ DA7218_DAI_OFFSET_LOWER, 0x00 },
3129
+
{ DA7218_DAI_OFFSET_UPPER, 0x00 },
3130
+
{ DA7218_DAI_CLK_MODE, 0x01 },
3131
+
{ DA7218_PLL_CTRL, 0x04 },
3132
+
{ DA7218_PLL_FRAC_TOP, 0x00 },
3133
+
{ DA7218_PLL_FRAC_BOT, 0x00 },
3134
+
{ DA7218_PLL_INTEGER, 0x20 },
3135
+
{ DA7218_DAC_NG_CTRL, 0x00 },
3136
+
{ DA7218_DAC_NG_SETUP_TIME, 0x00 },
3137
+
{ DA7218_DAC_NG_OFF_THRESH, 0x00 },
3138
+
{ DA7218_DAC_NG_ON_THRESH, 0x00 },
3139
+
{ DA7218_TONE_GEN_CFG2, 0x00 },
3140
+
{ DA7218_TONE_GEN_FREQ1_L, 0x55 },
3141
+
{ DA7218_TONE_GEN_FREQ1_U, 0x15 },
3142
+
{ DA7218_TONE_GEN_FREQ2_L, 0x00 },
3143
+
{ DA7218_TONE_GEN_FREQ2_U, 0x40 },
3144
+
{ DA7218_TONE_GEN_CYCLES, 0x00 },
3145
+
{ DA7218_TONE_GEN_ON_PER, 0x02 },
3146
+
{ DA7218_TONE_GEN_OFF_PER, 0x01 },
3147
+
{ DA7218_CP_CTRL, 0x60 },
3148
+
{ DA7218_CP_DELAY, 0x11 },
3149
+
{ DA7218_CP_VOL_THRESHOLD1, 0x0E },
3150
+
{ DA7218_MIC_1_CTRL, 0x40 },
3151
+
{ DA7218_MIC_1_GAIN, 0x01 },
3152
+
{ DA7218_MIC_1_SELECT, 0x00 },
3153
+
{ DA7218_MIC_2_CTRL, 0x40 },
3154
+
{ DA7218_MIC_2_GAIN, 0x01 },
3155
+
{ DA7218_MIC_2_SELECT, 0x00 },
3156
+
{ DA7218_IN_1_HPF_FILTER_CTRL, 0x80 },
3157
+
{ DA7218_IN_2_HPF_FILTER_CTRL, 0x80 },
3158
+
{ DA7218_ADC_1_CTRL, 0x07 },
3159
+
{ DA7218_ADC_2_CTRL, 0x07 },
3160
+
{ DA7218_MIXOUT_L_CTRL, 0x00 },
3161
+
{ DA7218_MIXOUT_L_GAIN, 0x03 },
3162
+
{ DA7218_MIXOUT_R_CTRL, 0x00 },
3163
+
{ DA7218_MIXOUT_R_GAIN, 0x03 },
3164
+
{ DA7218_HP_L_CTRL, 0x40 },
3165
+
{ DA7218_HP_L_GAIN, 0x3B },
3166
+
{ DA7218_HP_R_CTRL, 0x40 },
3167
+
{ DA7218_HP_R_GAIN, 0x3B },
3168
+
{ DA7218_HP_DIFF_CTRL, 0x00 },
3169
+
{ DA7218_HP_DIFF_UNLOCK, 0xC3 },
3170
+
{ DA7218_HPLDET_JACK, 0x0B },
3171
+
{ DA7218_HPLDET_CTRL, 0x00 },
3172
+
{ DA7218_REFERENCES, 0x08 },
3173
+
{ DA7218_IO_CTRL, 0x00 },
3174
+
{ DA7218_LDO_CTRL, 0x00 },
3175
+
{ DA7218_SIDETONE_CTRL, 0x40 },
3176
+
{ DA7218_SIDETONE_IN_SELECT, 0x00 },
3177
+
{ DA7218_SIDETONE_GAIN, 0x1C },
3178
+
{ DA7218_DROUTING_ST_OUTFILT_1L, 0x01 },
3179
+
{ DA7218_DROUTING_ST_OUTFILT_1R, 0x02 },
3180
+
{ DA7218_SIDETONE_BIQ_3STAGE_DATA, 0x00 },
3181
+
{ DA7218_SIDETONE_BIQ_3STAGE_ADDR, 0x00 },
3182
+
{ DA7218_EVENT_MASK, 0x00 },
3183
+
{ DA7218_DMIC_1_CTRL, 0x00 },
3184
+
{ DA7218_DMIC_2_CTRL, 0x00 },
3185
+
{ DA7218_IN_1L_GAIN, 0x6F },
3186
+
{ DA7218_IN_1R_GAIN, 0x6F },
3187
+
{ DA7218_IN_2L_GAIN, 0x6F },
3188
+
{ DA7218_IN_2R_GAIN, 0x6F },
3189
+
{ DA7218_OUT_1L_GAIN, 0x6F },
3190
+
{ DA7218_OUT_1R_GAIN, 0x6F },
3191
+
{ DA7218_MICBIAS_CTRL, 0x00 },
3192
+
{ DA7218_MICBIAS_EN, 0x00 },
3193
+
};
3194
+
3195
+
static bool da7218_volatile_register(struct device *dev, unsigned int reg)
3196
+
{
3197
+
switch (reg) {
3198
+
case DA7218_STATUS1:
3199
+
case DA7218_SOFT_RESET:
3200
+
case DA7218_SYSTEM_STATUS:
3201
+
case DA7218_CALIB_CTRL:
3202
+
case DA7218_CALIB_OFFSET_AUTO_M_1:
3203
+
case DA7218_CALIB_OFFSET_AUTO_U_1:
3204
+
case DA7218_CALIB_OFFSET_AUTO_M_2:
3205
+
case DA7218_CALIB_OFFSET_AUTO_U_2:
3206
+
case DA7218_PLL_STATUS:
3207
+
case DA7218_PLL_REFOSC_CAL:
3208
+
case DA7218_TONE_GEN_CFG1:
3209
+
case DA7218_ADC_MODE:
3210
+
case DA7218_HP_SNGL_CTRL:
3211
+
case DA7218_HPLDET_TEST:
3212
+
case DA7218_EVENT_STATUS:
3213
+
case DA7218_EVENT:
3214
+
return 1;
3215
+
default:
3216
+
return 0;
3217
+
}
3218
+
}
3219
+
3220
+
static const struct regmap_config da7218_regmap_config = {
3221
+
.reg_bits = 8,
3222
+
.val_bits = 8,
3223
+
3224
+
.max_register = DA7218_MICBIAS_EN,
3225
+
.reg_defaults = da7218_reg_defaults,
3226
+
.num_reg_defaults = ARRAY_SIZE(da7218_reg_defaults),
3227
+
.volatile_reg = da7218_volatile_register,
3228
+
.cache_type = REGCACHE_RBTREE,
3229
+
};
3230
+
3231
+
3232
+
/*
3233
+
* I2C layer
3234
+
*/
3235
+
3236
+
static int da7218_i2c_probe(struct i2c_client *i2c,
3237
+
const struct i2c_device_id *id)
3238
+
{
3239
+
struct da7218_priv *da7218;
3240
+
int ret;
3241
+
3242
+
da7218 = devm_kzalloc(&i2c->dev, sizeof(struct da7218_priv),
3243
+
GFP_KERNEL);
3244
+
if (!da7218)
3245
+
return -ENOMEM;
3246
+
3247
+
i2c_set_clientdata(i2c, da7218);
3248
+
3249
+
if (i2c->dev.of_node)
3250
+
da7218->dev_id = da7218_of_get_id(&i2c->dev);
3251
+
else
3252
+
da7218->dev_id = id->driver_data;
3253
+
3254
+
if ((da7218->dev_id != DA7217_DEV_ID) &&
3255
+
(da7218->dev_id != DA7218_DEV_ID)) {
3256
+
dev_err(&i2c->dev, "Invalid device Id\n");
3257
+
return -EINVAL;
3258
+
}
3259
+
3260
+
da7218->irq = i2c->irq;
3261
+
3262
+
da7218->regmap = devm_regmap_init_i2c(i2c, &da7218_regmap_config);
3263
+
if (IS_ERR(da7218->regmap)) {
3264
+
ret = PTR_ERR(da7218->regmap);
3265
+
dev_err(&i2c->dev, "regmap_init() failed: %d\n", ret);
3266
+
return ret;
3267
+
}
3268
+
3269
+
ret = snd_soc_register_codec(&i2c->dev,
3270
+
&soc_codec_dev_da7218, &da7218_dai, 1);
3271
+
if (ret < 0) {
3272
+
dev_err(&i2c->dev, "Failed to register da7218 codec: %d\n",
3273
+
ret);
3274
+
}
3275
+
return ret;
3276
+
}
3277
+
3278
+
static int da7218_i2c_remove(struct i2c_client *client)
3279
+
{
3280
+
snd_soc_unregister_codec(&client->dev);
3281
+
return 0;
3282
+
}
3283
+
3284
+
static const struct i2c_device_id da7218_i2c_id[] = {
3285
+
{ "da7217", DA7217_DEV_ID },
3286
+
{ "da7218", DA7218_DEV_ID },
3287
+
{ }
3288
+
};
3289
+
MODULE_DEVICE_TABLE(i2c, da7218_i2c_id);
3290
+
3291
+
static struct i2c_driver da7218_i2c_driver = {
3292
+
.driver = {
3293
+
.name = "da7218",
3294
+
.of_match_table = of_match_ptr(da7218_of_match),
3295
+
},
3296
+
.probe = da7218_i2c_probe,
3297
+
.remove = da7218_i2c_remove,
3298
+
.id_table = da7218_i2c_id,
3299
+
};
3300
+
3301
+
module_i2c_driver(da7218_i2c_driver);
3302
+
3303
+
MODULE_DESCRIPTION("ASoC DA7218 Codec driver");
3304
+
MODULE_AUTHOR("Adam Thomson <Adam.Thomson.Opensource@diasemi.com>");
3305
+
MODULE_LICENSE("GPL");
+1414
sound/soc/codecs/da7218.h
+1414
sound/soc/codecs/da7218.h
···
1
+
/*
2
+
* da7218.h - DA7218 ALSA SoC Codec Driver
3
+
*
4
+
* Copyright (c) 2015 Dialog Semiconductor
5
+
*
6
+
* Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
7
+
*
8
+
* This program is free software; you can redistribute it and/or modify it
9
+
* under the terms of the GNU General Public License as published by the
10
+
* Free Software Foundation; either version 2 of the License, or (at your
11
+
* option) any later version.
12
+
*/
13
+
14
+
#ifndef _DA7218_H
15
+
#define _DA7218_H
16
+
17
+
#include <linux/regmap.h>
18
+
#include <linux/regulator/consumer.h>
19
+
#include <sound/da7218.h>
20
+
21
+
22
+
/*
23
+
* Registers
24
+
*/
25
+
#define DA7218_SYSTEM_ACTIVE 0x0
26
+
#define DA7218_CIF_CTRL 0x1
27
+
#define DA7218_CHIP_ID1 0x4
28
+
#define DA7218_CHIP_ID2 0x5
29
+
#define DA7218_CHIP_REVISION 0x6
30
+
#define DA7218_SPARE1 0x7
31
+
#define DA7218_STATUS1 0x8
32
+
#define DA7218_SOFT_RESET 0x9
33
+
#define DA7218_SR 0xB
34
+
#define DA7218_PC_COUNT 0xC
35
+
#define DA7218_GAIN_RAMP_CTRL 0xD
36
+
#define DA7218_CIF_TIMEOUT_CTRL 0x10
37
+
#define DA7218_SYSTEM_MODES_INPUT 0x14
38
+
#define DA7218_SYSTEM_MODES_OUTPUT 0x15
39
+
#define DA7218_SYSTEM_STATUS 0x16
40
+
#define DA7218_IN_1L_FILTER_CTRL 0x18
41
+
#define DA7218_IN_1R_FILTER_CTRL 0x19
42
+
#define DA7218_IN_2L_FILTER_CTRL 0x1A
43
+
#define DA7218_IN_2R_FILTER_CTRL 0x1B
44
+
#define DA7218_OUT_1L_FILTER_CTRL 0x20
45
+
#define DA7218_OUT_1R_FILTER_CTRL 0x21
46
+
#define DA7218_OUT_1_HPF_FILTER_CTRL 0x24
47
+
#define DA7218_OUT_1_EQ_12_FILTER_CTRL 0x25
48
+
#define DA7218_OUT_1_EQ_34_FILTER_CTRL 0x26
49
+
#define DA7218_OUT_1_EQ_5_FILTER_CTRL 0x27
50
+
#define DA7218_OUT_1_BIQ_5STAGE_CTRL 0x28
51
+
#define DA7218_OUT_1_BIQ_5STAGE_DATA 0x29
52
+
#define DA7218_OUT_1_BIQ_5STAGE_ADDR 0x2A
53
+
#define DA7218_MIXIN_1_CTRL 0x2C
54
+
#define DA7218_MIXIN_1_GAIN 0x2D
55
+
#define DA7218_MIXIN_2_CTRL 0x2E
56
+
#define DA7218_MIXIN_2_GAIN 0x2F
57
+
#define DA7218_ALC_CTRL1 0x30
58
+
#define DA7218_ALC_CTRL2 0x31
59
+
#define DA7218_ALC_CTRL3 0x32
60
+
#define DA7218_ALC_NOISE 0x33
61
+
#define DA7218_ALC_TARGET_MIN 0x34
62
+
#define DA7218_ALC_TARGET_MAX 0x35
63
+
#define DA7218_ALC_GAIN_LIMITS 0x36
64
+
#define DA7218_ALC_ANA_GAIN_LIMITS 0x37
65
+
#define DA7218_ALC_ANTICLIP_CTRL 0x38
66
+
#define DA7218_AGS_ENABLE 0x3C
67
+
#define DA7218_AGS_TRIGGER 0x3D
68
+
#define DA7218_AGS_ATT_MAX 0x3E
69
+
#define DA7218_AGS_TIMEOUT 0x3F
70
+
#define DA7218_AGS_ANTICLIP_CTRL 0x40
71
+
#define DA7218_CALIB_CTRL 0x44
72
+
#define DA7218_CALIB_OFFSET_AUTO_M_1 0x45
73
+
#define DA7218_CALIB_OFFSET_AUTO_U_1 0x46
74
+
#define DA7218_CALIB_OFFSET_AUTO_M_2 0x47
75
+
#define DA7218_CALIB_OFFSET_AUTO_U_2 0x48
76
+
#define DA7218_ENV_TRACK_CTRL 0x4C
77
+
#define DA7218_LVL_DET_CTRL 0x50
78
+
#define DA7218_LVL_DET_LEVEL 0x51
79
+
#define DA7218_DGS_TRIGGER 0x54
80
+
#define DA7218_DGS_ENABLE 0x55
81
+
#define DA7218_DGS_RISE_FALL 0x56
82
+
#define DA7218_DGS_SYNC_DELAY 0x57
83
+
#define DA7218_DGS_SYNC_DELAY2 0x58
84
+
#define DA7218_DGS_SYNC_DELAY3 0x59
85
+
#define DA7218_DGS_LEVELS 0x5A
86
+
#define DA7218_DGS_GAIN_CTRL 0x5B
87
+
#define DA7218_DROUTING_OUTDAI_1L 0x5C
88
+
#define DA7218_DMIX_OUTDAI_1L_INFILT_1L_GAIN 0x5D
89
+
#define DA7218_DMIX_OUTDAI_1L_INFILT_1R_GAIN 0x5E
90
+
#define DA7218_DMIX_OUTDAI_1L_INFILT_2L_GAIN 0x5F
91
+
#define DA7218_DMIX_OUTDAI_1L_INFILT_2R_GAIN 0x60
92
+
#define DA7218_DMIX_OUTDAI_1L_TONEGEN_GAIN 0x61
93
+
#define DA7218_DMIX_OUTDAI_1L_INDAI_1L_GAIN 0x62
94
+
#define DA7218_DMIX_OUTDAI_1L_INDAI_1R_GAIN 0x63
95
+
#define DA7218_DROUTING_OUTDAI_1R 0x64
96
+
#define DA7218_DMIX_OUTDAI_1R_INFILT_1L_GAIN 0x65
97
+
#define DA7218_DMIX_OUTDAI_1R_INFILT_1R_GAIN 0x66
98
+
#define DA7218_DMIX_OUTDAI_1R_INFILT_2L_GAIN 0x67
99
+
#define DA7218_DMIX_OUTDAI_1R_INFILT_2R_GAIN 0x68
100
+
#define DA7218_DMIX_OUTDAI_1R_TONEGEN_GAIN 0x69
101
+
#define DA7218_DMIX_OUTDAI_1R_INDAI_1L_GAIN 0x6A
102
+
#define DA7218_DMIX_OUTDAI_1R_INDAI_1R_GAIN 0x6B
103
+
#define DA7218_DROUTING_OUTFILT_1L 0x6C
104
+
#define DA7218_DMIX_OUTFILT_1L_INFILT_1L_GAIN 0x6D
105
+
#define DA7218_DMIX_OUTFILT_1L_INFILT_1R_GAIN 0x6E
106
+
#define DA7218_DMIX_OUTFILT_1L_INFILT_2L_GAIN 0x6F
107
+
#define DA7218_DMIX_OUTFILT_1L_INFILT_2R_GAIN 0x70
108
+
#define DA7218_DMIX_OUTFILT_1L_TONEGEN_GAIN 0x71
109
+
#define DA7218_DMIX_OUTFILT_1L_INDAI_1L_GAIN 0x72
110
+
#define DA7218_DMIX_OUTFILT_1L_INDAI_1R_GAIN 0x73
111
+
#define DA7218_DROUTING_OUTFILT_1R 0x74
112
+
#define DA7218_DMIX_OUTFILT_1R_INFILT_1L_GAIN 0x75
113
+
#define DA7218_DMIX_OUTFILT_1R_INFILT_1R_GAIN 0x76
114
+
#define DA7218_DMIX_OUTFILT_1R_INFILT_2L_GAIN 0x77
115
+
#define DA7218_DMIX_OUTFILT_1R_INFILT_2R_GAIN 0x78
116
+
#define DA7218_DMIX_OUTFILT_1R_TONEGEN_GAIN 0x79
117
+
#define DA7218_DMIX_OUTFILT_1R_INDAI_1L_GAIN 0x7A
118
+
#define DA7218_DMIX_OUTFILT_1R_INDAI_1R_GAIN 0x7B
119
+
#define DA7218_DROUTING_OUTDAI_2L 0x7C
120
+
#define DA7218_DMIX_OUTDAI_2L_INFILT_1L_GAIN 0x7D
121
+
#define DA7218_DMIX_OUTDAI_2L_INFILT_1R_GAIN 0x7E
122
+
#define DA7218_DMIX_OUTDAI_2L_INFILT_2L_GAIN 0x7F
123
+
#define DA7218_DMIX_OUTDAI_2L_INFILT_2R_GAIN 0x80
124
+
#define DA7218_DMIX_OUTDAI_2L_TONEGEN_GAIN 0x81
125
+
#define DA7218_DMIX_OUTDAI_2L_INDAI_1L_GAIN 0x82
126
+
#define DA7218_DMIX_OUTDAI_2L_INDAI_1R_GAIN 0x83
127
+
#define DA7218_DROUTING_OUTDAI_2R 0x84
128
+
#define DA7218_DMIX_OUTDAI_2R_INFILT_1L_GAIN 0x85
129
+
#define DA7218_DMIX_OUTDAI_2R_INFILT_1R_GAIN 0x86
130
+
#define DA7218_DMIX_OUTDAI_2R_INFILT_2L_GAIN 0x87
131
+
#define DA7218_DMIX_OUTDAI_2R_INFILT_2R_GAIN 0x88
132
+
#define DA7218_DMIX_OUTDAI_2R_TONEGEN_GAIN 0x89
133
+
#define DA7218_DMIX_OUTDAI_2R_INDAI_1L_GAIN 0x8A
134
+
#define DA7218_DMIX_OUTDAI_2R_INDAI_1R_GAIN 0x8B
135
+
#define DA7218_DAI_CTRL 0x8C
136
+
#define DA7218_DAI_TDM_CTRL 0x8D
137
+
#define DA7218_DAI_OFFSET_LOWER 0x8E
138
+
#define DA7218_DAI_OFFSET_UPPER 0x8F
139
+
#define DA7218_DAI_CLK_MODE 0x90
140
+
#define DA7218_PLL_CTRL 0x91
141
+
#define DA7218_PLL_FRAC_TOP 0x92
142
+
#define DA7218_PLL_FRAC_BOT 0x93
143
+
#define DA7218_PLL_INTEGER 0x94
144
+
#define DA7218_PLL_STATUS 0x95
145
+
#define DA7218_PLL_REFOSC_CAL 0x98
146
+
#define DA7218_DAC_NG_CTRL 0x9C
147
+
#define DA7218_DAC_NG_SETUP_TIME 0x9D
148
+
#define DA7218_DAC_NG_OFF_THRESH 0x9E
149
+
#define DA7218_DAC_NG_ON_THRESH 0x9F
150
+
#define DA7218_TONE_GEN_CFG1 0xA0
151
+
#define DA7218_TONE_GEN_CFG2 0xA1
152
+
#define DA7218_TONE_GEN_FREQ1_L 0xA2
153
+
#define DA7218_TONE_GEN_FREQ1_U 0xA3
154
+
#define DA7218_TONE_GEN_FREQ2_L 0xA4
155
+
#define DA7218_TONE_GEN_FREQ2_U 0xA5
156
+
#define DA7218_TONE_GEN_CYCLES 0xA6
157
+
#define DA7218_TONE_GEN_ON_PER 0xA7
158
+
#define DA7218_TONE_GEN_OFF_PER 0xA8
159
+
#define DA7218_CP_CTRL 0xAC
160
+
#define DA7218_CP_DELAY 0xAD
161
+
#define DA7218_CP_VOL_THRESHOLD1 0xAE
162
+
#define DA7218_MIC_1_CTRL 0xB4
163
+
#define DA7218_MIC_1_GAIN 0xB5
164
+
#define DA7218_MIC_1_SELECT 0xB7
165
+
#define DA7218_MIC_2_CTRL 0xB8
166
+
#define DA7218_MIC_2_GAIN 0xB9
167
+
#define DA7218_MIC_2_SELECT 0xBB
168
+
#define DA7218_IN_1_HPF_FILTER_CTRL 0xBC
169
+
#define DA7218_IN_2_HPF_FILTER_CTRL 0xBD
170
+
#define DA7218_ADC_1_CTRL 0xC0
171
+
#define DA7218_ADC_2_CTRL 0xC1
172
+
#define DA7218_ADC_MODE 0xC2
173
+
#define DA7218_MIXOUT_L_CTRL 0xCC
174
+
#define DA7218_MIXOUT_L_GAIN 0xCD
175
+
#define DA7218_MIXOUT_R_CTRL 0xCE
176
+
#define DA7218_MIXOUT_R_GAIN 0xCF
177
+
#define DA7218_HP_L_CTRL 0xD0
178
+
#define DA7218_HP_L_GAIN 0xD1
179
+
#define DA7218_HP_R_CTRL 0xD2
180
+
#define DA7218_HP_R_GAIN 0xD3
181
+
#define DA7218_HP_SNGL_CTRL 0xD4
182
+
#define DA7218_HP_DIFF_CTRL 0xD5
183
+
#define DA7218_HP_DIFF_UNLOCK 0xD7
184
+
#define DA7218_HPLDET_JACK 0xD8
185
+
#define DA7218_HPLDET_CTRL 0xD9
186
+
#define DA7218_HPLDET_TEST 0xDA
187
+
#define DA7218_REFERENCES 0xDC
188
+
#define DA7218_IO_CTRL 0xE0
189
+
#define DA7218_LDO_CTRL 0xE1
190
+
#define DA7218_SIDETONE_CTRL 0xE4
191
+
#define DA7218_SIDETONE_IN_SELECT 0xE5
192
+
#define DA7218_SIDETONE_GAIN 0xE6
193
+
#define DA7218_DROUTING_ST_OUTFILT_1L 0xE8
194
+
#define DA7218_DROUTING_ST_OUTFILT_1R 0xE9
195
+
#define DA7218_SIDETONE_BIQ_3STAGE_DATA 0xEA
196
+
#define DA7218_SIDETONE_BIQ_3STAGE_ADDR 0xEB
197
+
#define DA7218_EVENT_STATUS 0xEC
198
+
#define DA7218_EVENT 0xED
199
+
#define DA7218_EVENT_MASK 0xEE
200
+
#define DA7218_DMIC_1_CTRL 0xF0
201
+
#define DA7218_DMIC_2_CTRL 0xF1
202
+
#define DA7218_IN_1L_GAIN 0xF4
203
+
#define DA7218_IN_1R_GAIN 0xF5
204
+
#define DA7218_IN_2L_GAIN 0xF6
205
+
#define DA7218_IN_2R_GAIN 0xF7
206
+
#define DA7218_OUT_1L_GAIN 0xF8
207
+
#define DA7218_OUT_1R_GAIN 0xF9
208
+
#define DA7218_MICBIAS_CTRL 0xFC
209
+
#define DA7218_MICBIAS_EN 0xFD
210
+
211
+
212
+
/*
213
+
* Bit Fields
214
+
*/
215
+
216
+
#define DA7218_SWITCH_EN_MAX 0x1
217
+
218
+
/* DA7218_SYSTEM_ACTIVE = 0x0 */
219
+
#define DA7218_SYSTEM_ACTIVE_SHIFT 0
220
+
#define DA7218_SYSTEM_ACTIVE_MASK (0x1 << 0)
221
+
222
+
/* DA7218_CIF_CTRL = 0x1 */
223
+
#define DA7218_CIF_I2C_WRITE_MODE_SHIFT 0
224
+
#define DA7218_CIF_I2C_WRITE_MODE_MASK (0x1 << 0)
225
+
226
+
/* DA7218_CHIP_ID1 = 0x4 */
227
+
#define DA7218_CHIP_ID1_SHIFT 0
228
+
#define DA7218_CHIP_ID1_MASK (0xFF << 0)
229
+
230
+
/* DA7218_CHIP_ID2 = 0x5 */
231
+
#define DA7218_CHIP_ID2_SHIFT 0
232
+
#define DA7218_CHIP_ID2_MASK (0xFF << 0)
233
+
234
+
/* DA7218_CHIP_REVISION = 0x6 */
235
+
#define DA7218_CHIP_MINOR_SHIFT 0
236
+
#define DA7218_CHIP_MINOR_MASK (0xF << 0)
237
+
#define DA7218_CHIP_MAJOR_SHIFT 4
238
+
#define DA7218_CHIP_MAJOR_MASK (0xF << 4)
239
+
240
+
/* DA7218_SPARE1 = 0x7 */
241
+
#define DA7218_SPARE1_SHIFT 0
242
+
#define DA7218_SPARE1_MASK (0xFF << 0)
243
+
244
+
/* DA7218_STATUS1 = 0x8 */
245
+
#define DA7218_STATUS_SPARE1_SHIFT 0
246
+
#define DA7218_STATUS_SPARE1_MASK (0xFF << 0)
247
+
248
+
/* DA7218_SOFT_RESET = 0x9 */
249
+
#define DA7218_CIF_REG_SOFT_RESET_SHIFT 7
250
+
#define DA7218_CIF_REG_SOFT_RESET_MASK (0x1 << 7)
251
+
252
+
/* DA7218_SR = 0xB */
253
+
#define DA7218_SR_ADC_SHIFT 0
254
+
#define DA7218_SR_ADC_MASK (0xF << 0)
255
+
#define DA7218_SR_DAC_SHIFT 4
256
+
#define DA7218_SR_DAC_MASK (0xF << 4)
257
+
#define DA7218_SR_8000 0x01
258
+
#define DA7218_SR_11025 0x02
259
+
#define DA7218_SR_12000 0x03
260
+
#define DA7218_SR_16000 0x05
261
+
#define DA7218_SR_22050 0x06
262
+
#define DA7218_SR_24000 0x07
263
+
#define DA7218_SR_32000 0x09
264
+
#define DA7218_SR_44100 0x0A
265
+
#define DA7218_SR_48000 0x0B
266
+
#define DA7218_SR_88200 0x0E
267
+
#define DA7218_SR_96000 0x0F
268
+
269
+
/* DA7218_PC_COUNT = 0xC */
270
+
#define DA7218_PC_FREERUN_SHIFT 0
271
+
#define DA7218_PC_FREERUN_MASK (0x1 << 0)
272
+
#define DA7218_PC_RESYNC_AUTO_SHIFT 1
273
+
#define DA7218_PC_RESYNC_AUTO_MASK (0x1 << 1)
274
+
275
+
/* DA7218_GAIN_RAMP_CTRL = 0xD */
276
+
#define DA7218_GAIN_RAMP_RATE_SHIFT 0
277
+
#define DA7218_GAIN_RAMP_RATE_MASK (0x3 << 0)
278
+
#define DA7218_GAIN_RAMP_RATE_MAX 4
279
+
280
+
/* DA7218_CIF_TIMEOUT_CTRL = 0x10 */
281
+
#define DA7218_I2C_TIMEOUT_EN_SHIFT 0
282
+
#define DA7218_I2C_TIMEOUT_EN_MASK (0x1 << 0)
283
+
284
+
/* DA7218_SYSTEM_MODES_INPUT = 0x14 */
285
+
#define DA7218_MODE_SUBMIT_SHIFT 0
286
+
#define DA7218_MODE_SUBMIT_MASK (0x1 << 0)
287
+
#define DA7218_ADC_MODE_SHIFT 1
288
+
#define DA7218_ADC_MODE_MASK (0x7F << 1)
289
+
290
+
/* DA7218_SYSTEM_MODES_OUTPUT = 0x15 */
291
+
#define DA7218_MODE_SUBMIT_SHIFT 0
292
+
#define DA7218_MODE_SUBMIT_MASK (0x1 << 0)
293
+
#define DA7218_DAC_MODE_SHIFT 1
294
+
#define DA7218_DAC_MODE_MASK (0x7F << 1)
295
+
296
+
/* DA7218_SYSTEM_STATUS = 0x16 */
297
+
#define DA7218_SC1_BUSY_SHIFT 0
298
+
#define DA7218_SC1_BUSY_MASK (0x1 << 0)
299
+
#define DA7218_SC2_BUSY_SHIFT 1
300
+
#define DA7218_SC2_BUSY_MASK (0x1 << 1)
301
+
302
+
/* DA7218_IN_1L_FILTER_CTRL = 0x18 */
303
+
#define DA7218_IN_1L_RAMP_EN_SHIFT 5
304
+
#define DA7218_IN_1L_RAMP_EN_MASK (0x1 << 5)
305
+
#define DA7218_IN_1L_MUTE_EN_SHIFT 6
306
+
#define DA7218_IN_1L_MUTE_EN_MASK (0x1 << 6)
307
+
#define DA7218_IN_1L_FILTER_EN_SHIFT 7
308
+
#define DA7218_IN_1L_FILTER_EN_MASK (0x1 << 7)
309
+
310
+
/* DA7218_IN_1R_FILTER_CTRL = 0x19 */
311
+
#define DA7218_IN_1R_RAMP_EN_SHIFT 5
312
+
#define DA7218_IN_1R_RAMP_EN_MASK (0x1 << 5)
313
+
#define DA7218_IN_1R_MUTE_EN_SHIFT 6
314
+
#define DA7218_IN_1R_MUTE_EN_MASK (0x1 << 6)
315
+
#define DA7218_IN_1R_FILTER_EN_SHIFT 7
316
+
#define DA7218_IN_1R_FILTER_EN_MASK (0x1 << 7)
317
+
318
+
/* DA7218_IN_2L_FILTER_CTRL = 0x1A */
319
+
#define DA7218_IN_2L_RAMP_EN_SHIFT 5
320
+
#define DA7218_IN_2L_RAMP_EN_MASK (0x1 << 5)
321
+
#define DA7218_IN_2L_MUTE_EN_SHIFT 6
322
+
#define DA7218_IN_2L_MUTE_EN_MASK (0x1 << 6)
323
+
#define DA7218_IN_2L_FILTER_EN_SHIFT 7
324
+
#define DA7218_IN_2L_FILTER_EN_MASK (0x1 << 7)
325
+
326
+
/* DA7218_IN_2R_FILTER_CTRL = 0x1B */
327
+
#define DA7218_IN_2R_RAMP_EN_SHIFT 5
328
+
#define DA7218_IN_2R_RAMP_EN_MASK (0x1 << 5)
329
+
#define DA7218_IN_2R_MUTE_EN_SHIFT 6
330
+
#define DA7218_IN_2R_MUTE_EN_MASK (0x1 << 6)
331
+
#define DA7218_IN_2R_FILTER_EN_SHIFT 7
332
+
#define DA7218_IN_2R_FILTER_EN_MASK (0x1 << 7)
333
+
334
+
/* DA7218_OUT_1L_FILTER_CTRL = 0x20 */
335
+
#define DA7218_OUT_1L_BIQ_5STAGE_SEL_SHIFT 3
336
+
#define DA7218_OUT_1L_BIQ_5STAGE_SEL_MASK (0x1 << 3)
337
+
#define DA7218_OUT_BIQ_5STAGE_SEL_MAX 2
338
+
#define DA7218_OUT_1L_SUBRANGE_EN_SHIFT 4
339
+
#define DA7218_OUT_1L_SUBRANGE_EN_MASK (0x1 << 4)
340
+
#define DA7218_OUT_1L_RAMP_EN_SHIFT 5
341
+
#define DA7218_OUT_1L_RAMP_EN_MASK (0x1 << 5)
342
+
#define DA7218_OUT_1L_MUTE_EN_SHIFT 6
343
+
#define DA7218_OUT_1L_MUTE_EN_MASK (0x1 << 6)
344
+
#define DA7218_OUT_1L_FILTER_EN_SHIFT 7
345
+
#define DA7218_OUT_1L_FILTER_EN_MASK (0x1 << 7)
346
+
347
+
/* DA7218_OUT_1R_FILTER_CTRL = 0x21 */
348
+
#define DA7218_OUT_1R_BIQ_5STAGE_SEL_SHIFT 3
349
+
#define DA7218_OUT_1R_BIQ_5STAGE_SEL_MASK (0x1 << 3)
350
+
#define DA7218_OUT_1R_SUBRANGE_EN_SHIFT 4
351
+
#define DA7218_OUT_1R_SUBRANGE_EN_MASK (0x1 << 4)
352
+
#define DA7218_OUT_1R_RAMP_EN_SHIFT 5
353
+
#define DA7218_OUT_1R_RAMP_EN_MASK (0x1 << 5)
354
+
#define DA7218_OUT_1R_MUTE_EN_SHIFT 6
355
+
#define DA7218_OUT_1R_MUTE_EN_MASK (0x1 << 6)
356
+
#define DA7218_OUT_1R_FILTER_EN_SHIFT 7
357
+
#define DA7218_OUT_1R_FILTER_EN_MASK (0x1 << 7)
358
+
359
+
/* DA7218_OUT_1_HPF_FILTER_CTRL = 0x24 */
360
+
#define DA7218_OUT_1_VOICE_HPF_CORNER_SHIFT 0
361
+
#define DA7218_OUT_1_VOICE_HPF_CORNER_MASK (0x7 << 0)
362
+
#define DA7218_VOICE_HPF_CORNER_MAX 8
363
+
#define DA7218_OUT_1_VOICE_EN_SHIFT 3
364
+
#define DA7218_OUT_1_VOICE_EN_MASK (0x1 << 3)
365
+
#define DA7218_OUT_1_AUDIO_HPF_CORNER_SHIFT 4
366
+
#define DA7218_OUT_1_AUDIO_HPF_CORNER_MASK (0x3 << 4)
367
+
#define DA7218_AUDIO_HPF_CORNER_MAX 4
368
+
#define DA7218_OUT_1_HPF_EN_SHIFT 7
369
+
#define DA7218_OUT_1_HPF_EN_MASK (0x1 << 7)
370
+
#define DA7218_HPF_MODE_SHIFT 0
371
+
#define DA7218_HPF_DISABLED ((0x0 << 3) | (0x0 << 7))
372
+
#define DA7218_HPF_AUDIO_EN ((0x0 << 3) | (0x1 << 7))
373
+
#define DA7218_HPF_VOICE_EN ((0x1 << 3) | (0x1 << 7))
374
+
#define DA7218_HPF_MODE_MASK ((0x1 << 3) | (0x1 << 7))
375
+
#define DA7218_HPF_MODE_MAX 3
376
+
377
+
/* DA7218_OUT_1_EQ_12_FILTER_CTRL = 0x25 */
378
+
#define DA7218_OUT_1_EQ_BAND1_SHIFT 0
379
+
#define DA7218_OUT_1_EQ_BAND1_MASK (0xF << 0)
380
+
#define DA7218_OUT_EQ_BAND_MAX 0xF
381
+
#define DA7218_OUT_1_EQ_BAND2_SHIFT 4
382
+
#define DA7218_OUT_1_EQ_BAND2_MASK (0xF << 4)
383
+
384
+
/* DA7218_OUT_1_EQ_34_FILTER_CTRL = 0x26 */
385
+
#define DA7218_OUT_1_EQ_BAND3_SHIFT 0
386
+
#define DA7218_OUT_1_EQ_BAND3_MASK (0xF << 0)
387
+
#define DA7218_OUT_1_EQ_BAND4_SHIFT 4
388
+
#define DA7218_OUT_1_EQ_BAND4_MASK (0xF << 4)
389
+
390
+
/* DA7218_OUT_1_EQ_5_FILTER_CTRL = 0x27 */
391
+
#define DA7218_OUT_1_EQ_BAND5_SHIFT 0
392
+
#define DA7218_OUT_1_EQ_BAND5_MASK (0xF << 0)
393
+
#define DA7218_OUT_1_EQ_EN_SHIFT 7
394
+
#define DA7218_OUT_1_EQ_EN_MASK (0x1 << 7)
395
+
396
+
/* DA7218_OUT_1_BIQ_5STAGE_CTRL = 0x28 */
397
+
#define DA7218_OUT_1_BIQ_5STAGE_MUTE_EN_SHIFT 6
398
+
#define DA7218_OUT_1_BIQ_5STAGE_MUTE_EN_MASK (0x1 << 6)
399
+
#define DA7218_OUT_1_BIQ_5STAGE_FILTER_EN_SHIFT 7
400
+
#define DA7218_OUT_1_BIQ_5STAGE_FILTER_EN_MASK (0x1 << 7)
401
+
402
+
/* DA7218_OUT_1_BIQ_5STAGE_DATA = 0x29 */
403
+
#define DA7218_OUT_1_BIQ_5STAGE_DATA_SHIFT 0
404
+
#define DA7218_OUT_1_BIQ_5STAGE_DATA_MASK (0xFF << 0)
405
+
406
+
/* DA7218_OUT_1_BIQ_5STAGE_ADDR = 0x2A */
407
+
#define DA7218_OUT_1_BIQ_5STAGE_ADDR_SHIFT 0
408
+
#define DA7218_OUT_1_BIQ_5STAGE_ADDR_MASK (0x3F << 0)
409
+
#define DA7218_OUT_1_BIQ_5STAGE_CFG_SIZE 50
410
+
411
+
/* DA7218_MIXIN_1_CTRL = 0x2C */
412
+
#define DA7218_MIXIN_1_MIX_SEL_SHIFT 3
413
+
#define DA7218_MIXIN_1_MIX_SEL_MASK (0x1 << 3)
414
+
#define DA7218_MIXIN_1_AMP_ZC_EN_SHIFT 4
415
+
#define DA7218_MIXIN_1_AMP_ZC_EN_MASK (0x1 << 4)
416
+
#define DA7218_MIXIN_1_AMP_RAMP_EN_SHIFT 5
417
+
#define DA7218_MIXIN_1_AMP_RAMP_EN_MASK (0x1 << 5)
418
+
#define DA7218_MIXIN_1_AMP_MUTE_EN_SHIFT 6
419
+
#define DA7218_MIXIN_1_AMP_MUTE_EN_MASK (0x1 << 6)
420
+
#define DA7218_MIXIN_1_AMP_EN_SHIFT 7
421
+
#define DA7218_MIXIN_1_AMP_EN_MASK (0x1 << 7)
422
+
423
+
/* DA7218_MIXIN_1_GAIN = 0x2D */
424
+
#define DA7218_MIXIN_1_AMP_GAIN_SHIFT 0
425
+
#define DA7218_MIXIN_1_AMP_GAIN_MASK (0xF << 0)
426
+
#define DA7218_MIXIN_AMP_GAIN_MAX 0xF
427
+
428
+
/* DA7218_MIXIN_2_CTRL = 0x2E */
429
+
#define DA7218_MIXIN_2_MIX_SEL_SHIFT 3
430
+
#define DA7218_MIXIN_2_MIX_SEL_MASK (0x1 << 3)
431
+
#define DA7218_MIXIN_2_AMP_ZC_EN_SHIFT 4
432
+
#define DA7218_MIXIN_2_AMP_ZC_EN_MASK (0x1 << 4)
433
+
#define DA7218_MIXIN_2_AMP_RAMP_EN_SHIFT 5
434
+
#define DA7218_MIXIN_2_AMP_RAMP_EN_MASK (0x1 << 5)
435
+
#define DA7218_MIXIN_2_AMP_MUTE_EN_SHIFT 6
436
+
#define DA7218_MIXIN_2_AMP_MUTE_EN_MASK (0x1 << 6)
437
+
#define DA7218_MIXIN_2_AMP_EN_SHIFT 7
438
+
#define DA7218_MIXIN_2_AMP_EN_MASK (0x1 << 7)
439
+
440
+
/* DA7218_MIXIN_2_GAIN = 0x2F */
441
+
#define DA7218_MIXIN_2_AMP_GAIN_SHIFT 0
442
+
#define DA7218_MIXIN_2_AMP_GAIN_MASK (0xF << 0)
443
+
444
+
/* DA7218_ALC_CTRL1 = 0x30 */
445
+
#define DA7218_ALC_EN_SHIFT 0
446
+
#define DA7218_ALC_EN_MASK (0xF << 0)
447
+
#define DA7218_ALC_CHAN1_L_EN_SHIFT 0
448
+
#define DA7218_ALC_CHAN1_R_EN_SHIFT 1
449
+
#define DA7218_ALC_CHAN2_L_EN_SHIFT 2
450
+
#define DA7218_ALC_CHAN2_R_EN_SHIFT 3
451
+
#define DA7218_ALC_SYNC_MODE_SHIFT 4
452
+
#define DA7218_ALC_SYNC_MODE_MASK (0xF << 4)
453
+
#define DA7218_ALC_SYNC_MODE_CH1 (0x1 << 4)
454
+
#define DA7218_ALC_SYNC_MODE_CH2 (0x4 << 4)
455
+
456
+
/* DA7218_ALC_CTRL2 = 0x31 */
457
+
#define DA7218_ALC_ATTACK_SHIFT 0
458
+
#define DA7218_ALC_ATTACK_MASK (0xF << 0)
459
+
#define DA7218_ALC_ATTACK_MAX 13
460
+
#define DA7218_ALC_RELEASE_SHIFT 4
461
+
#define DA7218_ALC_RELEASE_MASK (0xF << 4)
462
+
#define DA7218_ALC_RELEASE_MAX 11
463
+
464
+
/* DA7218_ALC_CTRL3 = 0x32 */
465
+
#define DA7218_ALC_HOLD_SHIFT 0
466
+
#define DA7218_ALC_HOLD_MASK (0xF << 0)
467
+
#define DA7218_ALC_HOLD_MAX 16
468
+
469
+
/* DA7218_ALC_NOISE = 0x33 */
470
+
#define DA7218_ALC_NOISE_SHIFT 0
471
+
#define DA7218_ALC_NOISE_MASK (0x3F << 0)
472
+
#define DA7218_ALC_THRESHOLD_MAX 0x3F
473
+
474
+
/* DA7218_ALC_TARGET_MIN = 0x34 */
475
+
#define DA7218_ALC_THRESHOLD_MIN_SHIFT 0
476
+
#define DA7218_ALC_THRESHOLD_MIN_MASK (0x3F << 0)
477
+
478
+
/* DA7218_ALC_TARGET_MAX = 0x35 */
479
+
#define DA7218_ALC_THRESHOLD_MAX_SHIFT 0
480
+
#define DA7218_ALC_THRESHOLD_MAX_MASK (0x3F << 0)
481
+
482
+
/* DA7218_ALC_GAIN_LIMITS = 0x36 */
483
+
#define DA7218_ALC_ATTEN_MAX_SHIFT 0
484
+
#define DA7218_ALC_ATTEN_MAX_MASK (0xF << 0)
485
+
#define DA7218_ALC_ATTEN_GAIN_MAX 0xF
486
+
#define DA7218_ALC_GAIN_MAX_SHIFT 4
487
+
#define DA7218_ALC_GAIN_MAX_MASK (0xF << 4)
488
+
489
+
/* DA7218_ALC_ANA_GAIN_LIMITS = 0x37 */
490
+
#define DA7218_ALC_ANA_GAIN_MIN_SHIFT 0
491
+
#define DA7218_ALC_ANA_GAIN_MIN_MASK (0x7 << 0)
492
+
#define DA7218_ALC_ANA_GAIN_MIN 0x1
493
+
#define DA7218_ALC_ANA_GAIN_MAX 0x7
494
+
#define DA7218_ALC_ANA_GAIN_MAX_SHIFT 4
495
+
#define DA7218_ALC_ANA_GAIN_MAX_MASK (0x7 << 4)
496
+
497
+
/* DA7218_ALC_ANTICLIP_CTRL = 0x38 */
498
+
#define DA7218_ALC_ANTICLIP_STEP_SHIFT 0
499
+
#define DA7218_ALC_ANTICLIP_STEP_MASK (0x3 << 0)
500
+
#define DA7218_ALC_ANTICLIP_STEP_MAX 4
501
+
#define DA7218_ALC_ANTICLIP_EN_SHIFT 7
502
+
#define DA7218_ALC_ANTICLIP_EN_MASK (0x1 << 7)
503
+
504
+
/* DA7218_AGS_ENABLE = 0x3C */
505
+
#define DA7218_AGS_ENABLE_SHIFT 0
506
+
#define DA7218_AGS_ENABLE_MASK (0x3 << 0)
507
+
#define DA7218_AGS_ENABLE_CHAN1_SHIFT 0
508
+
#define DA7218_AGS_ENABLE_CHAN2_SHIFT 1
509
+
510
+
/* DA7218_AGS_TRIGGER = 0x3D */
511
+
#define DA7218_AGS_TRIGGER_SHIFT 0
512
+
#define DA7218_AGS_TRIGGER_MASK (0xF << 0)
513
+
#define DA7218_AGS_TRIGGER_MAX 0xF
514
+
515
+
/* DA7218_AGS_ATT_MAX = 0x3E */
516
+
#define DA7218_AGS_ATT_MAX_SHIFT 0
517
+
#define DA7218_AGS_ATT_MAX_MASK (0x7 << 0)
518
+
#define DA7218_AGS_ATT_MAX_MAX 0x7
519
+
520
+
/* DA7218_AGS_TIMEOUT = 0x3F */
521
+
#define DA7218_AGS_TIMEOUT_EN_SHIFT 0
522
+
#define DA7218_AGS_TIMEOUT_EN_MASK (0x1 << 0)
523
+
524
+
/* DA7218_AGS_ANTICLIP_CTRL = 0x40 */
525
+
#define DA7218_AGS_ANTICLIP_EN_SHIFT 7
526
+
#define DA7218_AGS_ANTICLIP_EN_MASK (0x1 << 7)
527
+
528
+
/* DA7218_CALIB_CTRL = 0x44 */
529
+
#define DA7218_CALIB_OFFSET_EN_SHIFT 0
530
+
#define DA7218_CALIB_OFFSET_EN_MASK (0x1 << 0)
531
+
#define DA7218_CALIB_AUTO_EN_SHIFT 2
532
+
#define DA7218_CALIB_AUTO_EN_MASK (0x1 << 2)
533
+
#define DA7218_CALIB_OVERFLOW_SHIFT 3
534
+
#define DA7218_CALIB_OVERFLOW_MASK (0x1 << 3)
535
+
536
+
/* DA7218_CALIB_OFFSET_AUTO_M_1 = 0x45 */
537
+
#define DA7218_CALIB_OFFSET_AUTO_M_1_SHIFT 0
538
+
#define DA7218_CALIB_OFFSET_AUTO_M_1_MASK (0xFF << 0)
539
+
540
+
/* DA7218_CALIB_OFFSET_AUTO_U_1 = 0x46 */
541
+
#define DA7218_CALIB_OFFSET_AUTO_U_1_SHIFT 0
542
+
#define DA7218_CALIB_OFFSET_AUTO_U_1_MASK (0xF << 0)
543
+
544
+
/* DA7218_CALIB_OFFSET_AUTO_M_2 = 0x47 */
545
+
#define DA7218_CALIB_OFFSET_AUTO_M_2_SHIFT 0
546
+
#define DA7218_CALIB_OFFSET_AUTO_M_2_MASK (0xFF << 0)
547
+
548
+
/* DA7218_CALIB_OFFSET_AUTO_U_2 = 0x48 */
549
+
#define DA7218_CALIB_OFFSET_AUTO_U_2_SHIFT 0
550
+
#define DA7218_CALIB_OFFSET_AUTO_U_2_MASK (0xF << 0)
551
+
552
+
/* DA7218_ENV_TRACK_CTRL = 0x4C */
553
+
#define DA7218_INTEG_ATTACK_SHIFT 0
554
+
#define DA7218_INTEG_ATTACK_MASK (0x3 << 0)
555
+
#define DA7218_INTEG_RELEASE_SHIFT 4
556
+
#define DA7218_INTEG_RELEASE_MASK (0x3 << 4)
557
+
#define DA7218_INTEG_MAX 4
558
+
559
+
/* DA7218_LVL_DET_CTRL = 0x50 */
560
+
#define DA7218_LVL_DET_EN_SHIFT 0
561
+
#define DA7218_LVL_DET_EN_MASK (0xF << 0)
562
+
#define DA7218_LVL_DET_EN_CHAN1L_SHIFT 0
563
+
#define DA7218_LVL_DET_EN_CHAN1R_SHIFT 1
564
+
#define DA7218_LVL_DET_EN_CHAN2L_SHIFT 2
565
+
#define DA7218_LVL_DET_EN_CHAN2R_SHIFT 3
566
+
567
+
/* DA7218_LVL_DET_LEVEL = 0x51 */
568
+
#define DA7218_LVL_DET_LEVEL_SHIFT 0
569
+
#define DA7218_LVL_DET_LEVEL_MASK (0x7F << 0)
570
+
#define DA7218_LVL_DET_LEVEL_MAX 0x7F
571
+
572
+
/* DA7218_DGS_TRIGGER = 0x54 */
573
+
#define DA7218_DGS_TRIGGER_LVL_SHIFT 0
574
+
#define DA7218_DGS_TRIGGER_LVL_MASK (0x3F << 0)
575
+
#define DA7218_DGS_TRIGGER_MAX 0x3F
576
+
577
+
/* DA7218_DGS_ENABLE = 0x55 */
578
+
#define DA7218_DGS_ENABLE_SHIFT 0
579
+
#define DA7218_DGS_ENABLE_MASK (0x3 << 0)
580
+
#define DA7218_DGS_ENABLE_L_SHIFT 0
581
+
#define DA7218_DGS_ENABLE_R_SHIFT 1
582
+
583
+
/* DA7218_DGS_RISE_FALL = 0x56 */
584
+
#define DA7218_DGS_RISE_COEFF_SHIFT 0
585
+
#define DA7218_DGS_RISE_COEFF_MASK (0x7 << 0)
586
+
#define DA7218_DGS_RISE_COEFF_MAX 7
587
+
#define DA7218_DGS_FALL_COEFF_SHIFT 4
588
+
#define DA7218_DGS_FALL_COEFF_MASK (0x7 << 4)
589
+
#define DA7218_DGS_FALL_COEFF_MAX 8
590
+
591
+
/* DA7218_DGS_SYNC_DELAY = 0x57 */
592
+
#define DA7218_DGS_SYNC_DELAY_SHIFT 0
593
+
#define DA7218_DGS_SYNC_DELAY_MASK (0xFF << 0)
594
+
#define DA7218_DGS_SYNC_DELAY_MAX 0xFF
595
+
596
+
/* DA7218_DGS_SYNC_DELAY2 = 0x58 */
597
+
#define DA7218_DGS_SYNC_DELAY2_SHIFT 0
598
+
#define DA7218_DGS_SYNC_DELAY2_MASK (0xFF << 0)
599
+
600
+
/* DA7218_DGS_SYNC_DELAY3 = 0x59 */
601
+
#define DA7218_DGS_SYNC_DELAY3_SHIFT 0
602
+
#define DA7218_DGS_SYNC_DELAY3_MASK (0x7F << 0)
603
+
#define DA7218_DGS_SYNC_DELAY3_MAX 0x7F
604
+
605
+
/* DA7218_DGS_LEVELS = 0x5A */
606
+
#define DA7218_DGS_ANTICLIP_LVL_SHIFT 0
607
+
#define DA7218_DGS_ANTICLIP_LVL_MASK (0x7 << 0)
608
+
#define DA7218_DGS_ANTICLIP_LVL_MAX 0x7
609
+
#define DA7218_DGS_SIGNAL_LVL_SHIFT 4
610
+
#define DA7218_DGS_SIGNAL_LVL_MASK (0xF << 4)
611
+
#define DA7218_DGS_SIGNAL_LVL_MAX 0xF
612
+
613
+
/* DA7218_DGS_GAIN_CTRL = 0x5B */
614
+
#define DA7218_DGS_STEPS_SHIFT 0
615
+
#define DA7218_DGS_STEPS_MASK (0x1F << 0)
616
+
#define DA7218_DGS_STEPS_MAX 0x1F
617
+
#define DA7218_DGS_RAMP_EN_SHIFT 5
618
+
#define DA7218_DGS_RAMP_EN_MASK (0x1 << 5)
619
+
#define DA7218_DGS_SUBR_EN_SHIFT 6
620
+
#define DA7218_DGS_SUBR_EN_MASK (0x1 << 6)
621
+
622
+
/* DA7218_DROUTING_OUTDAI_1L = 0x5C */
623
+
#define DA7218_OUTDAI_1L_SRC_SHIFT 0
624
+
#define DA7218_OUTDAI_1L_SRC_MASK (0x7F << 0)
625
+
#define DA7218_DMIX_SRC_INFILT1L 0
626
+
#define DA7218_DMIX_SRC_INFILT1R 1
627
+
#define DA7218_DMIX_SRC_INFILT2L 2
628
+
#define DA7218_DMIX_SRC_INFILT2R 3
629
+
#define DA7218_DMIX_SRC_TONEGEN 4
630
+
#define DA7218_DMIX_SRC_DAIL 5
631
+
#define DA7218_DMIX_SRC_DAIR 6
632
+
633
+
/* DA7218_DMIX_OUTDAI_1L_INFILT_1L_GAIN = 0x5D */
634
+
#define DA7218_OUTDAI_1L_INFILT_1L_GAIN_SHIFT 0
635
+
#define DA7218_OUTDAI_1L_INFILT_1L_GAIN_MASK (0x1F << 0)
636
+
#define DA7218_DMIX_GAIN_MAX 0x1F
637
+
638
+
/* DA7218_DMIX_OUTDAI_1L_INFILT_1R_GAIN = 0x5E */
639
+
#define DA7218_OUTDAI_1L_INFILT_1R_GAIN_SHIFT 0
640
+
#define DA7218_OUTDAI_1L_INFILT_1R_GAIN_MASK (0x1F << 0)
641
+
642
+
/* DA7218_DMIX_OUTDAI_1L_INFILT_2L_GAIN = 0x5F */
643
+
#define DA7218_OUTDAI_1L_INFILT_2L_GAIN_SHIFT 0
644
+
#define DA7218_OUTDAI_1L_INFILT_2L_GAIN_MASK (0x1F << 0)
645
+
646
+
/* DA7218_DMIX_OUTDAI_1L_INFILT_2R_GAIN = 0x60 */
647
+
#define DA7218_OUTDAI_1L_INFILT_2R_GAIN_SHIFT 0
648
+
#define DA7218_OUTDAI_1L_INFILT_2R_GAIN_MASK (0x1F << 0)
649
+
650
+
/* DA7218_DMIX_OUTDAI_1L_TONEGEN_GAIN = 0x61 */
651
+
#define DA7218_OUTDAI_1L_TONEGEN_GAIN_SHIFT 0
652
+
#define DA7218_OUTDAI_1L_TONEGEN_GAIN_MASK (0x1F << 0)
653
+
654
+
/* DA7218_DMIX_OUTDAI_1L_INDAI_1L_GAIN = 0x62 */
655
+
#define DA7218_OUTDAI_1L_INDAI_1L_GAIN_SHIFT 0
656
+
#define DA7218_OUTDAI_1L_INDAI_1L_GAIN_MASK (0x1F << 0)
657
+
658
+
/* DA7218_DMIX_OUTDAI_1L_INDAI_1R_GAIN = 0x63 */
659
+
#define DA7218_OUTDAI_1L_INDAI_1R_GAIN_SHIFT 0
660
+
#define DA7218_OUTDAI_1L_INDAI_1R_GAIN_MASK (0x1F << 0)
661
+
662
+
/* DA7218_DROUTING_OUTDAI_1R = 0x64 */
663
+
#define DA7218_OUTDAI_1R_SRC_SHIFT 0
664
+
#define DA7218_OUTDAI_1R_SRC_MASK (0x7F << 0)
665
+
666
+
/* DA7218_DMIX_OUTDAI_1R_INFILT_1L_GAIN = 0x65 */
667
+
#define DA7218_OUTDAI_1R_INFILT_1L_GAIN_SHIFT 0
668
+
#define DA7218_OUTDAI_1R_INFILT_1L_GAIN_MASK (0x1F << 0)
669
+
670
+
/* DA7218_DMIX_OUTDAI_1R_INFILT_1R_GAIN = 0x66 */
671
+
#define DA7218_OUTDAI_1R_INFILT_1R_GAIN_SHIFT 0
672
+
#define DA7218_OUTDAI_1R_INFILT_1R_GAIN_MASK (0x1F << 0)
673
+
674
+
/* DA7218_DMIX_OUTDAI_1R_INFILT_2L_GAIN = 0x67 */
675
+
#define DA7218_OUTDAI_1R_INFILT_2L_GAIN_SHIFT 0
676
+
#define DA7218_OUTDAI_1R_INFILT_2L_GAIN_MASK (0x1F << 0)
677
+
678
+
/* DA7218_DMIX_OUTDAI_1R_INFILT_2R_GAIN = 0x68 */
679
+
#define DA7218_OUTDAI_1R_INFILT_2R_GAIN_SHIFT 0
680
+
#define DA7218_OUTDAI_1R_INFILT_2R_GAIN_MASK (0x1F << 0)
681
+
682
+
/* DA7218_DMIX_OUTDAI_1R_TONEGEN_GAIN = 0x69 */
683
+
#define DA7218_OUTDAI_1R_TONEGEN_GAIN_SHIFT 0
684
+
#define DA7218_OUTDAI_1R_TONEGEN_GAIN_MASK (0x1F << 0)
685
+
686
+
/* DA7218_DMIX_OUTDAI_1R_INDAI_1L_GAIN = 0x6A */
687
+
#define DA7218_OUTDAI_1R_INDAI_1L_GAIN_SHIFT 0
688
+
#define DA7218_OUTDAI_1R_INDAI_1L_GAIN_MASK (0x1F << 0)
689
+
690
+
/* DA7218_DMIX_OUTDAI_1R_INDAI_1R_GAIN = 0x6B */
691
+
#define DA7218_OUTDAI_1R_INDAI_1R_GAIN_SHIFT 0
692
+
#define DA7218_OUTDAI_1R_INDAI_1R_GAIN_MASK (0x1F << 0)
693
+
694
+
/* DA7218_DROUTING_OUTFILT_1L = 0x6C */
695
+
#define DA7218_OUTFILT_1L_SRC_SHIFT 0
696
+
#define DA7218_OUTFILT_1L_SRC_MASK (0x7F << 0)
697
+
698
+
/* DA7218_DMIX_OUTFILT_1L_INFILT_1L_GAIN = 0x6D */
699
+
#define DA7218_OUTFILT_1L_INFILT_1L_GAIN_SHIFT 0
700
+
#define DA7218_OUTFILT_1L_INFILT_1L_GAIN_MASK (0x1F << 0)
701
+
702
+
/* DA7218_DMIX_OUTFILT_1L_INFILT_1R_GAIN = 0x6E */
703
+
#define DA7218_OUTFILT_1L_INFILT_1R_GAIN_SHIFT 0
704
+
#define DA7218_OUTFILT_1L_INFILT_1R_GAIN_MASK (0x1F << 0)
705
+
706
+
/* DA7218_DMIX_OUTFILT_1L_INFILT_2L_GAIN = 0x6F */
707
+
#define DA7218_OUTFILT_1L_INFILT_2L_GAIN_SHIFT 0
708
+
#define DA7218_OUTFILT_1L_INFILT_2L_GAIN_MASK (0x1F << 0)
709
+
710
+
/* DA7218_DMIX_OUTFILT_1L_INFILT_2R_GAIN = 0x70 */
711
+
#define DA7218_OUTFILT_1L_INFILT_2R_GAIN_SHIFT 0
712
+
#define DA7218_OUTFILT_1L_INFILT_2R_GAIN_MASK (0x1F << 0)
713
+
714
+
/* DA7218_DMIX_OUTFILT_1L_TONEGEN_GAIN = 0x71 */
715
+
#define DA7218_OUTFILT_1L_TONEGEN_GAIN_SHIFT 0
716
+
#define DA7218_OUTFILT_1L_TONEGEN_GAIN_MASK (0x1F << 0)
717
+
718
+
/* DA7218_DMIX_OUTFILT_1L_INDAI_1L_GAIN = 0x72 */
719
+
#define DA7218_OUTFILT_1L_INDAI_1L_GAIN_SHIFT 0
720
+
#define DA7218_OUTFILT_1L_INDAI_1L_GAIN_MASK (0x1F << 0)
721
+
722
+
/* DA7218_DMIX_OUTFILT_1L_INDAI_1R_GAIN = 0x73 */
723
+
#define DA7218_OUTFILT_1L_INDAI_1R_GAIN_SHIFT 0
724
+
#define DA7218_OUTFILT_1L_INDAI_1R_GAIN_MASK (0x1F << 0)
725
+
726
+
/* DA7218_DROUTING_OUTFILT_1R = 0x74 */
727
+
#define DA7218_OUTFILT_1R_SRC_SHIFT 0
728
+
#define DA7218_OUTFILT_1R_SRC_MASK (0x7F << 0)
729
+
730
+
/* DA7218_DMIX_OUTFILT_1R_INFILT_1L_GAIN = 0x75 */
731
+
#define DA7218_OUTFILT_1R_INFILT_1L_GAIN_SHIFT 0
732
+
#define DA7218_OUTFILT_1R_INFILT_1L_GAIN_MASK (0x1F << 0)
733
+
734
+
/* DA7218_DMIX_OUTFILT_1R_INFILT_1R_GAIN = 0x76 */
735
+
#define DA7218_OUTFILT_1R_INFILT_1R_GAIN_SHIFT 0
736
+
#define DA7218_OUTFILT_1R_INFILT_1R_GAIN_MASK (0x1F << 0)
737
+
738
+
/* DA7218_DMIX_OUTFILT_1R_INFILT_2L_GAIN = 0x77 */
739
+
#define DA7218_OUTFILT_1R_INFILT_2L_GAIN_SHIFT 0
740
+
#define DA7218_OUTFILT_1R_INFILT_2L_GAIN_MASK (0x1F << 0)
741
+
742
+
/* DA7218_DMIX_OUTFILT_1R_INFILT_2R_GAIN = 0x78 */
743
+
#define DA7218_OUTFILT_1R_INFILT_2R_GAIN_SHIFT 0
744
+
#define DA7218_OUTFILT_1R_INFILT_2R_GAIN_MASK (0x1F << 0)
745
+
746
+
/* DA7218_DMIX_OUTFILT_1R_TONEGEN_GAIN = 0x79 */
747
+
#define DA7218_OUTFILT_1R_TONEGEN_GAIN_SHIFT 0
748
+
#define DA7218_OUTFILT_1R_TONEGEN_GAIN_MASK (0x1F << 0)
749
+
750
+
/* DA7218_DMIX_OUTFILT_1R_INDAI_1L_GAIN = 0x7A */
751
+
#define DA7218_OUTFILT_1R_INDAI_1L_GAIN_SHIFT 0
752
+
#define DA7218_OUTFILT_1R_INDAI_1L_GAIN_MASK (0x1F << 0)
753
+
754
+
/* DA7218_DMIX_OUTFILT_1R_INDAI_1R_GAIN = 0x7B */
755
+
#define DA7218_OUTFILT_1R_INDAI_1R_GAIN_SHIFT 0
756
+
#define DA7218_OUTFILT_1R_INDAI_1R_GAIN_MASK (0x1F << 0)
757
+
758
+
/* DA7218_DROUTING_OUTDAI_2L = 0x7C */
759
+
#define DA7218_OUTDAI_2L_SRC_SHIFT 0
760
+
#define DA7218_OUTDAI_2L_SRC_MASK (0x7F << 0)
761
+
762
+
/* DA7218_DMIX_OUTDAI_2L_INFILT_1L_GAIN = 0x7D */
763
+
#define DA7218_OUTDAI_2L_INFILT_1L_GAIN_SHIFT 0
764
+
#define DA7218_OUTDAI_2L_INFILT_1L_GAIN_MASK (0x1F << 0)
765
+
766
+
/* DA7218_DMIX_OUTDAI_2L_INFILT_1R_GAIN = 0x7E */
767
+
#define DA7218_OUTDAI_2L_INFILT_1R_GAIN_SHIFT 0
768
+
#define DA7218_OUTDAI_2L_INFILT_1R_GAIN_MASK (0x1F << 0)
769
+
770
+
/* DA7218_DMIX_OUTDAI_2L_INFILT_2L_GAIN = 0x7F */
771
+
#define DA7218_OUTDAI_2L_INFILT_2L_GAIN_SHIFT 0
772
+
#define DA7218_OUTDAI_2L_INFILT_2L_GAIN_MASK (0x1F << 0)
773
+
774
+
/* DA7218_DMIX_OUTDAI_2L_INFILT_2R_GAIN = 0x80 */
775
+
#define DA7218_OUTDAI_2L_INFILT_2R_GAIN_SHIFT 0
776
+
#define DA7218_OUTDAI_2L_INFILT_2R_GAIN_MASK (0x1F << 0)
777
+
778
+
/* DA7218_DMIX_OUTDAI_2L_TONEGEN_GAIN = 0x81 */
779
+
#define DA7218_OUTDAI_2L_TONEGEN_GAIN_SHIFT 0
780
+
#define DA7218_OUTDAI_2L_TONEGEN_GAIN_MASK (0x1F << 0)
781
+
782
+
/* DA7218_DMIX_OUTDAI_2L_INDAI_1L_GAIN = 0x82 */
783
+
#define DA7218_OUTDAI_2L_INDAI_1L_GAIN_SHIFT 0
784
+
#define DA7218_OUTDAI_2L_INDAI_1L_GAIN_MASK (0x1F << 0)
785
+
786
+
/* DA7218_DMIX_OUTDAI_2L_INDAI_1R_GAIN = 0x83 */
787
+
#define DA7218_OUTDAI_2L_INDAI_1R_GAIN_SHIFT 0
788
+
#define DA7218_OUTDAI_2L_INDAI_1R_GAIN_MASK (0x1F << 0)
789
+
790
+
/* DA7218_DROUTING_OUTDAI_2R = 0x84 */
791
+
#define DA7218_OUTDAI_2R_SRC_SHIFT 0
792
+
#define DA7218_OUTDAI_2R_SRC_MASK (0x7F << 0)
793
+
794
+
/* DA7218_DMIX_OUTDAI_2R_INFILT_1L_GAIN = 0x85 */
795
+
#define DA7218_OUTDAI_2R_INFILT_1L_GAIN_SHIFT 0
796
+
#define DA7218_OUTDAI_2R_INFILT_1L_GAIN_MASK (0x1F << 0)
797
+
798
+
/* DA7218_DMIX_OUTDAI_2R_INFILT_1R_GAIN = 0x86 */
799
+
#define DA7218_OUTDAI_2R_INFILT_1R_GAIN_SHIFT 0
800
+
#define DA7218_OUTDAI_2R_INFILT_1R_GAIN_MASK (0x1F << 0)
801
+
802
+
/* DA7218_DMIX_OUTDAI_2R_INFILT_2L_GAIN = 0x87 */
803
+
#define DA7218_OUTDAI_2R_INFILT_2L_GAIN_SHIFT 0
804
+
#define DA7218_OUTDAI_2R_INFILT_2L_GAIN_MASK (0x1F << 0)
805
+
806
+
/* DA7218_DMIX_OUTDAI_2R_INFILT_2R_GAIN = 0x88 */
807
+
#define DA7218_OUTDAI_2R_INFILT_2R_GAIN_SHIFT 0
808
+
#define DA7218_OUTDAI_2R_INFILT_2R_GAIN_MASK (0x1F << 0)
809
+
810
+
/* DA7218_DMIX_OUTDAI_2R_TONEGEN_GAIN = 0x89 */
811
+
#define DA7218_OUTDAI_2R_TONEGEN_GAIN_SHIFT 0
812
+
#define DA7218_OUTDAI_2R_TONEGEN_GAIN_MASK (0x1F << 0)
813
+
814
+
/* DA7218_DMIX_OUTDAI_2R_INDAI_1L_GAIN = 0x8A */
815
+
#define DA7218_OUTDAI_2R_INDAI_1L_GAIN_SHIFT 0
816
+
#define DA7218_OUTDAI_2R_INDAI_1L_GAIN_MASK (0x1F << 0)
817
+
818
+
/* DA7218_DMIX_OUTDAI_2R_INDAI_1R_GAIN = 0x8B */
819
+
#define DA7218_OUTDAI_2R_INDAI_1R_GAIN_SHIFT 0
820
+
#define DA7218_OUTDAI_2R_INDAI_1R_GAIN_MASK (0x1F << 0)
821
+
822
+
/* DA7218_DAI_CTRL = 0x8C */
823
+
#define DA7218_DAI_FORMAT_SHIFT 0
824
+
#define DA7218_DAI_FORMAT_MASK (0x3 << 0)
825
+
#define DA7218_DAI_FORMAT_I2S (0x0 << 0)
826
+
#define DA7218_DAI_FORMAT_LEFT_J (0x1 << 0)
827
+
#define DA7218_DAI_FORMAT_RIGHT_J (0x2 << 0)
828
+
#define DA7218_DAI_FORMAT_DSP (0x3 << 0)
829
+
#define DA7218_DAI_WORD_LENGTH_SHIFT 2
830
+
#define DA7218_DAI_WORD_LENGTH_MASK (0x3 << 2)
831
+
#define DA7218_DAI_WORD_LENGTH_S16_LE (0x0 << 2)
832
+
#define DA7218_DAI_WORD_LENGTH_S20_LE (0x1 << 2)
833
+
#define DA7218_DAI_WORD_LENGTH_S24_LE (0x2 << 2)
834
+
#define DA7218_DAI_WORD_LENGTH_S32_LE (0x3 << 2)
835
+
#define DA7218_DAI_CH_NUM_SHIFT 4
836
+
#define DA7218_DAI_CH_NUM_MASK (0x7 << 4)
837
+
#define DA7218_DAI_CH_NUM_MAX 4
838
+
#define DA7218_DAI_EN_SHIFT 7
839
+
#define DA7218_DAI_EN_MASK (0x1 << 7)
840
+
841
+
/* DA7218_DAI_TDM_CTRL = 0x8D */
842
+
#define DA7218_DAI_TDM_CH_EN_SHIFT 0
843
+
#define DA7218_DAI_TDM_CH_EN_MASK (0xF << 0)
844
+
#define DA7218_DAI_TDM_MAX_SLOTS 4
845
+
#define DA7218_DAI_OE_SHIFT 6
846
+
#define DA7218_DAI_OE_MASK (0x1 << 6)
847
+
#define DA7218_DAI_TDM_MODE_EN_SHIFT 7
848
+
#define DA7218_DAI_TDM_MODE_EN_MASK (0x1 << 7)
849
+
850
+
/* DA7218_DAI_OFFSET_LOWER = 0x8E */
851
+
#define DA7218_DAI_OFFSET_LOWER_SHIFT 0
852
+
#define DA7218_DAI_OFFSET_LOWER_MASK (0xFF << 0)
853
+
854
+
/* DA7218_DAI_OFFSET_UPPER = 0x8F */
855
+
#define DA7218_DAI_OFFSET_UPPER_SHIFT 0
856
+
#define DA7218_DAI_OFFSET_UPPER_MASK (0x7 << 0)
857
+
858
+
/* DA7218_DAI_CLK_MODE = 0x90 */
859
+
#define DA7218_DAI_BCLKS_PER_WCLK_SHIFT 0
860
+
#define DA7218_DAI_BCLKS_PER_WCLK_MASK (0x3 << 0)
861
+
#define DA7218_DAI_BCLKS_PER_WCLK_32 (0x0 << 0)
862
+
#define DA7218_DAI_BCLKS_PER_WCLK_64 (0x1 << 0)
863
+
#define DA7218_DAI_BCLKS_PER_WCLK_128 (0x2 << 0)
864
+
#define DA7218_DAI_BCLKS_PER_WCLK_256 (0x3 << 0)
865
+
#define DA7218_DAI_CLK_POL_SHIFT 2
866
+
#define DA7218_DAI_CLK_POL_MASK (0x1 << 2)
867
+
#define DA7218_DAI_CLK_POL_INV (0x1 << 2)
868
+
#define DA7218_DAI_WCLK_POL_SHIFT 3
869
+
#define DA7218_DAI_WCLK_POL_MASK (0x1 << 3)
870
+
#define DA7218_DAI_WCLK_POL_INV (0x1 << 3)
871
+
#define DA7218_DAI_WCLK_TRI_STATE_SHIFT 4
872
+
#define DA7218_DAI_WCLK_TRI_STATE_MASK (0x1 << 4)
873
+
#define DA7218_DAI_CLK_EN_SHIFT 7
874
+
#define DA7218_DAI_CLK_EN_MASK (0x1 << 7)
875
+
876
+
/* DA7218_PLL_CTRL = 0x91 */
877
+
#define DA7218_PLL_INDIV_SHIFT 0
878
+
#define DA7218_PLL_INDIV_MASK (0x7 << 0)
879
+
#define DA7218_PLL_INDIV_2_5_MHZ (0x0 << 0)
880
+
#define DA7218_PLL_INDIV_5_10_MHZ (0x1 << 0)
881
+
#define DA7218_PLL_INDIV_10_20_MHZ (0x2 << 0)
882
+
#define DA7218_PLL_INDIV_20_40_MHZ (0x3 << 0)
883
+
#define DA7218_PLL_INDIV_40_54_MHZ (0x4 << 0)
884
+
#define DA7218_PLL_INDIV_2_10_MHZ_VAL 2
885
+
#define DA7218_PLL_INDIV_10_20_MHZ_VAL 4
886
+
#define DA7218_PLL_INDIV_20_40_MHZ_VAL 8
887
+
#define DA7218_PLL_INDIV_40_54_MHZ_VAL 16
888
+
#define DA7218_PLL_MCLK_SQR_EN_SHIFT 4
889
+
#define DA7218_PLL_MCLK_SQR_EN_MASK (0x1 << 4)
890
+
#define DA7218_PLL_MODE_SHIFT 6
891
+
#define DA7218_PLL_MODE_MASK (0x3 << 6)
892
+
#define DA7218_PLL_MODE_BYPASS (0x0 << 6)
893
+
#define DA7218_PLL_MODE_NORMAL (0x1 << 6)
894
+
#define DA7218_PLL_MODE_SRM (0x2 << 6)
895
+
#define DA7218_PLL_MODE_32KHZ (0x3 << 6)
896
+
897
+
/* DA7218_PLL_FRAC_TOP = 0x92 */
898
+
#define DA7218_PLL_FBDIV_FRAC_TOP_SHIFT 0
899
+
#define DA7218_PLL_FBDIV_FRAC_TOP_MASK (0x1F << 0)
900
+
901
+
/* DA7218_PLL_FRAC_BOT = 0x93 */
902
+
#define DA7218_PLL_FBDIV_FRAC_BOT_SHIFT 0
903
+
#define DA7218_PLL_FBDIV_FRAC_BOT_MASK (0xFF << 0)
904
+
905
+
/* DA7218_PLL_INTEGER = 0x94 */
906
+
#define DA7218_PLL_FBDIV_INTEGER_SHIFT 0
907
+
#define DA7218_PLL_FBDIV_INTEGER_MASK (0x7F << 0)
908
+
909
+
/* DA7218_PLL_STATUS = 0x95 */
910
+
#define DA7218_PLL_SRM_STATUS_SHIFT 0
911
+
#define DA7218_PLL_SRM_STATUS_MASK (0xFF << 0)
912
+
#define DA7218_PLL_SRM_STATUS_SRM_LOCK (0x1 << 7)
913
+
914
+
/* DA7218_PLL_REFOSC_CAL = 0x98 */
915
+
#define DA7218_PLL_REFOSC_CAL_CTRL_SHIFT 0
916
+
#define DA7218_PLL_REFOSC_CAL_CTRL_MASK (0x1F << 0)
917
+
#define DA7218_PLL_REFOSC_CAL_START_SHIFT 6
918
+
#define DA7218_PLL_REFOSC_CAL_START_MASK (0x1 << 6)
919
+
#define DA7218_PLL_REFOSC_CAL_EN_SHIFT 7
920
+
#define DA7218_PLL_REFOSC_CAL_EN_MASK (0x1 << 7)
921
+
922
+
/* DA7218_DAC_NG_CTRL = 0x9C */
923
+
#define DA7218_DAC_NG_EN_SHIFT 7
924
+
#define DA7218_DAC_NG_EN_MASK (0x1 << 7)
925
+
926
+
/* DA7218_DAC_NG_SETUP_TIME = 0x9D */
927
+
#define DA7218_DAC_NG_SETUP_TIME_SHIFT 0
928
+
#define DA7218_DAC_NG_SETUP_TIME_MASK (0x3 << 0)
929
+
#define DA7218_DAC_NG_SETUP_TIME_MAX 4
930
+
#define DA7218_DAC_NG_RAMPUP_RATE_SHIFT 2
931
+
#define DA7218_DAC_NG_RAMPUP_RATE_MASK (0x1 << 2)
932
+
#define DA7218_DAC_NG_RAMPUP_RATE_MAX 2
933
+
#define DA7218_DAC_NG_RAMPDN_RATE_SHIFT 3
934
+
#define DA7218_DAC_NG_RAMPDN_RATE_MASK (0x1 << 3)
935
+
#define DA7218_DAC_NG_RAMPDN_RATE_MAX 2
936
+
937
+
/* DA7218_DAC_NG_OFF_THRESH = 0x9E */
938
+
#define DA7218_DAC_NG_OFF_THRESHOLD_SHIFT 0
939
+
#define DA7218_DAC_NG_OFF_THRESHOLD_MASK (0x7 << 0)
940
+
#define DA7218_DAC_NG_THRESHOLD_MAX 0x7
941
+
942
+
/* DA7218_DAC_NG_ON_THRESH = 0x9F */
943
+
#define DA7218_DAC_NG_ON_THRESHOLD_SHIFT 0
944
+
#define DA7218_DAC_NG_ON_THRESHOLD_MASK (0x7 << 0)
945
+
946
+
/* DA7218_TONE_GEN_CFG1 = 0xA0 */
947
+
#define DA7218_DTMF_REG_SHIFT 0
948
+
#define DA7218_DTMF_REG_MASK (0xF << 0)
949
+
#define DA7218_DTMF_REG_MAX 16
950
+
#define DA7218_DTMF_EN_SHIFT 4
951
+
#define DA7218_DTMF_EN_MASK (0x1 << 4)
952
+
#define DA7218_START_STOPN_SHIFT 7
953
+
#define DA7218_START_STOPN_MASK (0x1 << 7)
954
+
955
+
/* DA7218_TONE_GEN_CFG2 = 0xA1 */
956
+
#define DA7218_SWG_SEL_SHIFT 0
957
+
#define DA7218_SWG_SEL_MASK (0x3 << 0)
958
+
#define DA7218_SWG_SEL_MAX 4
959
+
960
+
/* DA7218_TONE_GEN_FREQ1_L = 0xA2 */
961
+
#define DA7218_FREQ1_L_SHIFT 0
962
+
#define DA7218_FREQ1_L_MASK (0xFF << 0)
963
+
#define DA7218_FREQ_MAX 0xFFFF
964
+
965
+
/* DA7218_TONE_GEN_FREQ1_U = 0xA3 */
966
+
#define DA7218_FREQ1_U_SHIFT 0
967
+
#define DA7218_FREQ1_U_MASK (0xFF << 0)
968
+
969
+
/* DA7218_TONE_GEN_FREQ2_L = 0xA4 */
970
+
#define DA7218_FREQ2_L_SHIFT 0
971
+
#define DA7218_FREQ2_L_MASK (0xFF << 0)
972
+
973
+
/* DA7218_TONE_GEN_FREQ2_U = 0xA5 */
974
+
#define DA7218_FREQ2_U_SHIFT 0
975
+
#define DA7218_FREQ2_U_MASK (0xFF << 0)
976
+
977
+
/* DA7218_TONE_GEN_CYCLES = 0xA6 */
978
+
#define DA7218_BEEP_CYCLES_SHIFT 0
979
+
#define DA7218_BEEP_CYCLES_MASK (0x7 << 0)
980
+
981
+
/* DA7218_TONE_GEN_ON_PER = 0xA7 */
982
+
#define DA7218_BEEP_ON_PER_SHIFT 0
983
+
#define DA7218_BEEP_ON_PER_MASK (0x3F << 0)
984
+
985
+
/* DA7218_TONE_GEN_OFF_PER = 0xA8 */
986
+
#define DA7218_BEEP_OFF_PER_SHIFT 0
987
+
#define DA7218_BEEP_OFF_PER_MASK (0x3F << 0)
988
+
#define DA7218_BEEP_ON_OFF_MAX 0x3F
989
+
990
+
/* DA7218_CP_CTRL = 0xAC */
991
+
#define DA7218_CP_MOD_SHIFT 2
992
+
#define DA7218_CP_MOD_MASK (0x3 << 2)
993
+
#define DA7218_CP_MCHANGE_SHIFT 4
994
+
#define DA7218_CP_MCHANGE_MASK (0x3 << 4)
995
+
#define DA7218_CP_MCHANGE_REL_MASK 0x3
996
+
#define DA7218_CP_MCHANGE_MAX 3
997
+
#define DA7218_CP_MCHANGE_LARGEST_VOL 0x1
998
+
#define DA7218_CP_MCHANGE_DAC_VOL 0x2
999
+
#define DA7218_CP_MCHANGE_SIG_MAG 0x3
1000
+
#define DA7218_CP_SMALL_SWITCH_FREQ_EN_SHIFT 6
1001
+
#define DA7218_CP_SMALL_SWITCH_FREQ_EN_MASK (0x1 << 6)
1002
+
#define DA7218_CP_EN_SHIFT 7
1003
+
#define DA7218_CP_EN_MASK (0x1 << 7)
1004
+
1005
+
/* DA7218_CP_DELAY = 0xAD */
1006
+
#define DA7218_CP_FCONTROL_SHIFT 0
1007
+
#define DA7218_CP_FCONTROL_MASK (0x7 << 0)
1008
+
#define DA7218_CP_FCONTROL_MAX 6
1009
+
#define DA7218_CP_TAU_DELAY_SHIFT 3
1010
+
#define DA7218_CP_TAU_DELAY_MASK (0x7 << 3)
1011
+
#define DA7218_CP_TAU_DELAY_MAX 8
1012
+
1013
+
/* DA7218_CP_VOL_THRESHOLD1 = 0xAE */
1014
+
#define DA7218_CP_THRESH_VDD2_SHIFT 0
1015
+
#define DA7218_CP_THRESH_VDD2_MASK (0x3F << 0)
1016
+
#define DA7218_CP_THRESH_VDD2_MAX 0x3F
1017
+
1018
+
/* DA7218_MIC_1_CTRL = 0xB4 */
1019
+
#define DA7218_MIC_1_AMP_MUTE_EN_SHIFT 6
1020
+
#define DA7218_MIC_1_AMP_MUTE_EN_MASK (0x1 << 6)
1021
+
#define DA7218_MIC_1_AMP_EN_SHIFT 7
1022
+
#define DA7218_MIC_1_AMP_EN_MASK (0x1 << 7)
1023
+
1024
+
/* DA7218_MIC_1_GAIN = 0xB5 */
1025
+
#define DA7218_MIC_1_AMP_GAIN_SHIFT 0
1026
+
#define DA7218_MIC_1_AMP_GAIN_MASK (0x7 << 0)
1027
+
#define DA7218_MIC_AMP_GAIN_MAX 0x7
1028
+
1029
+
/* DA7218_MIC_1_SELECT = 0xB7 */
1030
+
#define DA7218_MIC_1_AMP_IN_SEL_SHIFT 0
1031
+
#define DA7218_MIC_1_AMP_IN_SEL_MASK (0x3 << 0)
1032
+
1033
+
/* DA7218_MIC_2_CTRL = 0xB8 */
1034
+
#define DA7218_MIC_2_AMP_MUTE_EN_SHIFT 6
1035
+
#define DA7218_MIC_2_AMP_MUTE_EN_MASK (0x1 << 6)
1036
+
#define DA7218_MIC_2_AMP_EN_SHIFT 7
1037
+
#define DA7218_MIC_2_AMP_EN_MASK (0x1 << 7)
1038
+
1039
+
/* DA7218_MIC_2_GAIN = 0xB9 */
1040
+
#define DA7218_MIC_2_AMP_GAIN_SHIFT 0
1041
+
#define DA7218_MIC_2_AMP_GAIN_MASK (0x7 << 0)
1042
+
1043
+
/* DA7218_MIC_2_SELECT = 0xBB */
1044
+
#define DA7218_MIC_2_AMP_IN_SEL_SHIFT 0
1045
+
#define DA7218_MIC_2_AMP_IN_SEL_MASK (0x3 << 0)
1046
+
1047
+
/* DA7218_IN_1_HPF_FILTER_CTRL = 0xBC */
1048
+
#define DA7218_IN_1_VOICE_HPF_CORNER_SHIFT 0
1049
+
#define DA7218_IN_1_VOICE_HPF_CORNER_MASK (0x7 << 0)
1050
+
#define DA7218_IN_VOICE_HPF_CORNER_MAX 8
1051
+
#define DA7218_IN_1_VOICE_EN_SHIFT 3
1052
+
#define DA7218_IN_1_VOICE_EN_MASK (0x1 << 3)
1053
+
#define DA7218_IN_1_AUDIO_HPF_CORNER_SHIFT 4
1054
+
#define DA7218_IN_1_AUDIO_HPF_CORNER_MASK (0x3 << 4)
1055
+
#define DA7218_IN_1_HPF_EN_SHIFT 7
1056
+
#define DA7218_IN_1_HPF_EN_MASK (0x1 << 7)
1057
+
1058
+
/* DA7218_IN_2_HPF_FILTER_CTRL = 0xBD */
1059
+
#define DA7218_IN_2_VOICE_HPF_CORNER_SHIFT 0
1060
+
#define DA7218_IN_2_VOICE_HPF_CORNER_MASK (0x7 << 0)
1061
+
#define DA7218_IN_2_VOICE_EN_SHIFT 3
1062
+
#define DA7218_IN_2_VOICE_EN_MASK (0x1 << 3)
1063
+
#define DA7218_IN_2_AUDIO_HPF_CORNER_SHIFT 4
1064
+
#define DA7218_IN_2_AUDIO_HPF_CORNER_MASK (0x3 << 4)
1065
+
#define DA7218_IN_2_HPF_EN_SHIFT 7
1066
+
#define DA7218_IN_2_HPF_EN_MASK (0x1 << 7)
1067
+
1068
+
/* DA7218_ADC_1_CTRL = 0xC0 */
1069
+
#define DA7218_ADC_1_AAF_EN_SHIFT 2
1070
+
#define DA7218_ADC_1_AAF_EN_MASK (0x1 << 2)
1071
+
1072
+
/* DA7218_ADC_2_CTRL = 0xC1 */
1073
+
#define DA7218_ADC_2_AAF_EN_SHIFT 2
1074
+
#define DA7218_ADC_2_AAF_EN_MASK (0x1 << 2)
1075
+
1076
+
/* DA7218_ADC_MODE = 0xC2 */
1077
+
#define DA7218_ADC_LP_MODE_SHIFT 0
1078
+
#define DA7218_ADC_LP_MODE_MASK (0x1 << 0)
1079
+
#define DA7218_ADC_LVLDET_MODE_SHIFT 1
1080
+
#define DA7218_ADC_LVLDET_MODE_MASK (0x1 << 1)
1081
+
#define DA7218_ADC_LVLDET_AUTO_EXIT_SHIFT 2
1082
+
#define DA7218_ADC_LVLDET_AUTO_EXIT_MASK (0x1 << 2)
1083
+
1084
+
/* DA7218_MIXOUT_L_CTRL = 0xCC */
1085
+
#define DA7218_MIXOUT_L_AMP_EN_SHIFT 7
1086
+
#define DA7218_MIXOUT_L_AMP_EN_MASK (0x1 << 7)
1087
+
1088
+
/* DA7218_MIXOUT_L_GAIN = 0xCD */
1089
+
#define DA7218_MIXOUT_L_AMP_GAIN_SHIFT 0
1090
+
#define DA7218_MIXOUT_L_AMP_GAIN_MASK (0x3 << 0)
1091
+
#define DA7218_MIXOUT_AMP_GAIN_MIN 0x1
1092
+
#define DA7218_MIXOUT_AMP_GAIN_MAX 0x3
1093
+
1094
+
/* DA7218_MIXOUT_R_CTRL = 0xCE */
1095
+
#define DA7218_MIXOUT_R_AMP_EN_SHIFT 7
1096
+
#define DA7218_MIXOUT_R_AMP_EN_MASK (0x1 << 7)
1097
+
1098
+
/* DA7218_MIXOUT_R_GAIN = 0xCF */
1099
+
#define DA7218_MIXOUT_R_AMP_GAIN_SHIFT 0
1100
+
#define DA7218_MIXOUT_R_AMP_GAIN_MASK (0x3 << 0)
1101
+
1102
+
/* DA7218_HP_L_CTRL = 0xD0 */
1103
+
#define DA7218_HP_L_AMP_MIN_GAIN_EN_SHIFT 2
1104
+
#define DA7218_HP_L_AMP_MIN_GAIN_EN_MASK (0x1 << 2)
1105
+
#define DA7218_HP_L_AMP_OE_SHIFT 3
1106
+
#define DA7218_HP_L_AMP_OE_MASK (0x1 << 3)
1107
+
#define DA7218_HP_L_AMP_ZC_EN_SHIFT 4
1108
+
#define DA7218_HP_L_AMP_ZC_EN_MASK (0x1 << 4)
1109
+
#define DA7218_HP_L_AMP_RAMP_EN_SHIFT 5
1110
+
#define DA7218_HP_L_AMP_RAMP_EN_MASK (0x1 << 5)
1111
+
#define DA7218_HP_L_AMP_MUTE_EN_SHIFT 6
1112
+
#define DA7218_HP_L_AMP_MUTE_EN_MASK (0x1 << 6)
1113
+
#define DA7218_HP_L_AMP_EN_SHIFT 7
1114
+
#define DA7218_HP_L_AMP_EN_MASK (0x1 << 7)
1115
+
#define DA7218_HP_AMP_OE_MASK (0x1 << 3)
1116
+
1117
+
/* DA7218_HP_L_GAIN = 0xD1 */
1118
+
#define DA7218_HP_L_AMP_GAIN_SHIFT 0
1119
+
#define DA7218_HP_L_AMP_GAIN_MASK (0x3F << 0)
1120
+
#define DA7218_HP_AMP_GAIN_MIN 0x15
1121
+
#define DA7218_HP_AMP_GAIN_MAX 0x3F
1122
+
1123
+
/* DA7218_HP_R_CTRL = 0xD2 */
1124
+
#define DA7218_HP_R_AMP_MIN_GAIN_EN_SHIFT 2
1125
+
#define DA7218_HP_R_AMP_MIN_GAIN_EN_MASK (0x1 << 2)
1126
+
#define DA7218_HP_R_AMP_OE_SHIFT 3
1127
+
#define DA7218_HP_R_AMP_OE_MASK (0x1 << 3)
1128
+
#define DA7218_HP_R_AMP_ZC_EN_SHIFT 4
1129
+
#define DA7218_HP_R_AMP_ZC_EN_MASK (0x1 << 4)
1130
+
#define DA7218_HP_R_AMP_RAMP_EN_SHIFT 5
1131
+
#define DA7218_HP_R_AMP_RAMP_EN_MASK (0x1 << 5)
1132
+
#define DA7218_HP_R_AMP_MUTE_EN_SHIFT 6
1133
+
#define DA7218_HP_R_AMP_MUTE_EN_MASK (0x1 << 6)
1134
+
#define DA7218_HP_R_AMP_EN_SHIFT 7
1135
+
#define DA7218_HP_R_AMP_EN_MASK (0x1 << 7)
1136
+
1137
+
/* DA7218_HP_R_GAIN = 0xD3 */
1138
+
#define DA7218_HP_R_AMP_GAIN_SHIFT 0
1139
+
#define DA7218_HP_R_AMP_GAIN_MASK (0x3F << 0)
1140
+
1141
+
/* DA7218_HP_SNGL_CTRL = 0xD4 */
1142
+
#define DA7218_HP_AMP_STEREO_DETECT_STATUS_SHIFT 0
1143
+
#define DA7218_HP_AMP_STEREO_DETECT_STATUS_MASK (0x1 << 0)
1144
+
#define DA7218_HPL_AMP_LOAD_DETECT_STATUS_SHIFT 1
1145
+
#define DA7218_HPL_AMP_LOAD_DETECT_STATUS_MASK (0x1 << 1)
1146
+
#define DA7218_HPR_AMP_LOAD_DETECT_STATUS_SHIFT 2
1147
+
#define DA7218_HPR_AMP_LOAD_DETECT_STATUS_MASK (0x1 << 2)
1148
+
#define DA7218_HP_AMP_LOAD_DETECT_EN_SHIFT 6
1149
+
#define DA7218_HP_AMP_LOAD_DETECT_EN_MASK (0x1 << 6)
1150
+
#define DA7218_HP_AMP_STEREO_DETECT_EN_SHIFT 7
1151
+
#define DA7218_HP_AMP_STEREO_DETECT_EN_MASK (0x1 << 7)
1152
+
1153
+
/* DA7218_HP_DIFF_CTRL = 0xD5 */
1154
+
#define DA7218_HP_AMP_DIFF_MODE_EN_SHIFT 0
1155
+
#define DA7218_HP_AMP_DIFF_MODE_EN_MASK (0x1 << 0)
1156
+
#define DA7218_HP_AMP_SINGLE_SUPPLY_EN_SHIFT 4
1157
+
#define DA7218_HP_AMP_SINGLE_SUPPLY_EN_MASK (0x1 << 4)
1158
+
1159
+
/* DA7218_HP_DIFF_UNLOCK = 0xD7 */
1160
+
#define DA7218_HP_DIFF_UNLOCK_SHIFT 0
1161
+
#define DA7218_HP_DIFF_UNLOCK_MASK (0x1 << 0)
1162
+
#define DA7218_HP_DIFF_UNLOCK_VAL 0xC3
1163
+
1164
+
/* DA7218_HPLDET_JACK = 0xD8 */
1165
+
#define DA7218_HPLDET_JACK_RATE_SHIFT 0
1166
+
#define DA7218_HPLDET_JACK_RATE_MASK (0x7 << 0)
1167
+
#define DA7218_HPLDET_JACK_DEBOUNCE_SHIFT 3
1168
+
#define DA7218_HPLDET_JACK_DEBOUNCE_MASK (0x3 << 3)
1169
+
#define DA7218_HPLDET_JACK_THR_SHIFT 5
1170
+
#define DA7218_HPLDET_JACK_THR_MASK (0x3 << 5)
1171
+
#define DA7218_HPLDET_JACK_EN_SHIFT 7
1172
+
#define DA7218_HPLDET_JACK_EN_MASK (0x1 << 7)
1173
+
1174
+
/* DA7218_HPLDET_CTRL = 0xD9 */
1175
+
#define DA7218_HPLDET_COMP_INV_SHIFT 0
1176
+
#define DA7218_HPLDET_COMP_INV_MASK (0x1 << 0)
1177
+
#define DA7218_HPLDET_HYST_EN_SHIFT 1
1178
+
#define DA7218_HPLDET_HYST_EN_MASK (0x1 << 1)
1179
+
#define DA7218_HPLDET_DISCHARGE_EN_SHIFT 7
1180
+
#define DA7218_HPLDET_DISCHARGE_EN_MASK (0x1 << 7)
1181
+
1182
+
/* DA7218_HPLDET_TEST = 0xDA */
1183
+
#define DA7218_HPLDET_COMP_STS_SHIFT 4
1184
+
#define DA7218_HPLDET_COMP_STS_MASK (0x1 << 4)
1185
+
1186
+
/* DA7218_REFERENCES = 0xDC */
1187
+
#define DA7218_BIAS_EN_SHIFT 3
1188
+
#define DA7218_BIAS_EN_MASK (0x1 << 3)
1189
+
1190
+
/* DA7218_IO_CTRL = 0xE0 */
1191
+
#define DA7218_IO_VOLTAGE_LEVEL_SHIFT 0
1192
+
#define DA7218_IO_VOLTAGE_LEVEL_MASK (0x1 << 0)
1193
+
#define DA7218_IO_VOLTAGE_LEVEL_2_5V_3_6V 0
1194
+
#define DA7218_IO_VOLTAGE_LEVEL_1_5V_2_5V 1
1195
+
1196
+
/* DA7218_LDO_CTRL = 0xE1 */
1197
+
#define DA7218_LDO_LEVEL_SELECT_SHIFT 4
1198
+
#define DA7218_LDO_LEVEL_SELECT_MASK (0x3 << 4)
1199
+
#define DA7218_LDO_EN_SHIFT 7
1200
+
#define DA7218_LDO_EN_MASK (0x1 << 7)
1201
+
1202
+
/* DA7218_SIDETONE_CTRL = 0xE4 */
1203
+
#define DA7218_SIDETONE_MUTE_EN_SHIFT 6
1204
+
#define DA7218_SIDETONE_MUTE_EN_MASK (0x1 << 6)
1205
+
#define DA7218_SIDETONE_FILTER_EN_SHIFT 7
1206
+
#define DA7218_SIDETONE_FILTER_EN_MASK (0x1 << 7)
1207
+
1208
+
/* DA7218_SIDETONE_IN_SELECT = 0xE5 */
1209
+
#define DA7218_SIDETONE_IN_SELECT_SHIFT 0
1210
+
#define DA7218_SIDETONE_IN_SELECT_MASK (0x3 << 0)
1211
+
#define DA7218_SIDETONE_IN_SELECT_MAX 4
1212
+
1213
+
/* DA7218_SIDETONE_GAIN = 0xE6 */
1214
+
#define DA7218_SIDETONE_GAIN_SHIFT 0
1215
+
#define DA7218_SIDETONE_GAIN_MASK (0x1F << 0)
1216
+
1217
+
/* DA7218_DROUTING_ST_OUTFILT_1L = 0xE8 */
1218
+
#define DA7218_OUTFILT_ST_1L_SRC_SHIFT 0
1219
+
#define DA7218_OUTFILT_ST_1L_SRC_MASK (0x7 << 0)
1220
+
#define DA7218_DMIX_ST_SRC_OUTFILT1L 0
1221
+
#define DA7218_DMIX_ST_SRC_OUTFILT1R 1
1222
+
#define DA7218_DMIX_ST_SRC_SIDETONE 2
1223
+
1224
+
/* DA7218_DROUTING_ST_OUTFILT_1R = 0xE9 */
1225
+
#define DA7218_OUTFILT_ST_1R_SRC_SHIFT 0
1226
+
#define DA7218_OUTFILT_ST_1R_SRC_MASK (0x7 << 0)
1227
+
1228
+
/* DA7218_SIDETONE_BIQ_3STAGE_DATA = 0xEA */
1229
+
#define DA7218_SIDETONE_BIQ_3STAGE_DATA_SHIFT 0
1230
+
#define DA7218_SIDETONE_BIQ_3STAGE_DATA_MASK (0xFF << 0)
1231
+
1232
+
/* DA7218_SIDETONE_BIQ_3STAGE_ADDR = 0xEB */
1233
+
#define DA7218_SIDETONE_BIQ_3STAGE_ADDR_SHIFT 0
1234
+
#define DA7218_SIDETONE_BIQ_3STAGE_ADDR_MASK (0x1F << 0)
1235
+
#define DA7218_SIDETONE_BIQ_3STAGE_CFG_SIZE 30
1236
+
1237
+
/* DA7218_EVENT_STATUS = 0xEC */
1238
+
#define DA7218_HPLDET_JACK_STS_SHIFT 7
1239
+
#define DA7218_HPLDET_JACK_STS_MASK (0x1 << 7)
1240
+
1241
+
/* DA7218_EVENT = 0xED */
1242
+
#define DA7218_LVL_DET_EVENT_SHIFT 0
1243
+
#define DA7218_LVL_DET_EVENT_MASK (0x1 << 0)
1244
+
#define DA7218_HPLDET_JACK_EVENT_SHIFT 7
1245
+
#define DA7218_HPLDET_JACK_EVENT_MASK (0x1 << 7)
1246
+
1247
+
/* DA7218_EVENT_MASK = 0xEE */
1248
+
#define DA7218_LVL_DET_EVENT_MSK_SHIFT 0
1249
+
#define DA7218_LVL_DET_EVENT_MSK_MASK (0x1 << 0)
1250
+
#define DA7218_HPLDET_JACK_EVENT_IRQ_MSK_SHIFT 7
1251
+
#define DA7218_HPLDET_JACK_EVENT_IRQ_MSK_MASK (0x1 << 7)
1252
+
1253
+
/* DA7218_DMIC_1_CTRL = 0xF0 */
1254
+
#define DA7218_DMIC_1_DATA_SEL_SHIFT 0
1255
+
#define DA7218_DMIC_1_DATA_SEL_MASK (0x1 << 0)
1256
+
#define DA7218_DMIC_1_SAMPLEPHASE_SHIFT 1
1257
+
#define DA7218_DMIC_1_SAMPLEPHASE_MASK (0x1 << 1)
1258
+
#define DA7218_DMIC_1_CLK_RATE_SHIFT 2
1259
+
#define DA7218_DMIC_1_CLK_RATE_MASK (0x1 << 2)
1260
+
#define DA7218_DMIC_1L_EN_SHIFT 6
1261
+
#define DA7218_DMIC_1L_EN_MASK (0x1 << 6)
1262
+
#define DA7218_DMIC_1R_EN_SHIFT 7
1263
+
#define DA7218_DMIC_1R_EN_MASK (0x1 << 7)
1264
+
1265
+
/* DA7218_DMIC_2_CTRL = 0xF1 */
1266
+
#define DA7218_DMIC_2_DATA_SEL_SHIFT 0
1267
+
#define DA7218_DMIC_2_DATA_SEL_MASK (0x1 << 0)
1268
+
#define DA7218_DMIC_2_SAMPLEPHASE_SHIFT 1
1269
+
#define DA7218_DMIC_2_SAMPLEPHASE_MASK (0x1 << 1)
1270
+
#define DA7218_DMIC_2_CLK_RATE_SHIFT 2
1271
+
#define DA7218_DMIC_2_CLK_RATE_MASK (0x1 << 2)
1272
+
#define DA7218_DMIC_2L_EN_SHIFT 6
1273
+
#define DA7218_DMIC_2L_EN_MASK (0x1 << 6)
1274
+
#define DA7218_DMIC_2R_EN_SHIFT 7
1275
+
#define DA7218_DMIC_2R_EN_MASK (0x1 << 7)
1276
+
1277
+
/* DA7218_IN_1L_GAIN = 0xF4 */
1278
+
#define DA7218_IN_1L_DIGITAL_GAIN_SHIFT 0
1279
+
#define DA7218_IN_1L_DIGITAL_GAIN_MASK (0x7F << 0)
1280
+
#define DA7218_IN_DIGITAL_GAIN_MAX 0x7F
1281
+
1282
+
/* DA7218_IN_1R_GAIN = 0xF5 */
1283
+
#define DA7218_IN_1R_DIGITAL_GAIN_SHIFT 0
1284
+
#define DA7218_IN_1R_DIGITAL_GAIN_MASK (0x7F << 0)
1285
+
1286
+
/* DA7218_IN_2L_GAIN = 0xF6 */
1287
+
#define DA7218_IN_2L_DIGITAL_GAIN_SHIFT 0
1288
+
#define DA7218_IN_2L_DIGITAL_GAIN_MASK (0x7F << 0)
1289
+
1290
+
/* DA7218_IN_2R_GAIN = 0xF7 */
1291
+
#define DA7218_IN_2R_DIGITAL_GAIN_SHIFT 0
1292
+
#define DA7218_IN_2R_DIGITAL_GAIN_MASK (0x7F << 0)
1293
+
1294
+
/* DA7218_OUT_1L_GAIN = 0xF8 */
1295
+
#define DA7218_OUT_1L_DIGITAL_GAIN_SHIFT 0
1296
+
#define DA7218_OUT_1L_DIGITAL_GAIN_MASK (0xFF << 0)
1297
+
#define DA7218_OUT_DIGITAL_GAIN_MIN 0x0
1298
+
#define DA7218_OUT_DIGITAL_GAIN_MAX 0x97
1299
+
1300
+
/* DA7218_OUT_1R_GAIN = 0xF9 */
1301
+
#define DA7218_OUT_1R_DIGITAL_GAIN_SHIFT 0
1302
+
#define DA7218_OUT_1R_DIGITAL_GAIN_MASK (0xFF << 0)
1303
+
1304
+
/* DA7218_MICBIAS_CTRL = 0xFC */
1305
+
#define DA7218_MICBIAS_1_LEVEL_SHIFT 0
1306
+
#define DA7218_MICBIAS_1_LEVEL_MASK (0x7 << 0)
1307
+
#define DA7218_MICBIAS_1_LP_MODE_SHIFT 3
1308
+
#define DA7218_MICBIAS_1_LP_MODE_MASK (0x1 << 3)
1309
+
#define DA7218_MICBIAS_2_LEVEL_SHIFT 4
1310
+
#define DA7218_MICBIAS_2_LEVEL_MASK (0x7 << 4)
1311
+
#define DA7218_MICBIAS_2_LP_MODE_SHIFT 7
1312
+
#define DA7218_MICBIAS_2_LP_MODE_MASK (0x1 << 7)
1313
+
1314
+
/* DA7218_MICBIAS_EN = 0xFD */
1315
+
#define DA7218_MICBIAS_1_EN_SHIFT 0
1316
+
#define DA7218_MICBIAS_1_EN_MASK (0x1 << 0)
1317
+
#define DA7218_MICBIAS_2_EN_SHIFT 4
1318
+
#define DA7218_MICBIAS_2_EN_MASK (0x1 << 4)
1319
+
1320
+
1321
+
/*
1322
+
* General defines & data
1323
+
*/
1324
+
1325
+
/* Register inversion */
1326
+
#define DA7218_NO_INVERT 0
1327
+
#define DA7218_INVERT 1
1328
+
1329
+
/* Byte related defines */
1330
+
#define DA7218_BYTE_SHIFT 8
1331
+
#define DA7218_BYTE_MASK 0xFF
1332
+
#define DA7218_2BYTE_SHIFT 16
1333
+
#define DA7218_2BYTE_MASK 0xFFFF
1334
+
1335
+
/* PLL Output Frequencies */
1336
+
#define DA7218_PLL_FREQ_OUT_90316 90316800
1337
+
#define DA7218_PLL_FREQ_OUT_98304 98304000
1338
+
1339
+
/* ALC Calibration */
1340
+
#define DA7218_ALC_CALIB_DELAY_MIN 2500
1341
+
#define DA7218_ALC_CALIB_DELAY_MAX 5000
1342
+
#define DA7218_ALC_CALIB_MAX_TRIES 5
1343
+
1344
+
/* Ref Oscillator */
1345
+
#define DA7218_REF_OSC_CHECK_DELAY_MIN 5000
1346
+
#define DA7218_REF_OSC_CHECK_DELAY_MAX 10000
1347
+
#define DA7218_REF_OSC_CHECK_TRIES 4
1348
+
1349
+
/* SRM */
1350
+
#define DA7218_SRM_CHECK_DELAY 50
1351
+
#define DA7218_SRM_CHECK_TRIES 8
1352
+
1353
+
/* Mic Level Detect */
1354
+
#define DA7218_MIC_LVL_DET_DELAY 50
1355
+
1356
+
enum da7218_biq_cfg {
1357
+
DA7218_BIQ_CFG_DATA = 0,
1358
+
DA7218_BIQ_CFG_ADDR,
1359
+
DA7218_BIQ_CFG_SIZE,
1360
+
};
1361
+
1362
+
enum da7218_clk_src {
1363
+
DA7218_CLKSRC_MCLK = 0,
1364
+
DA7218_CLKSRC_MCLK_SQR,
1365
+
};
1366
+
1367
+
enum da7218_sys_clk {
1368
+
DA7218_SYSCLK_MCLK = 0,
1369
+
DA7218_SYSCLK_PLL,
1370
+
DA7218_SYSCLK_PLL_SRM,
1371
+
DA7218_SYSCLK_PLL_32KHZ
1372
+
};
1373
+
1374
+
enum da7218_dev_id {
1375
+
DA7217_DEV_ID = 0,
1376
+
DA7218_DEV_ID,
1377
+
};
1378
+
1379
+
/* Regulators */
1380
+
enum da7218_supplies {
1381
+
DA7218_SUPPLY_VDD = 0,
1382
+
DA7218_SUPPLY_VDDMIC,
1383
+
DA7218_SUPPLY_VDDIO,
1384
+
DA7218_NUM_SUPPLIES,
1385
+
};
1386
+
1387
+
/* Private data */
1388
+
struct da7218_priv {
1389
+
struct da7218_pdata *pdata;
1390
+
1391
+
struct regulator_bulk_data supplies[DA7218_NUM_SUPPLIES];
1392
+
struct regmap *regmap;
1393
+
int dev_id;
1394
+
1395
+
struct snd_soc_jack *jack;
1396
+
int irq;
1397
+
1398
+
struct clk *mclk;
1399
+
unsigned int mclk_rate;
1400
+
1401
+
bool hp_single_supply;
1402
+
bool master;
1403
+
u8 alc_en;
1404
+
u8 in_filt_en;
1405
+
u8 mic_lvl_det_en;
1406
+
1407
+
u8 biq_5stage_coeff[DA7218_OUT_1_BIQ_5STAGE_CFG_SIZE];
1408
+
u8 stbiq_3stage_coeff[DA7218_SIDETONE_BIQ_3STAGE_CFG_SIZE];
1409
+
};
1410
+
1411
+
/* HP detect control */
1412
+
int da7218_hpldet(struct snd_soc_codec *codec, struct snd_soc_jack *jack);
1413
+
1414
+
#endif /* _DA7218_H */