Merge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev

* 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev:
ahci: redo stopping DMA engines on empty ports
sata_sil24: fix kernel panic on ARM caused by unaligned access in sata_sil24
ahci: add pci quirk for JMB362
sata_via: explain the magic fix

+30 -27
+3 -18
drivers/ata/libahci.c
··· 541 541 return -EINVAL; 542 542 } 543 543 544 - static int ahci_is_device_present(void __iomem *port_mmio) 545 - { 546 - u8 status = readl(port_mmio + PORT_TFDATA) & 0xff; 547 - 548 - /* Make sure PxTFD.STS.BSY and PxTFD.STS.DRQ are 0 */ 549 - if (status & (ATA_BUSY | ATA_DRQ)) 550 - return 0; 551 - 552 - /* Make sure PxSSTS.DET is 3h */ 553 - status = readl(port_mmio + PORT_SCR_STAT) & 0xf; 554 - if (status != 3) 555 - return 0; 556 - return 1; 557 - } 558 - 559 544 void ahci_start_engine(struct ata_port *ap) 560 545 { 561 546 void __iomem *port_mmio = ahci_port_base(ap); 562 547 u32 tmp; 563 - 564 - if (!ahci_is_device_present(port_mmio)) 565 - return; 566 548 567 549 /* start DMA */ 568 550 tmp = readl(port_mmio + PORT_CMD); ··· 1874 1892 } 1875 1893 1876 1894 sata_pmp_error_handler(ap); 1895 + 1896 + if (!ata_dev_enabled(ap->link.device)) 1897 + ahci_stop_engine(ap); 1877 1898 } 1878 1899 1879 1900 static void ahci_post_internal_cmd(struct ata_queued_cmd *qc)
+6 -6
drivers/ata/sata_sil24.c
··· 539 539 writel(PORT_CS_IRQ_WOC, port + PORT_CTRL_CLR); 540 540 541 541 /* zero error counters. */ 542 - writel(0x8000, port + PORT_DECODE_ERR_THRESH); 543 - writel(0x8000, port + PORT_CRC_ERR_THRESH); 544 - writel(0x8000, port + PORT_HSHK_ERR_THRESH); 545 - writel(0x0000, port + PORT_DECODE_ERR_CNT); 546 - writel(0x0000, port + PORT_CRC_ERR_CNT); 547 - writel(0x0000, port + PORT_HSHK_ERR_CNT); 542 + writew(0x8000, port + PORT_DECODE_ERR_THRESH); 543 + writew(0x8000, port + PORT_CRC_ERR_THRESH); 544 + writew(0x8000, port + PORT_HSHK_ERR_THRESH); 545 + writew(0x0000, port + PORT_DECODE_ERR_CNT); 546 + writew(0x0000, port + PORT_CRC_ERR_CNT); 547 + writew(0x0000, port + PORT_HSHK_ERR_CNT); 548 548 549 549 /* always use 64bit activation */ 550 550 writel(PORT_CS_32BIT_ACTV, port + PORT_CTRL_CLR);
+16 -2
drivers/ata/sata_via.c
··· 578 578 579 579 /* 580 580 * vt6421 has problems talking to some drives. The following 581 - * is the magic fix from Joseph Chan <JosephChan@via.com.tw>. 582 - * Please add proper documentation if possible. 581 + * is the fix from Joseph Chan <JosephChan@via.com.tw>. 582 + * 583 + * When host issues HOLD, device may send up to 20DW of data 584 + * before acknowledging it with HOLDA and the host should be 585 + * able to buffer them in FIFO. Unfortunately, some WD drives 586 + * send upto 40DW before acknowledging HOLD and, in the 587 + * default configuration, this ends up overflowing vt6421's 588 + * FIFO, making the controller abort the transaction with 589 + * R_ERR. 590 + * 591 + * Rx52[2] is the internal 128DW FIFO Flow control watermark 592 + * adjusting mechanism enable bit and the default value 0 593 + * means host will issue HOLD to device when the left FIFO 594 + * size goes below 32DW. Setting it to 1 makes the watermark 595 + * 64DW. 583 596 * 584 597 * https://bugzilla.kernel.org/show_bug.cgi?id=15173 598 + * http://article.gmane.org/gmane.linux.ide/46352 585 599 */ 586 600 if (pdev->device == 0x3249) { 587 601 pci_read_config_byte(pdev, 0x52, &tmp8);
+4 -1
drivers/pci/quirks.c
··· 1457 1457 conf5 &= ~(1 << 24); /* Clear bit 24 */ 1458 1458 1459 1459 switch (pdev->device) { 1460 - case PCI_DEVICE_ID_JMICRON_JMB360: 1460 + case PCI_DEVICE_ID_JMICRON_JMB360: /* SATA single port */ 1461 + case PCI_DEVICE_ID_JMICRON_JMB362: /* SATA dual ports */ 1461 1462 /* The controller should be in single function ahci mode */ 1462 1463 conf1 |= 0x0002A100; /* Set 8, 13, 15, 17 */ 1463 1464 break; ··· 1494 1493 } 1495 1494 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB360, quirk_jmicron_ata); 1496 1495 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB361, quirk_jmicron_ata); 1496 + DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB362, quirk_jmicron_ata); 1497 1497 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB363, quirk_jmicron_ata); 1498 1498 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB365, quirk_jmicron_ata); 1499 1499 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB366, quirk_jmicron_ata); 1500 1500 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB368, quirk_jmicron_ata); 1501 1501 DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB360, quirk_jmicron_ata); 1502 1502 DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB361, quirk_jmicron_ata); 1503 + DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB362, quirk_jmicron_ata); 1503 1504 DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB363, quirk_jmicron_ata); 1504 1505 DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB365, quirk_jmicron_ata); 1505 1506 DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB366, quirk_jmicron_ata);
+1
include/linux/pci_ids.h
··· 2321 2321 #define PCI_VENDOR_ID_JMICRON 0x197B 2322 2322 #define PCI_DEVICE_ID_JMICRON_JMB360 0x2360 2323 2323 #define PCI_DEVICE_ID_JMICRON_JMB361 0x2361 2324 + #define PCI_DEVICE_ID_JMICRON_JMB362 0x2362 2324 2325 #define PCI_DEVICE_ID_JMICRON_JMB363 0x2363 2325 2326 #define PCI_DEVICE_ID_JMICRON_JMB365 0x2365 2326 2327 #define PCI_DEVICE_ID_JMICRON_JMB366 0x2366