Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

MIPS: AR7: Whitespace hacking

[Ralf: Fixed up reject and Wu's complaints about comment style.]

Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/921/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

authored by

Alexander Clouter and committed by
Ralf Baechle
4d1da8c2 10229f37

+386 -359
+3 -3
arch/mips/ar7/gpio.c
··· 24 24 #include <asm/mach-ar7/gpio.h> 25 25 26 26 struct ar7_gpio_chip { 27 - void __iomem *regs; 28 - struct gpio_chip chip; 27 + void __iomem *regs; 28 + struct gpio_chip chip; 29 29 }; 30 30 31 31 static int ar7_gpio_get_value(struct gpio_chip *chip, unsigned gpio) ··· 77 77 78 78 static struct ar7_gpio_chip ar7_gpio_chip = { 79 79 .chip = { 80 - .label = "ar7-gpio", 80 + .label = "ar7-gpio", 81 81 .direction_input = ar7_gpio_direction_input, 82 82 .direction_output = ar7_gpio_direction_output, 83 83 .set = ar7_gpio_set_value,
+1 -2
arch/mips/ar7/memory.c
··· 62 62 unsigned long pages; 63 63 64 64 pages = memsize() >> PAGE_SHIFT; 65 - add_memory_region(PHYS_OFFSET, pages << PAGE_SHIFT, 66 - BOOT_MEM_RAM); 65 + add_memory_region(PHYS_OFFSET, pages << PAGE_SHIFT, BOOT_MEM_RAM); 67 66 } 68 67 69 68 void __init prom_free_prom_memory(void)
+350 -323
arch/mips/ar7/platform.c
··· 42 42 #include <asm/mach-ar7/gpio.h> 43 43 #include <asm/mach-ar7/prom.h> 44 44 45 + /***************************************************************************** 46 + * VLYNQ Bus 47 + ****************************************************************************/ 45 48 struct plat_vlynq_data { 46 49 struct plat_vlynq_ops ops; 47 50 int gpio_bit; 48 51 int reset_bit; 49 52 }; 50 53 51 - 52 54 static int vlynq_on(struct vlynq_device *dev) 53 55 { 54 - int result; 56 + int ret; 55 57 struct plat_vlynq_data *pdata = dev->dev.platform_data; 56 58 57 - result = gpio_request(pdata->gpio_bit, "vlynq"); 58 - if (result) 59 + ret = gpio_request(pdata->gpio_bit, "vlynq"); 60 + if (ret) 59 61 goto out; 60 62 61 63 ar7_device_reset(pdata->reset_bit); 62 64 63 - result = ar7_gpio_disable(pdata->gpio_bit); 64 - if (result) 65 + ret = ar7_gpio_disable(pdata->gpio_bit); 66 + if (ret) 65 67 goto out_enabled; 66 68 67 - result = ar7_gpio_enable(pdata->gpio_bit); 68 - if (result) 69 + ret = ar7_gpio_enable(pdata->gpio_bit); 70 + if (ret) 69 71 goto out_enabled; 70 72 71 - result = gpio_direction_output(pdata->gpio_bit, 0); 72 - if (result) 73 + ret = gpio_direction_output(pdata->gpio_bit, 0); 74 + if (ret) 73 75 goto out_gpio_enabled; 74 76 75 77 msleep(50); 76 78 77 79 gpio_set_value(pdata->gpio_bit, 1); 80 + 78 81 msleep(50); 79 82 80 83 return 0; ··· 88 85 ar7_device_disable(pdata->reset_bit); 89 86 gpio_free(pdata->gpio_bit); 90 87 out: 91 - return result; 88 + return ret; 92 89 } 93 90 94 91 static void vlynq_off(struct vlynq_device *dev) 95 92 { 96 93 struct plat_vlynq_data *pdata = dev->dev.platform_data; 94 + 97 95 ar7_gpio_disable(pdata->gpio_bit); 98 96 gpio_free(pdata->gpio_bit); 99 97 ar7_device_disable(pdata->reset_bit); 100 98 } 101 99 102 - static struct resource physmap_flash_resource = { 103 - .name = "mem", 104 - .flags = IORESOURCE_MEM, 105 - .start = 0x10000000, 106 - .end = 0x107fffff, 107 - }; 108 - 109 - static struct resource cpmac_low_res[] = { 110 - { 111 - .name = "regs", 112 - .flags = IORESOURCE_MEM, 113 - .start = AR7_REGS_MAC0, 114 - .end = AR7_REGS_MAC0 + 0x7ff, 115 - }, 116 - { 117 - .name = "irq", 118 - .flags = IORESOURCE_IRQ, 119 - .start = 27, 120 - .end = 27, 121 - }, 122 - }; 123 - 124 - static struct resource cpmac_high_res[] = { 125 - { 126 - .name = "regs", 127 - .flags = IORESOURCE_MEM, 128 - .start = AR7_REGS_MAC1, 129 - .end = AR7_REGS_MAC1 + 0x7ff, 130 - }, 131 - { 132 - .name = "irq", 133 - .flags = IORESOURCE_IRQ, 134 - .start = 41, 135 - .end = 41, 136 - }, 137 - }; 138 - 139 100 static struct resource vlynq_low_res[] = { 140 101 { 141 - .name = "regs", 142 - .flags = IORESOURCE_MEM, 143 - .start = AR7_REGS_VLYNQ0, 144 - .end = AR7_REGS_VLYNQ0 + 0xff, 102 + .name = "regs", 103 + .flags = IORESOURCE_MEM, 104 + .start = AR7_REGS_VLYNQ0, 105 + .end = AR7_REGS_VLYNQ0 + 0xff, 145 106 }, 146 107 { 147 - .name = "irq", 148 - .flags = IORESOURCE_IRQ, 149 - .start = 29, 150 - .end = 29, 108 + .name = "irq", 109 + .flags = IORESOURCE_IRQ, 110 + .start = 29, 111 + .end = 29, 151 112 }, 152 113 { 153 - .name = "mem", 154 - .flags = IORESOURCE_MEM, 155 - .start = 0x04000000, 156 - .end = 0x04ffffff, 114 + .name = "mem", 115 + .flags = IORESOURCE_MEM, 116 + .start = 0x04000000, 117 + .end = 0x04ffffff, 157 118 }, 158 119 { 159 - .name = "devirq", 160 - .flags = IORESOURCE_IRQ, 161 - .start = 80, 162 - .end = 111, 120 + .name = "devirq", 121 + .flags = IORESOURCE_IRQ, 122 + .start = 80, 123 + .end = 111, 163 124 }, 164 125 }; 165 126 166 127 static struct resource vlynq_high_res[] = { 167 128 { 168 - .name = "regs", 169 - .flags = IORESOURCE_MEM, 170 - .start = AR7_REGS_VLYNQ1, 171 - .end = AR7_REGS_VLYNQ1 + 0xff, 129 + .name = "regs", 130 + .flags = IORESOURCE_MEM, 131 + .start = AR7_REGS_VLYNQ1, 132 + .end = AR7_REGS_VLYNQ1 + 0xff, 172 133 }, 173 134 { 174 - .name = "irq", 175 - .flags = IORESOURCE_IRQ, 176 - .start = 33, 177 - .end = 33, 135 + .name = "irq", 136 + .flags = IORESOURCE_IRQ, 137 + .start = 33, 138 + .end = 33, 178 139 }, 179 140 { 180 - .name = "mem", 181 - .flags = IORESOURCE_MEM, 182 - .start = 0x0c000000, 183 - .end = 0x0cffffff, 141 + .name = "mem", 142 + .flags = IORESOURCE_MEM, 143 + .start = 0x0c000000, 144 + .end = 0x0cffffff, 184 145 }, 185 146 { 186 - .name = "devirq", 187 - .flags = IORESOURCE_IRQ, 188 - .start = 112, 189 - .end = 143, 147 + .name = "devirq", 148 + .flags = IORESOURCE_IRQ, 149 + .start = 112, 150 + .end = 143, 190 151 }, 191 - }; 192 - 193 - static struct resource usb_res[] = { 194 - { 195 - .name = "regs", 196 - .flags = IORESOURCE_MEM, 197 - .start = AR7_REGS_USB, 198 - .end = AR7_REGS_USB + 0xff, 199 - }, 200 - { 201 - .name = "irq", 202 - .flags = IORESOURCE_IRQ, 203 - .start = 32, 204 - .end = 32, 205 - }, 206 - { 207 - .name = "mem", 208 - .flags = IORESOURCE_MEM, 209 - .start = 0x03400000, 210 - .end = 0x03401fff, 211 - }, 212 - }; 213 - 214 - static struct physmap_flash_data physmap_flash_data = { 215 - .width = 2, 216 - }; 217 - 218 - static struct fixed_phy_status fixed_phy_status __initdata = { 219 - .link = 1, 220 - .speed = 100, 221 - .duplex = 1, 222 - }; 223 - 224 - static struct plat_cpmac_data cpmac_low_data = { 225 - .reset_bit = 17, 226 - .power_bit = 20, 227 - .phy_mask = 0x80000000, 228 - }; 229 - 230 - static struct plat_cpmac_data cpmac_high_data = { 231 - .reset_bit = 21, 232 - .power_bit = 22, 233 - .phy_mask = 0x7fffffff, 234 152 }; 235 153 236 154 static struct plat_vlynq_data vlynq_low_data = { 237 - .ops.on = vlynq_on, 238 - .ops.off = vlynq_off, 239 - .reset_bit = 20, 240 - .gpio_bit = 18, 155 + .ops = { 156 + .on = vlynq_on, 157 + .off = vlynq_off, 158 + }, 159 + .reset_bit = 20, 160 + .gpio_bit = 18, 241 161 }; 242 162 243 163 static struct plat_vlynq_data vlynq_high_data = { 244 - .ops.on = vlynq_on, 245 - .ops.off = vlynq_off, 246 - .reset_bit = 16, 247 - .gpio_bit = 19, 248 - }; 249 - 250 - static struct platform_device physmap_flash = { 251 - .id = 0, 252 - .name = "physmap-flash", 253 - .dev.platform_data = &physmap_flash_data, 254 - .resource = &physmap_flash_resource, 255 - .num_resources = 1, 256 - }; 257 - 258 - static u64 cpmac_dma_mask = DMA_BIT_MASK(32); 259 - static struct platform_device cpmac_low = { 260 - .id = 0, 261 - .name = "cpmac", 262 - .dev = { 263 - .dma_mask = &cpmac_dma_mask, 264 - .coherent_dma_mask = DMA_BIT_MASK(32), 265 - .platform_data = &cpmac_low_data, 164 + .ops = { 165 + .on = vlynq_on, 166 + .off = vlynq_off, 266 167 }, 267 - .resource = cpmac_low_res, 268 - .num_resources = ARRAY_SIZE(cpmac_low_res), 269 - }; 270 - 271 - static struct platform_device cpmac_high = { 272 - .id = 1, 273 - .name = "cpmac", 274 - .dev = { 275 - .dma_mask = &cpmac_dma_mask, 276 - .coherent_dma_mask = DMA_BIT_MASK(32), 277 - .platform_data = &cpmac_high_data, 278 - }, 279 - .resource = cpmac_high_res, 280 - .num_resources = ARRAY_SIZE(cpmac_high_res), 168 + .reset_bit = 26, 169 + .gpio_bit = 19, 281 170 }; 282 171 283 172 static struct platform_device vlynq_low = { 284 - .id = 0, 285 - .name = "vlynq", 286 - .dev.platform_data = &vlynq_low_data, 287 - .resource = vlynq_low_res, 288 - .num_resources = ARRAY_SIZE(vlynq_low_res), 173 + .id = 0, 174 + .name = "vlynq", 175 + .dev = { 176 + .platform_data = &vlynq_low_data, 177 + }, 178 + .resource = vlynq_low_res, 179 + .num_resources = ARRAY_SIZE(vlynq_low_res), 289 180 }; 290 181 291 182 static struct platform_device vlynq_high = { 292 - .id = 1, 293 - .name = "vlynq", 294 - .dev.platform_data = &vlynq_high_data, 295 - .resource = vlynq_high_res, 296 - .num_resources = ARRAY_SIZE(vlynq_high_res), 297 - }; 298 - 299 - 300 - static struct gpio_led default_leds[] = { 301 - { 302 - .name = "status", 303 - .gpio = 8, 304 - .active_low = 1, 305 - }, 306 - }; 307 - 308 - static struct gpio_led dsl502t_leds[] = { 309 - { 310 - .name = "status", 311 - .gpio = 9, 312 - .active_low = 1, 313 - }, 314 - { 315 - .name = "ethernet", 316 - .gpio = 7, 317 - .active_low = 1, 318 - }, 319 - { 320 - .name = "usb", 321 - .gpio = 12, 322 - .active_low = 1, 323 - }, 324 - }; 325 - 326 - static struct gpio_led dg834g_leds[] = { 327 - { 328 - .name = "ppp", 329 - .gpio = 6, 330 - .active_low = 1, 331 - }, 332 - { 333 - .name = "status", 334 - .gpio = 7, 335 - .active_low = 1, 336 - }, 337 - { 338 - .name = "adsl", 339 - .gpio = 8, 340 - .active_low = 1, 341 - }, 342 - { 343 - .name = "wifi", 344 - .gpio = 12, 345 - .active_low = 1, 346 - }, 347 - { 348 - .name = "power", 349 - .gpio = 14, 350 - .active_low = 1, 351 - .default_trigger = "default-on", 352 - }, 353 - }; 354 - 355 - static struct gpio_led fb_sl_leds[] = { 356 - { 357 - .name = "1", 358 - .gpio = 7, 359 - }, 360 - { 361 - .name = "2", 362 - .gpio = 13, 363 - .active_low = 1, 364 - }, 365 - { 366 - .name = "3", 367 - .gpio = 10, 368 - .active_low = 1, 369 - }, 370 - { 371 - .name = "4", 372 - .gpio = 12, 373 - .active_low = 1, 374 - }, 375 - { 376 - .name = "5", 377 - .gpio = 9, 378 - .active_low = 1, 379 - }, 380 - }; 381 - 382 - static struct gpio_led fb_fon_leds[] = { 383 - { 384 - .name = "1", 385 - .gpio = 8, 386 - }, 387 - { 388 - .name = "2", 389 - .gpio = 3, 390 - .active_low = 1, 391 - }, 392 - { 393 - .name = "3", 394 - .gpio = 5, 395 - }, 396 - { 397 - .name = "4", 398 - .gpio = 4, 399 - .active_low = 1, 400 - }, 401 - { 402 - .name = "5", 403 - .gpio = 11, 404 - .active_low = 1, 405 - }, 406 - }; 407 - 408 - static struct gpio_led_platform_data ar7_led_data; 409 - 410 - static struct platform_device ar7_gpio_leds = { 411 - .name = "leds-gpio", 412 - .id = -1, 183 + .id = 1, 184 + .name = "vlynq", 413 185 .dev = { 414 - .platform_data = &ar7_led_data, 415 - } 186 + .platform_data = &vlynq_high_data, 187 + }, 188 + .resource = vlynq_high_res, 189 + .num_resources = ARRAY_SIZE(vlynq_high_res), 416 190 }; 417 191 418 - static struct platform_device ar7_udc = { 419 - .id = -1, 420 - .name = "ar7_udc", 421 - .resource = usb_res, 422 - .num_resources = ARRAY_SIZE(usb_res), 192 + /***************************************************************************** 193 + * Flash 194 + ****************************************************************************/ 195 + static struct resource physmap_flash_resource = { 196 + .name = "mem", 197 + .flags = IORESOURCE_MEM, 198 + .start = 0x10000000, 199 + .end = 0x107fffff, 423 200 }; 424 201 425 - static struct resource ar7_wdt_res = { 426 - .name = "regs", 427 - .start = -1, /* Filled at runtime */ 428 - .end = -1, /* Filled at runtime */ 429 - .flags = IORESOURCE_MEM, 202 + static struct physmap_flash_data physmap_flash_data = { 203 + .width = 2, 430 204 }; 431 205 432 - static struct platform_device ar7_wdt = { 433 - .id = -1, 434 - .name = "ar7_wdt", 435 - .resource = &ar7_wdt_res, 436 - .num_resources = 1, 206 + static struct platform_device physmap_flash = { 207 + .name = "physmap-flash", 208 + .dev = { 209 + .platform_data = &physmap_flash_data, 210 + }, 211 + .resource = &physmap_flash_resource, 212 + .num_resources = 1, 213 + }; 214 + 215 + /***************************************************************************** 216 + * Ethernet 217 + ****************************************************************************/ 218 + static struct resource cpmac_low_res[] = { 219 + { 220 + .name = "regs", 221 + .flags = IORESOURCE_MEM, 222 + .start = AR7_REGS_MAC0, 223 + .end = AR7_REGS_MAC0 + 0x7ff, 224 + }, 225 + { 226 + .name = "irq", 227 + .flags = IORESOURCE_IRQ, 228 + .start = 27, 229 + .end = 27, 230 + }, 231 + }; 232 + 233 + static struct resource cpmac_high_res[] = { 234 + { 235 + .name = "regs", 236 + .flags = IORESOURCE_MEM, 237 + .start = AR7_REGS_MAC1, 238 + .end = AR7_REGS_MAC1 + 0x7ff, 239 + }, 240 + { 241 + .name = "irq", 242 + .flags = IORESOURCE_IRQ, 243 + .start = 41, 244 + .end = 41, 245 + }, 246 + }; 247 + 248 + static struct fixed_phy_status fixed_phy_status __initdata = { 249 + .link = 1, 250 + .speed = 100, 251 + .duplex = 1, 252 + }; 253 + 254 + static struct plat_cpmac_data cpmac_low_data = { 255 + .reset_bit = 17, 256 + .power_bit = 20, 257 + .phy_mask = 0x80000000, 258 + }; 259 + 260 + static struct plat_cpmac_data cpmac_high_data = { 261 + .reset_bit = 21, 262 + .power_bit = 22, 263 + .phy_mask = 0x7fffffff, 264 + }; 265 + 266 + static u64 cpmac_dma_mask = DMA_BIT_MASK(32); 267 + 268 + static struct platform_device cpmac_low = { 269 + .id = 0, 270 + .name = "cpmac", 271 + .dev = { 272 + .dma_mask = &cpmac_dma_mask, 273 + .coherent_dma_mask = DMA_BIT_MASK(32), 274 + .platform_data = &cpmac_low_data, 275 + }, 276 + .resource = cpmac_low_res, 277 + .num_resources = ARRAY_SIZE(cpmac_low_res), 278 + }; 279 + 280 + static struct platform_device cpmac_high = { 281 + .id = 1, 282 + .name = "cpmac", 283 + .dev = { 284 + .dma_mask = &cpmac_dma_mask, 285 + .coherent_dma_mask = DMA_BIT_MASK(32), 286 + .platform_data = &cpmac_high_data, 287 + }, 288 + .resource = cpmac_high_res, 289 + .num_resources = ARRAY_SIZE(cpmac_high_res), 437 290 }; 438 291 439 292 static inline unsigned char char2hex(char h) ··· 328 469 char2hex(mac[i * 3 + 1]); 329 470 } 330 471 472 + /***************************************************************************** 473 + * USB 474 + ****************************************************************************/ 475 + static struct resource usb_res[] = { 476 + { 477 + .name = "regs", 478 + .flags = IORESOURCE_MEM, 479 + .start = AR7_REGS_USB, 480 + .end = AR7_REGS_USB + 0xff, 481 + }, 482 + { 483 + .name = "irq", 484 + .flags = IORESOURCE_IRQ, 485 + .start = 32, 486 + .end = 32, 487 + }, 488 + { 489 + .name = "mem", 490 + .flags = IORESOURCE_MEM, 491 + .start = 0x03400000, 492 + .end = 0x034001fff, 493 + }, 494 + }; 495 + 496 + static struct platform_device ar7_udc = { 497 + .name = "ar7_udc", 498 + .resource = usb_res, 499 + .num_resources = ARRAY_SIZE(usb_res), 500 + }; 501 + 502 + /***************************************************************************** 503 + * LEDs 504 + ****************************************************************************/ 505 + static struct gpio_led default_leds[] = { 506 + { 507 + .name = "status", 508 + .gpio = 8, 509 + .active_low = 1, 510 + }, 511 + }; 512 + 513 + static struct gpio_led dsl502t_leds[] = { 514 + { 515 + .name = "status", 516 + .gpio = 9, 517 + .active_low = 1, 518 + }, 519 + { 520 + .name = "ethernet", 521 + .gpio = 7, 522 + .active_low = 1, 523 + }, 524 + { 525 + .name = "usb", 526 + .gpio = 12, 527 + .active_low = 1, 528 + }, 529 + }; 530 + 531 + static struct gpio_led dg834g_leds[] = { 532 + { 533 + .name = "ppp", 534 + .gpio = 6, 535 + .active_low = 1, 536 + }, 537 + { 538 + .name = "status", 539 + .gpio = 7, 540 + .active_low = 1, 541 + }, 542 + { 543 + .name = "adsl", 544 + .gpio = 8, 545 + .active_low = 1, 546 + }, 547 + { 548 + .name = "wifi", 549 + .gpio = 12, 550 + .active_low = 1, 551 + }, 552 + { 553 + .name = "power", 554 + .gpio = 14, 555 + .active_low = 1, 556 + .default_trigger = "default-on", 557 + }, 558 + }; 559 + 560 + static struct gpio_led fb_sl_leds[] = { 561 + { 562 + .name = "1", 563 + .gpio = 7, 564 + }, 565 + { 566 + .name = "2", 567 + .gpio = 13, 568 + .active_low = 1, 569 + }, 570 + { 571 + .name = "3", 572 + .gpio = 10, 573 + .active_low = 1, 574 + }, 575 + { 576 + .name = "4", 577 + .gpio = 12, 578 + .active_low = 1, 579 + }, 580 + { 581 + .name = "5", 582 + .gpio = 9, 583 + .active_low = 1, 584 + }, 585 + }; 586 + 587 + static struct gpio_led fb_fon_leds[] = { 588 + { 589 + .name = "1", 590 + .gpio = 8, 591 + }, 592 + { 593 + .name = "2", 594 + .gpio = 3, 595 + .active_low = 1, 596 + }, 597 + { 598 + .name = "3", 599 + .gpio = 5, 600 + }, 601 + { 602 + .name = "4", 603 + .gpio = 4, 604 + .active_low = 1, 605 + }, 606 + { 607 + .name = "5", 608 + .gpio = 11, 609 + .active_low = 1, 610 + }, 611 + }; 612 + 613 + static struct gpio_led_platform_data ar7_led_data; 614 + 615 + static struct platform_device ar7_gpio_leds = { 616 + .name = "leds-gpio", 617 + .dev = { 618 + .platform_data = &ar7_led_data, 619 + } 620 + }; 621 + 331 622 static void __init detect_leds(void) 332 623 { 333 624 char *prid, *usb_prod; ··· 510 501 } 511 502 } 512 503 504 + /***************************************************************************** 505 + * Watchdog 506 + ****************************************************************************/ 507 + static struct resource ar7_wdt_res = { 508 + .name = "regs", 509 + .flags = IORESOURCE_MEM, 510 + .start = -1, /* Filled at runtime */ 511 + .end = -1, /* Filled at runtime */ 512 + }; 513 + 514 + static struct platform_device ar7_wdt = { 515 + .name = "ar7_wdt", 516 + .resource = &ar7_wdt_res, 517 + .num_resources = 1, 518 + }; 519 + 520 + /***************************************************************************** 521 + * Init 522 + ****************************************************************************/ 513 523 static int __init ar7_register_devices(void) 514 524 { 515 525 u16 chip_id; ··· 544 516 if (IS_ERR(bus_clk)) 545 517 panic("unable to get bus clk\n"); 546 518 547 - uart_port[0].type = PORT_16550A; 548 - uart_port[0].line = 0; 549 - uart_port[0].irq = AR7_IRQ_UART0; 550 - uart_port[0].uartclk = clk_get_rate(bus_clk) / 2; 551 - uart_port[0].iotype = UPIO_MEM32; 552 - uart_port[0].mapbase = AR7_REGS_UART0; 553 - uart_port[0].membase = ioremap(uart_port[0].mapbase, 256); 554 - uart_port[0].regshift = 2; 519 + uart_port[0].type = PORT_16550A; 520 + uart_port[0].line = 0; 521 + uart_port[0].irq = AR7_IRQ_UART0; 522 + uart_port[0].uartclk = clk_get_rate(bus_clk) / 2; 523 + uart_port[0].iotype = UPIO_MEM32; 524 + uart_port[0].mapbase = AR7_REGS_UART0; 525 + uart_port[0].membase = ioremap(uart_port[0].mapbase, 256); 526 + uart_port[0].regshift = 2; 555 527 res = early_serial_setup(&uart_port[0]); 556 528 if (res) 557 529 return res; 558 530 559 - 560 531 /* Only TNETD73xx have a second serial port */ 561 532 if (ar7_has_second_uart()) { 562 - uart_port[1].type = PORT_16550A; 563 - uart_port[1].line = 1; 564 - uart_port[1].irq = AR7_IRQ_UART1; 565 - uart_port[1].uartclk = clk_get_rate(bus_clk) / 2; 566 - uart_port[1].iotype = UPIO_MEM32; 567 - uart_port[1].mapbase = UR8_REGS_UART1; 568 - uart_port[1].membase = ioremap(uart_port[1].mapbase, 256); 569 - uart_port[1].regshift = 2; 533 + uart_port[1].type = PORT_16550A; 534 + uart_port[1].line = 1; 535 + uart_port[1].irq = AR7_IRQ_UART1; 536 + uart_port[1].uartclk = clk_get_rate(bus_clk) / 2; 537 + uart_port[1].iotype = UPIO_MEM32; 538 + uart_port[1].mapbase = UR8_REGS_UART1; 539 + uart_port[1].membase = ioremap(uart_port[1].mapbase, 256); 540 + uart_port[1].regshift = 2; 570 541 res = early_serial_setup(&uart_port[1]); 571 542 if (res) 572 543 return res;
+25 -23
arch/mips/ar7/prom.c
··· 32 32 #define MAX_ENTRY 80 33 33 34 34 struct env_var { 35 - char *name; 36 - char *value; 35 + char *name; 36 + char *value; 37 37 }; 38 38 39 39 static struct env_var adam2_env[MAX_ENTRY]; ··· 41 41 char *prom_getenv(const char *name) 42 42 { 43 43 int i; 44 + 44 45 for (i = 0; (i < MAX_ENTRY) && adam2_env[i].name; i++) 45 46 if (!strcmp(name, adam2_env[i].name)) 46 47 return adam2_env[i].value; ··· 62 61 } 63 62 64 63 struct psbl_rec { 65 - u32 psbl_size; 66 - u32 env_base; 67 - u32 env_size; 68 - u32 ffs_base; 69 - u32 ffs_size; 64 + u32 psbl_size; 65 + u32 env_base; 66 + u32 env_size; 67 + u32 ffs_base; 68 + u32 ffs_size; 70 69 }; 71 70 72 71 static __initdata char psp_env_version[] = "TIENV0.8"; 73 72 74 73 struct psp_env_chunk { 75 - u8 num; 76 - u8 ctrl; 77 - u16 csum; 78 - u8 len; 79 - char data[11]; 74 + u8 num; 75 + u8 ctrl; 76 + u16 csum; 77 + u8 len; 78 + char data[11]; 80 79 } __attribute__ ((packed)); 81 80 82 81 struct psp_var_map_entry { 83 - u8 num; 84 - char *value; 82 + u8 num; 83 + char *value; 85 84 }; 86 85 87 86 static struct psp_var_map_entry psp_var_map[] = { 88 - { 1, "cpufrequency" }, 89 - { 2, "memsize" }, 90 - { 3, "flashsize" }, 91 - { 4, "modetty0" }, 92 - { 5, "modetty1" }, 93 - { 8, "maca" }, 94 - { 9, "macb" }, 95 - { 28, "sysfrequency" }, 96 - { 38, "mipsfrequency" }, 87 + { 1, "cpufrequency" }, 88 + { 2, "memsize" }, 89 + { 3, "flashsize" }, 90 + { 4, "modetty0" }, 91 + { 5, "modetty1" }, 92 + { 8, "maca" }, 93 + { 9, "macb" }, 94 + { 28, "sysfrequency" }, 95 + { 38, "mipsfrequency" }, 97 96 }; 98 97 99 98 /* ··· 140 139 static void __init add_adam2_var(char *name, char *value) 141 140 { 142 141 int i; 142 + 143 143 for (i = 0; i < MAX_ENTRY; i++) { 144 144 if (!adam2_env[i].name) { 145 145 adam2_env[i].name = name;
+7 -8
arch/mips/ar7/setup.c
··· 26 26 27 27 static void ar7_machine_restart(char *command) 28 28 { 29 - u32 *softres_reg = ioremap(AR7_REGS_RESET + 30 - AR7_RESET_SOFTWARE, 1); 29 + u32 *softres_reg = ioremap(AR7_REGS_RESET + AR7_RESET_SOFTWARE, 1); 30 + 31 31 writel(1, softres_reg); 32 32 } 33 33 ··· 41 41 { 42 42 u32 *power_reg = (u32 *)ioremap(AR7_REGS_POWER, 1); 43 43 u32 power_state = readl(power_reg) | (3 << 30); 44 + 44 45 writel(power_state, power_reg); 45 46 ar7_machine_halt(); 46 47 } ··· 50 49 { 51 50 u16 chip_id = ar7_chip_id(); 52 51 switch (chip_id) { 53 - case AR7_CHIP_7300: 54 - return "TI AR7 (TNETD7300)"; 55 52 case AR7_CHIP_7100: 56 53 return "TI AR7 (TNETD7100)"; 57 54 case AR7_CHIP_7200: 58 55 return "TI AR7 (TNETD7200)"; 56 + case AR7_CHIP_7300: 57 + return "TI AR7 (TNETD7300)"; 59 58 default: 60 - return "TI AR7 (Unknown)"; 59 + return "TI AR7 (unknown)"; 61 60 } 62 61 } 63 62 ··· 71 70 * Initializes basic routines and structures pointers, memory size (as 72 71 * given by the bios and saves the command line. 73 72 */ 74 - 75 73 void __init plat_mem_setup(void) 76 74 { 77 75 unsigned long io_base; ··· 88 88 prom_meminit(); 89 89 90 90 printk(KERN_INFO "%s, ID: 0x%04x, Revision: 0x%02x\n", 91 - get_system_type(), 92 - ar7_chip_id(), ar7_chip_rev()); 91 + get_system_type(), ar7_chip_id(), ar7_chip_rev()); 93 92 }