Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm: Add 800x600 (SVGA) screen resolution to the built-in EDIDs

The 800x600 (SVGA) screen resolution was lacking in the set of
built-in selectable EDID screen resolutions that can be used to
repair misbehaving monitor firmware.

This patch adds the related data set and expands the documentation.
Note that the SVGA bit occupies a different byte to all the existing
users of the established timing bits forcing a rework of the
ESTABLISHED_TIMINGS_BITS macro.

Tested new EDID on an aged (and misbehaving) industrial LCD panel;
existing EDIDs still pass edid-decode's checksum checks.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Cc: Randy Dunlap <rdunlap@infradead.org>
Cc: David Airlie <airlied@linux.ie>
Cc: Carsten Emde <C.Emde@osadl.org>
Cc: linux-doc@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

authored by

Daniel Thompson and committed by
Dave Airlie
4cbe1bfa 9a6594fc

+81 -10
+1 -1
Documentation/EDID/1024x768.S
··· 36 36 #define DPI 72 37 37 #define VFREQ 60 /* Hz */ 38 38 #define TIMING_NAME "Linux XGA" 39 - #define ESTABLISHED_TIMINGS_BITS 0x08 /* Bit 3 -> 1024x768 @60 Hz */ 39 + #define ESTABLISHED_TIMING2_BITS 0x08 /* Bit 3 -> 1024x768 @60 Hz */ 40 40 #define HSYNC_POL 0 41 41 #define VSYNC_POL 0 42 42 #define CRC 0x55
+1 -1
Documentation/EDID/1280x1024.S
··· 36 36 #define DPI 72 37 37 #define VFREQ 60 /* Hz */ 38 38 #define TIMING_NAME "Linux SXGA" 39 - #define ESTABLISHED_TIMINGS_BITS 0x00 /* none */ 39 + /* No ESTABLISHED_TIMINGx_BITS */ 40 40 #define HSYNC_POL 1 41 41 #define VSYNC_POL 1 42 42 #define CRC 0xa0
+1 -1
Documentation/EDID/1600x1200.S
··· 36 36 #define DPI 72 37 37 #define VFREQ 60 /* Hz */ 38 38 #define TIMING_NAME "Linux UXGA" 39 - #define ESTABLISHED_TIMINGS_BITS 0x00 /* none */ 39 + /* No ESTABLISHED_TIMINGx_BITS */ 40 40 #define HSYNC_POL 1 41 41 #define VSYNC_POL 1 42 42 #define CRC 0x9d
+1 -1
Documentation/EDID/1680x1050.S
··· 36 36 #define DPI 96 37 37 #define VFREQ 60 /* Hz */ 38 38 #define TIMING_NAME "Linux WSXGA" 39 - #define ESTABLISHED_TIMINGS_BITS 0x00 /* none */ 39 + /* No ESTABLISHED_TIMINGx_BITS */ 40 40 #define HSYNC_POL 1 41 41 #define VSYNC_POL 1 42 42 #define CRC 0x26
+1 -1
Documentation/EDID/1920x1080.S
··· 36 36 #define DPI 96 37 37 #define VFREQ 60 /* Hz */ 38 38 #define TIMING_NAME "Linux FHD" 39 - #define ESTABLISHED_TIMINGS_BITS 0x00 /* none */ 39 + /* No ESTABLISHED_TIMINGx_BITS */ 40 40 #define HSYNC_POL 1 41 41 #define VSYNC_POL 1 42 42 #define CRC 0x05
+41
Documentation/EDID/800x600.S
··· 1 + /* 2 + 800x600.S: EDID data set for standard 800x600 60 Hz monitor 3 + 4 + Copyright (C) 2011 Carsten Emde <C.Emde@osadl.org> 5 + Copyright (C) 2014 Linaro Limited 6 + 7 + This program is free software; you can redistribute it and/or 8 + modify it under the terms of the GNU General Public License 9 + as published by the Free Software Foundation; either version 2 10 + of the License, or (at your option) any later version. 11 + 12 + This program is distributed in the hope that it will be useful, 13 + but WITHOUT ANY WARRANTY; without even the implied warranty of 14 + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 + GNU General Public License for more details. 16 + */ 17 + 18 + /* EDID */ 19 + #define VERSION 1 20 + #define REVISION 3 21 + 22 + /* Display */ 23 + #define CLOCK 40000 /* kHz */ 24 + #define XPIX 800 25 + #define YPIX 600 26 + #define XY_RATIO XY_RATIO_4_3 27 + #define XBLANK 256 28 + #define YBLANK 28 29 + #define XOFFSET 40 30 + #define XPULSE 128 31 + #define YOFFSET (63+1) 32 + #define YPULSE (63+4) 33 + #define DPI 72 34 + #define VFREQ 60 /* Hz */ 35 + #define TIMING_NAME "Linux SVGA" 36 + #define ESTABLISHED_TIMING1_BITS 0x01 /* Bit 0: 800x600 @ 60Hz */ 37 + #define HSYNC_POL 1 38 + #define VSYNC_POL 1 39 + #define CRC 0xc2 40 + 41 + #include "edid.S"
+1 -1
Documentation/EDID/HOWTO.txt
··· 18 18 individually prepared or corrected EDID data set in the /lib/firmware 19 19 directory from where it is loaded via the firmware interface. The code 20 20 (see drivers/gpu/drm/drm_edid_load.c) contains built-in data sets for 21 - commonly used screen resolutions (1024x768, 1280x1024, 1600x1200, 21 + commonly used screen resolutions (800x600, 1024x768, 1280x1024, 1600x1200, 22 22 1680x1050, 1920x1080) as binary blobs, but the kernel source tree does 23 23 not contain code to create these data. In order to elucidate the origin 24 24 of the built-in binary EDID blobs and to facilitate the creation of
+14 -3
Documentation/EDID/edid.S
··· 33 33 #define XY_RATIO_5_4 0b10 34 34 #define XY_RATIO_16_9 0b11 35 35 36 + /* Provide defaults for the timing bits */ 37 + #ifndef ESTABLISHED_TIMING1_BITS 38 + #define ESTABLISHED_TIMING1_BITS 0x00 39 + #endif 40 + #ifndef ESTABLISHED_TIMING2_BITS 41 + #define ESTABLISHED_TIMING2_BITS 0x00 42 + #endif 43 + #ifndef ESTABLISHED_TIMING3_BITS 44 + #define ESTABLISHED_TIMING3_BITS 0x00 45 + #endif 46 + 36 47 #define mfgname2id(v1,v2,v3) \ 37 48 ((((v1-'@')&0x1f)<<10)+(((v2-'@')&0x1f)<<5)+((v3-'@')&0x1f)) 38 49 #define swap16(v1) ((v1>>8)+((v1&0xff)<<8)) ··· 150 139 Bit 2 640x480 @ 75 Hz 151 140 Bit 1 800x600 @ 56 Hz 152 141 Bit 0 800x600 @ 60 Hz */ 153 - estbl_timing1: .byte 0x00 142 + estbl_timing1: .byte ESTABLISHED_TIMING1_BITS 154 143 155 144 /* Bit 7 800x600 @ 72 Hz 156 145 Bit 6 800x600 @ 75 Hz ··· 160 149 Bit 2 1024x768 @ 72 Hz 161 150 Bit 1 1024x768 @ 75 Hz 162 151 Bit 0 1280x1024 @ 75 Hz */ 163 - estbl_timing2: .byte ESTABLISHED_TIMINGS_BITS 152 + estbl_timing2: .byte ESTABLISHED_TIMING2_BITS 164 153 165 154 /* Bit 7 1152x870 @ 75 Hz (Apple Macintosh II) 166 155 Bits 6-0 Other manufacturer-specific display mod */ 167 - estbl_timing3: .byte 0x00 156 + estbl_timing3: .byte ESTABLISHED_TIMING3_BITS 168 157 169 158 /* Standard timing */ 170 159 /* X resolution, less 31, divided by 8 (256-2288 pixels) */
+20 -1
drivers/gpu/drm/drm_edid_load.c
··· 31 31 MODULE_PARM_DESC(edid_firmware, "Do not probe monitor, use specified EDID blob " 32 32 "from built-in data or /lib/firmware instead. "); 33 33 34 - #define GENERIC_EDIDS 5 34 + #define GENERIC_EDIDS 6 35 35 static const char *generic_edid_name[GENERIC_EDIDS] = { 36 + "edid/800x600.bin", 36 37 "edid/1024x768.bin", 37 38 "edid/1280x1024.bin", 38 39 "edid/1600x1200.bin", ··· 42 41 }; 43 42 44 43 static const u8 generic_edid[GENERIC_EDIDS][128] = { 44 + { 45 + 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 46 + 0x31, 0xd8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 47 + 0x05, 0x16, 0x01, 0x03, 0x6d, 0x1b, 0x14, 0x78, 48 + 0xea, 0x5e, 0xc0, 0xa4, 0x59, 0x4a, 0x98, 0x25, 49 + 0x20, 0x50, 0x54, 0x01, 0x00, 0x00, 0x45, 0x40, 50 + 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 51 + 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0xa0, 0x0f, 52 + 0x20, 0x00, 0x31, 0x58, 0x1c, 0x20, 0x28, 0x80, 53 + 0x14, 0x00, 0x15, 0xd0, 0x10, 0x00, 0x00, 0x1e, 54 + 0x00, 0x00, 0x00, 0xff, 0x00, 0x4c, 0x69, 0x6e, 55 + 0x75, 0x78, 0x20, 0x23, 0x30, 0x0a, 0x20, 0x20, 56 + 0x20, 0x20, 0x00, 0x00, 0x00, 0xfd, 0x00, 0x3b, 57 + 0x3d, 0x24, 0x26, 0x05, 0x00, 0x0a, 0x20, 0x20, 58 + 0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0xfc, 59 + 0x00, 0x4c, 0x69, 0x6e, 0x75, 0x78, 0x20, 0x53, 60 + 0x56, 0x47, 0x41, 0x0a, 0x20, 0x20, 0x00, 0xc2, 61 + }, 45 62 { 46 63 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 47 64 0x31, 0xd8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,