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ARM: dts: imx7: Use audio_mclk_post_div instead audio_mclk_root_clk

The audio_mclk_root_clk was added as a gate with the CCGR121 (0x4790),
but according to the reference manual, there is no such gate. Moreover,
the consumer driver of the mentioned clock might gate it and leave
the ECSPI2 (the true owner of that gate) hanging. So lets use the
audio_mclk_post_div, which is the parent.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

authored by

Abel Vesa and committed by
Shawn Guo 4cb7df64 e10d2b35

+12 -12
+2 -2
arch/arm/boot/dts/imx7-colibri.dtsi
··· 40 40 41 41 dailink_master: simple-audio-card,codec { 42 42 sound-dai = <&codec>; 43 - clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; 43 + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; 44 44 }; 45 45 }; 46 46 }; ··· 293 293 compatible = "fsl,sgtl5000"; 294 294 #sound-dai-cells = <0>; 295 295 reg = <0x0a>; 296 - clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; 296 + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; 297 297 pinctrl-names = "default"; 298 298 pinctrl-0 = <&pinctrl_sai1_mclk>; 299 299 VDDA-supply = <&reg_module_3v3_avdd>;
+1 -1
arch/arm/boot/dts/imx7-mba7.dtsi
··· 302 302 tlv320aic32x4: audio-codec@18 { 303 303 compatible = "ti,tlv320aic32x4"; 304 304 reg = <0x18>; 305 - clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; 305 + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; 306 306 clock-names = "mclk"; 307 307 ldoin-supply = <&reg_audio_3v3>; 308 308 iov-supply = <&reg_audio_3v3>;
+1 -1
arch/arm/boot/dts/imx7d-nitrogen7.dts
··· 288 288 codec: wm8960@1a { 289 289 compatible = "wlf,wm8960"; 290 290 reg = <0x1a>; 291 - clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; 291 + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; 292 292 clock-names = "mclk"; 293 293 wlf,shared-lrclk; 294 294 };
+2 -2
arch/arm/boot/dts/imx7d-pico-hobbit.dts
··· 31 31 32 32 dailink_master: simple-audio-card,codec { 33 33 sound-dai = <&sgtl5000>; 34 - clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; 34 + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; 35 35 }; 36 36 }; 37 37 }; ··· 41 41 #sound-dai-cells = <0>; 42 42 reg = <0x0a>; 43 43 compatible = "fsl,sgtl5000"; 44 - clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; 44 + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; 45 45 VDDA-supply = <&reg_2p5v>; 46 46 VDDIO-supply = <&reg_vref_1v8>; 47 47 };
+2 -2
arch/arm/boot/dts/imx7d-pico-pi.dts
··· 31 31 32 32 dailink_master: simple-audio-card,codec { 33 33 sound-dai = <&sgtl5000>; 34 - clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; 34 + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; 35 35 }; 36 36 }; 37 37 }; ··· 41 41 #sound-dai-cells = <0>; 42 42 reg = <0x0a>; 43 43 compatible = "fsl,sgtl5000"; 44 - clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; 44 + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; 45 45 VDDA-supply = <&reg_2p5v>; 46 46 VDDIO-supply = <&reg_vref_1v8>; 47 47 };
+2 -2
arch/arm/boot/dts/imx7d-sdb.dts
··· 385 385 codec: wm8960@1a { 386 386 compatible = "wlf,wm8960"; 387 387 reg = <0x1a>; 388 - clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; 388 + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; 389 389 clock-names = "mclk"; 390 390 wlf,shared-lrclk; 391 391 wlf,hp-cfg = <2 2 3>; 392 392 wlf,gpio-cfg = <1 3>; 393 393 assigned-clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_SRC>, 394 394 <&clks IMX7D_PLL_AUDIO_POST_DIV>, 395 - <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; 395 + <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; 396 396 assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>; 397 397 assigned-clock-rates = <0>, <884736000>, <12288000>; 398 398 };
+2 -2
arch/arm/boot/dts/imx7s-warp.dts
··· 75 75 76 76 dailink_master: simple-audio-card,codec { 77 77 sound-dai = <&codec>; 78 - clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; 78 + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; 79 79 }; 80 80 }; 81 81 }; ··· 232 232 #sound-dai-cells = <0>; 233 233 reg = <0x0a>; 234 234 compatible = "fsl,sgtl5000"; 235 - clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; 235 + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; 236 236 pinctrl-names = "default"; 237 237 pinctrl-0 = <&pinctrl_sai1_mclk>; 238 238 VDDA-supply = <&vgen4_reg>;