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ARM: dts: imx: Add dummy PHYs for HSIC-only USB controllers

Some SOCs in the i.MX6 family have a USB host controller that is
only capable of the HSIC interface and has no on-board PHY.

To be able to use these controllers, we need to add "usb-nop-xceiv"
dummy PHYs.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

authored by

Frieder Schrempf and committed by
Shawn Guo 4ca7dbdb 7cd1abb3

+27
+14
arch/arm/boot/dts/imx6qdl.dtsi
··· 140 140 interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>; 141 141 }; 142 142 143 + usbphynop1: usbphynop1 { 144 + compatible = "usb-nop-xceiv"; 145 + #phy-cells = <0>; 146 + }; 147 + 148 + usbphynop2: usbphynop2 { 149 + compatible = "usb-nop-xceiv"; 150 + #phy-cells = <0>; 151 + }; 152 + 143 153 soc { 144 154 #address-cells = <1>; 145 155 #size-cells = <1>; ··· 994 984 reg = <0x02184400 0x200>; 995 985 interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>; 996 986 clocks = <&clks IMX6QDL_CLK_USBOH3>; 987 + fsl,usbphy = <&usbphynop1>; 988 + phy_type = "hsic"; 997 989 fsl,usbmisc = <&usbmisc 2>; 998 990 dr_mode = "host"; 999 991 ahb-burst-config = <0x0>; ··· 1009 997 reg = <0x02184600 0x200>; 1010 998 interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>; 1011 999 clocks = <&clks IMX6QDL_CLK_USBOH3>; 1000 + fsl,usbphy = <&usbphynop2>; 1001 + phy_type = "hsic"; 1012 1002 fsl,usbmisc = <&usbmisc 3>; 1013 1003 dr_mode = "host"; 1014 1004 ahb-burst-config = <0x0>;
+7
arch/arm/boot/dts/imx6sl.dtsi
··· 110 110 interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>; 111 111 }; 112 112 113 + usbphynop1: usbphynop1 { 114 + compatible = "usb-nop-xceiv"; 115 + #phy-cells = <0>; 116 + }; 117 + 113 118 soc { 114 119 #address-cells = <1>; 115 120 #size-cells = <1>; ··· 819 814 reg = <0x02184400 0x200>; 820 815 interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>; 821 816 clocks = <&clks IMX6SL_CLK_USBOH3>; 817 + fsl,usbphy = <&usbphynop1>; 818 + phy_type = "hsic"; 822 819 fsl,usbmisc = <&usbmisc 2>; 823 820 dr_mode = "host"; 824 821 ahb-burst-config = <0x0>;
+6
arch/arm/boot/dts/imx6sx.dtsi
··· 159 159 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; 160 160 }; 161 161 162 + usbphynop1: usbphynop1 { 163 + compatible = "usb-nop-xceiv"; 164 + #phy-cells = <0>; 165 + }; 166 + 162 167 soc { 163 168 #address-cells = <1>; 164 169 #size-cells = <1>; ··· 882 877 reg = <0x02184400 0x200>; 883 878 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 884 879 clocks = <&clks IMX6SX_CLK_USBOH3>; 880 + fsl,usbphy = <&usbphynop1>; 885 881 fsl,usbmisc = <&usbmisc 2>; 886 882 phy_type = "hsic"; 887 883 fsl,anatop = <&anatop>;