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kernel os linux

dt-bindings: bus: imx-weim: document multiple address ranges per child node

The imx-weim driver was patched to allow correct WEIM configuration
when multiple address ranges are used in a child node.
Update the dt-bindings to reflect this.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sven Van Asbroeck <TheSven73@googlemail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

authored by

Sven Van Asbroeck and committed by
Shawn Guo
4c783b01 ae1d2add

+29 -3
+29 -3
Documentation/devicetree/bindings/bus/imx-weim.txt
··· 47 47 Timing property for child nodes. It is mandatory, not optional. 48 48 49 49 - fsl,weim-cs-timing: The timing array, contains timing values for the 50 - child node. We can get the CS index from the child 51 - node's "reg" property. The number of registers depends 52 - on the selected chip. 50 + child node. We get the CS indexes from the address 51 + ranges in the child node's "reg" property. 52 + The number of registers depends on the selected chip: 53 53 For i.MX1, i.MX21 ("fsl,imx1-weim") there are two 54 54 registers: CSxU, CSxL. 55 55 For i.MX25, i.MX27, i.MX31 and i.MX35 ("fsl,imx27-weim") ··· 78 78 bank-width = <2>; 79 79 fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000 80 80 0x0000c000 0x1404a38e 0x00000000>; 81 + }; 82 + }; 83 + 84 + Example for an imx6q-based board, a multi-chipselect device connected to WEIM: 85 + 86 + In this case, both chip select 0 and 1 will be configured with the same timing 87 + array values. 88 + 89 + weim: weim@21b8000 { 90 + compatible = "fsl,imx6q-weim"; 91 + reg = <0x021b8000 0x4000>; 92 + clocks = <&clks 196>; 93 + #address-cells = <2>; 94 + #size-cells = <1>; 95 + ranges = <0 0 0x08000000 0x02000000 96 + 1 0 0x0a000000 0x02000000 97 + 2 0 0x0c000000 0x02000000 98 + 3 0 0x0e000000 0x02000000>; 99 + fsl,weim-cs-gpr = <&gpr>; 100 + 101 + acme@0 { 102 + compatible = "acme,whatever"; 103 + reg = <0 0 0x100>, <0 0x400000 0x800>, 104 + <1 0x400000 0x800>; 105 + fsl,weim-cs-timing = <0x024400b1 0x00001010 0x20081100 106 + 0x00000000 0xa0000240 0x00000000>; 81 107 }; 82 108 };