Merge tag 'amlogic-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt

Amlogic 32-bit DT updates for v4.21
- support more timers on meson8
- add the stdout-path property on several boards

* tag 'amlogic-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson: add the clock inputs for the Meson timer
ARM: dts: meson: add the TIMER B/C/D interrupts
ARM: dts: meson: consistently disable pin bias
ARM: dts: meson8b: mxq: add the /chosen/stdout-path property
ARM: dts: meson8: minix-neo-x8: add the /chosen/stdout-path property
ARM: dts: meson6: atv1200: add the /chosen/stdout-path property
dt-bindings: timer: meson6_timer: document the clock inputs
dt-bindings: timer: meson6_timer: document all interrupts

Signed-off-by: Olof Johansson <[e-mail]>

Documentation/devicetree/bindings/timer/amlogic,meson6-timer.txt

···
 
 - compatible : should be "amlogic,meson6-timer"
 - reg : Specifies base physical address and size of the registers.
-- interrupts : The interrupt of the first timer
+- interrupts : The four interrupts, one for each timer event
+- clocks : phandles to the pclk (system clock) and XTAL clocks
+- clock-names : must contain "pclk" and "xtal"
 
 Example:
 
 timer@c1109940 {
 	compatible = "amlogic,meson6-timer";
 	reg = <0xc1109940 0x14>;
-	interrupts = <0 10 1>;
+	interrupts = <GIC_SPI 10 IRQ_TYPE_EDGE_RISING>,
+		     <GIC_SPI 11 IRQ_TYPE_EDGE_RISING>,
+		     <GIC_SPI 6 IRQ_TYPE_EDGE_RISING>,
+		     <GIC_SPI 29 IRQ_TYPE_EDGE_RISING>;
+	clocks = <&xtal>, <&clk81>;
+	clock-names = "xtal", "pclk";
 };

arch/arm/boot/dts/meson.dtsi

···
 				interrupts = <GIC_SPI 0 IRQ_TYPE_EDGE_RISING>;
 			};
 
-			timer@9940 {
+			timer_abcde: timer@9940 {
 				compatible = "amlogic,meson6-timer";
 				reg = <0x9940 0x18>;
-				interrupts = <GIC_SPI 10 IRQ_TYPE_EDGE_RISING>;
+				interrupts = <GIC_SPI 10 IRQ_TYPE_EDGE_RISING>,
+					     <GIC_SPI 11 IRQ_TYPE_EDGE_RISING>,
+					     <GIC_SPI 6 IRQ_TYPE_EDGE_RISING>,
+					     <GIC_SPI 29 IRQ_TYPE_EDGE_RISING>;
 			};
 		};
 

arch/arm/boot/dts/meson6-atv1200.dts

···
 		serial0 = &uart_AO;
 	};
 
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
 	memory {
 		reg = <0x40000000 0x80000000>;
 	};

arch/arm/boot/dts/meson6.dtsi

···
 	status = "disabled";
 };
 
+&timer_abcde {
+	clocks = <&xtal>, <&clk81>;
+	clock-names = "xtal", "pclk";
+};
+
 &uart_AO {
 	clocks = <&xtal>, <&clk81>, <&clk81>;
 	clock-names = "xtal", "pclk", "baud";

arch/arm/boot/dts/meson8-minix-neo-x8.dts

···
 		serial0 = &uart_AO;
 	};
 
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
 	memory {
 		reg = <0x40000000 0x80000000>;
 	};

arch/arm/boot/dts/meson8.dtsi

···
 			mux {
 				groups = "uart_tx_ao_a", "uart_rx_ao_a";
 				function = "uart_ao";
+				bias-disable;
 			};
 		};
 
···
 			mux {
 				groups = "i2c_mst_sck_ao", "i2c_mst_sda_ao";
 				function = "i2c_mst_ao";
+				bias-disable;
 			};
 		};
 
···
 			mux {
 				groups = "remote_input";
 				function = "remote";
+				bias-disable;
 			};
 		};
 
···
 			mux {
 				groups = "pwm_f_ao";
 				function = "pwm_f_ao";
+				bias-disable;
 			};
 		};
 	};
···
 				groups = "sd_d0_a", "sd_d1_a", "sd_d2_a",
 					"sd_d3_a", "sd_clk_a", "sd_cmd_a";
 				function = "sd_a";
+				bias-disable;
 			};
 		};
 
···
 				groups = "sd_d0_b", "sd_d1_b", "sd_d2_b",
 					"sd_d3_b", "sd_clk_b", "sd_cmd_b";
 				function = "sd_b";
+				bias-disable;
 			};
 		};
 
···
 				groups = "sd_d0_c", "sd_d1_c", "sd_d2_c",
 					"sd_d3_c", "sd_clk_c", "sd_cmd_c";
 				function = "sd_c";
+				bias-disable;
 			};
 		};
 
···
 			mux {
 				groups = "nor_d", "nor_q", "nor_c", "nor_cs";
 				function = "nor";
+				bias-disable;
 			};
 		};
 
···
 					 "eth_rxd1", "eth_rxd0", "eth_mdio",
 					 "eth_mdc";
 				function = "ethernet";
+				bias-disable;
 			};
 		};
 
···
 			mux {
 				groups = "pwm_e";
 				function = "pwm_e";
+				bias-disable;
 			};
 		};
 
···
 				groups = "uart_tx_a1",
 				       "uart_rx_a1";
 				function = "uart_a";
+				bias-disable;
 			};
 		};
 
···
 				groups = "uart_cts_a1",
 				       "uart_rts_a1";
 				function = "uart_a";
+				bias-disable;
 			};
 		};
 	};
···
 
 &spifc {
 	clocks = <&clkc CLKID_CLK81>;
+};
+
+&timer_abcde {
+	clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>;
+	clock-names = "xtal", "pclk";
 };
 
 &uart_AO {

arch/arm/boot/dts/meson8b-mxq.dts

···
 		serial0 = &uart_AO;
 	};
 
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
 	memory {
 		reg = <0x40000000 0x40000000>;
 	};

arch/arm/boot/dts/meson8b.dtsi

···
 			mux {
 				groups = "uart_tx_ao_a", "uart_rx_ao_a";
 				function = "uart_ao";
+				bias-disable;
 			};
 		};
 
···
 			mux {
 				groups = "remote_input";
 				function = "remote";
+				bias-disable;
 			};
 		};
 	};
···
 					 "eth_txd2",
 					 "eth_txd3";
 				function = "ethernet";
+				bias-disable;
 			};
 		};
 
···
 					 "eth_mdio_en",
 					 "eth_mdc";
 				function = "ethernet";
+				bias-disable;
 			};
 		};
 
···
 			mux {
 				groups = "i2c_sda_a", "i2c_sck_a";
 				function = "i2c_a";
+				bias-disable;
 			};
 		};
 
···
 				groups = "sd_d0_b", "sd_d1_b", "sd_d2_b",
 					"sd_d3_b", "sd_clk_b", "sd_cmd_b";
 				function = "sd_b";
+				bias-disable;
 			};
 		};
 
···
 			mux {
 				groups = "pwm_c1";
 				function = "pwm_c";
+				bias-disable;
 			};
 		};
 
···
 				groups = "uart_tx_b0",
 				       "uart_rx_b0";
 				function = "uart_b";
+				bias-disable;
 			};
 		};
 
···
 				groups = "uart_cts_b0",
 				       "uart_rts_b0";
 				function = "uart_b";
+				bias-disable;
 			};
 		};
 	};
···
 	compatible = "amlogic,meson8b-sdio", "amlogic,meson-mx-sdio";
 	clocks = <&clkc CLKID_SDIO>, <&clkc CLKID_CLK81>;
 	clock-names = "core", "clkin";
+};
+
+&timer_abcde {
+	clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>;
+	clock-names = "xtal", "pclk";
 };
 
 &uart_AO {

arch/arm/boot/dts/meson8m2.dtsi

···
 				 "eth_rxd1", "eth_rxd0",
 				 "eth_mdio", "eth_mdc";
 			function = "ethernet";
+			bias-disable;
 		};
 	};
 };