Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/amdgpu: create I2S platform devices for Jadeite platform

Jadeite platform uses I2S MICSP instance.
Create platform devices for DMA controller and I2S controller for
Jadeite platform.

Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Vijendar Mukunda and committed by
Alex Deucher
4c33e517 49062ee3

+186 -111
+186 -111
drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
··· 262 262 adev->acp.acp_genpd->adev = adev; 263 263 264 264 pm_genpd_init(&adev->acp.acp_genpd->gpd, NULL, false); 265 + dmi_check_system(acp_quirk_table); 266 + switch (acp_machine_id) { 267 + case ST_JADEITE: 268 + { 269 + adev->acp.acp_cell = kcalloc(2, sizeof(struct mfd_cell), 270 + GFP_KERNEL); 271 + if (!adev->acp.acp_cell) { 272 + r = -ENOMEM; 273 + goto failure; 274 + } 265 275 266 - adev->acp.acp_cell = kcalloc(ACP_DEVS, sizeof(struct mfd_cell), GFP_KERNEL); 276 + adev->acp.acp_res = kcalloc(3, sizeof(struct resource), GFP_KERNEL); 277 + if (!adev->acp.acp_res) { 278 + r = -ENOMEM; 279 + goto failure; 280 + } 267 281 268 - if (!adev->acp.acp_cell) { 269 - r = -ENOMEM; 270 - goto failure; 271 - } 282 + i2s_pdata = kcalloc(1, sizeof(struct i2s_platform_data), GFP_KERNEL); 283 + if (!i2s_pdata) { 284 + r = -ENOMEM; 285 + goto failure; 286 + } 272 287 273 - adev->acp.acp_res = kcalloc(5, sizeof(struct resource), GFP_KERNEL); 274 - if (!adev->acp.acp_res) { 275 - r = -ENOMEM; 276 - goto failure; 277 - } 278 - 279 - i2s_pdata = kcalloc(3, sizeof(struct i2s_platform_data), GFP_KERNEL); 280 - if (!i2s_pdata) { 281 - r = -ENOMEM; 282 - goto failure; 283 - } 284 - 285 - switch (adev->asic_type) { 286 - case CHIP_STONEY: 287 288 i2s_pdata[0].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET | 288 - DW_I2S_QUIRK_16BIT_IDX_OVERRIDE; 289 + DW_I2S_QUIRK_16BIT_IDX_OVERRIDE; 290 + i2s_pdata[0].cap = DWC_I2S_PLAY | DWC_I2S_RECORD; 291 + i2s_pdata[0].snd_rates = SNDRV_PCM_RATE_8000_96000; 292 + i2s_pdata[0].i2s_reg_comp1 = ACP_I2S_COMP1_CAP_REG_OFFSET; 293 + i2s_pdata[0].i2s_reg_comp2 = ACP_I2S_COMP2_CAP_REG_OFFSET; 294 + 295 + adev->acp.acp_res[0].name = "acp2x_dma"; 296 + adev->acp.acp_res[0].flags = IORESOURCE_MEM; 297 + adev->acp.acp_res[0].start = acp_base; 298 + adev->acp.acp_res[0].end = acp_base + ACP_DMA_REGS_END; 299 + 300 + adev->acp.acp_res[1].name = "acp2x_dw_i2s_play_cap"; 301 + adev->acp.acp_res[1].flags = IORESOURCE_MEM; 302 + adev->acp.acp_res[1].start = acp_base + ACP_I2S_CAP_REGS_START; 303 + adev->acp.acp_res[1].end = acp_base + ACP_I2S_CAP_REGS_END; 304 + 305 + adev->acp.acp_res[2].name = "acp2x_dma_irq"; 306 + adev->acp.acp_res[2].flags = IORESOURCE_IRQ; 307 + adev->acp.acp_res[2].start = amdgpu_irq_create_mapping(adev, 162); 308 + adev->acp.acp_res[2].end = adev->acp.acp_res[2].start; 309 + 310 + adev->acp.acp_cell[0].name = "acp_audio_dma"; 311 + adev->acp.acp_cell[0].num_resources = 3; 312 + adev->acp.acp_cell[0].resources = &adev->acp.acp_res[0]; 313 + adev->acp.acp_cell[0].platform_data = &adev->asic_type; 314 + adev->acp.acp_cell[0].pdata_size = sizeof(adev->asic_type); 315 + 316 + adev->acp.acp_cell[1].name = "designware-i2s"; 317 + adev->acp.acp_cell[1].num_resources = 1; 318 + adev->acp.acp_cell[1].resources = &adev->acp.acp_res[1]; 319 + adev->acp.acp_cell[1].platform_data = &i2s_pdata[0]; 320 + adev->acp.acp_cell[1].pdata_size = sizeof(struct i2s_platform_data); 321 + r = mfd_add_hotplug_devices(adev->acp.parent, adev->acp.acp_cell, 2); 322 + if (r) 323 + goto failure; 324 + r = device_for_each_child(adev->acp.parent, &adev->acp.acp_genpd->gpd, 325 + acp_genpd_add_device); 326 + if (r) 327 + goto failure; 289 328 break; 290 - default: 291 - i2s_pdata[0].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET; 292 329 } 293 - i2s_pdata[0].cap = DWC_I2S_PLAY; 294 - i2s_pdata[0].snd_rates = SNDRV_PCM_RATE_8000_96000; 295 - i2s_pdata[0].i2s_reg_comp1 = ACP_I2S_COMP1_PLAY_REG_OFFSET; 296 - i2s_pdata[0].i2s_reg_comp2 = ACP_I2S_COMP2_PLAY_REG_OFFSET; 297 - switch (adev->asic_type) { 298 - case CHIP_STONEY: 299 - i2s_pdata[1].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET | 300 - DW_I2S_QUIRK_COMP_PARAM1 | 301 - DW_I2S_QUIRK_16BIT_IDX_OVERRIDE; 302 - break; 303 330 default: 304 - i2s_pdata[1].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET | 305 - DW_I2S_QUIRK_COMP_PARAM1; 331 + adev->acp.acp_cell = kcalloc(ACP_DEVS, sizeof(struct mfd_cell), 332 + GFP_KERNEL); 333 + 334 + if (!adev->acp.acp_cell) { 335 + r = -ENOMEM; 336 + goto failure; 337 + } 338 + 339 + adev->acp.acp_res = kcalloc(5, sizeof(struct resource), GFP_KERNEL); 340 + if (!adev->acp.acp_res) { 341 + r = -ENOMEM; 342 + goto failure; 343 + } 344 + 345 + i2s_pdata = kcalloc(3, sizeof(struct i2s_platform_data), GFP_KERNEL); 346 + if (!i2s_pdata) { 347 + r = -ENOMEM; 348 + goto failure; 349 + } 350 + 351 + switch (adev->asic_type) { 352 + case CHIP_STONEY: 353 + i2s_pdata[0].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET | 354 + DW_I2S_QUIRK_16BIT_IDX_OVERRIDE; 355 + break; 356 + default: 357 + i2s_pdata[0].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET; 358 + } 359 + i2s_pdata[0].cap = DWC_I2S_PLAY; 360 + i2s_pdata[0].snd_rates = SNDRV_PCM_RATE_8000_96000; 361 + i2s_pdata[0].i2s_reg_comp1 = ACP_I2S_COMP1_PLAY_REG_OFFSET; 362 + i2s_pdata[0].i2s_reg_comp2 = ACP_I2S_COMP2_PLAY_REG_OFFSET; 363 + switch (adev->asic_type) { 364 + case CHIP_STONEY: 365 + i2s_pdata[1].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET | 366 + DW_I2S_QUIRK_COMP_PARAM1 | 367 + DW_I2S_QUIRK_16BIT_IDX_OVERRIDE; 368 + break; 369 + default: 370 + i2s_pdata[1].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET | 371 + DW_I2S_QUIRK_COMP_PARAM1; 372 + } 373 + 374 + i2s_pdata[1].cap = DWC_I2S_RECORD; 375 + i2s_pdata[1].snd_rates = SNDRV_PCM_RATE_8000_96000; 376 + i2s_pdata[1].i2s_reg_comp1 = ACP_I2S_COMP1_CAP_REG_OFFSET; 377 + i2s_pdata[1].i2s_reg_comp2 = ACP_I2S_COMP2_CAP_REG_OFFSET; 378 + 379 + i2s_pdata[2].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET; 380 + switch (adev->asic_type) { 381 + case CHIP_STONEY: 382 + i2s_pdata[2].quirks |= DW_I2S_QUIRK_16BIT_IDX_OVERRIDE; 383 + break; 384 + default: 385 + break; 386 + } 387 + 388 + i2s_pdata[2].cap = DWC_I2S_PLAY | DWC_I2S_RECORD; 389 + i2s_pdata[2].snd_rates = SNDRV_PCM_RATE_8000_96000; 390 + i2s_pdata[2].i2s_reg_comp1 = ACP_BT_COMP1_REG_OFFSET; 391 + i2s_pdata[2].i2s_reg_comp2 = ACP_BT_COMP2_REG_OFFSET; 392 + 393 + i2s_pdata[3].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET; 394 + switch (adev->asic_type) { 395 + case CHIP_STONEY: 396 + i2s_pdata[3].quirks |= DW_I2S_QUIRK_16BIT_IDX_OVERRIDE; 397 + break; 398 + default: 399 + break; 400 + } 401 + adev->acp.acp_res[0].name = "acp2x_dma"; 402 + adev->acp.acp_res[0].flags = IORESOURCE_MEM; 403 + adev->acp.acp_res[0].start = acp_base; 404 + adev->acp.acp_res[0].end = acp_base + ACP_DMA_REGS_END; 405 + 406 + adev->acp.acp_res[1].name = "acp2x_dw_i2s_play"; 407 + adev->acp.acp_res[1].flags = IORESOURCE_MEM; 408 + adev->acp.acp_res[1].start = acp_base + ACP_I2S_PLAY_REGS_START; 409 + adev->acp.acp_res[1].end = acp_base + ACP_I2S_PLAY_REGS_END; 410 + 411 + adev->acp.acp_res[2].name = "acp2x_dw_i2s_cap"; 412 + adev->acp.acp_res[2].flags = IORESOURCE_MEM; 413 + adev->acp.acp_res[2].start = acp_base + ACP_I2S_CAP_REGS_START; 414 + adev->acp.acp_res[2].end = acp_base + ACP_I2S_CAP_REGS_END; 415 + 416 + adev->acp.acp_res[3].name = "acp2x_dw_bt_i2s_play_cap"; 417 + adev->acp.acp_res[3].flags = IORESOURCE_MEM; 418 + adev->acp.acp_res[3].start = acp_base + ACP_BT_PLAY_REGS_START; 419 + adev->acp.acp_res[3].end = acp_base + ACP_BT_PLAY_REGS_END; 420 + 421 + adev->acp.acp_res[4].name = "acp2x_dma_irq"; 422 + adev->acp.acp_res[4].flags = IORESOURCE_IRQ; 423 + adev->acp.acp_res[4].start = amdgpu_irq_create_mapping(adev, 162); 424 + adev->acp.acp_res[4].end = adev->acp.acp_res[4].start; 425 + 426 + adev->acp.acp_cell[0].name = "acp_audio_dma"; 427 + adev->acp.acp_cell[0].num_resources = 5; 428 + adev->acp.acp_cell[0].resources = &adev->acp.acp_res[0]; 429 + adev->acp.acp_cell[0].platform_data = &adev->asic_type; 430 + adev->acp.acp_cell[0].pdata_size = sizeof(adev->asic_type); 431 + 432 + adev->acp.acp_cell[1].name = "designware-i2s"; 433 + adev->acp.acp_cell[1].num_resources = 1; 434 + adev->acp.acp_cell[1].resources = &adev->acp.acp_res[1]; 435 + adev->acp.acp_cell[1].platform_data = &i2s_pdata[0]; 436 + adev->acp.acp_cell[1].pdata_size = sizeof(struct i2s_platform_data); 437 + 438 + adev->acp.acp_cell[2].name = "designware-i2s"; 439 + adev->acp.acp_cell[2].num_resources = 1; 440 + adev->acp.acp_cell[2].resources = &adev->acp.acp_res[2]; 441 + adev->acp.acp_cell[2].platform_data = &i2s_pdata[1]; 442 + adev->acp.acp_cell[2].pdata_size = sizeof(struct i2s_platform_data); 443 + 444 + adev->acp.acp_cell[3].name = "designware-i2s"; 445 + adev->acp.acp_cell[3].num_resources = 1; 446 + adev->acp.acp_cell[3].resources = &adev->acp.acp_res[3]; 447 + adev->acp.acp_cell[3].platform_data = &i2s_pdata[2]; 448 + adev->acp.acp_cell[3].pdata_size = sizeof(struct i2s_platform_data); 449 + 450 + r = mfd_add_hotplug_devices(adev->acp.parent, adev->acp.acp_cell, ACP_DEVS); 451 + if (r) 452 + goto failure; 453 + 454 + r = device_for_each_child(adev->acp.parent, &adev->acp.acp_genpd->gpd, 455 + acp_genpd_add_device); 456 + if (r) 457 + goto failure; 306 458 } 307 - 308 - i2s_pdata[1].cap = DWC_I2S_RECORD; 309 - i2s_pdata[1].snd_rates = SNDRV_PCM_RATE_8000_96000; 310 - i2s_pdata[1].i2s_reg_comp1 = ACP_I2S_COMP1_CAP_REG_OFFSET; 311 - i2s_pdata[1].i2s_reg_comp2 = ACP_I2S_COMP2_CAP_REG_OFFSET; 312 - 313 - i2s_pdata[2].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET; 314 - switch (adev->asic_type) { 315 - case CHIP_STONEY: 316 - i2s_pdata[2].quirks |= DW_I2S_QUIRK_16BIT_IDX_OVERRIDE; 317 - break; 318 - default: 319 - break; 320 - } 321 - 322 - i2s_pdata[2].cap = DWC_I2S_PLAY | DWC_I2S_RECORD; 323 - i2s_pdata[2].snd_rates = SNDRV_PCM_RATE_8000_96000; 324 - i2s_pdata[2].i2s_reg_comp1 = ACP_BT_COMP1_REG_OFFSET; 325 - i2s_pdata[2].i2s_reg_comp2 = ACP_BT_COMP2_REG_OFFSET; 326 - 327 - adev->acp.acp_res[0].name = "acp2x_dma"; 328 - adev->acp.acp_res[0].flags = IORESOURCE_MEM; 329 - adev->acp.acp_res[0].start = acp_base; 330 - adev->acp.acp_res[0].end = acp_base + ACP_DMA_REGS_END; 331 - 332 - adev->acp.acp_res[1].name = "acp2x_dw_i2s_play"; 333 - adev->acp.acp_res[1].flags = IORESOURCE_MEM; 334 - adev->acp.acp_res[1].start = acp_base + ACP_I2S_PLAY_REGS_START; 335 - adev->acp.acp_res[1].end = acp_base + ACP_I2S_PLAY_REGS_END; 336 - 337 - adev->acp.acp_res[2].name = "acp2x_dw_i2s_cap"; 338 - adev->acp.acp_res[2].flags = IORESOURCE_MEM; 339 - adev->acp.acp_res[2].start = acp_base + ACP_I2S_CAP_REGS_START; 340 - adev->acp.acp_res[2].end = acp_base + ACP_I2S_CAP_REGS_END; 341 - 342 - adev->acp.acp_res[3].name = "acp2x_dw_bt_i2s_play_cap"; 343 - adev->acp.acp_res[3].flags = IORESOURCE_MEM; 344 - adev->acp.acp_res[3].start = acp_base + ACP_BT_PLAY_REGS_START; 345 - adev->acp.acp_res[3].end = acp_base + ACP_BT_PLAY_REGS_END; 346 - 347 - adev->acp.acp_res[4].name = "acp2x_dma_irq"; 348 - adev->acp.acp_res[4].flags = IORESOURCE_IRQ; 349 - adev->acp.acp_res[4].start = amdgpu_irq_create_mapping(adev, 162); 350 - adev->acp.acp_res[4].end = adev->acp.acp_res[4].start; 351 - 352 - adev->acp.acp_cell[0].name = "acp_audio_dma"; 353 - adev->acp.acp_cell[0].num_resources = 5; 354 - adev->acp.acp_cell[0].resources = &adev->acp.acp_res[0]; 355 - adev->acp.acp_cell[0].platform_data = &adev->asic_type; 356 - adev->acp.acp_cell[0].pdata_size = sizeof(adev->asic_type); 357 - 358 - adev->acp.acp_cell[1].name = "designware-i2s"; 359 - adev->acp.acp_cell[1].num_resources = 1; 360 - adev->acp.acp_cell[1].resources = &adev->acp.acp_res[1]; 361 - adev->acp.acp_cell[1].platform_data = &i2s_pdata[0]; 362 - adev->acp.acp_cell[1].pdata_size = sizeof(struct i2s_platform_data); 363 - 364 - adev->acp.acp_cell[2].name = "designware-i2s"; 365 - adev->acp.acp_cell[2].num_resources = 1; 366 - adev->acp.acp_cell[2].resources = &adev->acp.acp_res[2]; 367 - adev->acp.acp_cell[2].platform_data = &i2s_pdata[1]; 368 - adev->acp.acp_cell[2].pdata_size = sizeof(struct i2s_platform_data); 369 - 370 - adev->acp.acp_cell[3].name = "designware-i2s"; 371 - adev->acp.acp_cell[3].num_resources = 1; 372 - adev->acp.acp_cell[3].resources = &adev->acp.acp_res[3]; 373 - adev->acp.acp_cell[3].platform_data = &i2s_pdata[2]; 374 - adev->acp.acp_cell[3].pdata_size = sizeof(struct i2s_platform_data); 375 - 376 - r = mfd_add_hotplug_devices(adev->acp.parent, adev->acp.acp_cell, ACP_DEVS); 377 - if (r) 378 - goto failure; 379 - 380 - r = device_for_each_child(adev->acp.parent, &adev->acp.acp_genpd->gpd, 381 - acp_genpd_add_device); 382 - if (r) 383 - goto failure; 384 459 385 460 /* Assert Soft reset of ACP */ 386 461 val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET);