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ARM: dts: hisilicon: fix errors detected by spi-pl022.yaml
1. Change clock-names to "sspclk", "apb_pclk". Both of them use the same
clock.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
+6
-6
+6
-6
arch/arm/boot/dts/hi3519.dtsi
+6
-6
arch/arm/boot/dts/hi3519.dtsi
···
127
127
compatible = "arm,pl022", "arm,primecell";
128
128
reg = <0x12120000 0x1000>;
129
129
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
130
-
clocks = <&crg HI3519_SPI0_CLK>;
131
-
clock-names = "apb_pclk";
130
+
clocks = <&crg HI3519_SPI0_CLK>, <&crg HI3519_SPI0_CLK>;
131
+
clock-names = "sspclk", "apb_pclk";
132
132
num-cs = <1>;
133
133
#address-cells = <1>;
134
134
#size-cells = <0>;
···
139
139
compatible = "arm,pl022", "arm,primecell";
140
140
reg = <0x12121000 0x1000>;
141
141
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
142
-
clocks = <&crg HI3519_SPI1_CLK>;
143
-
clock-names = "apb_pclk";
142
+
clocks = <&crg HI3519_SPI1_CLK>, <&crg HI3519_SPI1_CLK>;
143
+
clock-names = "sspclk", "apb_pclk";
144
144
num-cs = <1>;
145
145
#address-cells = <1>;
146
146
#size-cells = <0>;
···
151
151
compatible = "arm,pl022", "arm,primecell";
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152
reg = <0x12122000 0x1000>;
153
153
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
154
-
clocks = <&crg HI3519_SPI2_CLK>;
155
-
clock-names = "apb_pclk";
154
+
clocks = <&crg HI3519_SPI2_CLK>, <&crg HI3519_SPI2_CLK>;
155
+
clock-names = "sspclk", "apb_pclk";
156
156
num-cs = <1>;
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157
#address-cells = <1>;
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158
#size-cells = <0>;