memory: samsung: exynos5422-dmc: Fix tFAW timings alignment

Aligning of tFAW timing with standard was using wrong argument as
minimum acceptable value. This could lead to wrong timing if provided
timings and clock period do not match the standard.

Fixes: 6e7674c3c6df ("memory: Add DMC driver for Exynos5422")
Cc: <[e-mail]>
Signed-off-by: Bernard Zhao <[e-mail]>
Reviewed-by: Lukasz Luba <[e-mail]>
Signed-off-by: Krzysztof Kozlowski <[e-mail]>

drivers/memory/samsung/exynos5422-dmc.c

···
 	/* power related timings */
 	val = dmc->timings->tFAW / clk_period_ps;
 	val += dmc->timings->tFAW % clk_period_ps ? 1 : 0;
-	val = max(val, dmc->min_tck->tXP);
+	val = max(val, dmc->min_tck->tFAW);
 	reg = &timing_power[0];
 	*reg_timing_power |= TIMING_VAL2REG(reg, val);