Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

[MIPS] Deforest the function pointer jungle in the time code.

Hard to follow who is pointing what to where and why so it's simply getting
in the way of the time code renovation.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

+115 -210
-2
arch/mips/au1000/common/setup.c
··· 50 50 extern void au1000_power_off(void); 51 51 extern void au1x_time_init(void); 52 52 extern void au1x_timer_setup(struct irqaction *irq); 53 - extern void au1xxx_time_init(void); 54 53 extern void set_cpuspec(void); 55 54 56 55 void __init plat_mem_setup(void) ··· 111 112 _machine_restart = au1000_restart; 112 113 _machine_halt = au1000_halt; 113 114 pm_power_off = au1000_power_off; 114 - board_time_init = au1xxx_time_init; 115 115 116 116 /* IO/MEM resources. */ 117 117 set_io_port_base(0);
-4
arch/mips/au1000/common/time.c
··· 329 329 330 330 #endif 331 331 } 332 - 333 - void __init au1xxx_time_init(void) 334 - { 335 - }
+1 -4
arch/mips/basler/excite/excite_setup.c
··· 68 68 int titan_irqflags; 69 69 70 70 71 - static void excite_timer_init(void) 71 + void __init plat_time_init(void) 72 72 { 73 73 const u32 modebit5 = ocd_readl(0x00e4); 74 74 unsigned int ··· 260 260 261 261 /* Announce RAM to system */ 262 262 add_memory_region(0x00000000, memsize, BOOT_MEM_RAM); 263 - 264 - /* Set up timer initialization hooks */ 265 - board_time_init = excite_timer_init; 266 263 267 264 /* Set up the peripheral address map */ 268 265 *(boot_ocd_base + (LKB9 / sizeof (u32))) = 0;
-1
arch/mips/bcm47xx/setup.c
··· 119 119 _machine_restart = bcm47xx_machine_restart; 120 120 _machine_halt = bcm47xx_machine_halt; 121 121 pm_power_off = bcm47xx_machine_halt; 122 - board_time_init = bcm47xx_time_init; 123 122 } 124 123
+1 -2
arch/mips/bcm47xx/time.c
··· 28 28 #include <asm/time.h> 29 29 #include <bcm47xx.h> 30 30 31 - void __init 32 - bcm47xx_time_init(void) 31 + void __init plat_time_init(void) 33 32 { 34 33 unsigned long hz; 35 34
-4
arch/mips/dec/setup.c
··· 145 145 } 146 146 } 147 147 148 - 149 - extern void dec_time_init(void); 150 - 151 148 void __init plat_mem_setup(void) 152 149 { 153 150 board_be_init = dec_be_init; 154 - board_time_init = dec_time_init; 155 151 156 152 wbflush_setup(); 157 153
+4 -8
arch/mips/dec/time.c
··· 35 35 #include <asm/dec/ioasic_addrs.h> 36 36 #include <asm/dec/machtype.h> 37 37 38 - static unsigned long dec_rtc_get_time(void) 38 + unsigned long read_persistent_clock(void) 39 39 { 40 40 unsigned int year, mon, day, hour, min, sec, real_year; 41 41 unsigned long flags; ··· 74 74 } 75 75 76 76 /* 77 - * In order to set the CMOS clock precisely, dec_rtc_set_mmss has to 77 + * In order to set the CMOS clock precisely, rtc_mips_set_mmss has to 78 78 * be called 500 ms after the second nowtime has started, because when 79 79 * nowtime is written into the registers of the CMOS clock, it will 80 80 * jump to the next second precisely 500 ms later. Check the Dallas 81 81 * DS1287 data sheet for details. 82 82 */ 83 - static int dec_rtc_set_mmss(unsigned long nowtime) 83 + int rtc_mips_set_mmss(unsigned long nowtime) 84 84 { 85 85 int retval = 0; 86 86 int real_seconds, real_minutes, cmos_minutes; ··· 139 139 return retval; 140 140 } 141 141 142 - 143 142 static int dec_timer_state(void) 144 143 { 145 144 return (CMOS_READ(RTC_REG_C) & RTC_PF) != 0; ··· 159 160 } 160 161 161 162 162 - void __init dec_time_init(void) 163 + void __init plat_time_init(void) 163 164 { 164 - rtc_mips_get_time = dec_rtc_get_time; 165 - rtc_mips_set_mmss = dec_rtc_set_mmss; 166 - 167 165 mips_timer_state = dec_timer_state; 168 166 mips_timer_ack = dec_timer_ack; 169 167
+1 -3
arch/mips/emma2rh/markeins/setup.c
··· 88 88 return clock[reg]; 89 89 } 90 90 91 - static void __init emma2rh_time_init(void) 91 + void __init plat_time_init(void) 92 92 { 93 93 u32 reg; 94 94 if (bus_frequency == 0) ··· 123 123 markeins_board_init(); 124 124 125 125 set_io_port_base(KSEG1ADDR(EMMA2RH_PCI_IO_BASE)); 126 - 127 - board_time_init = emma2rh_time_init; 128 126 129 127 _machine_restart = markeins_machine_restart; 130 128 _machine_halt = markeins_machine_halt;
-4
arch/mips/gt64120/wrppmc/setup.c
··· 126 126 127 127 void __init plat_mem_setup(void) 128 128 { 129 - extern void wrppmc_time_init(void); 130 129 extern void wrppmc_machine_restart(char *command); 131 130 extern void wrppmc_machine_halt(void); 132 131 extern void wrppmc_machine_power_off(void); ··· 133 134 _machine_restart = wrppmc_machine_restart; 134 135 _machine_halt = wrppmc_machine_halt; 135 136 pm_power_off = wrppmc_machine_power_off; 136 - 137 - /* Use MIPS Count/Compare Timer */ 138 - board_time_init = wrppmc_time_init; 139 137 140 138 /* This makes the operations of 'in/out[bwl]' to the 141 139 * physical address ( < KSEG0) can work via KSEG1
+1 -1
arch/mips/gt64120/wrppmc/time.c
··· 38 38 * NOTE: We disable all GT64120 timers, and use MIPS processor internal 39 39 * timer as the source of kernel clock tick. 40 40 */ 41 - void __init wrppmc_time_init(void) 41 + void __init plat_time_init(void) 42 42 { 43 43 /* Disable GT64120 timers */ 44 44 GT_WRITE(GT_TC_CONTROL_OFS, 0x00);
+1 -3
arch/mips/jmr3927/rbhma3100/setup.c
··· 109 109 jmr3927_tmrptr->tisr = 0; /* ack interrupt */ 110 110 } 111 111 112 - static void __init jmr3927_time_init(void) 112 + void __init plat_time_init(void) 113 113 { 114 114 clocksource_mips.read = jmr3927_hpt_read; 115 115 mips_timer_ack = jmr3927_timer_ack; ··· 140 140 char *argptr; 141 141 142 142 set_io_port_base(JMR3927_PORT_BASE + JMR3927_PCIIO); 143 - 144 - board_time_init = jmr3927_time_init; 145 143 146 144 _machine_restart = jmr3927_machine_restart; 147 145 _machine_halt = jmr3927_machine_halt;
+15 -32
arch/mips/kernel/time.c
··· 49 49 * forward reference 50 50 */ 51 51 DEFINE_SPINLOCK(rtc_lock); 52 + EXPORT_SYMBOL(rtc_lock); 52 53 53 - /* 54 - * By default we provide the null RTC ops 55 - */ 56 - static unsigned long null_rtc_get_time(void) 57 - { 58 - return mktime(2000, 1, 1, 0, 0, 0); 59 - } 60 - 61 - static int null_rtc_set_time(unsigned long sec) 54 + int __weak rtc_mips_set_time(unsigned long sec) 62 55 { 63 56 return 0; 64 57 } 58 + EXPORT_SYMBOL(rtc_mips_set_time); 65 59 66 - unsigned long (*rtc_mips_get_time)(void) = null_rtc_get_time; 67 - int (*rtc_mips_set_time)(unsigned long) = null_rtc_set_time; 68 - int (*rtc_mips_set_mmss)(unsigned long); 60 + int __weak rtc_mips_set_mmss(unsigned long nowtime) 61 + { 62 + return rtc_mips_set_time(nowtime); 63 + } 69 64 70 65 int update_persistent_clock(struct timespec now) 71 66 { ··· 242 247 /* 243 248 * time_init() - it does the following things. 244 249 * 245 - * 1) board_time_init() - 250 + * 1) plat_time_init() - 246 251 * a) (optional) set up RTC routines, 247 252 * b) (optional) calibrate and set the mips_hpt_frequency 248 253 * (only needed if you intended to use cpu counter as timer interrupt 249 254 * source) 250 - * 2) setup xtime based on rtc_mips_get_time(). 251 - * 3) calculate a couple of cached variables for later usage 252 - * 4) plat_timer_setup() - 255 + * 2) calculate a couple of cached variables for later usage 256 + * 3) plat_timer_setup() - 253 257 * a) (optional) over-write any choices made above by time_init(). 254 258 * b) machine specific code should setup the timer irqaction. 255 259 * c) enable the timer interrupt 256 260 */ 257 - 258 - void (*board_time_init)(void); 259 261 260 262 unsigned int mips_hpt_frequency; 261 263 ··· 333 341 clocksource_register(&clocksource_mips); 334 342 } 335 343 344 + void __init __weak plat_time_init(void) 345 + { 346 + } 347 + 336 348 void __init time_init(void) 337 349 { 338 - if (board_time_init) 339 - board_time_init(); 340 - 341 - if (!rtc_mips_set_mmss) 342 - rtc_mips_set_mmss = rtc_mips_set_time; 343 - 344 - xtime.tv_sec = rtc_mips_get_time(); 345 - xtime.tv_nsec = 0; 346 - 347 - set_normalized_timespec(&wall_to_monotonic, 348 - -xtime.tv_sec, -xtime.tv_nsec); 350 + plat_time_init(); 349 351 350 352 /* Choose appropriate high precision timer routines. */ 351 353 if (!cpu_has_counter && !clocksource_mips.read) ··· 445 459 tm->tm_wday = (gday + 4) % 7; /* 1970/1/1 was Thursday */ 446 460 } 447 461 448 - EXPORT_SYMBOL(rtc_lock); 449 462 EXPORT_SYMBOL(to_tm); 450 - EXPORT_SYMBOL(rtc_mips_set_time); 451 - EXPORT_SYMBOL(rtc_mips_get_time);
+3 -3
arch/mips/lasat/ds1603.c
··· 135 135 lasat_ndelay(1000); 136 136 } 137 137 138 - /* interface */ 139 - unsigned long ds1603_read(void) 138 + unsigned long read_persistent_clock(void) 140 139 { 141 140 unsigned long word; 142 141 unsigned long flags; ··· 146 147 word = rtc_read_word(); 147 148 rtc_end_op(); 148 149 spin_unlock_irqrestore(&rtc_lock, flags); 150 + 149 151 return word; 150 152 } 151 153 152 - int ds1603_set(unsigned long time) 154 + int rtc_mips_set_mmss(unsigned long time) 153 155 { 154 156 unsigned long flags; 155 157
-2
arch/mips/lasat/ds1603.h
··· 20 20 21 21 extern struct ds_defs *ds1603; 22 22 23 - unsigned long ds1603_read(void); 24 - int ds1603_set(unsigned long); 25 23 void ds1603_set_trimmer(unsigned int); 26 24 void ds1603_enable(void); 27 25 void ds1603_disable(void);
+1 -5
arch/mips/lasat/setup.c
··· 117 117 } 118 118 }; 119 119 120 - static void lasat_time_init(void) 120 + void plat_time_init(void) 121 121 { 122 122 mips_hpt_frequency = lasat_board_info.li_cpu_hz / 2; 123 123 } ··· 142 142 143 143 lasat_reboot_setup(); 144 144 145 - board_time_init = lasat_time_init; 146 - 147 145 #ifdef CONFIG_DS1603 148 146 ds1603 = &ds_defs[mips_machtype]; 149 - rtc_mips_get_time = ds1603_read; 150 - rtc_mips_set_time = ds1603_set; 151 147 #endif 152 148 153 149 #ifdef DYNAMIC_SERIAL_INIT
+6 -4
arch/mips/lasat/sysctl.c
··· 32 32 #include <linux/mutex.h> 33 33 #include <linux/uaccess.h> 34 34 35 + #include <asm/time.h> 36 + 35 37 #include "sysctl.h" 36 38 #include "ds1603.h" 37 39 ··· 108 106 109 107 mutex_lock(&lasat_info_mutex); 110 108 if (!write) { 111 - rtctmp = ds1603_read(); 109 + rtctmp = read_persistent_clock(); 112 110 /* check for time < 0 and set to 0 */ 113 111 if (rtctmp < 0) 114 112 rtctmp = 0; ··· 118 116 mutex_unlock(&lasat_info_mutex); 119 117 return r; 120 118 } 121 - ds1603_set(rtctmp); 119 + rtc_mips_set_mmss(rtctmp); 122 120 mutex_unlock(&lasat_info_mutex); 123 121 124 122 return 0; ··· 154 152 int r; 155 153 156 154 mutex_lock(&lasat_info_mutex); 157 - rtctmp = ds1603_read(); 155 + rtctmp = read_persistent_clock(); 158 156 if (rtctmp < 0) 159 157 rtctmp = 0; 160 158 r = sysctl_intvec(table, name, nlen, oldval, oldlenp, newval, newlen); ··· 163 161 return r; 164 162 } 165 163 if (newval && newlen) 166 - ds1603_set(rtctmp); 164 + rtc_mips_set_mmss(rtctmp); 167 165 mutex_unlock(&lasat_info_mutex); 168 166 169 167 return 1;
+2 -5
arch/mips/lemote/lm2e/setup.c
··· 58 58 setup_irq(MIPS_CPU_IRQ_BASE + 7, irq); 59 59 } 60 60 61 - static void __init loongson2e_time_init(void) 61 + void __init plat_time_init(void) 62 62 { 63 63 /* setup mips r4k timer */ 64 64 mips_hpt_frequency = cpu_clock_freq / 2; 65 65 } 66 66 67 - static unsigned long __init mips_rtc_get_time(void) 67 + unsigned long read_persistent_clock(void) 68 68 { 69 69 return mc146818_get_cmos_time(); 70 70 } ··· 88 88 set_io_port_base(PTR_PAD(0xbfd00000)); 89 89 90 90 mips_reboot_setup(); 91 - 92 - board_time_init = loongson2e_time_init; 93 - rtc_mips_get_time = mips_rtc_get_time; 94 91 95 92 __wbflush = wbflush_loongson2e; 96 93
-5
arch/mips/mips-boards/atlas/atlas_setup.c
··· 35 35 #include <asm/traps.h> 36 36 37 37 extern void mips_reboot_setup(void); 38 - extern void mips_time_init(void); 39 - extern unsigned long mips_rtc_get_time(void); 40 38 41 39 #ifdef CONFIG_KGDB 42 40 extern void kgdb_config(void); ··· 61 63 kgdb_config(); 62 64 #endif 63 65 mips_reboot_setup(); 64 - 65 - board_time_init = mips_time_init; 66 - rtc_mips_get_time = mips_rtc_get_time; 67 66 } 68 67 69 68 static void __init serial_init(void)
+2 -2
arch/mips/mips-boards/generic/time.c
··· 224 224 return count; 225 225 } 226 226 227 - unsigned long __init mips_rtc_get_time(void) 227 + unsigned long read_persistent_clock(void) 228 228 { 229 229 return mc146818_get_cmos_time(); 230 230 } 231 231 232 - void __init mips_time_init(void) 232 + void __init plat_time_init(void) 233 233 { 234 234 unsigned int est_freq; 235 235
-4
arch/mips/mips-boards/malta/malta_setup.c
··· 36 36 #endif 37 37 38 38 extern void mips_reboot_setup(void); 39 - extern void mips_time_init(void); 40 39 extern unsigned long mips_rtc_get_time(void); 41 40 42 41 #ifdef CONFIG_KGDB ··· 184 185 #endif 185 186 #endif 186 187 mips_reboot_setup(); 187 - 188 - board_time_init = mips_time_init; 189 - rtc_mips_get_time = mips_rtc_get_time; 190 188 }
-3
arch/mips/mips-boards/sead/sead_setup.c
··· 35 35 #include <asm/time.h> 36 36 37 37 extern void mips_reboot_setup(void); 38 - extern void mips_time_init(void); 39 38 40 39 static void __init serial_init(void); 41 40 ··· 50 51 ioport_resource.end = 0x7fffffff; 51 52 52 53 serial_init (); 53 - 54 - board_time_init = mips_time_init; 55 54 56 55 mips_reboot_setup(); 57 56 }
-2
arch/mips/mipssim/sim_setup.c
··· 36 36 #include <asm/mips-boards/simint.h> 37 37 38 38 39 - extern void sim_time_init(void); 40 39 static void __init serial_init(void); 41 40 unsigned int _isbonito = 0; 42 41 ··· 53 54 54 55 serial_init(); 55 56 56 - board_time_init = sim_time_init; 57 57 pr_info("Linux started...\n"); 58 58 59 59 #ifdef CONFIG_MIPS_MT_SMP
+1 -1
arch/mips/mipssim/sim_time.c
··· 146 146 return count; 147 147 } 148 148 149 - void __init sim_time_init(void) 149 + void __init plat_time_init(void) 150 150 { 151 151 unsigned int est_freq, flags; 152 152
-3
arch/mips/philips/pnx8550/common/setup.c
··· 47 47 extern void pnx8550_machine_power_off(void); 48 48 extern struct resource ioport_resource; 49 49 extern struct resource iomem_resource; 50 - extern void pnx8550_time_init(void); 51 50 extern void rs_kgdb_hook(int tty_no); 52 51 extern char *prom_getcmdline(void); 53 52 ··· 102 103 _machine_restart = pnx8550_machine_restart; 103 104 _machine_halt = pnx8550_machine_halt; 104 105 pm_power_off = pnx8550_machine_power_off; 105 - 106 - board_time_init = pnx8550_time_init; 107 106 108 107 /* Clear the Global 2 Register, PCI Inta Output Enable Registers 109 108 Bit 1:Enable DAC Powerdown
+4 -3
arch/mips/philips/pnx8550/common/time.c
··· 1 1 /* 2 2 * Copyright 2001, 2002, 2003 MontaVista Software Inc. 3 3 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net 4 + * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org) 4 5 * 5 6 * Common time service routines for MIPS machines. See 6 7 * Documents/MIPS/README.txt. ··· 47 46 } 48 47 49 48 /* 50 - * pnx8550_time_init() - it does the following things: 49 + * plat_time_init() - it does the following things: 51 50 * 52 - * 1) board_time_init() - 51 + * 1) plat_time_init() - 53 52 * a) (optional) set up RTC routines, 54 53 * b) (optional) calibrate and set the mips_hpt_frequency 55 54 * (only needed if you intended to use cpu counter as timer interrupt 56 55 * source) 57 56 */ 58 57 59 - void pnx8550_time_init(void) 58 + __init void plat_time_init(void) 60 59 { 61 60 unsigned int n; 62 61 unsigned int m;
-3
arch/mips/pmc-sierra/msp71xx/msp_setup.c
··· 25 25 #define MSP_BOARD_RESET_GPIO 9 26 26 #endif 27 27 28 - extern void msp_timer_init(void); 29 28 extern void msp_serial_setup(void); 30 29 extern void pmctwiled_setup(void); 31 30 ··· 148 149 _machine_restart = msp_restart; 149 150 _machine_halt = msp_halt; 150 151 pm_power_off = msp_power_off; 151 - 152 - board_time_init = msp_timer_init; 153 152 } 154 153 155 154 void __init prom_init(void)
+1 -2
arch/mips/pmc-sierra/msp71xx/msp_time.c
··· 36 36 #include <msp_int.h> 37 37 #include <msp_regs.h> 38 38 39 - void __init msp_timer_init(void) 39 + void __init plat_time_init(void) 40 40 { 41 41 char *endp, *s; 42 42 unsigned long cpu_rate = 0; ··· 80 80 /* timer frequency is 1/2 clock rate */ 81 81 mips_hpt_frequency = cpu_rate/2; 82 82 } 83 - 84 83 85 84 void __init plat_timer_setup(struct irqaction *irq) 86 85 {
+3 -15
arch/mips/pmc-sierra/yosemite/setup.c
··· 70 70 } 71 71 72 72 73 - unsigned long m48t37y_get_time(void) 73 + unsigned long read_persistent_clock(void) 74 74 { 75 75 unsigned int year, month, day, hour, min, sec; 76 76 unsigned long flags; ··· 95 95 return mktime(year, month, day, hour, min, sec); 96 96 } 97 97 98 - int m48t37y_set_time(unsigned long sec) 98 + int rtc_mips_set_time(unsigned long tim) 99 99 { 100 100 struct rtc_time tm; 101 101 unsigned long flags; ··· 138 138 setup_irq(7, irq); 139 139 } 140 140 141 - void yosemite_time_init(void) 141 + void __init plat_time_init(void) 142 142 { 143 143 mips_hpt_frequency = cpu_clock_freq / 2; 144 144 mips_hpt_frequency = 33000000 * 3 * 5; ··· 198 198 m48t37_base = ioremap(YOSEMITE_RTC_BASE, YOSEMITE_RTC_SIZE); 199 199 if (!m48t37_base) 200 200 printk(KERN_ERR "Mapping the RTC failed\n"); 201 - 202 - rtc_mips_get_time = m48t37y_get_time; 203 - rtc_mips_set_time = m48t37y_set_time; 204 - 205 - write_seqlock(&xtime_lock); 206 - xtime.tv_sec = m48t37y_get_time(); 207 - xtime.tv_nsec = 0; 208 - 209 - set_normalized_timespec(&wall_to_monotonic, 210 - -xtime.tv_sec, -xtime.tv_nsec); 211 - write_sequnlock(&xtime_lock); 212 201 } 213 202 214 203 /* Not only time init but that's what the hook it's called through is named */ ··· 210 221 211 222 void __init plat_mem_setup(void) 212 223 { 213 - board_time_init = yosemite_time_init; 214 224 late_time_init = py_late_time_init; 215 225 216 226 /* Add memory regions */
-2
arch/mips/sgi-ip22/ip22-setup.c
··· 51 51 EXPORT_SYMBOL(ip22_do_break); 52 52 53 53 extern void ip22_be_init(void) __init; 54 - extern void ip22_time_init(void) __init; 55 54 56 55 void __init plat_mem_setup(void) 57 56 { ··· 58 59 char *cserial; 59 60 60 61 board_be_init = ip22_be_init; 61 - ip22_time_init(); 62 62 63 63 /* Init the INDY HPC I/O controller. Need to call this before 64 64 * fucking with the memory controller because it needs to know the
+3 -12
arch/mips/sgi-ip22/ip22-time.c
··· 32 32 * note that mktime uses month from 1 to 12 while to_tm 33 33 * uses 0 to 11. 34 34 */ 35 - static unsigned long indy_rtc_get_time(void) 35 + unsigned long read_persistent_clock(void) 36 36 { 37 37 unsigned int yrs, mon, day, hrs, min, sec; 38 38 unsigned int save_control; ··· 60 60 return mktime(yrs + 1900, mon, day, hrs, min, sec); 61 61 } 62 62 63 - static int indy_rtc_set_time(unsigned long tim) 63 + int rtc_mips_set_time(unsigned long tim) 64 64 { 65 65 struct rtc_time tm; 66 66 unsigned int save_control; ··· 128 128 /* 129 129 * Here we need to calibrate the cycle counter to at least be close. 130 130 */ 131 - static __init void indy_time_init(void) 131 + __init void plat_time_init(void) 132 132 { 133 133 unsigned long r4k_ticks[3]; 134 134 unsigned long r4k_tick; ··· 206 206 207 207 /* setup irqaction */ 208 208 setup_irq(SGI_TIMER_IRQ, irq); 209 - } 210 - 211 - void __init ip22_time_init(void) 212 - { 213 - /* setup hookup functions */ 214 - rtc_mips_get_time = indy_rtc_get_time; 215 - rtc_mips_set_time = indy_rtc_set_time; 216 - 217 - board_time_init = indy_time_init; 218 209 }
-3
arch/mips/sgi-ip27/ip27-init.c
··· 194 194 ioc3->eier = 0; 195 195 } 196 196 197 - extern void ip27_time_init(void); 198 197 extern void ip27_reboot_setup(void); 199 198 200 199 void __init plat_mem_setup(void) ··· 240 241 per_cpu_init(); 241 242 242 243 set_io_port_base(IO_BASE); 243 - 244 - board_time_init = ip27_time_init; 245 244 }
+2 -4
arch/mips/sgi-ip27/ip27-timer.c
··· 123 123 #include <asm/sn/sn0/hubio.h> 124 124 #include <asm/pci/bridge.h> 125 125 126 - static __init unsigned long get_m48t35_time(void) 126 + unsigned long read_persistent_clock(void) 127 127 { 128 128 unsigned int year, month, date, hour, min, sec; 129 129 struct m48t35_rtc *rtc; ··· 205 205 return REMOTE_HUB_L(cputonasid(0), PI_RT_COUNT); 206 206 } 207 207 208 - void __init ip27_time_init(void) 208 + void __init plat_time_init(void) 209 209 { 210 210 clocksource_mips.read = ip27_hpt_read; 211 211 mips_hpt_frequency = CYCLES_PER_SEC; 212 - xtime.tv_sec = get_m48t35_time(); 213 - xtime.tv_nsec = 0; 214 212 } 215 213 216 214 void __init cpu_time_init(void)
+6 -6
arch/mips/sgi-ip32/ip32-setup.c
··· 62 62 } 63 63 #endif 64 64 65 + unsigned long read_persistent_clock(void) 66 + { 67 + return mc146818_get_cmos_time(); 68 + } 69 + 65 70 /* An arbitrary time; this can be decreased if reliability looks good */ 66 71 #define WAIT_MS 10 67 72 68 - void __init ip32_time_init(void) 73 + void __init plat_time_init(void) 69 74 { 70 75 printk(KERN_INFO "Calibrating system timer... "); 71 76 write_c0_count(0); ··· 89 84 void __init plat_mem_setup(void) 90 85 { 91 86 board_be_init = ip32_be_init; 92 - 93 - rtc_mips_get_time = mc146818_get_cmos_time; 94 - rtc_mips_set_mmss = mc146818_set_rtc_mmss; 95 - 96 - board_time_init = ip32_time_init; 97 87 98 88 #ifdef CONFIG_SGI_O2MACE_ETH 99 89 {
+43 -13
arch/mips/sibyte/swarm/setup.c
··· 69 69 return "SiByte " SIBYTE_BOARD_NAME; 70 70 } 71 71 72 - void __init swarm_time_init(void) 72 + void __init plat_time_init(void) 73 73 { 74 74 #if defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X) 75 75 /* Setup HPT */ ··· 104 104 return (is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL); 105 105 } 106 106 107 + enum swarm_rtc_type { 108 + RTC_NONE, 109 + RTC_XICOR, 110 + RTC_M4LT81 111 + }; 112 + 113 + enum swarm_rtc_type swarm_rtc_type; 114 + 115 + unsigned long read_persistent_clock(void) 116 + { 117 + switch (swarm_rtc_type) { 118 + case RTC_XICOR: 119 + return xicor_get_time(); 120 + 121 + case RTC_M4LT81: 122 + return m41t81_get_time(); 123 + 124 + case RTC_NONE: 125 + default: 126 + return mktime(2000, 1, 1, 0, 0, 0); 127 + } 128 + } 129 + 130 + int rtc_mips_set_time(unsigned long sec) 131 + { 132 + switch (swarm_rtc_type) { 133 + case RTC_XICOR: 134 + return xicor_set_time(sec); 135 + 136 + case RTC_M4LT81: 137 + return m41t81_set_time(sec); 138 + 139 + case RTC_NONE: 140 + default: 141 + return -1; 142 + } 143 + } 144 + 107 145 void __init plat_mem_setup(void) 108 146 { 109 147 #if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80) ··· 154 116 155 117 panic_timeout = 5; /* For debug. */ 156 118 157 - board_time_init = swarm_time_init; 158 119 board_be_handler = swarm_be_handler; 159 120 160 - if (xicor_probe()) { 161 - printk("swarm setup: Xicor 1241 RTC detected.\n"); 162 - rtc_mips_get_time = xicor_get_time; 163 - rtc_mips_set_time = xicor_set_time; 164 - } 165 - 166 - if (m41t81_probe()) { 167 - printk("swarm setup: M41T81 RTC detected.\n"); 168 - rtc_mips_get_time = m41t81_get_time; 169 - rtc_mips_set_time = m41t81_set_time; 170 - } 121 + if (xicor_probe()) 122 + swarm_rtc_type = RTC_XICOR; 123 + if (m41t81_probe()) 124 + swarm_rtc_type = RTC_M4LT81; 171 125 172 126 printk("This kernel optimized for " 173 127 #ifdef CONFIG_SIMULATION
-1
arch/mips/sni/pcimt.c
··· 313 313 { 314 314 sni_pcimt_detect(); 315 315 sni_pcimt_sc_init(); 316 - board_time_init = sni_cpu_time_init; 317 316 ioport_resource.end = sni_io_resource.end; 318 317 #ifdef CONFIG_PCI 319 318 PCIBIOS_MIN_IO = 0x9000;
-1
arch/mips/sni/pcit.c
··· 263 263 264 264 void __init sni_pcit_init(void) 265 265 { 266 - board_time_init = sni_cpu_time_init; 267 266 ioport_resource.end = sni_io_resource.end; 268 267 #ifdef CONFIG_PCI 269 268 PCIBIOS_MIN_IO = 0x9000;
-1
arch/mips/sni/rm200.c
··· 194 194 { 195 195 set_io_port_base(SNI_PORT_BASE + 0x02000000); 196 196 ioport_resource.end += 0x02000000; 197 - board_time_init = sni_cpu_time_init; 198 197 }
+7 -1
arch/mips/sni/time.c
··· 4 4 5 5 #include <asm/sni.h> 6 6 #include <asm/time.h> 7 + #include <asm-generic/rtc.h> 7 8 8 9 #define SNI_CLOCK_TICK_RATE 3686400 9 10 #define SNI_COUNTER2_DIV 64 ··· 72 71 /* 73 72 * Here we need to calibrate the cycle counter to at least be close. 74 73 */ 75 - __init void sni_cpu_time_init(void) 74 + void __init plat_time_init(void) 76 75 { 77 76 unsigned long r4k_ticks[3]; 78 77 unsigned long r4k_tick; ··· 146 145 sni_cpu_timer_setup (irq); 147 146 break; 148 147 } 148 + } 149 + 150 + unsigned long read_persistent_clock(void) 151 + { 152 + return -1; 149 153 }
+1 -8
arch/mips/tx4927/common/tx4927_setup.c
··· 49 49 50 50 #undef DEBUG 51 51 52 - void __init tx4927_time_init(void); 53 52 void dump_cp0(char *key); 54 53 55 54 56 55 void __init plat_mem_setup(void) 57 56 { 58 - board_time_init = tx4927_time_init; 59 - 60 57 #ifdef CONFIG_TOSHIBA_RBTX4927 61 58 { 62 59 extern void toshiba_rbtx4927_setup(void); ··· 62 65 #endif 63 66 } 64 67 65 - void __init tx4927_time_init(void) 68 + void __init plat_time_init(void) 66 69 { 67 - 68 70 #ifdef CONFIG_TOSHIBA_RBTX4927 69 71 { 70 72 extern void toshiba_rbtx4927_time_init(void); 71 73 toshiba_rbtx4927_time_init(); 72 74 } 73 75 #endif 74 - 75 - return; 76 76 } 77 - 78 77 79 78 void __init plat_timer_setup(struct irqaction *irq) 80 79 {
-9
arch/mips/tx4938/common/setup.c
··· 34 34 #include <asm/tx4938/rbtx4938.h> 35 35 36 36 extern void toshiba_rbtx4938_setup(void); 37 - extern void rbtx4938_time_init(void); 38 37 39 38 void __init tx4938_setup(void); 40 - void __init tx4938_time_init(void); 41 39 void dump_cp0(char *key); 42 40 43 41 void __init 44 42 plat_mem_setup(void) 45 43 { 46 - board_time_init = tx4938_time_init; 47 44 toshiba_rbtx4938_setup(); 48 - } 49 - 50 - void __init 51 - tx4938_time_init(void) 52 - { 53 - rbtx4938_time_init(); 54 45 } 55 46 56 47 void __init plat_timer_setup(struct irqaction *irq)
+1 -2
arch/mips/tx4938/toshiba_rbtx4938/setup.c
··· 39 39 #include <asm/tx4938/spi.h> 40 40 #include <asm/gpio.h> 41 41 42 - extern void rbtx4938_time_init(void) __init; 43 42 extern char * __init prom_getcmdline(void); 44 43 static inline void tx4938_report_pcic_status1(struct tx4938_pcic_reg *pcicptr); 45 44 ··· 855 856 /* We use onchip r4k counter or TMR timer as our system wide timer 856 857 * interrupt running at 100HZ. */ 857 858 858 - void __init rbtx4938_time_init(void) 859 + void __init plat_time_init(void) 859 860 { 860 861 mips_hpt_frequency = txx9_cpu_clock / 2; 861 862 }
+1 -7
arch/mips/vr41xx/common/init.c
··· 36 36 iomem_resource.end = IO_MEM_RESOURCE_END; 37 37 } 38 38 39 - static void __init setup_timer_frequency(void) 39 + void __init plat_time_init(void) 40 40 { 41 41 unsigned long tclock; 42 42 ··· 53 53 setup_irq(TIMER_IRQ, irq); 54 54 } 55 55 56 - static void __init timer_init(void) 57 - { 58 - board_time_init = setup_timer_frequency; 59 - } 60 - 61 56 void __init plat_mem_setup(void) 62 57 { 63 58 vr41xx_calculate_clock_frequency(); 64 59 65 - timer_init(); 66 60 iomem_resource_init(); 67 61 } 68 62
-2
include/asm-mips/mach-bcm47xx/bcm47xx.h
··· 22 22 /* SSB bus */ 23 23 extern struct ssb_bus ssb_bcm47xx; 24 24 25 - extern void bcm47xx_time_init(void); 26 - 27 25 #endif /* __ASM_BCM47XX_H */
+4 -8
include/asm-mips/time.h
··· 26 26 extern spinlock_t rtc_lock; 27 27 28 28 /* 29 - * RTC ops. By default, they point to no-RTC functions. 30 - * rtc_mips_get_time - mktime(year, mon, day, hour, min, sec) in seconds. 29 + * RTC ops. By default, they point to weak no-op RTC functions. 31 30 * rtc_mips_set_time - reverse the above translation and set time to RTC. 32 31 * rtc_mips_set_mmss - similar to rtc_set_time, but only min and sec need 33 32 * to be set. Used by RTC sync-up. 34 33 */ 35 - extern unsigned long (*rtc_mips_get_time)(void); 36 - extern int (*rtc_mips_set_time)(unsigned long); 37 - extern int (*rtc_mips_set_mmss)(unsigned long); 34 + extern int rtc_mips_set_time(unsigned long); 35 + extern int rtc_mips_set_mmss(unsigned long); 38 36 39 37 /* 40 38 * Timer interrupt functions. ··· 73 75 74 76 /* 75 77 * board specific routines required by time_init(). 76 - * board_time_init is defaulted to NULL and can remain so. 77 - * plat_timer_setup must be setup properly in machine setup routine. 78 78 */ 79 79 struct irqaction; 80 - extern void (*board_time_init)(void); 80 + extern void plat_time_init(void); 81 81 extern void plat_timer_setup(struct irqaction *irq); 82 82 83 83 /*