dt-bindings: clock: fu740-prci: add reset-cells

The SiFive FU740 Power Reset Clock Interrupt Controller is a reset line
provider so add respective reset-cells property to fix:

arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dt.yaml: clock-controller@10000000:
'#reset-cells' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <[e-mail]>
Link: https://lore.kernel.org/r/[e-mail]
Reviewed-by: Rob Herring <[e-mail]>
Acked-by: Palmer Dabbelt <[e-mail]>
Signed-off-by: Stephen Boyd <[e-mail]>

Documentation/devicetree/bindings/clock/sifive/fu740-prci.yaml

···
   "#clock-cells":
     const: 1
 
+  "#reset-cells":
+    const: 1
+
 required:
   - compatible
   - reg
···
       reg = <0x10000000 0x1000>;
       clocks = <&hfclk>, <&rtcclk>;
       #clock-cells = <1>;
+      #reset-cells = <1>;
     };