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dt-bindings: pinctrl: imx93: Add pinctrl binding

Add pinctrl binding doc for i.MX93

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220228010103.2725893-1-peng.fan@oss.nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

authored by

Peng Fan and committed by
Linus Walleij
4ad8b50d 7966c505

+85
+85
Documentation/devicetree/bindings/pinctrl/fsl,imx93-pinctrl.yaml
··· 1 + # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/pinctrl/fsl,imx93-pinctrl.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Freescale IMX93 IOMUX Controller 8 + 9 + maintainers: 10 + - Peng Fan <peng.fan@nxp.com> 11 + 12 + description: 13 + Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory 14 + for common binding part and usage. 15 + 16 + allOf: 17 + - $ref: "pinctrl.yaml#" 18 + 19 + properties: 20 + compatible: 21 + const: fsl,imx93-iomuxc 22 + 23 + reg: 24 + maxItems: 1 25 + 26 + # Client device subnode's properties 27 + patternProperties: 28 + 'grp$': 29 + type: object 30 + description: 31 + Pinctrl node's client devices use subnodes for desired pin configuration. 32 + Client device subnodes use below standard properties. 33 + 34 + properties: 35 + fsl,pins: 36 + description: 37 + each entry consists of 6 integers and represents the mux and config 38 + setting for one pin. The first 5 integers <mux_reg conf_reg input_reg 39 + mux_val input_val> are specified using a PIN_FUNC_ID macro, which can 40 + be found in <arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h>. The last 41 + integer CONFIG is the pad setting value like pull-up on this pin. Please 42 + refer to i.MX8M Plus Reference Manual for detailed CONFIG settings. 43 + $ref: /schemas/types.yaml#/definitions/uint32-matrix 44 + items: 45 + items: 46 + - description: | 47 + "mux_reg" indicates the offset of mux register. 48 + - description: | 49 + "conf_reg" indicates the offset of pad configuration register. 50 + - description: | 51 + "input_reg" indicates the offset of select input register. 52 + - description: | 53 + "mux_val" indicates the mux value to be applied. 54 + - description: | 55 + "input_val" indicates the select input value to be applied. 56 + - description: | 57 + "pad_setting" indicates the pad configuration value to be applied. 58 + 59 + 60 + required: 61 + - fsl,pins 62 + 63 + additionalProperties: false 64 + 65 + required: 66 + - compatible 67 + - reg 68 + 69 + additionalProperties: false 70 + 71 + examples: 72 + # Pinmux controller node 73 + - | 74 + iomuxc: pinctrl@443c0000 { 75 + compatible = "fsl,imx93-iomuxc"; 76 + reg = <0x30330000 0x10000>; 77 + 78 + pinctrl_uart3: uart3grp { 79 + fsl,pins = 80 + <0x48 0x1f8 0x41c 0x1 0x0 0x49>, 81 + <0x4c 0x1fc 0x418 0x1 0x0 0x49>; 82 + }; 83 + }; 84 + 85 + ...