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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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kernel
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linux
ASoC: atmel-classd: remove aclk clock
Since gclk (generated-clk) is now able to determine the rate of the
audio_pll, there is no need for classd to have a direct phandle to the
audio_pll while already having a phandle to gclk.
Thus, remove all mentions to aclk in classd driver and update macros and
variable names.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
authored by
Quentin Schulz
and committed by
Stephen Boyd
4ab6cf11
f8fef412
+14
-33
sound/soc/atmel/atmel-classd.c
+14
-33
sound/soc/atmel/atmel-classd.c
···
32
struct regmap *regmap;
33
struct clk *pclk;
34
struct clk *gclk;
35
-
struct clk *aclk;
36
int irq;
37
const struct atmel_classd_pdata *pdata;
38
};
···
329
{
330
struct snd_soc_pcm_runtime *rtd = substream->private_data;
331
struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
332
-
int ret;
333
-
334
-
ret = clk_prepare_enable(dd->aclk);
335
-
if (ret)
336
-
return ret;
337
338
return clk_prepare_enable(dd->gclk);
339
}
···
351
return 0;
352
}
353
354
-
#define CLASSD_ACLK_RATE_11M2896_MPY_8 (112896 * 100 * 8)
355
-
#define CLASSD_ACLK_RATE_12M288_MPY_8 (12288 * 1000 * 8)
356
357
static struct {
358
int rate;
359
int sample_rate;
360
int dsp_clk;
361
-
unsigned long aclk_rate;
362
} const sample_rates[] = {
363
{ 8000, CLASSD_INTPMR_FRAME_8K,
364
-
CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 },
365
{ 16000, CLASSD_INTPMR_FRAME_16K,
366
-
CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 },
367
{ 32000, CLASSD_INTPMR_FRAME_32K,
368
-
CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 },
369
{ 48000, CLASSD_INTPMR_FRAME_48K,
370
-
CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 },
371
{ 96000, CLASSD_INTPMR_FRAME_96K,
372
-
CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 },
373
{ 22050, CLASSD_INTPMR_FRAME_22K,
374
-
CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_ACLK_RATE_11M2896_MPY_8 },
375
{ 44100, CLASSD_INTPMR_FRAME_44K,
376
-
CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_ACLK_RATE_11M2896_MPY_8 },
377
{ 88200, CLASSD_INTPMR_FRAME_88K,
378
-
CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_ACLK_RATE_11M2896_MPY_8 },
379
};
380
381
static int
···
404
}
405
406
dev_dbg(codec->dev,
407
-
"Selected SAMPLE_RATE of %dHz, ACLK_RATE of %ldHz\n",
408
-
sample_rates[best].rate, sample_rates[best].aclk_rate);
409
410
clk_disable_unprepare(dd->gclk);
411
-
clk_disable_unprepare(dd->aclk);
412
413
-
ret = clk_set_rate(dd->aclk, sample_rates[best].aclk_rate);
414
if (ret)
415
return ret;
416
···
418
| (sample_rates[best].sample_rate << CLASSD_INTPMR_FRAME_SHIFT);
419
420
snd_soc_update_bits(codec, CLASSD_INTPMR, mask, val);
421
-
422
-
ret = clk_prepare_enable(dd->aclk);
423
-
if (ret)
424
-
return ret;
425
426
return clk_prepare_enable(dd->gclk);
427
}
···
430
struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
431
432
clk_disable_unprepare(dd->gclk);
433
-
clk_disable_unprepare(dd->aclk);
434
}
435
436
static int atmel_classd_codec_dai_prepare(struct snd_pcm_substream *substream,
···
581
if (IS_ERR(dd->gclk)) {
582
ret = PTR_ERR(dd->gclk);
583
dev_err(dev, "failed to get GCK clock: %d\n", ret);
584
-
return ret;
585
-
}
586
-
587
-
dd->aclk = devm_clk_get(dev, "aclk");
588
-
if (IS_ERR(dd->aclk)) {
589
-
ret = PTR_ERR(dd->aclk);
590
-
dev_err(dev, "failed to get audio clock: %d\n", ret);
591
return ret;
592
}
593
···
32
struct regmap *regmap;
33
struct clk *pclk;
34
struct clk *gclk;
35
int irq;
36
const struct atmel_classd_pdata *pdata;
37
};
···
330
{
331
struct snd_soc_pcm_runtime *rtd = substream->private_data;
332
struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
333
334
return clk_prepare_enable(dd->gclk);
335
}
···
357
return 0;
358
}
359
360
+
#define CLASSD_GCLK_RATE_11M2896_MPY_8 (112896 * 100 * 8)
361
+
#define CLASSD_GCLK_RATE_12M288_MPY_8 (12288 * 1000 * 8)
362
363
static struct {
364
int rate;
365
int sample_rate;
366
int dsp_clk;
367
+
unsigned long gclk_rate;
368
} const sample_rates[] = {
369
{ 8000, CLASSD_INTPMR_FRAME_8K,
370
+
CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
371
{ 16000, CLASSD_INTPMR_FRAME_16K,
372
+
CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
373
{ 32000, CLASSD_INTPMR_FRAME_32K,
374
+
CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
375
{ 48000, CLASSD_INTPMR_FRAME_48K,
376
+
CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
377
{ 96000, CLASSD_INTPMR_FRAME_96K,
378
+
CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
379
{ 22050, CLASSD_INTPMR_FRAME_22K,
380
+
CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 },
381
{ 44100, CLASSD_INTPMR_FRAME_44K,
382
+
CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 },
383
{ 88200, CLASSD_INTPMR_FRAME_88K,
384
+
CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 },
385
};
386
387
static int
···
410
}
411
412
dev_dbg(codec->dev,
413
+
"Selected SAMPLE_RATE of %dHz, GCLK_RATE of %ldHz\n",
414
+
sample_rates[best].rate, sample_rates[best].gclk_rate);
415
416
clk_disable_unprepare(dd->gclk);
417
418
+
ret = clk_set_rate(dd->gclk, sample_rates[best].gclk_rate);
419
if (ret)
420
return ret;
421
···
425
| (sample_rates[best].sample_rate << CLASSD_INTPMR_FRAME_SHIFT);
426
427
snd_soc_update_bits(codec, CLASSD_INTPMR, mask, val);
428
429
return clk_prepare_enable(dd->gclk);
430
}
···
441
struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
442
443
clk_disable_unprepare(dd->gclk);
444
}
445
446
static int atmel_classd_codec_dai_prepare(struct snd_pcm_substream *substream,
···
593
if (IS_ERR(dd->gclk)) {
594
ret = PTR_ERR(dd->gclk);
595
dev_err(dev, "failed to get GCK clock: %d\n", ret);
596
return ret;
597
}
598