Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6: (34 commits)
net: fix build erros with CONFIG_BUG=n, CONFIG_GENERIC_BUG=n
ipv6: skb_dst() can be NULL in ipv6_hop_jumbo().
tg3: Update copyright and driver version
tg3: Disable 5717 serdes and B0 support
tg3: Add reliable serdes detection for 5717 A0
tg3: Fix std rx prod ring handling
tg3: Fix std prod ring nicaddr for 5787 and 57765
sfc: Fix conditions for MDIO self-test
sfc: Fix polling for slow MCDI operations
e1000e: workaround link issues on busy hub in half duplex on 82577/82578
e1000e: MDIO slow mode should always be done for 82577
ixgbe: update copyright dates
ixgbe: Do not attempt to perform interrupts in netpoll when down
cfg80211: fix refcount imbalance when wext is disabled
mac80211: fix queue selection for data frames on monitor interfaces
iwlwifi: silence buffer overflow warning
iwlwifi: disable tx on beacon update notification
iwlwifi: fix iwl_queue_used bug when read_ptr == write_ptr
mac80211: fix endian error
mac80211: add missing sanity checks for action frames
...

+387 -211
-1
drivers/net/e1000e/e1000.h
··· 582 extern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data); 583 extern s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, 584 u16 data); 585 - extern s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow); 586 extern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw); 587 extern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw); 588 extern s32 e1000_check_polarity_82577(struct e1000_hw *hw);
··· 582 extern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data); 583 extern s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, 584 u16 data); 585 extern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw); 586 extern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw); 587 extern s32 e1000_check_polarity_82577(struct e1000_hw *hw);
+71 -5
drivers/net/e1000e/ich8lan.c
··· 138 #define E1000_NVM_K1_CONFIG 0x1B /* NVM K1 Config Word */ 139 #define E1000_NVM_K1_ENABLE 0x1 /* NVM Enable K1 bit */ 140 141 /* ICH GbE Flash Hardware Sequencing Flash Status Register bit breakdown */ 142 /* Offset 04h HSFSTS */ 143 union ich8_hws_flash_status { ··· 223 static void e1000_power_down_phy_copper_ich8lan(struct e1000_hw *hw); 224 static void e1000_lan_init_done_ich8lan(struct e1000_hw *hw); 225 static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link); 226 227 static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg) 228 { ··· 275 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; 276 277 phy->id = e1000_phy_unknown; 278 - e1000e_get_phy_id(hw); 279 phy->type = e1000e_get_phy_type_from_id(phy->id); 280 281 switch (phy->type) { ··· 311 break; 312 } 313 314 return ret_val; 315 } 316 ··· 1096 1097 1098 /** 1099 * e1000_hv_phy_workarounds_ich8lan - A series of Phy workarounds to be 1100 * done after every PHY reset. 1101 **/ 1102 static s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw) 1103 { 1104 s32 ret_val = 0; 1105 1106 if (hw->mac.type != e1000_pchlan) 1107 return ret_val; 1108 1109 if (((hw->phy.type == e1000_phy_82577) && 1110 ((hw->phy.revision == 1) || (hw->phy.revision == 2))) || ··· 1166 1167 hw->phy.addr = 1; 1168 ret_val = e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 0); 1169 if (ret_val) 1170 goto out; 1171 - hw->phy.ops.release(hw); 1172 1173 /* 1174 * Configure the K1 Si workaround during phy reset assuming there is 1175 * link so that it disables K1 if link is in 1Gbps. 1176 */ 1177 ret_val = e1000_k1_gig_workaround_hv(hw, true); 1178 1179 out: 1180 return ret_val; 1181 } ··· 1248 /* Allow time for h/w to get to a quiescent state after reset */ 1249 mdelay(10); 1250 1251 if (hw->mac.type == e1000_pchlan) { 1252 ret_val = e1000_hv_phy_workarounds_ich8lan(hw); 1253 if (ret_val) ··· 2549 if (!ret_val) 2550 e1000_release_swflag_ich8lan(hw); 2551 2552 if (ctrl & E1000_CTRL_PHY_RST) 2553 ret_val = hw->phy.ops.get_cfg_done(hw); 2554 ··· 2596 kab = er32(KABGTXD); 2597 kab |= E1000_KABGTXD_BGSQLBIAS; 2598 ew32(KABGTXD, kab); 2599 - 2600 - if (hw->mac.type == e1000_pchlan) 2601 - ret_val = e1000_hv_phy_workarounds_ich8lan(hw); 2602 2603 out: 2604 return ret_val;
··· 138 #define E1000_NVM_K1_CONFIG 0x1B /* NVM K1 Config Word */ 139 #define E1000_NVM_K1_ENABLE 0x1 /* NVM Enable K1 bit */ 140 141 + /* KMRN Mode Control */ 142 + #define HV_KMRN_MODE_CTRL PHY_REG(769, 16) 143 + #define HV_KMRN_MDIO_SLOW 0x0400 144 + 145 /* ICH GbE Flash Hardware Sequencing Flash Status Register bit breakdown */ 146 /* Offset 04h HSFSTS */ 147 union ich8_hws_flash_status { ··· 219 static void e1000_power_down_phy_copper_ich8lan(struct e1000_hw *hw); 220 static void e1000_lan_init_done_ich8lan(struct e1000_hw *hw); 221 static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link); 222 + static s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw); 223 224 static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg) 225 { ··· 270 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; 271 272 phy->id = e1000_phy_unknown; 273 + ret_val = e1000e_get_phy_id(hw); 274 + if (ret_val) 275 + goto out; 276 + if ((phy->id == 0) || (phy->id == PHY_REVISION_MASK)) { 277 + /* 278 + * In case the PHY needs to be in mdio slow mode (eg. 82577), 279 + * set slow mode and try to get the PHY id again. 280 + */ 281 + ret_val = e1000_set_mdio_slow_mode_hv(hw); 282 + if (ret_val) 283 + goto out; 284 + ret_val = e1000e_get_phy_id(hw); 285 + if (ret_val) 286 + goto out; 287 + } 288 phy->type = e1000e_get_phy_type_from_id(phy->id); 289 290 switch (phy->type) { ··· 292 break; 293 } 294 295 + out: 296 return ret_val; 297 } 298 ··· 1076 1077 1078 /** 1079 + * e1000_set_mdio_slow_mode_hv - Set slow MDIO access mode 1080 + * @hw: pointer to the HW structure 1081 + **/ 1082 + static s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw) 1083 + { 1084 + s32 ret_val; 1085 + u16 data; 1086 + 1087 + ret_val = e1e_rphy(hw, HV_KMRN_MODE_CTRL, &data); 1088 + if (ret_val) 1089 + return ret_val; 1090 + 1091 + data |= HV_KMRN_MDIO_SLOW; 1092 + 1093 + ret_val = e1e_wphy(hw, HV_KMRN_MODE_CTRL, data); 1094 + 1095 + return ret_val; 1096 + } 1097 + 1098 + /** 1099 * e1000_hv_phy_workarounds_ich8lan - A series of Phy workarounds to be 1100 * done after every PHY reset. 1101 **/ 1102 static s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw) 1103 { 1104 s32 ret_val = 0; 1105 + u16 phy_data; 1106 1107 if (hw->mac.type != e1000_pchlan) 1108 return ret_val; 1109 + 1110 + /* Set MDIO slow mode before any other MDIO access */ 1111 + if (hw->phy.type == e1000_phy_82577) { 1112 + ret_val = e1000_set_mdio_slow_mode_hv(hw); 1113 + if (ret_val) 1114 + goto out; 1115 + } 1116 1117 if (((hw->phy.type == e1000_phy_82577) && 1118 ((hw->phy.revision == 1) || (hw->phy.revision == 2))) || ··· 1118 1119 hw->phy.addr = 1; 1120 ret_val = e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 0); 1121 + hw->phy.ops.release(hw); 1122 if (ret_val) 1123 goto out; 1124 1125 /* 1126 * Configure the K1 Si workaround during phy reset assuming there is 1127 * link so that it disables K1 if link is in 1Gbps. 1128 */ 1129 ret_val = e1000_k1_gig_workaround_hv(hw, true); 1130 + if (ret_val) 1131 + goto out; 1132 1133 + /* Workaround for link disconnects on a busy hub in half duplex */ 1134 + ret_val = hw->phy.ops.acquire(hw); 1135 + if (ret_val) 1136 + goto out; 1137 + ret_val = hw->phy.ops.read_reg_locked(hw, 1138 + PHY_REG(BM_PORT_CTRL_PAGE, 17), 1139 + &phy_data); 1140 + if (ret_val) 1141 + goto release; 1142 + ret_val = hw->phy.ops.write_reg_locked(hw, 1143 + PHY_REG(BM_PORT_CTRL_PAGE, 17), 1144 + phy_data & 0x00FF); 1145 + release: 1146 + hw->phy.ops.release(hw); 1147 out: 1148 return ret_val; 1149 } ··· 1184 /* Allow time for h/w to get to a quiescent state after reset */ 1185 mdelay(10); 1186 1187 + /* Perform any necessary post-reset workarounds */ 1188 if (hw->mac.type == e1000_pchlan) { 1189 ret_val = e1000_hv_phy_workarounds_ich8lan(hw); 1190 if (ret_val) ··· 2484 if (!ret_val) 2485 e1000_release_swflag_ich8lan(hw); 2486 2487 + /* Perform any necessary post-reset workarounds */ 2488 + if (hw->mac.type == e1000_pchlan) 2489 + ret_val = e1000_hv_phy_workarounds_ich8lan(hw); 2490 + 2491 if (ctrl & E1000_CTRL_PHY_RST) 2492 ret_val = hw->phy.ops.get_cfg_done(hw); 2493 ··· 2527 kab = er32(KABGTXD); 2528 kab |= E1000_KABGTXD_BGSQLBIAS; 2529 ew32(KABGTXD, kab); 2530 2531 out: 2532 return ret_val;
-85
drivers/net/e1000e/phy.c
··· 152 if (phy->id != 0 && phy->id != PHY_REVISION_MASK) 153 goto out; 154 155 - /* 156 - * If the PHY ID is still unknown, we may have an 82577 157 - * without link. We will try again after setting Slow MDIC 158 - * mode. No harm in trying again in this case since the PHY 159 - * ID is unknown at this point anyway. 160 - */ 161 - ret_val = phy->ops.acquire(hw); 162 - if (ret_val) 163 - goto out; 164 - ret_val = e1000_set_mdio_slow_mode_hv(hw, true); 165 - if (ret_val) 166 - goto out; 167 - phy->ops.release(hw); 168 - 169 retry_count++; 170 } 171 out: 172 - /* Revert to MDIO fast mode, if applicable */ 173 - if (retry_count) { 174 - ret_val = phy->ops.acquire(hw); 175 - if (ret_val) 176 - return ret_val; 177 - ret_val = e1000_set_mdio_slow_mode_hv(hw, false); 178 - phy->ops.release(hw); 179 - } 180 - 181 return ret_val; 182 } 183 ··· 2768 } 2769 2770 /** 2771 - * e1000_set_mdio_slow_mode_hv - Set slow MDIO access mode 2772 - * @hw: pointer to the HW structure 2773 - * @slow: true for slow mode, false for normal mode 2774 - * 2775 - * Assumes semaphore already acquired. 2776 - **/ 2777 - s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow) 2778 - { 2779 - s32 ret_val = 0; 2780 - u16 data = 0; 2781 - 2782 - /* Set MDIO mode - page 769, register 16: 0x2580==slow, 0x2180==fast */ 2783 - hw->phy.addr = 1; 2784 - ret_val = e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 2785 - (BM_PORT_CTRL_PAGE << IGP_PAGE_SHIFT)); 2786 - if (ret_val) 2787 - goto out; 2788 - 2789 - ret_val = e1000e_write_phy_reg_mdic(hw, BM_CS_CTRL1, 2790 - (0x2180 | (slow << 10))); 2791 - if (ret_val) 2792 - goto out; 2793 - 2794 - /* dummy read when reverting to fast mode - throw away result */ 2795 - if (!slow) 2796 - ret_val = e1000e_read_phy_reg_mdic(hw, BM_CS_CTRL1, &data); 2797 - 2798 - out: 2799 - return ret_val; 2800 - } 2801 - 2802 - /** 2803 * __e1000_read_phy_reg_hv - Read HV PHY register 2804 * @hw: pointer to the HW structure 2805 * @offset: register offset to be read ··· 2784 s32 ret_val; 2785 u16 page = BM_PHY_REG_PAGE(offset); 2786 u16 reg = BM_PHY_REG_NUM(offset); 2787 - bool in_slow_mode = false; 2788 2789 if (!locked) { 2790 ret_val = hw->phy.ops.acquire(hw); 2791 if (ret_val) 2792 return ret_val; 2793 - } 2794 - 2795 - /* Workaround failure in MDIO access while cable is disconnected */ 2796 - if ((hw->phy.type == e1000_phy_82577) && 2797 - !(er32(STATUS) & E1000_STATUS_LU)) { 2798 - ret_val = e1000_set_mdio_slow_mode_hv(hw, true); 2799 - if (ret_val) 2800 - goto out; 2801 - 2802 - in_slow_mode = true; 2803 } 2804 2805 /* Page 800 works differently than the rest so it has its own func */ ··· 2827 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg, 2828 data); 2829 out: 2830 - /* Revert to MDIO fast mode, if applicable */ 2831 - if ((hw->phy.type == e1000_phy_82577) && in_slow_mode) 2832 - ret_val |= e1000_set_mdio_slow_mode_hv(hw, false); 2833 - 2834 if (!locked) 2835 hw->phy.ops.release(hw); 2836 ··· 2878 s32 ret_val; 2879 u16 page = BM_PHY_REG_PAGE(offset); 2880 u16 reg = BM_PHY_REG_NUM(offset); 2881 - bool in_slow_mode = false; 2882 2883 if (!locked) { 2884 ret_val = hw->phy.ops.acquire(hw); 2885 if (ret_val) 2886 return ret_val; 2887 - } 2888 - 2889 - /* Workaround failure in MDIO access while cable is disconnected */ 2890 - if ((hw->phy.type == e1000_phy_82577) && 2891 - !(er32(STATUS) & E1000_STATUS_LU)) { 2892 - ret_val = e1000_set_mdio_slow_mode_hv(hw, true); 2893 - if (ret_val) 2894 - goto out; 2895 - 2896 - in_slow_mode = true; 2897 } 2898 2899 /* Page 800 works differently than the rest so it has its own func */ ··· 2938 data); 2939 2940 out: 2941 - /* Revert to MDIO fast mode, if applicable */ 2942 - if ((hw->phy.type == e1000_phy_82577) && in_slow_mode) 2943 - ret_val |= e1000_set_mdio_slow_mode_hv(hw, false); 2944 - 2945 if (!locked) 2946 hw->phy.ops.release(hw); 2947
··· 152 if (phy->id != 0 && phy->id != PHY_REVISION_MASK) 153 goto out; 154 155 retry_count++; 156 } 157 out: 158 return ret_val; 159 } 160 ··· 2791 } 2792 2793 /** 2794 * __e1000_read_phy_reg_hv - Read HV PHY register 2795 * @hw: pointer to the HW structure 2796 * @offset: register offset to be read ··· 2839 s32 ret_val; 2840 u16 page = BM_PHY_REG_PAGE(offset); 2841 u16 reg = BM_PHY_REG_NUM(offset); 2842 2843 if (!locked) { 2844 ret_val = hw->phy.ops.acquire(hw); 2845 if (ret_val) 2846 return ret_val; 2847 } 2848 2849 /* Page 800 works differently than the rest so it has its own func */ ··· 2893 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg, 2894 data); 2895 out: 2896 if (!locked) 2897 hw->phy.ops.release(hw); 2898 ··· 2948 s32 ret_val; 2949 u16 page = BM_PHY_REG_PAGE(offset); 2950 u16 reg = BM_PHY_REG_NUM(offset); 2951 2952 if (!locked) { 2953 ret_val = hw->phy.ops.acquire(hw); 2954 if (ret_val) 2955 return ret_val; 2956 } 2957 2958 /* Page 800 works differently than the rest so it has its own func */ ··· 3019 data); 3020 3021 out: 3022 if (!locked) 3023 hw->phy.ops.release(hw); 3024
+1 -1
drivers/net/ixgbe/Makefile
··· 1 ################################################################################ 2 # 3 # Intel 10 Gigabit PCI Express Linux driver 4 - # Copyright(c) 1999 - 2009 Intel Corporation. 5 # 6 # This program is free software; you can redistribute it and/or modify it 7 # under the terms and conditions of the GNU General Public License,
··· 1 ################################################################################ 2 # 3 # Intel 10 Gigabit PCI Express Linux driver 4 + # Copyright(c) 1999 - 2010 Intel Corporation. 5 # 6 # This program is free software; you can redistribute it and/or modify it 7 # under the terms and conditions of the GNU General Public License,
+1 -1
drivers/net/ixgbe/ixgbe.h
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 - Copyright(c) 1999 - 2009 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 + Copyright(c) 1999 - 2010 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
+1 -1
drivers/net/ixgbe/ixgbe_82598.c
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 - Copyright(c) 1999 - 2009 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 + Copyright(c) 1999 - 2010 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
+1 -1
drivers/net/ixgbe/ixgbe_82599.c
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 - Copyright(c) 1999 - 2009 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 + Copyright(c) 1999 - 2010 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
+1 -1
drivers/net/ixgbe/ixgbe_common.c
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 - Copyright(c) 1999 - 2009 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 + Copyright(c) 1999 - 2010 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
+1 -1
drivers/net/ixgbe/ixgbe_common.h
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 - Copyright(c) 1999 - 2009 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 + Copyright(c) 1999 - 2010 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
+1 -1
drivers/net/ixgbe/ixgbe_dcb.c
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 - Copyright(c) 1999 - 2009 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 + Copyright(c) 1999 - 2010 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
+1 -1
drivers/net/ixgbe/ixgbe_dcb.h
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 - Copyright(c) 1999 - 2009 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 + Copyright(c) 1999 - 2010 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
+1 -1
drivers/net/ixgbe/ixgbe_dcb_82598.c
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 - Copyright(c) 1999 - 2009 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 + Copyright(c) 1999 - 2010 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
+1 -1
drivers/net/ixgbe/ixgbe_dcb_82598.h
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 - Copyright(c) 1999 - 2009 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 + Copyright(c) 1999 - 2010 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
+1 -1
drivers/net/ixgbe/ixgbe_dcb_82599.c
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 - Copyright(c) 1999 - 2009 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 + Copyright(c) 1999 - 2010 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
+1 -1
drivers/net/ixgbe/ixgbe_dcb_82599.h
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 - Copyright(c) 1999 - 2009 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 + Copyright(c) 1999 - 2010 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
+1 -1
drivers/net/ixgbe/ixgbe_dcb_nl.c
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 - Copyright(c) 1999 - 2009 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 + Copyright(c) 1999 - 2010 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
+1 -1
drivers/net/ixgbe/ixgbe_ethtool.c
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 - Copyright(c) 1999 - 2009 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 + Copyright(c) 1999 - 2010 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
+1 -1
drivers/net/ixgbe/ixgbe_fcoe.c
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 - Copyright(c) 1999 - 2009 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 + Copyright(c) 1999 - 2010 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
+1 -1
drivers/net/ixgbe/ixgbe_fcoe.h
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 - Copyright(c) 1999 - 2009 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 + Copyright(c) 1999 - 2010 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
+6 -2
drivers/net/ixgbe/ixgbe_main.c
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 - Copyright(c) 1999 - 2009 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, ··· 52 53 #define DRV_VERSION "2.0.44-k2" 54 const char ixgbe_driver_version[] = DRV_VERSION; 55 - static char ixgbe_copyright[] = "Copyright (c) 1999-2009 Intel Corporation."; 56 57 static const struct ixgbe_info *ixgbe_info_tbl[] = { 58 [board_82598] = &ixgbe_82598_info, ··· 5575 { 5576 struct ixgbe_adapter *adapter = netdev_priv(netdev); 5577 int i; 5578 5579 adapter->flags |= IXGBE_FLAG_IN_NETPOLL; 5580 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 + Copyright(c) 1999 - 2010 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, ··· 52 53 #define DRV_VERSION "2.0.44-k2" 54 const char ixgbe_driver_version[] = DRV_VERSION; 55 + static char ixgbe_copyright[] = "Copyright (c) 1999-2010 Intel Corporation."; 56 57 static const struct ixgbe_info *ixgbe_info_tbl[] = { 58 [board_82598] = &ixgbe_82598_info, ··· 5575 { 5576 struct ixgbe_adapter *adapter = netdev_priv(netdev); 5577 int i; 5578 + 5579 + /* if interface is down do nothing */ 5580 + if (test_bit(__IXGBE_DOWN, &adapter->state)) 5581 + return; 5582 5583 adapter->flags |= IXGBE_FLAG_IN_NETPOLL; 5584 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
+1 -1
drivers/net/ixgbe/ixgbe_phy.c
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 - Copyright(c) 1999 - 2009 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 + Copyright(c) 1999 - 2010 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
+1 -1
drivers/net/ixgbe/ixgbe_phy.h
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 - Copyright(c) 1999 - 2009 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 + Copyright(c) 1999 - 2010 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
+1 -1
drivers/net/ixgbe/ixgbe_type.h
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 - Copyright(c) 1999 - 2009 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
··· 1 /******************************************************************************* 2 3 Intel 10 Gigabit PCI Express Linux driver 4 + Copyright(c) 1999 - 2010 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License,
+3 -2
drivers/net/sfc/mcdi.c
··· 142 if (spins != 0) { 143 --spins; 144 udelay(1); 145 - } else 146 - schedule(); 147 148 time = get_seconds(); 149
··· 142 if (spins != 0) { 143 --spins; 144 udelay(1); 145 + } else { 146 + schedule_timeout_uninterruptible(1); 147 + } 148 149 time = get_seconds(); 150
+6 -2
drivers/net/sfc/selftest.c
··· 79 static int efx_test_mdio(struct efx_nic *efx, struct efx_self_tests *tests) 80 { 81 int rc = 0; 82 - int devad = __ffs(efx->mdio.mmds); 83 u16 physid1, physid2; 84 85 - if (efx->phy_type == PHY_TYPE_NONE) 86 return 0; 87 88 mutex_lock(&efx->mac_lock);
··· 79 static int efx_test_mdio(struct efx_nic *efx, struct efx_self_tests *tests) 80 { 81 int rc = 0; 82 + int devad; 83 u16 physid1, physid2; 84 85 + if (efx->mdio.mode_support & MDIO_SUPPORTS_C45) 86 + devad = __ffs(efx->mdio.mmds); 87 + else if (efx->mdio.mode_support & MDIO_SUPPORTS_C22) 88 + devad = MDIO_DEVAD_NONE; 89 + else 90 return 0; 91 92 mutex_lock(&efx->mac_lock);
+19 -8
drivers/net/tg3.c
··· 4 * Copyright (C) 2001, 2002, 2003, 2004 David S. Miller (davem@redhat.com) 5 * Copyright (C) 2001, 2002, 2003 Jeff Garzik (jgarzik@pobox.com) 6 * Copyright (C) 2004 Sun Microsystems Inc. 7 - * Copyright (C) 2005-2009 Broadcom Corporation. 8 * 9 * Firmware is: 10 * Derived from proprietary unpublished source code, ··· 68 69 #define DRV_MODULE_NAME "tg3" 70 #define PFX DRV_MODULE_NAME ": " 71 - #define DRV_MODULE_VERSION "3.105" 72 - #define DRV_MODULE_RELDATE "December 2, 2009" 73 74 #define TG3_DEF_MAC_MODE 0 75 #define TG3_DEF_RX_MODE 0 ··· 1037 else 1038 tp->phy_addr = 1; 1039 1040 - is_serdes = tr32(SG_DIG_STATUS) & SG_DIG_IS_SERDES; 1041 if (is_serdes) 1042 tp->phy_addr += 7; 1043 } else ··· 4697 (*post_ptr)++; 4698 4699 if (unlikely(rx_std_posted >= tp->rx_std_max_post)) { 4700 - u32 idx = *post_ptr % TG3_RX_RING_SIZE; 4701 - tw32_rx_mbox(TG3_RX_STD_PROD_IDX_REG, idx); 4702 work_mask &= ~RXD_OPAQUE_RING_STD; 4703 rx_std_posted = 0; 4704 } ··· 7747 ((u64) tpr->rx_std_mapping >> 32)); 7748 tw32(RCVDBDI_STD_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_LOW, 7749 ((u64) tpr->rx_std_mapping & 0xffffffff)); 7750 - if (!(tp->tg3_flags3 & TG3_FLG3_5755_PLUS)) 7751 tw32(RCVDBDI_STD_BD + TG3_BDINFO_NIC_ADDR, 7752 NIC_SRAM_RX_BUFFER_DESC); 7753 ··· 12127 12128 tp->phy_id = eeprom_phy_id; 12129 if (eeprom_phy_serdes) { 12130 - if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS) 12131 tp->tg3_flags2 |= TG3_FLG2_MII_SERDES; 12132 else 12133 tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES; ··· 13389 err = tg3_mdio_init(tp); 13390 if (err) 13391 return err; 13392 13393 /* Initialize data/descriptor byte/word swapping. */ 13394 val = tr32(GRC_MODE);
··· 4 * Copyright (C) 2001, 2002, 2003, 2004 David S. Miller (davem@redhat.com) 5 * Copyright (C) 2001, 2002, 2003 Jeff Garzik (jgarzik@pobox.com) 6 * Copyright (C) 2004 Sun Microsystems Inc. 7 + * Copyright (C) 2005-2010 Broadcom Corporation. 8 * 9 * Firmware is: 10 * Derived from proprietary unpublished source code, ··· 68 69 #define DRV_MODULE_NAME "tg3" 70 #define PFX DRV_MODULE_NAME ": " 71 + #define DRV_MODULE_VERSION "3.106" 72 + #define DRV_MODULE_RELDATE "January 12, 2010" 73 74 #define TG3_DEF_MAC_MODE 0 75 #define TG3_DEF_RX_MODE 0 ··· 1037 else 1038 tp->phy_addr = 1; 1039 1040 + if (tp->pci_chip_rev_id != CHIPREV_ID_5717_A0) 1041 + is_serdes = tr32(SG_DIG_STATUS) & SG_DIG_IS_SERDES; 1042 + else 1043 + is_serdes = tr32(TG3_CPMU_PHY_STRAP) & 1044 + TG3_CPMU_PHY_STRAP_IS_SERDES; 1045 if (is_serdes) 1046 tp->phy_addr += 7; 1047 } else ··· 4693 (*post_ptr)++; 4694 4695 if (unlikely(rx_std_posted >= tp->rx_std_max_post)) { 4696 + tpr->rx_std_prod_idx = std_prod_idx % TG3_RX_RING_SIZE; 4697 + tw32_rx_mbox(TG3_RX_STD_PROD_IDX_REG, 4698 + tpr->rx_std_prod_idx); 4699 work_mask &= ~RXD_OPAQUE_RING_STD; 4700 rx_std_posted = 0; 4701 } ··· 7742 ((u64) tpr->rx_std_mapping >> 32)); 7743 tw32(RCVDBDI_STD_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_LOW, 7744 ((u64) tpr->rx_std_mapping & 0xffffffff)); 7745 + if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717) 7746 tw32(RCVDBDI_STD_BD + TG3_BDINFO_NIC_ADDR, 7747 NIC_SRAM_RX_BUFFER_DESC); 7748 ··· 12122 12123 tp->phy_id = eeprom_phy_id; 12124 if (eeprom_phy_serdes) { 12125 + if ((tp->tg3_flags2 & TG3_FLG2_5780_CLASS) || 12126 + GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) 12127 tp->tg3_flags2 |= TG3_FLG2_MII_SERDES; 12128 else 12129 tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES; ··· 13383 err = tg3_mdio_init(tp); 13384 if (err) 13385 return err; 13386 + 13387 + if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 && 13388 + (tp->pci_chip_rev_id != CHIPREV_ID_5717_A0 || 13389 + (tp->tg3_flags2 & TG3_FLG2_MII_SERDES))) 13390 + return -ENOTSUPP; 13391 13392 /* Initialize data/descriptor byte/word swapping. */ 13393 val = tr32(GRC_MODE);
+3
drivers/net/tg3.h
··· 4 * Copyright (C) 2001, 2002, 2003, 2004 David S. Miller (davem@redhat.com) 5 * Copyright (C) 2001 Jeff Garzik (jgarzik@pobox.com) 6 * Copyright (C) 2004 Sun Microsystems Inc. 7 */ 8 9 #ifndef _T3_H ··· 1055 #define CPMU_MUTEX_REQ_DRIVER 0x00001000 1056 #define TG3_CPMU_MUTEX_GNT 0x00003660 1057 #define CPMU_MUTEX_GNT_DRIVER 0x00001000 1058 /* 0x3664 --> 0x3800 unused */ 1059 1060 /* Mbuf cluster free registers */
··· 4 * Copyright (C) 2001, 2002, 2003, 2004 David S. Miller (davem@redhat.com) 5 * Copyright (C) 2001 Jeff Garzik (jgarzik@pobox.com) 6 * Copyright (C) 2004 Sun Microsystems Inc. 7 + * Copyright (C) 2007-2010 Broadcom Corporation. 8 */ 9 10 #ifndef _T3_H ··· 1054 #define CPMU_MUTEX_REQ_DRIVER 0x00001000 1055 #define TG3_CPMU_MUTEX_GNT 0x00003660 1056 #define CPMU_MUTEX_GNT_DRIVER 0x00001000 1057 + #define TG3_CPMU_PHY_STRAP 0x00003664 1058 + #define TG3_CPMU_PHY_STRAP_IS_SERDES 0x00000020 1059 /* 0x3664 --> 0x3800 unused */ 1060 1061 /* Mbuf cluster free registers */
+29 -3
drivers/net/wireless/ath/ath5k/eeprom.c
··· 97 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; 98 int ret; 99 u16 val; 100 - u32 cksum, offset; 101 102 /* 103 * Read values from EEPROM and store them in the capability structure ··· 116 * Validate the checksum of the EEPROM date. There are some 117 * devices with invalid EEPROMs. 118 */ 119 - for (cksum = 0, offset = 0; offset < AR5K_EEPROM_INFO_MAX; offset++) { 120 AR5K_EEPROM_READ(AR5K_EEPROM_INFO(offset), val); 121 cksum ^= val; 122 } 123 if (cksum != AR5K_EEPROM_INFO_CKSUM) { 124 - ATH5K_ERR(ah->ah_sc, "Invalid EEPROM checksum 0x%04x\n", cksum); 125 return -EIO; 126 } 127
··· 97 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; 98 int ret; 99 u16 val; 100 + u32 cksum, offset, eep_max = AR5K_EEPROM_INFO_MAX; 101 102 /* 103 * Read values from EEPROM and store them in the capability structure ··· 116 * Validate the checksum of the EEPROM date. There are some 117 * devices with invalid EEPROMs. 118 */ 119 + AR5K_EEPROM_READ(AR5K_EEPROM_SIZE_UPPER, val); 120 + if (val) { 121 + eep_max = (val & AR5K_EEPROM_SIZE_UPPER_MASK) << 122 + AR5K_EEPROM_SIZE_ENDLOC_SHIFT; 123 + AR5K_EEPROM_READ(AR5K_EEPROM_SIZE_LOWER, val); 124 + eep_max = (eep_max | val) - AR5K_EEPROM_INFO_BASE; 125 + 126 + /* 127 + * Fail safe check to prevent stupid loops due 128 + * to busted EEPROMs. XXX: This value is likely too 129 + * big still, waiting on a better value. 130 + */ 131 + if (eep_max > (3 * AR5K_EEPROM_INFO_MAX)) { 132 + ATH5K_ERR(ah->ah_sc, "Invalid max custom EEPROM size: " 133 + "%d (0x%04x) max expected: %d (0x%04x)\n", 134 + eep_max, eep_max, 135 + 3 * AR5K_EEPROM_INFO_MAX, 136 + 3 * AR5K_EEPROM_INFO_MAX); 137 + return -EIO; 138 + } 139 + } 140 + 141 + for (cksum = 0, offset = 0; offset < eep_max; offset++) { 142 AR5K_EEPROM_READ(AR5K_EEPROM_INFO(offset), val); 143 cksum ^= val; 144 } 145 if (cksum != AR5K_EEPROM_INFO_CKSUM) { 146 + ATH5K_ERR(ah->ah_sc, "Invalid EEPROM " 147 + "checksum: 0x%04x eep_max: 0x%04x (%s)\n", 148 + cksum, eep_max, 149 + eep_max == AR5K_EEPROM_INFO_MAX ? 150 + "default size" : "custom size"); 151 return -EIO; 152 } 153
+8
drivers/net/wireless/ath/ath5k/eeprom.h
··· 37 #define AR5K_EEPROM_RFKILL_POLARITY_S 1 38 39 #define AR5K_EEPROM_REG_DOMAIN 0x00bf /* EEPROM regdom */ 40 #define AR5K_EEPROM_CHECKSUM 0x00c0 /* EEPROM checksum */ 41 #define AR5K_EEPROM_INFO_BASE 0x00c0 /* EEPROM header */ 42 #define AR5K_EEPROM_INFO_MAX (0x400 - AR5K_EEPROM_INFO_BASE)
··· 37 #define AR5K_EEPROM_RFKILL_POLARITY_S 1 38 39 #define AR5K_EEPROM_REG_DOMAIN 0x00bf /* EEPROM regdom */ 40 + 41 + /* FLASH(EEPROM) Defines for AR531X chips */ 42 + #define AR5K_EEPROM_SIZE_LOWER 0x1b /* size info -- lower */ 43 + #define AR5K_EEPROM_SIZE_UPPER 0x1c /* size info -- upper */ 44 + #define AR5K_EEPROM_SIZE_UPPER_MASK 0xfff0 45 + #define AR5K_EEPROM_SIZE_UPPER_SHIFT 4 46 + #define AR5K_EEPROM_SIZE_ENDLOC_SHIFT 12 47 + 48 #define AR5K_EEPROM_CHECKSUM 0x00c0 /* EEPROM checksum */ 49 #define AR5K_EEPROM_INFO_BASE 0x00c0 /* EEPROM header */ 50 #define AR5K_EEPROM_INFO_MAX (0x400 - AR5K_EEPROM_INFO_BASE)
+1 -1
drivers/net/wireless/ath/ath9k/Kconfig
··· 25 26 config ATH9K_DEBUGFS 27 bool "Atheros ath9k debugging" 28 - depends on ATH9K 29 ---help--- 30 Say Y, if you need access to ath9k's statistics for 31 interrupts, rate control, etc.
··· 25 26 config ATH9K_DEBUGFS 27 bool "Atheros ath9k debugging" 28 + depends on ATH9K && DEBUG_FS 29 ---help--- 30 Say Y, if you need access to ath9k's statistics for 31 interrupts, rate control, etc.
+3 -3
drivers/net/wireless/ath/ath9k/ath9k.h
··· 33 34 /* Macro to expand scalars to 64-bit objects */ 35 36 - #define ito64(x) (sizeof(x) == 8) ? \ 37 (((unsigned long long int)(x)) & (0xff)) : \ 38 - (sizeof(x) == 16) ? \ 39 (((unsigned long long int)(x)) & 0xffff) : \ 40 - ((sizeof(x) == 32) ? \ 41 (((unsigned long long int)(x)) & 0xffffffff) : \ 42 (unsigned long long int)(x)) 43
··· 33 34 /* Macro to expand scalars to 64-bit objects */ 35 36 + #define ito64(x) (sizeof(x) == 1) ? \ 37 (((unsigned long long int)(x)) & (0xff)) : \ 38 + (sizeof(x) == 2) ? \ 39 (((unsigned long long int)(x)) & 0xffff) : \ 40 + ((sizeof(x) == 4) ? \ 41 (((unsigned long long int)(x)) & 0xffffffff) : \ 42 (unsigned long long int)(x)) 43
+1 -1
drivers/net/wireless/iwlwifi/iwl-4965.c
··· 1961 struct ieee80211_tx_info *info; 1962 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0]; 1963 u32 status = le32_to_cpu(tx_resp->u.status); 1964 - int tid = MAX_TID_COUNT; 1965 int sta_id; 1966 int freed; 1967 u8 *qc = NULL;
··· 1961 struct ieee80211_tx_info *info; 1962 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0]; 1963 u32 status = le32_to_cpu(tx_resp->u.status); 1964 + int uninitialized_var(tid); 1965 int sta_id; 1966 int freed; 1967 u8 *qc = NULL;
+25 -20
drivers/net/wireless/iwlwifi/iwl-core.c
··· 2344 IWL_DEBUG_MAC80211(priv, "leave\n"); 2345 } 2346 2347 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6) 2348 void iwl_bss_info_changed(struct ieee80211_hw *hw, 2349 struct ieee80211_vif *vif, ··· 2490 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC; 2491 if (!iwl_is_rfkill(priv)) 2492 priv->cfg->ops->lib->post_associate(priv); 2493 - } else { 2494 - priv->assoc_id = 0; 2495 - iwl_led_disassociate(priv); 2496 - 2497 - /* 2498 - * inform the ucode that there is no longer an 2499 - * association and that no more packets should be 2500 - * send 2501 - */ 2502 - priv->staging_rxon.filter_flags &= 2503 - ~RXON_FILTER_ASSOC_MSK; 2504 - priv->staging_rxon.assoc_id = 0; 2505 - iwlcore_commit_rxon(priv); 2506 - } 2507 } 2508 2509 if (changes && iwl_is_associated(priv) && priv->assoc_id) { ··· 2506 } 2507 } 2508 2509 - if ((changes & BSS_CHANGED_BEACON_ENABLED) && 2510 - vif->bss_conf.enable_beacon) { 2511 - memcpy(priv->staging_rxon.bssid_addr, 2512 - bss_conf->bssid, ETH_ALEN); 2513 - memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN); 2514 - iwlcore_config_ap(priv); 2515 } 2516 2517 mutex_unlock(&priv->mutex);
··· 2344 IWL_DEBUG_MAC80211(priv, "leave\n"); 2345 } 2346 2347 + static inline void iwl_set_no_assoc(struct iwl_priv *priv) 2348 + { 2349 + priv->assoc_id = 0; 2350 + iwl_led_disassociate(priv); 2351 + /* 2352 + * inform the ucode that there is no longer an 2353 + * association and that no more packets should be 2354 + * sent 2355 + */ 2356 + priv->staging_rxon.filter_flags &= 2357 + ~RXON_FILTER_ASSOC_MSK; 2358 + priv->staging_rxon.assoc_id = 0; 2359 + iwlcore_commit_rxon(priv); 2360 + } 2361 + 2362 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6) 2363 void iwl_bss_info_changed(struct ieee80211_hw *hw, 2364 struct ieee80211_vif *vif, ··· 2475 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC; 2476 if (!iwl_is_rfkill(priv)) 2477 priv->cfg->ops->lib->post_associate(priv); 2478 + } else 2479 + iwl_set_no_assoc(priv); 2480 } 2481 2482 if (changes && iwl_is_associated(priv) && priv->assoc_id) { ··· 2503 } 2504 } 2505 2506 + if (changes & BSS_CHANGED_BEACON_ENABLED) { 2507 + if (vif->bss_conf.enable_beacon) { 2508 + memcpy(priv->staging_rxon.bssid_addr, 2509 + bss_conf->bssid, ETH_ALEN); 2510 + memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN); 2511 + iwlcore_config_ap(priv); 2512 + } else 2513 + iwl_set_no_assoc(priv); 2514 } 2515 2516 mutex_unlock(&priv->mutex);
+1 -1
drivers/net/wireless/iwlwifi/iwl-dev.h
··· 711 extern int iwl_queue_space(const struct iwl_queue *q); 712 static inline int iwl_queue_used(const struct iwl_queue *q, int i) 713 { 714 - return q->write_ptr > q->read_ptr ? 715 (i >= q->read_ptr && i < q->write_ptr) : 716 !(i < q->read_ptr && i >= q->write_ptr); 717 }
··· 711 extern int iwl_queue_space(const struct iwl_queue *q); 712 static inline int iwl_queue_used(const struct iwl_queue *q, int i) 713 { 714 + return q->write_ptr >= q->read_ptr ? 715 (i >= q->read_ptr && i < q->write_ptr) : 716 !(i < q->read_ptr && i >= q->write_ptr); 717 }
+3 -1
drivers/net/wireless/mwl8k.c
··· 3157 /* Clear unsupported feature flags */ 3158 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC; 3159 3160 - if (mwl8k_fw_lock(hw)) 3161 return; 3162 3163 if (priv->sniffer_enabled) { 3164 mwl8k_enable_sniffer(hw, 0);
··· 3157 /* Clear unsupported feature flags */ 3158 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC; 3159 3160 + if (mwl8k_fw_lock(hw)) { 3161 + kfree(cmd); 3162 return; 3163 + } 3164 3165 if (priv->sniffer_enabled) { 3166 mwl8k_enable_sniffer(hw, 0);
+1 -1
drivers/net/wireless/rt2x00/rt2800lib.c
··· 340 rt2x00_set_field32(&reg, LED_CFG_OFF_PERIOD, *delay_off); 341 rt2x00_set_field32(&reg, LED_CFG_SLOW_BLINK_PERIOD, 3); 342 rt2x00_set_field32(&reg, LED_CFG_R_LED_MODE, 3); 343 - rt2x00_set_field32(&reg, LED_CFG_G_LED_MODE, 12); 344 rt2x00_set_field32(&reg, LED_CFG_Y_LED_MODE, 3); 345 rt2x00_set_field32(&reg, LED_CFG_LED_POLAR, 1); 346 rt2800_register_write(led->rt2x00dev, LED_CFG, reg);
··· 340 rt2x00_set_field32(&reg, LED_CFG_OFF_PERIOD, *delay_off); 341 rt2x00_set_field32(&reg, LED_CFG_SLOW_BLINK_PERIOD, 3); 342 rt2x00_set_field32(&reg, LED_CFG_R_LED_MODE, 3); 343 + rt2x00_set_field32(&reg, LED_CFG_G_LED_MODE, 3); 344 rt2x00_set_field32(&reg, LED_CFG_Y_LED_MODE, 3); 345 rt2x00_set_field32(&reg, LED_CFG_LED_POLAR, 1); 346 rt2800_register_write(led->rt2x00dev, LED_CFG, reg);
+6
drivers/net/wireless/rt2x00/rt2x00.h
··· 113 ( ((unsigned long)((__skb)->data + (__header))) & 3 ) 114 115 /* 116 * Standard timing and size defines. 117 * These values should follow the ieee80211 specifications. 118 */
··· 113 ( ((unsigned long)((__skb)->data + (__header))) & 3 ) 114 115 /* 116 + * Constants for extra TX headroom for alignment purposes. 117 + */ 118 + #define RT2X00_ALIGN_SIZE 4 /* Only whole frame needs alignment */ 119 + #define RT2X00_L2PAD_SIZE 8 /* Both header & payload need alignment */ 120 + 121 + /* 122 * Standard timing and size defines. 123 * These values should follow the ieee80211 specifications. 124 */
+11 -1
drivers/net/wireless/rt2x00/rt2x00dev.c
··· 686 /* 687 * Initialize extra TX headroom required. 688 */ 689 - rt2x00dev->hw->extra_tx_headroom = rt2x00dev->ops->extra_tx_headroom; 690 691 /* 692 * Register HW.
··· 686 /* 687 * Initialize extra TX headroom required. 688 */ 689 + rt2x00dev->hw->extra_tx_headroom = 690 + max_t(unsigned int, IEEE80211_TX_STATUS_HEADROOM, 691 + rt2x00dev->ops->extra_tx_headroom); 692 + 693 + /* 694 + * Take TX headroom required for alignment into account. 695 + */ 696 + if (test_bit(DRIVER_REQUIRE_L2PAD, &rt2x00dev->flags)) 697 + rt2x00dev->hw->extra_tx_headroom += RT2X00_L2PAD_SIZE; 698 + else if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags)) 699 + rt2x00dev->hw->extra_tx_headroom += RT2X00_ALIGN_SIZE; 700 701 /* 702 * Register HW.
+3 -3
drivers/net/wireless/rt2x00/rt2x00queue.c
··· 104 * is also mapped to the DMA so it can be used for transfering 105 * additional descriptor information to the hardware. 106 */ 107 - skb_push(skb, rt2x00dev->hw->extra_tx_headroom); 108 109 skbdesc->skb_dma = 110 dma_map_single(rt2x00dev->dev, skb->data, skb->len, DMA_TO_DEVICE); ··· 112 /* 113 * Restore data pointer to original location again. 114 */ 115 - skb_pull(skb, rt2x00dev->hw->extra_tx_headroom); 116 117 skbdesc->flags |= SKBDESC_DMA_MAPPED_TX; 118 } ··· 134 * by the driver, but it was actually mapped to DMA. 135 */ 136 dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, 137 - skb->len + rt2x00dev->hw->extra_tx_headroom, 138 DMA_TO_DEVICE); 139 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX; 140 }
··· 104 * is also mapped to the DMA so it can be used for transfering 105 * additional descriptor information to the hardware. 106 */ 107 + skb_push(skb, rt2x00dev->ops->extra_tx_headroom); 108 109 skbdesc->skb_dma = 110 dma_map_single(rt2x00dev->dev, skb->data, skb->len, DMA_TO_DEVICE); ··· 112 /* 113 * Restore data pointer to original location again. 114 */ 115 + skb_pull(skb, rt2x00dev->ops->extra_tx_headroom); 116 117 skbdesc->flags |= SKBDESC_DMA_MAPPED_TX; 118 } ··· 134 * by the driver, but it was actually mapped to DMA. 135 */ 136 dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, 137 + skb->len + rt2x00dev->ops->extra_tx_headroom, 138 DMA_TO_DEVICE); 139 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX; 140 }
+7 -6
drivers/net/wireless/zd1211rw/zd_mac.c
··· 987 changed_flags &= SUPPORTED_FIF_FLAGS; 988 *new_flags &= SUPPORTED_FIF_FLAGS; 989 990 - /* changed_flags is always populated but this driver 991 - * doesn't support all FIF flags so its possible we don't 992 - * need to do anything */ 993 - if (!changed_flags) 994 - return; 995 - 996 if (*new_flags & (FIF_PROMISC_IN_BSS | FIF_ALLMULTI)) 997 zd_mc_add_all(&hash); 998
··· 987 changed_flags &= SUPPORTED_FIF_FLAGS; 988 *new_flags &= SUPPORTED_FIF_FLAGS; 989 990 + /* 991 + * If multicast parameter (as returned by zd_op_prepare_multicast) 992 + * has changed, no bit in changed_flags is set. To handle this 993 + * situation, we do not return if changed_flags is 0. If we do so, 994 + * we will have some issue with IPv6 which uses multicast for link 995 + * layer address resolution. 996 + */ 997 if (*new_flags & (FIF_PROMISC_IN_BSS | FIF_ALLMULTI)) 998 zd_mc_add_all(&hash); 999
+1 -1
include/net/ip.h
··· 338 return inet6_sk(sk)->mc_loop; 339 #endif 340 } 341 - __WARN(); 342 return 1; 343 } 344
··· 338 return inet6_sk(sk)->mc_loop; 339 #endif 340 } 341 + WARN_ON(1); 342 return 1; 343 } 344
+6 -1
net/ipv6/exthdrs.c
··· 559 return skb_dst(skb) ? ip6_dst_idev(skb_dst(skb)) : __in6_dev_get(skb->dev); 560 } 561 562 /* Router Alert as of RFC 2711 */ 563 564 static int ipv6_hop_ra(struct sk_buff *skb, int optoff) ··· 585 static int ipv6_hop_jumbo(struct sk_buff *skb, int optoff) 586 { 587 const unsigned char *nh = skb_network_header(skb); 588 u32 pkt_len; 589 - struct net *net = dev_net(skb_dst(skb)->dev); 590 591 if (nh[optoff + 1] != 4 || (optoff & 3) != 2) { 592 LIMIT_NETDEBUG(KERN_DEBUG "ipv6_hop_jumbo: wrong jumbo opt length/alignment %d\n",
··· 559 return skb_dst(skb) ? ip6_dst_idev(skb_dst(skb)) : __in6_dev_get(skb->dev); 560 } 561 562 + static inline struct net *ipv6_skb_net(struct sk_buff *skb) 563 + { 564 + return skb_dst(skb) ? dev_net(skb_dst(skb)->dev) : dev_net(skb->dev); 565 + } 566 + 567 /* Router Alert as of RFC 2711 */ 568 569 static int ipv6_hop_ra(struct sk_buff *skb, int optoff) ··· 580 static int ipv6_hop_jumbo(struct sk_buff *skb, int optoff) 581 { 582 const unsigned char *nh = skb_network_header(skb); 583 + struct net *net = ipv6_skb_net(skb); 584 u32 pkt_len; 585 586 if (nh[optoff + 1] != 4 || (optoff & 3) != 2) { 587 LIMIT_NETDEBUG(KERN_DEBUG "ipv6_hop_jumbo: wrong jumbo opt length/alignment %d\n",
+43 -4
net/mac80211/iface.c
··· 15 #include <linux/netdevice.h> 16 #include <linux/rtnetlink.h> 17 #include <net/mac80211.h> 18 #include "ieee80211_i.h" 19 #include "sta_info.h" 20 #include "debugfs_netdev.h" 21 #include "mesh.h" 22 #include "led.h" 23 #include "driver-ops.h" 24 25 /** 26 * DOC: Interface list locking ··· 316 if (sdata->vif.type == NL80211_IFTYPE_STATION) 317 ieee80211_queue_work(&local->hw, &sdata->u.mgd.work); 318 319 - netif_start_queue(dev); 320 321 return 0; 322 err_del_interface: ··· 345 /* 346 * Stop TX on this interface first. 347 */ 348 - netif_stop_queue(dev); 349 350 /* 351 * Now delete all active aggregation sessions. ··· 646 WARN_ON(flushed); 647 } 648 649 static const struct net_device_ops ieee80211_dataif_ops = { 650 .ndo_open = ieee80211_open, 651 .ndo_stop = ieee80211_stop, ··· 660 .ndo_set_multicast_list = ieee80211_set_multicast_list, 661 .ndo_change_mtu = ieee80211_change_mtu, 662 .ndo_set_mac_address = eth_mac_addr, 663 }; 664 665 static const struct net_device_ops ieee80211_monitorif_ops = { 666 .ndo_open = ieee80211_open, ··· 700 .ndo_set_multicast_list = ieee80211_set_multicast_list, 701 .ndo_change_mtu = ieee80211_change_mtu, 702 .ndo_set_mac_address = eth_mac_addr, 703 }; 704 705 static void ieee80211_if_setup(struct net_device *dev) ··· 807 808 ASSERT_RTNL(); 809 810 - ndev = alloc_netdev(sizeof(*sdata) + local->hw.vif_data_size, 811 - name, ieee80211_if_setup); 812 if (!ndev) 813 return -ENOMEM; 814 dev_net_set(ndev, wiphy_net(local->hw.wiphy));
··· 15 #include <linux/netdevice.h> 16 #include <linux/rtnetlink.h> 17 #include <net/mac80211.h> 18 + #include <net/ieee80211_radiotap.h> 19 #include "ieee80211_i.h" 20 #include "sta_info.h" 21 #include "debugfs_netdev.h" 22 #include "mesh.h" 23 #include "led.h" 24 #include "driver-ops.h" 25 + #include "wme.h" 26 27 /** 28 * DOC: Interface list locking ··· 314 if (sdata->vif.type == NL80211_IFTYPE_STATION) 315 ieee80211_queue_work(&local->hw, &sdata->u.mgd.work); 316 317 + netif_tx_start_all_queues(dev); 318 319 return 0; 320 err_del_interface: ··· 343 /* 344 * Stop TX on this interface first. 345 */ 346 + netif_tx_stop_all_queues(dev); 347 348 /* 349 * Now delete all active aggregation sessions. ··· 644 WARN_ON(flushed); 645 } 646 647 + static u16 ieee80211_netdev_select_queue(struct net_device *dev, 648 + struct sk_buff *skb) 649 + { 650 + return ieee80211_select_queue(IEEE80211_DEV_TO_SUB_IF(dev), skb); 651 + } 652 + 653 static const struct net_device_ops ieee80211_dataif_ops = { 654 .ndo_open = ieee80211_open, 655 .ndo_stop = ieee80211_stop, ··· 652 .ndo_set_multicast_list = ieee80211_set_multicast_list, 653 .ndo_change_mtu = ieee80211_change_mtu, 654 .ndo_set_mac_address = eth_mac_addr, 655 + .ndo_select_queue = ieee80211_netdev_select_queue, 656 }; 657 + 658 + static u16 ieee80211_monitor_select_queue(struct net_device *dev, 659 + struct sk_buff *skb) 660 + { 661 + struct ieee80211_sub_if_data *sdata = IEEE80211_DEV_TO_SUB_IF(dev); 662 + struct ieee80211_local *local = sdata->local; 663 + struct ieee80211_hdr *hdr; 664 + struct ieee80211_radiotap_header *rtap = (void *)skb->data; 665 + u8 *p; 666 + 667 + if (local->hw.queues < 4) 668 + return 0; 669 + 670 + if (skb->len < 4 || 671 + skb->len < le16_to_cpu(rtap->it_len) + 2 /* frame control */) 672 + return 0; /* doesn't matter, frame will be dropped */ 673 + 674 + hdr = (void *)((u8 *)skb->data + le16_to_cpu(rtap->it_len)); 675 + 676 + if (!ieee80211_is_data_qos(hdr->frame_control)) { 677 + skb->priority = 7; 678 + return ieee802_1d_to_ac[skb->priority]; 679 + } 680 + 681 + p = ieee80211_get_qos_ctl(hdr); 682 + skb->priority = *p & IEEE80211_QOS_CTL_TAG1D_MASK; 683 + 684 + return ieee80211_downgrade_queue(local, skb); 685 + } 686 687 static const struct net_device_ops ieee80211_monitorif_ops = { 688 .ndo_open = ieee80211_open, ··· 662 .ndo_set_multicast_list = ieee80211_set_multicast_list, 663 .ndo_change_mtu = ieee80211_change_mtu, 664 .ndo_set_mac_address = eth_mac_addr, 665 + .ndo_select_queue = ieee80211_monitor_select_queue, 666 }; 667 668 static void ieee80211_if_setup(struct net_device *dev) ··· 768 769 ASSERT_RTNL(); 770 771 + ndev = alloc_netdev_mq(sizeof(*sdata) + local->hw.vif_data_size, 772 + name, ieee80211_if_setup, local->hw.queues); 773 if (!ndev) 774 return -ENOMEM; 775 dev_net_set(ndev, wiphy_net(local->hw.wiphy));
+5 -3
net/mac80211/mlme.c
··· 942 ieee80211_recalc_ps(local, -1); 943 mutex_unlock(&local->iflist_mtx); 944 945 - netif_start_queue(sdata->dev); 946 netif_carrier_on(sdata->dev); 947 } 948 ··· 1074 * time -- we don't want the scan code to enable queues. 1075 */ 1076 1077 - netif_stop_queue(sdata->dev); 1078 netif_carrier_off(sdata->dev); 1079 1080 rcu_read_lock(); ··· 1963 rma = ieee80211_rx_mgmt_disassoc(sdata, mgmt, skb->len); 1964 break; 1965 case IEEE80211_STYPE_ACTION: 1966 - /* XXX: differentiate, can only happen for CSA now! */ 1967 ieee80211_sta_process_chanswitch(sdata, 1968 &mgmt->u.action.u.chan_switch.sw_elem, 1969 ifmgd->associated);
··· 942 ieee80211_recalc_ps(local, -1); 943 mutex_unlock(&local->iflist_mtx); 944 945 + netif_tx_start_all_queues(sdata->dev); 946 netif_carrier_on(sdata->dev); 947 } 948 ··· 1074 * time -- we don't want the scan code to enable queues. 1075 */ 1076 1077 + netif_tx_stop_all_queues(sdata->dev); 1078 netif_carrier_off(sdata->dev); 1079 1080 rcu_read_lock(); ··· 1963 rma = ieee80211_rx_mgmt_disassoc(sdata, mgmt, skb->len); 1964 break; 1965 case IEEE80211_STYPE_ACTION: 1966 + if (mgmt->u.action.category != WLAN_CATEGORY_SPECTRUM_MGMT) 1967 + break; 1968 + 1969 ieee80211_sta_process_chanswitch(sdata, 1970 &mgmt->u.action.u.chan_switch.sw_elem, 1971 ifmgd->associated);
+7 -1
net/mac80211/rx.c
··· 1746 memset(info, 0, sizeof(*info)); 1747 info->flags |= IEEE80211_TX_INTFL_NEED_TXPROCESSING; 1748 info->control.vif = &rx->sdata->vif; 1749 - ieee80211_select_queue(local, fwd_skb); 1750 if (is_multicast_ether_addr(fwd_hdr->addr1)) 1751 IEEE80211_IFSTA_MESH_CTR_INC(&sdata->u.mesh, 1752 fwded_mcast); ··· 2015 } 2016 break; 2017 default: 2018 return RX_CONTINUE; 2019 } 2020
··· 1746 memset(info, 0, sizeof(*info)); 1747 info->flags |= IEEE80211_TX_INTFL_NEED_TXPROCESSING; 1748 info->control.vif = &rx->sdata->vif; 1749 + skb_set_queue_mapping(skb, 1750 + ieee80211_select_queue(rx->sdata, fwd_skb)); 1751 + ieee80211_set_qos_hdr(local, skb); 1752 if (is_multicast_ether_addr(fwd_hdr->addr1)) 1753 IEEE80211_IFSTA_MESH_CTR_INC(&sdata->u.mesh, 1754 fwded_mcast); ··· 2013 } 2014 break; 2015 default: 2016 + /* do not process rejected action frames */ 2017 + if (mgmt->u.action.category & 0x80) 2018 + return RX_DROP_MONITOR; 2019 + 2020 return RX_CONTINUE; 2021 } 2022
+5 -5
net/mac80211/scan.c
··· 353 if (sdata->vif.type == NL80211_IFTYPE_STATION) { 354 if (sdata->u.mgd.associated) { 355 ieee80211_scan_ps_disable(sdata); 356 - netif_wake_queue(sdata->dev); 357 } 358 } else 359 - netif_wake_queue(sdata->dev); 360 361 /* re-enable beaconing */ 362 if (sdata->vif.type == NL80211_IFTYPE_AP || ··· 411 * are handled in the scan state machine 412 */ 413 if (sdata->vif.type != NL80211_IFTYPE_STATION) 414 - netif_stop_queue(sdata->dev); 415 } 416 mutex_unlock(&local->iflist_mtx); 417 ··· 575 continue; 576 577 if (sdata->vif.type == NL80211_IFTYPE_STATION) { 578 - netif_stop_queue(sdata->dev); 579 if (sdata->u.mgd.associated) 580 ieee80211_scan_ps_enable(sdata); 581 } ··· 610 if (sdata->vif.type == NL80211_IFTYPE_STATION) { 611 if (sdata->u.mgd.associated) 612 ieee80211_scan_ps_disable(sdata); 613 - netif_wake_queue(sdata->dev); 614 } 615 } 616 mutex_unlock(&local->iflist_mtx);
··· 353 if (sdata->vif.type == NL80211_IFTYPE_STATION) { 354 if (sdata->u.mgd.associated) { 355 ieee80211_scan_ps_disable(sdata); 356 + netif_tx_wake_all_queues(sdata->dev); 357 } 358 } else 359 + netif_tx_wake_all_queues(sdata->dev); 360 361 /* re-enable beaconing */ 362 if (sdata->vif.type == NL80211_IFTYPE_AP || ··· 411 * are handled in the scan state machine 412 */ 413 if (sdata->vif.type != NL80211_IFTYPE_STATION) 414 + netif_tx_stop_all_queues(sdata->dev); 415 } 416 mutex_unlock(&local->iflist_mtx); 417 ··· 575 continue; 576 577 if (sdata->vif.type == NL80211_IFTYPE_STATION) { 578 + netif_tx_stop_all_queues(sdata->dev); 579 if (sdata->u.mgd.associated) 580 ieee80211_scan_ps_enable(sdata); 581 } ··· 610 if (sdata->vif.type == NL80211_IFTYPE_STATION) { 611 if (sdata->u.mgd.associated) 612 ieee80211_scan_ps_disable(sdata); 613 + netif_tx_wake_all_queues(sdata->dev); 614 } 615 } 616 mutex_unlock(&local->iflist_mtx);
+4 -1
net/mac80211/tx.c
··· 1512 return; 1513 } 1514 1515 - ieee80211_select_queue(local, skb); 1516 ieee80211_tx(sdata, skb, false); 1517 rcu_read_unlock(); 1518 } ··· 2290 skb_set_mac_header(skb, 0); 2291 skb_set_network_header(skb, 0); 2292 skb_set_transport_header(skb, 0); 2293 2294 /* 2295 * The other path calling ieee80211_xmit is from the tasklet,
··· 1512 return; 1513 } 1514 1515 + ieee80211_set_qos_hdr(local, skb); 1516 ieee80211_tx(sdata, skb, false); 1517 rcu_read_unlock(); 1518 } ··· 2290 skb_set_mac_header(skb, 0); 2291 skb_set_network_header(skb, 0); 2292 skb_set_transport_header(skb, 0); 2293 + 2294 + /* send all internal mgmt frames on VO */ 2295 + skb_set_queue_mapping(skb, 0); 2296 2297 /* 2298 * The other path calling ieee80211_xmit is from the tasklet,
+12
net/mac80211/util.c
··· 269 enum queue_stop_reason reason) 270 { 271 struct ieee80211_local *local = hw_to_local(hw); 272 273 if (WARN_ON(queue >= hw->queues)) 274 return; ··· 282 283 if (!skb_queue_empty(&local->pending[queue])) 284 tasklet_schedule(&local->tx_pending_tasklet); 285 } 286 287 void ieee80211_wake_queue_by_reason(struct ieee80211_hw *hw, int queue, ··· 311 enum queue_stop_reason reason) 312 { 313 struct ieee80211_local *local = hw_to_local(hw); 314 315 if (WARN_ON(queue >= hw->queues)) 316 return; 317 318 __set_bit(reason, &local->queue_stop_reasons[queue]); 319 } 320 321 void ieee80211_stop_queue_by_reason(struct ieee80211_hw *hw, int queue,
··· 269 enum queue_stop_reason reason) 270 { 271 struct ieee80211_local *local = hw_to_local(hw); 272 + struct ieee80211_sub_if_data *sdata; 273 274 if (WARN_ON(queue >= hw->queues)) 275 return; ··· 281 282 if (!skb_queue_empty(&local->pending[queue])) 283 tasklet_schedule(&local->tx_pending_tasklet); 284 + 285 + rcu_read_lock(); 286 + list_for_each_entry_rcu(sdata, &local->interfaces, list) 287 + netif_tx_wake_queue(netdev_get_tx_queue(sdata->dev, queue)); 288 + rcu_read_unlock(); 289 } 290 291 void ieee80211_wake_queue_by_reason(struct ieee80211_hw *hw, int queue, ··· 305 enum queue_stop_reason reason) 306 { 307 struct ieee80211_local *local = hw_to_local(hw); 308 + struct ieee80211_sub_if_data *sdata; 309 310 if (WARN_ON(queue >= hw->queues)) 311 return; 312 313 __set_bit(reason, &local->queue_stop_reasons[queue]); 314 + 315 + rcu_read_lock(); 316 + list_for_each_entry_rcu(sdata, &local->interfaces, list) 317 + netif_tx_stop_queue(netdev_get_tx_queue(sdata->dev, queue)); 318 + rcu_read_unlock(); 319 } 320 321 void ieee80211_stop_queue_by_reason(struct ieee80211_hw *hw, int queue,
+69 -25
net/mac80211/wme.c
··· 44 } 45 46 47 - /* Indicate which queue to use. */ 48 - static u16 classify80211(struct ieee80211_local *local, struct sk_buff *skb) 49 { 50 - struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data; 51 52 - if (!ieee80211_is_data(hdr->frame_control)) { 53 - /* management frames go on AC_VO queue, but are sent 54 - * without QoS control fields */ 55 - return 0; 56 } 57 58 - if (0 /* injected */) { 59 - /* use AC from radiotap */ 60 } 61 62 - if (!ieee80211_is_data_qos(hdr->frame_control)) { 63 skb->priority = 0; /* required for correct WPA/11i MIC */ 64 return ieee802_1d_to_ac[skb->priority]; 65 } ··· 115 * data frame has */ 116 skb->priority = cfg80211_classify8021d(skb); 117 118 /* in case we are a client verify acm is not set for this ac */ 119 while (unlikely(local->wmm_acm & BIT(skb->priority))) { 120 if (wme_downgrade_ac(skb)) { ··· 138 return ieee802_1d_to_ac[skb->priority]; 139 } 140 141 - void ieee80211_select_queue(struct ieee80211_local *local, struct sk_buff *skb) 142 { 143 - struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data; 144 - u16 queue; 145 - u8 tid; 146 147 - queue = classify80211(local, skb); 148 - if (unlikely(queue >= local->hw.queues)) 149 - queue = local->hw.queues - 1; 150 - 151 - /* 152 - * Now we know the 1d priority, fill in the QoS header if 153 - * there is one (and we haven't done this before). 154 - */ 155 if (ieee80211_is_data_qos(hdr->frame_control)) { 156 u8 *p = ieee80211_get_qos_ctl(hdr); 157 - u8 ack_policy = 0; 158 tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK; 159 if (unlikely(local->wifi_wme_noack_test)) 160 ack_policy |= QOS_CONTROL_ACK_POLICY_NOACK << 161 QOS_CONTROL_ACK_POLICY_SHIFT; ··· 156 *p++ = ack_policy | tid; 157 *p = 0; 158 } 159 - 160 - skb_set_queue_mapping(skb, queue); 161 }
··· 44 } 45 46 47 + /* Indicate which queue to use. */ 48 + u16 ieee80211_select_queue(struct ieee80211_sub_if_data *sdata, 49 + struct sk_buff *skb) 50 { 51 + struct ieee80211_local *local = sdata->local; 52 + struct sta_info *sta = NULL; 53 + u32 sta_flags = 0; 54 + const u8 *ra = NULL; 55 + bool qos = false; 56 57 + if (local->hw.queues < 4 || skb->len < 6) { 58 + skb->priority = 0; /* required for correct WPA/11i MIC */ 59 + return min_t(u16, local->hw.queues - 1, 60 + ieee802_1d_to_ac[skb->priority]); 61 } 62 63 + rcu_read_lock(); 64 + switch (sdata->vif.type) { 65 + case NL80211_IFTYPE_AP_VLAN: 66 + rcu_read_lock(); 67 + sta = rcu_dereference(sdata->u.vlan.sta); 68 + if (sta) 69 + sta_flags = get_sta_flags(sta); 70 + rcu_read_unlock(); 71 + if (sta) 72 + break; 73 + case NL80211_IFTYPE_AP: 74 + ra = skb->data; 75 + break; 76 + case NL80211_IFTYPE_WDS: 77 + ra = sdata->u.wds.remote_addr; 78 + break; 79 + #ifdef CONFIG_MAC80211_MESH 80 + case NL80211_IFTYPE_MESH_POINT: 81 + /* 82 + * XXX: This is clearly broken ... but already was before, 83 + * because ieee80211_fill_mesh_addresses() would clear A1 84 + * except for multicast addresses. 85 + */ 86 + break; 87 + #endif 88 + case NL80211_IFTYPE_STATION: 89 + ra = sdata->u.mgd.bssid; 90 + break; 91 + case NL80211_IFTYPE_ADHOC: 92 + ra = skb->data; 93 + break; 94 + default: 95 + break; 96 } 97 98 + if (!sta && ra && !is_multicast_ether_addr(ra)) { 99 + sta = sta_info_get(local, ra); 100 + if (sta) 101 + sta_flags = get_sta_flags(sta); 102 + } 103 + 104 + if (sta_flags & WLAN_STA_WME) 105 + qos = true; 106 + 107 + rcu_read_unlock(); 108 + 109 + if (!qos) { 110 skb->priority = 0; /* required for correct WPA/11i MIC */ 111 return ieee802_1d_to_ac[skb->priority]; 112 } ··· 68 * data frame has */ 69 skb->priority = cfg80211_classify8021d(skb); 70 71 + return ieee80211_downgrade_queue(local, skb); 72 + } 73 + 74 + u16 ieee80211_downgrade_queue(struct ieee80211_local *local, 75 + struct sk_buff *skb) 76 + { 77 /* in case we are a client verify acm is not set for this ac */ 78 while (unlikely(local->wmm_acm & BIT(skb->priority))) { 79 if (wme_downgrade_ac(skb)) { ··· 85 return ieee802_1d_to_ac[skb->priority]; 86 } 87 88 + void ieee80211_set_qos_hdr(struct ieee80211_local *local, struct sk_buff *skb) 89 { 90 + struct ieee80211_hdr *hdr = (void *)skb->data; 91 92 + /* Fill in the QoS header if there is one. */ 93 if (ieee80211_is_data_qos(hdr->frame_control)) { 94 u8 *p = ieee80211_get_qos_ctl(hdr); 95 + u8 ack_policy = 0, tid; 96 + 97 tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK; 98 + 99 if (unlikely(local->wifi_wme_noack_test)) 100 ack_policy |= QOS_CONTROL_ACK_POLICY_NOACK << 101 QOS_CONTROL_ACK_POLICY_SHIFT; ··· 110 *p++ = ack_policy | tid; 111 *p = 0; 112 } 113 }
+6 -2
net/mac80211/wme.h
··· 20 21 extern const int ieee802_1d_to_ac[8]; 22 23 - void ieee80211_select_queue(struct ieee80211_local *local, 24 - struct sk_buff *skb); 25 26 #endif /* _WME_H */
··· 20 21 extern const int ieee802_1d_to_ac[8]; 22 23 + u16 ieee80211_select_queue(struct ieee80211_sub_if_data *sdata, 24 + struct sk_buff *skb); 25 + void ieee80211_set_qos_hdr(struct ieee80211_local *local, struct sk_buff *skb); 26 + u16 ieee80211_downgrade_queue(struct ieee80211_local *local, 27 + struct sk_buff *skb); 28 + 29 30 #endif /* _WME_H */
+2 -2
net/wireless/core.c
··· 745 mutex_unlock(&rdev->devlist_mtx); 746 dev_put(dev); 747 } 748 - #ifdef CONFIG_CFG80211_WEXT 749 cfg80211_lock_rdev(rdev); 750 mutex_lock(&rdev->devlist_mtx); 751 wdev_lock(wdev); 752 switch (wdev->iftype) { 753 case NL80211_IFTYPE_ADHOC: ··· 760 break; 761 } 762 wdev_unlock(wdev); 763 rdev->opencount++; 764 mutex_unlock(&rdev->devlist_mtx); 765 cfg80211_unlock_rdev(rdev); 766 - #endif 767 break; 768 case NETDEV_UNREGISTER: 769 /*
··· 745 mutex_unlock(&rdev->devlist_mtx); 746 dev_put(dev); 747 } 748 cfg80211_lock_rdev(rdev); 749 mutex_lock(&rdev->devlist_mtx); 750 + #ifdef CONFIG_CFG80211_WEXT 751 wdev_lock(wdev); 752 switch (wdev->iftype) { 753 case NL80211_IFTYPE_ADHOC: ··· 760 break; 761 } 762 wdev_unlock(wdev); 763 + #endif 764 rdev->opencount++; 765 mutex_unlock(&rdev->devlist_mtx); 766 cfg80211_unlock_rdev(rdev); 767 break; 768 case NETDEV_UNREGISTER: 769 /*
+1 -1
net/wireless/reg.c
··· 1690 request->wiphy_idx = WIPHY_IDX_STALE; 1691 request->alpha2[0] = alpha2[0]; 1692 request->alpha2[1] = alpha2[1]; 1693 - request->initiator = NL80211_REGDOM_SET_BY_USER, 1694 1695 queue_regulatory_request(request); 1696
··· 1690 request->wiphy_idx = WIPHY_IDX_STALE; 1691 request->alpha2[0] = alpha2[0]; 1692 request->alpha2[1] = alpha2[1]; 1693 + request->initiator = NL80211_REGDOM_SET_BY_USER; 1694 1695 queue_regulatory_request(request); 1696