Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

power: supply: rt9471: Add Richtek RT9471 charger driver

Add support for the RT9471 3A 1-Cell Li+ battery charger.

The RT9471 is a highly-integrated 3A switch mode battery charger with
low impedance power path to better optimize the charging efficiency.

Co-developed-by: Alina Yu <alina_yu@richtek.com>
Signed-off-by: Alina Yu <alina_yu@richtek.com>
Signed-off-by: ChiYuan Huang <cy_huang@richtek.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>

authored by

ChiYuan Huang and committed by
Sebastian Reichel
4a1a5f67 2bc68e58

+948
+16
drivers/power/supply/Kconfig
··· 793 793 help 794 794 Say Y to enable support for Richtek RT9455 battery charger. 795 795 796 + config CHARGER_RT9471 797 + tristate "Richtek RT9471 battery charger driver" 798 + depends on I2C && GPIOLIB && REGULATOR 799 + select REGMAP_I2C 800 + select REGMAP_IRQ 801 + select LINEAR_RANGES 802 + help 803 + This adds support for Richtek RT9471 battery charger. RT9471 is 804 + highly-integrated switch mode battery charger which is system power 805 + patch manageable device for single cell Li-Ion and Li-polymer battery. 806 + It can support BC12 detection on DPDM, and current and voltage 807 + regulation on both charging and boost mode. 808 + 809 + This driver can also be built as a module. If so, the module will be 810 + called rt9471. 811 + 796 812 config CHARGER_CROS_USBPD 797 813 tristate "ChromeOS EC based USBPD charger" 798 814 depends on CROS_USBPD_NOTIFY
+1
drivers/power/supply/Makefile
··· 57 57 obj-$(CONFIG_BATTERY_Z2) += z2_battery.o 58 58 obj-$(CONFIG_BATTERY_RT5033) += rt5033_battery.o 59 59 obj-$(CONFIG_CHARGER_RT9455) += rt9455_charger.o 60 + obj-$(CONFIG_CHARGER_RT9471) += rt9471.o 60 61 obj-$(CONFIG_BATTERY_S3C_ADC) += s3c_adc_battery.o 61 62 obj-$(CONFIG_BATTERY_TWL4030_MADC) += twl4030_madc_battery.o 62 63 obj-$(CONFIG_CHARGER_88PM860X) += 88pm860x_charger.o
+931
drivers/power/supply/rt9471.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-only 2 + /* 3 + * Copyright (C) 2022 Richtek Technology Corp. 4 + * 5 + * Authors: Alina Yu <alina_yu@richtek.com> 6 + * ChiYuan Huang <cy_huang@richtek.com> 7 + */ 8 + 9 + #include <linux/bits.h> 10 + #include <linux/gpio/consumer.h> 11 + #include <linux/i2c.h> 12 + #include <linux/interrupt.h> 13 + #include <linux/kstrtox.h> 14 + #include <linux/linear_range.h> 15 + #include <linux/mod_devicetable.h> 16 + #include <linux/module.h> 17 + #include <linux/mutex.h> 18 + #include <linux/of.h> 19 + #include <linux/power_supply.h> 20 + #include <linux/regmap.h> 21 + #include <linux/regulator/driver.h> 22 + #include <linux/sysfs.h> 23 + 24 + #define RT9471_REG_OTGCFG 0x00 25 + #define RT9471_REG_TOP 0x01 26 + #define RT9471_REG_FUNC 0x02 27 + #define RT9471_REG_IBUS 0x03 28 + #define RT9471_REG_VBUS 0x04 29 + #define RT9471_REG_PRECHG 0x05 30 + #define RT9471_REG_VCHG 0x07 31 + #define RT9471_REG_ICHG 0x08 32 + #define RT9471_REG_CHGTMR 0x09 33 + #define RT9471_REG_EOC 0x0A 34 + #define RT9471_REG_INFO 0x0B 35 + #define RT9471_REG_JEITA 0x0C 36 + #define RT9471_REG_PUMP_EXP 0x0D 37 + #define RT9471_REG_DPDMDET 0x0E 38 + #define RT9471_REG_ICSTAT 0x0F 39 + #define RT9471_REG_STAT0 0x10 40 + #define RT9471_REG_STAT1 0x11 41 + #define RT9471_REG_STAT2 0x12 42 + #define RT9471_REG_IRQ0 0x20 43 + #define RT9471_REG_MASK0 0x30 44 + 45 + #define RT9471_OTGCV_MASK GENMASK(7, 6) 46 + #define RT9471_OTGCC_MASK BIT(0) 47 + #define RT9471_OTGEN_MASK BIT(1) 48 + #define RT9471_CHGFAULT_MASK GENMASK(4, 1) 49 + 50 + #define RT9471_NUM_IRQ_REGS 4 51 + #define RT9471_OTGCV_MINUV 4850000 52 + #define RT9471_OTGCV_STEPUV 150000 53 + #define RT9471_NUM_VOTG 4 54 + #define RT9471_VCHG_MAXUV 4700000 55 + #define RT9471_ICHG_MAXUA 3150000 56 + 57 + /* Device ID */ 58 + #define RT9470_DEVID 0x09 59 + #define RT9470D_DEVID 0x0A 60 + #define RT9471_DEVID 0x0D 61 + #define RT9471D_DEVID 0x0E 62 + 63 + /* IRQ number */ 64 + #define RT9471_IRQ_BC12_DONE 0 65 + #define RT9471_IRQ_DETACH 1 66 + #define RT9471_IRQ_RECHG 2 67 + #define RT9471_IRQ_CHG_DONE 3 68 + #define RT9471_IRQ_BG_CHG 4 69 + #define RT9471_IRQ_IE0C 5 70 + #define RT9471_IRQ_CHG_RDY 6 71 + #define RT9471_IRQ_VBUS_GD 7 72 + #define RT9471_IRQ_CHG_BATOV 9 73 + #define RT9471_IRQ_CHG_SYSOV 10 74 + #define RT9471_IRQ_CHG_TOUT 11 75 + #define RT9471_IRQ_CHG_BUSUV 12 76 + #define RT9471_IRQ_CHG_THREG 13 77 + #define RT9471_IRQ_CHG_AICR 14 78 + #define RT9471_IRQ_CHG_MIVR 15 79 + #define RT9471_IRQ_SYS_SHORT 16 80 + #define RT9471_IRQ_SYS_MIN 17 81 + #define RT9471_IRQ_AICC_DONE 18 82 + #define RT9471_IRQ_PE_DONE 19 83 + #define RT9471_IRQ_JEITA_COLD 20 84 + #define RT9471_IRQ_JEITA_COOL 21 85 + #define RT9471_IRQ_JEITA_WARM 22 86 + #define RT9471_IRQ_JEITA_HOT 23 87 + #define RT9471_IRQ_OTG_FAULT 24 88 + #define RT9471_IRQ_OTG_LBP 25 89 + #define RT9471_IRQ_OTG_CC 26 90 + #define RT9471_IRQ_WDT 29 91 + #define RT9471_IRQ_VAC_OV 30 92 + #define RT9471_IRQ_OTP 31 93 + 94 + enum rt9471_fields { 95 + F_WDT = 0, 96 + F_WDT_RST, 97 + F_CHG_EN, 98 + F_HZ, 99 + F_BATFET_DIS, 100 + F_AICR, 101 + F_AICC_EN, 102 + F_MIVR, 103 + F_IPRE_CHG, 104 + F_VPRE_CHG, 105 + F_VBAT_REG, 106 + F_ICHG_REG, 107 + F_EOC_RST, 108 + F_TE, 109 + F_IEOC_CHG, 110 + F_DEVICE_ID, 111 + F_REG_RST, 112 + F_BC12_EN, 113 + F_IC_STAT, 114 + F_PORT_STAT, 115 + F_ST_CHG_DONE, 116 + F_ST_CHG_RDY, 117 + F_ST_VBUS_GD, 118 + F_MAX_FIELDS 119 + }; 120 + 121 + enum rt9471_ranges { 122 + RT9471_RANGE_AICR = 0, 123 + RT9471_RANGE_MIVR, 124 + RT9471_RANGE_IPRE, 125 + RT9471_RANGE_VCHG, 126 + RT9471_RANGE_ICHG, 127 + RT9471_RANGE_IEOC, 128 + RT9471_MAX_RANGES 129 + }; 130 + 131 + enum { 132 + RT9471_PORTSTAT_APPLE_10W = 8, 133 + RT9471_PORTSTAT_SAMSUNG_10W, 134 + RT9471_PORTSTAT_APPLE_5W, 135 + RT9471_PORTSTAT_APPLE_12W, 136 + RT9471_PORTSTAT_NSTD, 137 + RT9471_PORTSTAT_SDP, 138 + RT9471_PORTSTAT_CDP, 139 + RT9471_PORTSTAT_DCP, 140 + }; 141 + 142 + struct rt9471_chip { 143 + struct device *dev; 144 + struct gpio_desc *ce_gpio; 145 + struct regmap *regmap; 146 + struct regmap_field *rm_fields[F_MAX_FIELDS]; 147 + struct regmap_irq_chip_data *irq_chip_data; 148 + struct regulator_dev *otg_rdev; 149 + struct power_supply *psy; 150 + struct power_supply_desc psy_desc; 151 + struct mutex var_lock; 152 + enum power_supply_usb_type psy_usb_type; 153 + int psy_usb_curr; 154 + }; 155 + 156 + static const struct reg_field rt9471_reg_fields[F_MAX_FIELDS] = { 157 + [F_WDT] = REG_FIELD(RT9471_REG_TOP, 0, 0), 158 + [F_WDT_RST] = REG_FIELD(RT9471_REG_TOP, 1, 1), 159 + [F_CHG_EN] = REG_FIELD(RT9471_REG_FUNC, 0, 0), 160 + [F_HZ] = REG_FIELD(RT9471_REG_FUNC, 5, 5), 161 + [F_BATFET_DIS] = REG_FIELD(RT9471_REG_FUNC, 7, 7), 162 + [F_AICR] = REG_FIELD(RT9471_REG_IBUS, 0, 5), 163 + [F_AICC_EN] = REG_FIELD(RT9471_REG_IBUS, 7, 7), 164 + [F_MIVR] = REG_FIELD(RT9471_REG_VBUS, 0, 3), 165 + [F_IPRE_CHG] = REG_FIELD(RT9471_REG_PRECHG, 0, 3), 166 + [F_VPRE_CHG] = REG_FIELD(RT9471_REG_PRECHG, 4, 6), 167 + [F_VBAT_REG] = REG_FIELD(RT9471_REG_VCHG, 0, 6), 168 + [F_ICHG_REG] = REG_FIELD(RT9471_REG_ICHG, 0, 5), 169 + [F_EOC_RST] = REG_FIELD(RT9471_REG_EOC, 0, 0), 170 + [F_TE] = REG_FIELD(RT9471_REG_EOC, 1, 1), 171 + [F_IEOC_CHG] = REG_FIELD(RT9471_REG_EOC, 4, 7), 172 + [F_DEVICE_ID] = REG_FIELD(RT9471_REG_INFO, 3, 6), 173 + [F_REG_RST] = REG_FIELD(RT9471_REG_INFO, 7, 7), 174 + [F_BC12_EN] = REG_FIELD(RT9471_REG_DPDMDET, 7, 7), 175 + [F_IC_STAT] = REG_FIELD(RT9471_REG_ICSTAT, 0, 3), 176 + [F_PORT_STAT] = REG_FIELD(RT9471_REG_ICSTAT, 4, 7), 177 + [F_ST_CHG_DONE] = REG_FIELD(RT9471_REG_STAT0, 3, 3), 178 + [F_ST_CHG_RDY] = REG_FIELD(RT9471_REG_STAT0, 6, 6), 179 + [F_ST_VBUS_GD] = REG_FIELD(RT9471_REG_STAT0, 7, 7), 180 + }; 181 + 182 + static const struct linear_range rt9471_chg_ranges[RT9471_MAX_RANGES] = { 183 + [RT9471_RANGE_AICR] = { .min = 50000, .min_sel = 1, .max_sel = 63, .step = 50000 }, 184 + [RT9471_RANGE_MIVR] = { .min = 3900000, .min_sel = 0, .max_sel = 15, .step = 100000 }, 185 + [RT9471_RANGE_IPRE] = { .min = 50000, .min_sel = 0, .max_sel = 15, .step = 50000 }, 186 + [RT9471_RANGE_VCHG] = { .min = 3900000, .min_sel = 0, .max_sel = 80, .step = 10000 }, 187 + [RT9471_RANGE_ICHG] = { .min = 0, .min_sel = 0, .max_sel = 63, .step = 50000 }, 188 + [RT9471_RANGE_IEOC] = { .min = 50000, .min_sel = 0, .max_sel = 15, .step = 50000 }, 189 + }; 190 + 191 + static int rt9471_set_value_by_field_range(struct rt9471_chip *chip, 192 + enum rt9471_fields field, 193 + enum rt9471_ranges range, int val) 194 + { 195 + unsigned int sel; 196 + 197 + if (val < 0) 198 + return -EINVAL; 199 + 200 + linear_range_get_selector_within(rt9471_chg_ranges + range, val, &sel); 201 + 202 + return regmap_field_write(chip->rm_fields[field], sel); 203 + } 204 + 205 + 206 + static int rt9471_get_value_by_field_range(struct rt9471_chip *chip, 207 + enum rt9471_fields field, 208 + enum rt9471_ranges range, int *val) 209 + { 210 + unsigned int sel, rvalue; 211 + int ret; 212 + 213 + ret = regmap_field_read(chip->rm_fields[field], &sel); 214 + if (ret) 215 + return ret; 216 + 217 + ret = linear_range_get_value(rt9471_chg_ranges + range, sel, &rvalue); 218 + if (ret) 219 + return ret; 220 + 221 + *val = rvalue; 222 + return 0; 223 + } 224 + 225 + static int rt9471_set_ieoc(struct rt9471_chip *chip, int microamp) 226 + { 227 + int ret; 228 + 229 + if (microamp == 0) 230 + return regmap_field_write(chip->rm_fields[F_TE], 0); 231 + 232 + ret = rt9471_set_value_by_field_range(chip, F_IEOC_CHG, RT9471_RANGE_IEOC, microamp); 233 + if (ret) 234 + return ret; 235 + 236 + /* After applying the new IEOC value, enable charge termination */ 237 + return regmap_field_write(chip->rm_fields[F_TE], 1); 238 + } 239 + 240 + static int rt9471_get_ieoc(struct rt9471_chip *chip, int *microamp) 241 + { 242 + unsigned int chg_term_enable; 243 + int ret; 244 + 245 + ret = regmap_field_read(chip->rm_fields[F_TE], &chg_term_enable); 246 + if (ret) 247 + return ret; 248 + 249 + if (!chg_term_enable) { 250 + *microamp = 0; 251 + return 0; 252 + } 253 + 254 + return rt9471_get_value_by_field_range(chip, F_IEOC_CHG, RT9471_RANGE_IEOC, microamp); 255 + } 256 + 257 + static int rt9471_get_status(struct rt9471_chip *chip, int *status) 258 + { 259 + unsigned int chg_ready, chg_done, fault_stat; 260 + int ret; 261 + 262 + ret = regmap_field_read(chip->rm_fields[F_ST_CHG_RDY], &chg_ready); 263 + if (ret) 264 + return ret; 265 + 266 + ret = regmap_field_read(chip->rm_fields[F_ST_CHG_DONE], &chg_done); 267 + if (ret) 268 + return ret; 269 + 270 + ret = regmap_read(chip->regmap, RT9471_REG_STAT1, &fault_stat); 271 + if (ret) 272 + return ret; 273 + 274 + fault_stat &= RT9471_CHGFAULT_MASK; 275 + 276 + if (chg_ready && chg_done) 277 + *status = POWER_SUPPLY_STATUS_FULL; 278 + else if (chg_ready && fault_stat) 279 + *status = POWER_SUPPLY_STATUS_NOT_CHARGING; 280 + else if (chg_ready && !fault_stat) 281 + *status = POWER_SUPPLY_STATUS_CHARGING; 282 + else 283 + *status = POWER_SUPPLY_STATUS_DISCHARGING; 284 + 285 + return 0; 286 + } 287 + 288 + static int rt9471_get_vbus_good(struct rt9471_chip *chip, int *stat) 289 + { 290 + unsigned int vbus_gd; 291 + int ret; 292 + 293 + ret = regmap_field_read(chip->rm_fields[F_ST_VBUS_GD], &vbus_gd); 294 + if (ret) 295 + return ret; 296 + 297 + *stat = vbus_gd; 298 + return 0; 299 + } 300 + 301 + static int rt9471_get_usb_type(struct rt9471_chip *chip, int *usb_type) 302 + { 303 + mutex_lock(&chip->var_lock); 304 + *usb_type = chip->psy_usb_type; 305 + mutex_unlock(&chip->var_lock); 306 + 307 + return 0; 308 + } 309 + 310 + static int rt9471_get_usb_type_current(struct rt9471_chip *chip, 311 + int *microamp) 312 + { 313 + mutex_lock(&chip->var_lock); 314 + *microamp = chip->psy_usb_curr; 315 + mutex_unlock(&chip->var_lock); 316 + 317 + return 0; 318 + } 319 + 320 + static enum power_supply_property rt9471_charger_properties[] = { 321 + POWER_SUPPLY_PROP_STATUS, 322 + POWER_SUPPLY_PROP_ONLINE, 323 + POWER_SUPPLY_PROP_CURRENT_MAX, 324 + POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT, 325 + POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX, 326 + POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE, 327 + POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX, 328 + POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT, 329 + POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT, 330 + POWER_SUPPLY_PROP_USB_TYPE, 331 + POWER_SUPPLY_PROP_PRECHARGE_CURRENT, 332 + POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT, 333 + POWER_SUPPLY_PROP_MODEL_NAME, 334 + POWER_SUPPLY_PROP_MANUFACTURER, 335 + }; 336 + 337 + static enum power_supply_usb_type rt9471_charger_usb_types[] = { 338 + POWER_SUPPLY_USB_TYPE_UNKNOWN, 339 + POWER_SUPPLY_USB_TYPE_SDP, 340 + POWER_SUPPLY_USB_TYPE_DCP, 341 + POWER_SUPPLY_USB_TYPE_CDP, 342 + POWER_SUPPLY_USB_TYPE_APPLE_BRICK_ID, 343 + }; 344 + 345 + static int rt9471_charger_property_is_writeable(struct power_supply *psy, 346 + enum power_supply_property psp) 347 + { 348 + switch (psp) { 349 + case POWER_SUPPLY_PROP_STATUS: 350 + case POWER_SUPPLY_PROP_ONLINE: 351 + case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT: 352 + case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE: 353 + case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT: 354 + case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT: 355 + case POWER_SUPPLY_PROP_PRECHARGE_CURRENT: 356 + case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT: 357 + return 1; 358 + default: 359 + return 0; 360 + } 361 + } 362 + 363 + static int rt9471_charger_set_property(struct power_supply *psy, 364 + enum power_supply_property psp, 365 + const union power_supply_propval *val) 366 + { 367 + struct rt9471_chip *chip = power_supply_get_drvdata(psy); 368 + int value = val->intval; 369 + 370 + switch (psp) { 371 + case POWER_SUPPLY_PROP_STATUS: 372 + return regmap_field_write(chip->rm_fields[F_CHG_EN], !!value); 373 + case POWER_SUPPLY_PROP_ONLINE: 374 + return regmap_field_write(chip->rm_fields[F_HZ], !value); 375 + case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT: 376 + return rt9471_set_value_by_field_range(chip, F_ICHG_REG, RT9471_RANGE_ICHG, value); 377 + case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE: 378 + return rt9471_set_value_by_field_range(chip, F_VBAT_REG, RT9471_RANGE_VCHG, value); 379 + case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT: 380 + return rt9471_set_value_by_field_range(chip, F_AICR, RT9471_RANGE_AICR, value); 381 + case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT: 382 + return rt9471_set_value_by_field_range(chip, F_MIVR, RT9471_RANGE_MIVR, value); 383 + case POWER_SUPPLY_PROP_PRECHARGE_CURRENT: 384 + return rt9471_set_value_by_field_range(chip, F_IPRE_CHG, RT9471_RANGE_IPRE, value); 385 + case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT: 386 + return rt9471_set_ieoc(chip, val->intval); 387 + default: 388 + return -EINVAL; 389 + } 390 + } 391 + 392 + static const char * const rt9471_manufacturer = "Richtek Technology Corp."; 393 + static const char * const rt9471_model = "RT9471"; 394 + 395 + static int rt9471_charger_get_property(struct power_supply *psy, 396 + enum power_supply_property psp, 397 + union power_supply_propval *val) 398 + { 399 + struct rt9471_chip *chip = power_supply_get_drvdata(psy); 400 + int *pvalue = &val->intval; 401 + 402 + switch (psp) { 403 + case POWER_SUPPLY_PROP_STATUS: 404 + return rt9471_get_status(chip, pvalue); 405 + case POWER_SUPPLY_PROP_ONLINE: 406 + return rt9471_get_vbus_good(chip, pvalue); 407 + case POWER_SUPPLY_PROP_CURRENT_MAX: 408 + return rt9471_get_usb_type_current(chip, pvalue); 409 + case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT: 410 + return rt9471_get_value_by_field_range(chip, F_ICHG_REG, RT9471_RANGE_ICHG, pvalue); 411 + case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX: 412 + *pvalue = RT9471_ICHG_MAXUA; 413 + return 0; 414 + case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE: 415 + return rt9471_get_value_by_field_range(chip, F_VBAT_REG, RT9471_RANGE_VCHG, pvalue); 416 + case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX: 417 + val->intval = RT9471_VCHG_MAXUV; 418 + return 0; 419 + case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT: 420 + return rt9471_get_value_by_field_range(chip, F_AICR, RT9471_RANGE_AICR, pvalue); 421 + case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT: 422 + return rt9471_get_value_by_field_range(chip, F_MIVR, RT9471_RANGE_MIVR, pvalue); 423 + case POWER_SUPPLY_PROP_USB_TYPE: 424 + return rt9471_get_usb_type(chip, pvalue); 425 + case POWER_SUPPLY_PROP_PRECHARGE_CURRENT: 426 + return rt9471_get_value_by_field_range(chip, F_IPRE_CHG, RT9471_RANGE_IPRE, pvalue); 427 + case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT: 428 + return rt9471_get_ieoc(chip, pvalue); 429 + case POWER_SUPPLY_PROP_MODEL_NAME: 430 + val->strval = rt9471_model; 431 + return 0; 432 + case POWER_SUPPLY_PROP_MANUFACTURER: 433 + val->strval = rt9471_manufacturer; 434 + return 0; 435 + default: 436 + return -ENODATA; 437 + } 438 + } 439 + 440 + static irqreturn_t rt9471_vbus_gd_handler(int irqno, void *devid) 441 + { 442 + struct rt9471_chip *chip = devid; 443 + 444 + power_supply_changed(chip->psy); 445 + 446 + return IRQ_HANDLED; 447 + } 448 + 449 + static irqreturn_t rt9471_detach_handler(int irqno, void *devid) 450 + { 451 + struct rt9471_chip *chip = devid; 452 + unsigned int vbus_gd; 453 + int ret; 454 + 455 + ret = regmap_field_read(chip->rm_fields[F_ST_VBUS_GD], &vbus_gd); 456 + if (ret) 457 + return IRQ_NONE; 458 + 459 + /* Only focus on really detached */ 460 + if (vbus_gd) 461 + return IRQ_HANDLED; 462 + 463 + mutex_lock(&chip->var_lock); 464 + chip->psy_usb_type = POWER_SUPPLY_USB_TYPE_UNKNOWN; 465 + chip->psy_usb_curr = 0; 466 + mutex_unlock(&chip->var_lock); 467 + 468 + power_supply_changed(chip->psy); 469 + 470 + return IRQ_HANDLED; 471 + } 472 + 473 + static irqreturn_t rt9471_bc12_done_handler(int irqno, void *devid) 474 + { 475 + struct rt9471_chip *chip = devid; 476 + enum power_supply_usb_type usb_type; 477 + unsigned int port_stat; 478 + int usb_curr, ret; 479 + 480 + ret = regmap_field_read(chip->rm_fields[F_PORT_STAT], &port_stat); 481 + if (ret) 482 + return IRQ_NONE; 483 + 484 + switch (port_stat) { 485 + case RT9471_PORTSTAT_APPLE_10W: 486 + usb_type = POWER_SUPPLY_USB_TYPE_APPLE_BRICK_ID; 487 + usb_curr = 2000000; 488 + break; 489 + case RT9471_PORTSTAT_APPLE_5W: 490 + usb_type = POWER_SUPPLY_USB_TYPE_APPLE_BRICK_ID; 491 + usb_curr = 1000000; 492 + break; 493 + case RT9471_PORTSTAT_APPLE_12W: 494 + usb_type = POWER_SUPPLY_USB_TYPE_APPLE_BRICK_ID; 495 + usb_curr = 2400000; 496 + break; 497 + case RT9471_PORTSTAT_SAMSUNG_10W: 498 + usb_type = POWER_SUPPLY_USB_TYPE_DCP; 499 + usb_curr = 2000000; 500 + break; 501 + case RT9471_PORTSTAT_DCP: 502 + usb_type = POWER_SUPPLY_USB_TYPE_DCP; 503 + usb_curr = 1500000; 504 + break; 505 + case RT9471_PORTSTAT_NSTD: 506 + case RT9471_PORTSTAT_SDP: 507 + usb_type = POWER_SUPPLY_USB_TYPE_SDP; 508 + usb_curr = 500000; 509 + break; 510 + case RT9471_PORTSTAT_CDP: 511 + usb_type = POWER_SUPPLY_USB_TYPE_CDP; 512 + usb_curr = 1500000; 513 + break; 514 + default: 515 + usb_type = POWER_SUPPLY_USB_TYPE_UNKNOWN; 516 + usb_curr = 0; 517 + break; 518 + } 519 + 520 + mutex_lock(&chip->var_lock); 521 + chip->psy_usb_type = usb_type; 522 + chip->psy_usb_curr = usb_curr; 523 + mutex_unlock(&chip->var_lock); 524 + 525 + power_supply_changed(chip->psy); 526 + 527 + return IRQ_HANDLED; 528 + } 529 + 530 + static irqreturn_t rt9471_wdt_handler(int irqno, void *devid) 531 + { 532 + struct rt9471_chip *chip = devid; 533 + int ret; 534 + 535 + ret = regmap_field_write(chip->rm_fields[F_WDT_RST], 1); 536 + 537 + return ret ? IRQ_NONE : IRQ_HANDLED; 538 + } 539 + 540 + static irqreturn_t rt9471_otg_fault_handler(int irqno, void *devid) 541 + { 542 + struct rt9471_chip *chip = devid; 543 + 544 + regulator_notifier_call_chain(chip->otg_rdev, REGULATOR_EVENT_FAIL, NULL); 545 + 546 + return IRQ_HANDLED; 547 + } 548 + 549 + #define RT9471_IRQ_DESC(_name, _hwirq) \ 550 + { \ 551 + .name = #_name, \ 552 + .hwirq = _hwirq, \ 553 + .handler = rt9471_##_name##_handler, \ 554 + } 555 + 556 + static int rt9471_register_interrupts(struct rt9471_chip *chip) 557 + { 558 + struct device *dev = chip->dev; 559 + static const struct { 560 + char *name; 561 + int hwirq; 562 + irq_handler_t handler; 563 + } chg_irqs[] = { 564 + RT9471_IRQ_DESC(vbus_gd, RT9471_IRQ_VBUS_GD), 565 + RT9471_IRQ_DESC(detach, RT9471_IRQ_DETACH), 566 + RT9471_IRQ_DESC(bc12_done, RT9471_IRQ_BC12_DONE), 567 + RT9471_IRQ_DESC(wdt, RT9471_IRQ_WDT), 568 + RT9471_IRQ_DESC(otg_fault, RT9471_IRQ_OTG_FAULT), 569 + }, *curr; 570 + int i, virq, ret; 571 + 572 + for (i = 0; i < ARRAY_SIZE(chg_irqs); i++) { 573 + curr = chg_irqs + i; 574 + 575 + virq = regmap_irq_get_virq(chip->irq_chip_data, curr->hwirq); 576 + if (virq <= 0) 577 + return virq; 578 + 579 + ret = devm_request_threaded_irq(dev, virq, NULL, curr->handler, 580 + IRQF_ONESHOT, curr->name, chip); 581 + if (ret) 582 + return dev_err_probe(dev, ret, "Failed to register IRQ (%s)\n", 583 + curr->name); 584 + } 585 + 586 + return 0; 587 + } 588 + 589 + static const struct regulator_ops rt9471_otg_ops = { 590 + .enable = regulator_enable_regmap, 591 + .disable = regulator_disable_regmap, 592 + .is_enabled = regulator_is_enabled_regmap, 593 + .list_voltage = regulator_list_voltage_linear, 594 + .get_voltage_sel = regulator_get_voltage_sel_regmap, 595 + .set_voltage_sel = regulator_set_voltage_sel_regmap, 596 + .set_current_limit = regulator_set_current_limit_regmap, 597 + .get_current_limit = regulator_get_current_limit_regmap, 598 + }; 599 + 600 + static const unsigned int rt9471_otg_microamp[] = { 500000, 1200000, }; 601 + 602 + static const struct regulator_desc rt9471_otg_rdesc = { 603 + .of_match = of_match_ptr("usb-otg-vbus-regulator"), 604 + .name = "rt9471-otg-vbus", 605 + .owner = THIS_MODULE, 606 + .type = REGULATOR_VOLTAGE, 607 + .ops = &rt9471_otg_ops, 608 + .min_uV = RT9471_OTGCV_MINUV, 609 + .uV_step = RT9471_OTGCV_STEPUV, 610 + .n_voltages = RT9471_NUM_VOTG, 611 + .curr_table = rt9471_otg_microamp, 612 + .n_current_limits = ARRAY_SIZE(rt9471_otg_microamp), 613 + .enable_mask = RT9471_OTGEN_MASK, 614 + .enable_reg = RT9471_REG_FUNC, 615 + .vsel_reg = RT9471_REG_OTGCFG, 616 + .vsel_mask = RT9471_OTGCV_MASK, 617 + .csel_reg = RT9471_REG_OTGCFG, 618 + .csel_mask = RT9471_OTGCC_MASK, 619 + }; 620 + 621 + static int rt9471_register_otg_regulator(struct rt9471_chip *chip) 622 + { 623 + struct device *dev = chip->dev; 624 + struct regulator_config cfg = { .dev = dev, .driver_data = chip }; 625 + 626 + chip->otg_rdev = devm_regulator_register(dev, &rt9471_otg_rdesc, &cfg); 627 + 628 + return PTR_ERR_OR_ZERO(chip->otg_rdev); 629 + } 630 + 631 + static inline struct rt9471_chip *psy_device_to_chip(struct device *dev) 632 + { 633 + return power_supply_get_drvdata(to_power_supply(dev)); 634 + } 635 + 636 + static ssize_t sysoff_enable_show(struct device *dev, 637 + struct device_attribute *attr, char *buf) 638 + { 639 + struct rt9471_chip *chip = psy_device_to_chip(dev); 640 + unsigned int sysoff_enable; 641 + int ret; 642 + 643 + ret = regmap_field_read(chip->rm_fields[F_BATFET_DIS], &sysoff_enable); 644 + if (ret) 645 + return ret; 646 + 647 + return sysfs_emit(buf, "%d\n", sysoff_enable); 648 + } 649 + 650 + static ssize_t sysoff_enable_store(struct device *dev, 651 + struct device_attribute *attr, 652 + const char *buf, size_t count) 653 + { 654 + struct rt9471_chip *chip = psy_device_to_chip(dev); 655 + unsigned int tmp; 656 + int ret; 657 + 658 + ret = kstrtouint(buf, 10, &tmp); 659 + if (ret) 660 + return ret; 661 + 662 + ret = regmap_field_write(chip->rm_fields[F_BATFET_DIS], !!tmp); 663 + if (ret) 664 + return ret; 665 + 666 + return count; 667 + } 668 + 669 + static ssize_t port_detect_enable_show(struct device *dev, 670 + struct device_attribute *attr, char *buf) 671 + { 672 + struct rt9471_chip *chip = psy_device_to_chip(dev); 673 + unsigned int bc12_enable; 674 + int ret; 675 + 676 + ret = regmap_field_read(chip->rm_fields[F_BC12_EN], &bc12_enable); 677 + if (ret) 678 + return ret; 679 + 680 + return sysfs_emit(buf, "%d\n", bc12_enable); 681 + } 682 + 683 + static ssize_t port_detect_enable_store(struct device *dev, 684 + struct device_attribute *attr, 685 + const char *buf, size_t count) 686 + { 687 + struct rt9471_chip *chip = psy_device_to_chip(dev); 688 + unsigned int tmp; 689 + int ret; 690 + 691 + ret = kstrtouint(buf, 10, &tmp); 692 + if (ret) 693 + return ret; 694 + 695 + ret = regmap_field_write(chip->rm_fields[F_BC12_EN], !!tmp); 696 + if (ret) 697 + return ret; 698 + 699 + return count; 700 + } 701 + 702 + static DEVICE_ATTR_RW(sysoff_enable); 703 + static DEVICE_ATTR_RW(port_detect_enable); 704 + 705 + static struct attribute *rt9471_sysfs_attrs[] = { 706 + &dev_attr_sysoff_enable.attr, 707 + &dev_attr_port_detect_enable.attr, 708 + NULL 709 + }; 710 + 711 + ATTRIBUTE_GROUPS(rt9471_sysfs); 712 + 713 + static int rt9471_register_psy(struct rt9471_chip *chip) 714 + { 715 + struct device *dev = chip->dev; 716 + struct power_supply_desc *desc = &chip->psy_desc; 717 + struct power_supply_config cfg = {}; 718 + char *psy_name; 719 + 720 + cfg.drv_data = chip; 721 + cfg.of_node = dev->of_node; 722 + cfg.attr_grp = rt9471_sysfs_groups; 723 + 724 + psy_name = devm_kasprintf(dev, GFP_KERNEL, "rt9471-%s", dev_name(dev)); 725 + if (!psy_name) 726 + return -ENOMEM; 727 + 728 + desc->name = psy_name; 729 + desc->type = POWER_SUPPLY_TYPE_USB; 730 + desc->usb_types = rt9471_charger_usb_types; 731 + desc->num_usb_types = ARRAY_SIZE(rt9471_charger_usb_types); 732 + desc->properties = rt9471_charger_properties; 733 + desc->num_properties = ARRAY_SIZE(rt9471_charger_properties); 734 + desc->get_property = rt9471_charger_get_property; 735 + desc->set_property = rt9471_charger_set_property; 736 + desc->property_is_writeable = rt9471_charger_property_is_writeable; 737 + 738 + chip->psy = devm_power_supply_register(dev, desc, &cfg); 739 + 740 + return PTR_ERR_OR_ZERO(chip->psy); 741 + } 742 + 743 + static const struct regmap_irq rt9471_regmap_irqs[] = { 744 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_BC12_DONE, 8), 745 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_DETACH, 8), 746 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_RECHG, 8), 747 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_DONE, 8), 748 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_BG_CHG, 8), 749 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_IE0C, 8), 750 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_RDY, 8), 751 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_VBUS_GD, 8), 752 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_BATOV, 8), 753 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_SYSOV, 8), 754 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_TOUT, 8), 755 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_BUSUV, 8), 756 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_THREG, 8), 757 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_AICR, 8), 758 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_MIVR, 8), 759 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_SYS_SHORT, 8), 760 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_SYS_MIN, 8), 761 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_AICC_DONE, 8), 762 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_PE_DONE, 8), 763 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_JEITA_COLD, 8), 764 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_JEITA_COOL, 8), 765 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_JEITA_WARM, 8), 766 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_JEITA_HOT, 8), 767 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_OTG_FAULT, 8), 768 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_OTG_LBP, 8), 769 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_OTG_CC, 8), 770 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_WDT, 8), 771 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_VAC_OV, 8), 772 + REGMAP_IRQ_REG_LINE(RT9471_IRQ_OTP, 8), 773 + }; 774 + 775 + static const struct regmap_irq_chip rt9471_irq_chip = { 776 + .name = "rt9471-irqs", 777 + .status_base = RT9471_REG_IRQ0, 778 + .mask_base = RT9471_REG_MASK0, 779 + .num_regs = RT9471_NUM_IRQ_REGS, 780 + .irqs = rt9471_regmap_irqs, 781 + .num_irqs = ARRAY_SIZE(rt9471_regmap_irqs), 782 + }; 783 + 784 + static const struct reg_sequence rt9471_init_regs[] = { 785 + REG_SEQ0(RT9471_REG_INFO, 0x80), /* REG_RST */ 786 + REG_SEQ0(RT9471_REG_TOP, 0xC0), /* WDT = 0 */ 787 + REG_SEQ0(RT9471_REG_FUNC, 0x01), /* BATFET_DIS_DLY = 0 */ 788 + REG_SEQ0(RT9471_REG_IBUS, 0x0A), /* AUTO_AICR = 0 */ 789 + REG_SEQ0(RT9471_REG_VBUS, 0xC6), /* VAC_OVP = 14V */ 790 + REG_SEQ0(RT9471_REG_JEITA, 0x38), /* JEITA = 0 */ 791 + REG_SEQ0(RT9471_REG_DPDMDET, 0x31), /* BC12_EN = 0, DCP_DP_OPT = 1 */ 792 + }; 793 + 794 + static int rt9471_check_devinfo(struct rt9471_chip *chip) 795 + { 796 + struct device *dev = chip->dev; 797 + unsigned int dev_id; 798 + int ret; 799 + 800 + ret = regmap_field_read(chip->rm_fields[F_DEVICE_ID], &dev_id); 801 + if (ret) 802 + return dev_err_probe(dev, ret, "Failed to read device_id\n"); 803 + 804 + switch (dev_id) { 805 + case RT9470_DEVID: 806 + case RT9470D_DEVID: 807 + case RT9471_DEVID: 808 + case RT9471D_DEVID: 809 + return 0; 810 + default: 811 + return dev_err_probe(dev, -ENODEV, "Incorrect device id\n"); 812 + } 813 + } 814 + 815 + static bool rt9471_accessible_reg(struct device *dev, unsigned int reg) 816 + { 817 + switch (reg) { 818 + case 0x00 ... 0x0F: 819 + case 0x10 ... 0x13: 820 + case 0x20 ... 0x33: 821 + case 0x40 ... 0xA1: 822 + return true; 823 + default: 824 + return false; 825 + } 826 + } 827 + 828 + static const struct regmap_config rt9471_regmap_config = { 829 + .reg_bits = 8, 830 + .val_bits = 8, 831 + .max_register = 0xA1, 832 + .writeable_reg = rt9471_accessible_reg, 833 + .readable_reg = rt9471_accessible_reg, 834 + }; 835 + 836 + static int rt9471_probe(struct i2c_client *i2c) 837 + { 838 + struct device *dev = &i2c->dev; 839 + struct rt9471_chip *chip; 840 + struct gpio_desc *ce_gpio; 841 + struct regmap *regmap; 842 + int ret; 843 + 844 + chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); 845 + if (!chip) 846 + return -ENOMEM; 847 + 848 + chip->dev = dev; 849 + mutex_init(&chip->var_lock); 850 + i2c_set_clientdata(i2c, chip); 851 + 852 + /* Default pull charge enable gpio to make 'CHG_EN' by SW control only */ 853 + ce_gpio = devm_gpiod_get_optional(dev, "charge-enable", GPIOD_OUT_HIGH); 854 + if (IS_ERR(chip->ce_gpio)) 855 + return dev_err_probe(dev, PTR_ERR(ce_gpio), 856 + "Failed to config charge enable gpio\n"); 857 + 858 + regmap = devm_regmap_init_i2c(i2c, &rt9471_regmap_config); 859 + if (IS_ERR(regmap)) 860 + return dev_err_probe(dev, PTR_ERR(regmap), "Failed to init regmap\n"); 861 + 862 + chip->regmap = regmap; 863 + 864 + ret = devm_regmap_field_bulk_alloc(dev, regmap, chip->rm_fields, 865 + rt9471_reg_fields, 866 + ARRAY_SIZE(rt9471_reg_fields)); 867 + if (ret) 868 + return dev_err_probe(dev, ret, "Failed to alloc regmap field\n"); 869 + 870 + ret = rt9471_check_devinfo(chip); 871 + if (ret) 872 + return ret; 873 + 874 + ret = regmap_register_patch(regmap, rt9471_init_regs, 875 + ARRAY_SIZE(rt9471_init_regs)); 876 + if (ret) 877 + return dev_err_probe(dev, ret, "Failed to init registers\n"); 878 + 879 + ret = devm_regmap_add_irq_chip(dev, regmap, i2c->irq, 880 + IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 0, 881 + &rt9471_irq_chip, &chip->irq_chip_data); 882 + if (ret) 883 + return dev_err_probe(dev, ret, "Failed to add IRQ chip\n"); 884 + 885 + ret = rt9471_register_psy(chip); 886 + if (ret) 887 + return dev_err_probe(dev, ret, "Failed to register psy\n"); 888 + 889 + ret = rt9471_register_otg_regulator(chip); 890 + if (ret) 891 + return dev_err_probe(dev, ret, "Failed to register otg\n"); 892 + 893 + ret = rt9471_register_interrupts(chip); 894 + if (ret) 895 + return ret; 896 + 897 + /* After IRQs are all initialized, enable port detection by default */ 898 + return regmap_field_write(chip->rm_fields[F_BC12_EN], 1); 899 + } 900 + 901 + static void rt9471_shutdown(struct i2c_client *i2c) 902 + { 903 + struct rt9471_chip *chip = i2c_get_clientdata(i2c); 904 + 905 + /* 906 + * There's no external reset pin. Do register reset to guarantee charger 907 + * function is normal after shutdown 908 + */ 909 + regmap_field_write(chip->rm_fields[F_REG_RST], 1); 910 + } 911 + 912 + static const struct of_device_id rt9471_of_device_id[] = { 913 + { .compatible = "richtek,rt9471" }, 914 + {} 915 + }; 916 + MODULE_DEVICE_TABLE(of, rt9471_of_device_id); 917 + 918 + static struct i2c_driver rt9471_driver = { 919 + .driver = { 920 + .name = "rt9471", 921 + .of_match_table = rt9471_of_device_id, 922 + }, 923 + .probe_new = rt9471_probe, 924 + .shutdown = rt9471_shutdown, 925 + }; 926 + module_i2c_driver(rt9471_driver); 927 + 928 + MODULE_DESCRIPTION("Richtek RT9471 charger driver"); 929 + MODULE_AUTHOR("Alina Yu <alina_yu@richtek.com>"); 930 + MODULE_AUTHOR("ChiYuan Huang <cy_huang@richtek.com>"); 931 + MODULE_LICENSE("GPL");