Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

[PATCH] Fix and enable EDAC sysfs operation

When EDAC was first introduced into the kernel it had a sysfs interface,
but due to some problems it was disabled in 2.6.16 and remained disabled in
2.6.17.

With feedback, several of the control and attribute files of that interface
had some good constructive feedback. PCI Blacklist/Whitelist was a major
set which has design issues and it has been removed in this patch. Instead
of storing PCI broken parity status in EDAC, it has been moved to the
pci_dev structure itself by a previous PCI patch. A future patch will
enable that feature in EDAC by utilizing the pci_dev info.

The sysfs is now enabled in this patch, with a minimal set of control and
attribute files for examining EDAC state and for enabling/disabling the
memory and PCI operations.

The Documentation for EDAC has also been updated to reflect the new state
of EDAC operation.

Signed-off-by:Doug Thompson <norsk5@xmisson.com>
Cc: Greg KH <greg@kroah.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

authored by

Doug Thompson and committed by
Linus Torvalds
49c0dab7 68e3c5e3

+226 -623
+27 -125
Documentation/drivers/edac/edac.txt
··· 35 35 to generate parity. Some vendors do not do this, and thus the parity bit 36 36 can "float" giving false positives. 37 37 38 - The PCI Parity EDAC device has the ability to "skip" known flaky 39 - cards during the parity scan. These are set by the parity "blacklist" 40 - interface in the sysfs for PCI Parity. (See the PCI section in the sysfs 41 - section below.) There is also a parity "whitelist" which is used as 42 - an explicit list of devices to scan, while the blacklist is a list 43 - of devices to skip. 38 + [There are patches in the kernel queue which will allow for storage of 39 + quirks of PCI devices reporting false parity positives. The 2.6.18 40 + kernel should have those patches included. When that becomes available, 41 + then EDAC will be patched to utilize that information to "skip" such 42 + devices.] 44 43 45 - EDAC will have future error detectors that will be added or integrated 46 - into EDAC in the following list: 44 + EDAC will have future error detectors that will be integrated with 45 + EDAC or added to it, in the following list: 47 46 48 47 MCE Machine Check Exception 49 48 MCA Machine Check Architecture ··· 92 93 there currently reside 2 'edac' components: 93 94 94 95 mc memory controller(s) system 95 - pci PCI status system 96 + pci PCI control and status system 96 97 97 98 98 99 ============================================================================ 99 100 Memory Controller (mc) Model 100 101 101 102 First a background on the memory controller's model abstracted in EDAC. 102 - Each mc device controls a set of DIMM memory modules. These modules are 103 + Each 'mc' device controls a set of DIMM memory modules. These modules are 103 104 laid out in a Chip-Select Row (csrowX) and Channel table (chX). There can 104 - be multiple csrows and two channels. 105 + be multiple csrows and multiple channels. 105 106 106 107 Memory controllers allow for several csrows, with 8 csrows being a typical value. 107 108 Yet, the actual number of csrows depends on the electrical "loading" 108 109 of a given motherboard, memory controller and DIMM characteristics. 109 110 110 111 Dual channels allows for 128 bit data transfers to the CPU from memory. 112 + Some newer chipsets allow for more than 2 channels, like Fully Buffered DIMMs 113 + (FB-DIMMs). The following example will assume 2 channels: 111 114 112 115 113 116 Channel 0 Channel 1 ··· 235 234 The time period, in milliseconds, for polling for error information. 236 235 Too small a value wastes resources. Too large a value might delay 237 236 necessary handling of errors and might loose valuable information for 238 - locating the error. 1000 milliseconds (once each second) is about 239 - right for most uses. 237 + locating the error. 1000 milliseconds (once each second) is the current 238 + default. Systems which require all the bandwidth they can get, may 239 + increase this. 240 240 241 241 LOAD TIME: module/kernel parameter: poll_msec=[0|1] 242 242 243 243 RUN TIME: echo "1000" >/sys/devices/system/edac/mc/poll_msec 244 - 245 - 246 - Module Version read-only attribute file: 247 - 248 - 'mc_version' 249 - 250 - The EDAC CORE module's version and compile date are shown here to 251 - indicate what EDAC is running. 252 - 253 244 254 245 255 246 ============================================================================ ··· 277 284 278 285 279 286 280 - DIMM capability attribute file: 281 - 282 - 'edac_capability' 283 - 284 - The EDAC (Error Detection and Correction) capabilities/modes of 285 - the memory controller hardware. 286 - 287 - 288 - DIMM Current Capability attribute file: 289 - 290 - 'edac_current_capability' 291 - 292 - The EDAC capabilities available with the hardware 293 - configuration. This may not be the same as "EDAC capability" 294 - if the correct memory is not used. If a memory controller is 295 - capable of EDAC, but DIMMs without check bits are in use, then 296 - Parity, SECDED, S4ECD4ED capabilities will not be available 297 - even though the memory controller might be capable of those 298 - modes with the proper memory loaded. 299 - 300 - 301 - Memory Type supported on this controller attribute file: 302 - 303 - 'supported_mem_type' 304 - 305 - This attribute file displays the memory type, usually 306 - buffered and unbuffered DIMMs. 307 - 308 - 309 287 Memory Controller name attribute file: 310 288 311 289 'mc_name' 312 290 313 291 This attribute file displays the type of memory controller 314 292 that is being utilized. 315 - 316 - 317 - Memory Controller Module name attribute file: 318 - 319 - 'module_name' 320 - 321 - This attribute file displays the memory controller module name, 322 - version and date built. The name of the memory controller 323 - hardware - some drivers work with multiple controllers and 324 - this field shows which hardware is present. 325 293 326 294 327 295 Total memory managed by this memory controller attribute file: ··· 386 432 387 433 This attribute file will display what type of memory is currently 388 434 on this csrow. Normally, either buffered or unbuffered memory. 435 + Examples: 436 + Registered-DDR 437 + Unbuffered-DDR 389 438 390 439 391 440 EDAC Mode of operation attribute file: ··· 403 446 404 447 'dev_type' 405 448 406 - This attribute file will display what type of DIMM device is 407 - being utilized. Example: x4 449 + This attribute file will display what type of DRAM device is 450 + being utilized on this DIMM. 451 + Examples: 452 + x1 453 + x2 454 + x4 455 + x8 408 456 409 457 410 458 Channel 0 CE Count attribute file: ··· 484 522 If logging for UEs and CEs are enabled then system logs will have 485 523 error notices indicating errors that have been detected: 486 524 487 - MC0: CE page 0x283, offset 0xce0, grain 8, syndrome 0x6ec3, row 0, 525 + EDAC MC0: CE page 0x283, offset 0xce0, grain 8, syndrome 0x6ec3, row 0, 488 526 channel 1 "DIMM_B1": amd76x_edac 489 527 490 - MC0: CE page 0x1e5, offset 0xfb0, grain 8, syndrome 0xb741, row 0, 528 + EDAC MC0: CE page 0x1e5, offset 0xfb0, grain 8, syndrome 0xb741, row 0, 491 529 channel 1 "DIMM_B1": amd76x_edac 492 530 493 531 ··· 572 610 573 611 574 612 575 - PCI Device Whitelist: 576 - 577 - 'pci_parity_whitelist' 578 - 579 - This control file allows for an explicit list of PCI devices to be 580 - scanned for parity errors. Only devices found on this list will 581 - be examined. The list is a line of hexadecimal VENDOR and DEVICE 582 - ID tuples: 583 - 584 - 1022:7450,1434:16a6 585 - 586 - One or more can be inserted, separated by a comma. 587 - 588 - To write the above list doing the following as one command line: 589 - 590 - echo "1022:7450,1434:16a6" 591 - > /sys/devices/system/edac/pci/pci_parity_whitelist 592 - 593 - 594 - 595 - To display what the whitelist is, simply 'cat' the same file. 596 - 597 - 598 - PCI Device Blacklist: 599 - 600 - 'pci_parity_blacklist' 601 - 602 - This control file allows for a list of PCI devices to be 603 - skipped for scanning. 604 - The list is a line of hexadecimal VENDOR and DEVICE ID tuples: 605 - 606 - 1022:7450,1434:16a6 607 - 608 - One or more can be inserted, separated by a comma. 609 - 610 - To write the above list doing the following as one command line: 611 - 612 - echo "1022:7450,1434:16a6" 613 - > /sys/devices/system/edac/pci/pci_parity_blacklist 614 - 615 - 616 - To display what the whitelist currently contains, 617 - simply 'cat' the same file. 618 - 619 613 ======================================================================= 620 - 621 - PCI Vendor and Devices IDs can be obtained with the lspci command. Using 622 - the -n option lspci will display the vendor and device IDs. The system 623 - administrator will have to determine which devices should be scanned or 624 - skipped. 625 - 626 - 627 - 628 - The two lists (white and black) are prioritized. blacklist is the lower 629 - priority and will NOT be utilized when a whitelist has been set. 630 - Turn OFF a whitelist by an empty echo command: 631 - 632 - echo > /sys/devices/system/edac/pci/pci_parity_whitelist 633 - 634 - and any previous blacklist will be utilized. 635 -
+199 -498
drivers/edac/edac_mc.c
··· 1 1 /* 2 2 * edac_mc kernel module 3 - * (C) 2005 Linux Networx (http://lnxi.com) 3 + * (C) 2005, 2006 Linux Networx (http://lnxi.com) 4 4 * This file may be distributed under the terms of the 5 5 * GNU General Public License. 6 6 * ··· 33 33 #include <asm/edac.h> 34 34 #include "edac_mc.h" 35 35 36 - #define EDAC_MC_VERSION "Ver: 2.0.0 " __DATE__ 36 + #define EDAC_MC_VERSION "Ver: 2.0.1 " __DATE__ 37 37 38 - /* For now, disable the EDAC sysfs code. The sysfs interface that EDAC 39 - * presents to user space needs more thought, and is likely to change 40 - * substantially. 41 - */ 42 - #define DISABLE_EDAC_SYSFS 43 38 44 39 #ifdef CONFIG_EDAC_DEBUG 45 40 /* Values of 0 to 4 will generate output */ ··· 59 64 static int panic_on_pci_parity; /* default no panic on PCI Parity */ 60 65 static atomic_t pci_parity_count = ATOMIC_INIT(0); 61 66 62 - /* Structure of the whitelist and blacklist arrays */ 63 - struct edac_pci_device_list { 64 - unsigned int vendor; /* Vendor ID */ 65 - unsigned int device; /* Deviice ID */ 66 - }; 67 - 68 - #define MAX_LISTED_PCI_DEVICES 32 69 - 70 - /* List of PCI devices (vendor-id:device-id) that should be skipped */ 71 - static struct edac_pci_device_list pci_blacklist[MAX_LISTED_PCI_DEVICES]; 72 - static int pci_blacklist_count; 73 - 74 - /* List of PCI devices (vendor-id:device-id) that should be scanned */ 75 - static struct edac_pci_device_list pci_whitelist[MAX_LISTED_PCI_DEVICES]; 76 - static int pci_whitelist_count ; 77 - 78 - #ifndef DISABLE_EDAC_SYSFS 79 67 static struct kobject edac_pci_kobj; /* /sys/devices/system/edac/pci */ 80 68 static struct completion edac_pci_kobj_complete; 81 - #endif /* DISABLE_EDAC_SYSFS */ 82 69 #endif /* CONFIG_PCI */ 83 70 84 71 /* START sysfs data and methods */ 85 72 86 - #ifndef DISABLE_EDAC_SYSFS 87 73 88 74 static const char *mem_types[] = { 89 75 [MEM_EMPTY] = "Empty", ··· 123 147 * /sys/devices/system/edac/mc; 124 148 * data structures and methods 125 149 */ 126 - #if 0 127 - static ssize_t memctrl_string_show(void *ptr, char *buffer) 128 - { 129 - char *value = (char*) ptr; 130 - return sprintf(buffer, "%s\n", value); 131 - } 132 - #endif 133 - 134 150 static ssize_t memctrl_int_show(void *ptr, char *buffer) 135 151 { 136 152 int *value = (int*) ptr; 137 - return sprintf(buffer, "%d\n", *value); 153 + return sprintf(buffer, "%u\n", *value); 138 154 } 139 155 140 156 static ssize_t memctrl_int_store(void *ptr, const char *buffer, size_t count) ··· 192 224 .store = _store, \ 193 225 }; 194 226 195 - /* cwrow<id> attribute f*/ 196 - #if 0 197 - MEMCTRL_STRING_ATTR(mc_version,EDAC_MC_VERSION,S_IRUGO,memctrl_string_show,NULL); 198 - #endif 199 - 200 227 /* csrow<id> control files */ 201 228 MEMCTRL_ATTR(panic_on_ue,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store); 202 229 MEMCTRL_ATTR(log_ue,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store); ··· 220 257 .default_attrs = (struct attribute **) memctrl_attr, 221 258 }; 222 259 223 - #endif /* DISABLE_EDAC_SYSFS */ 224 - 225 260 /* Initialize the main sysfs entries for edac: 226 261 * /sys/devices/system/edac 227 262 * ··· 229 268 * !0 FAILURE 230 269 */ 231 270 static int edac_sysfs_memctrl_setup(void) 232 - #ifdef DISABLE_EDAC_SYSFS 233 - { 234 - return 0; 235 - } 236 - #else 237 271 { 238 272 int err=0; 239 273 ··· 260 304 261 305 return err; 262 306 } 263 - #endif /* DISABLE_EDAC_SYSFS */ 264 307 265 308 /* 266 309 * MC teardown: ··· 267 312 */ 268 313 static void edac_sysfs_memctrl_teardown(void) 269 314 { 270 - #ifndef DISABLE_EDAC_SYSFS 271 315 debugf0("MC: " __FILE__ ": %s()\n", __func__); 272 316 273 317 /* Unregister the MC's kobject and wait for reference count to reach ··· 278 324 279 325 /* Unregister the 'edac' object */ 280 326 sysdev_class_unregister(&edac_class); 281 - #endif /* DISABLE_EDAC_SYSFS */ 282 327 } 283 328 284 329 #ifdef CONFIG_PCI 285 - 286 - #ifndef DISABLE_EDAC_SYSFS 287 - 288 - /* 289 - * /sys/devices/system/edac/pci; 290 - * data structures and methods 291 - */ 292 - 293 - struct list_control { 294 - struct edac_pci_device_list *list; 295 - int *count; 296 - }; 297 - 298 - #if 0 299 - /* Output the list as: vendor_id:device:id<,vendor_id:device_id> */ 300 - static ssize_t edac_pci_list_string_show(void *ptr, char *buffer) 301 - { 302 - struct list_control *listctl; 303 - struct edac_pci_device_list *list; 304 - char *p = buffer; 305 - int len=0; 306 - int i; 307 - 308 - listctl = ptr; 309 - list = listctl->list; 310 - 311 - for (i = 0; i < *(listctl->count); i++, list++ ) { 312 - if (len > 0) 313 - len += snprintf(p + len, (PAGE_SIZE-len), ","); 314 - 315 - len += snprintf(p + len, 316 - (PAGE_SIZE-len), 317 - "%x:%x", 318 - list->vendor,list->device); 319 - } 320 - 321 - len += snprintf(p + len,(PAGE_SIZE-len), "\n"); 322 - return (ssize_t) len; 323 - } 324 - 325 - /** 326 - * 327 - * Scan string from **s to **e looking for one 'vendor:device' tuple 328 - * where each field is a hex value 329 - * 330 - * return 0 if an entry is NOT found 331 - * return 1 if an entry is found 332 - * fill in *vendor_id and *device_id with values found 333 - * 334 - * In both cases, make sure *s has been moved forward toward *e 335 - */ 336 - static int parse_one_device(const char **s,const char **e, 337 - unsigned int *vendor_id, unsigned int *device_id) 338 - { 339 - const char *runner, *p; 340 - 341 - /* if null byte, we are done */ 342 - if (!**s) { 343 - (*s)++; /* keep *s moving */ 344 - return 0; 345 - } 346 - 347 - /* skip over newlines & whitespace */ 348 - if ((**s == '\n') || isspace(**s)) { 349 - (*s)++; 350 - return 0; 351 - } 352 - 353 - if (!isxdigit(**s)) { 354 - (*s)++; 355 - return 0; 356 - } 357 - 358 - /* parse vendor_id */ 359 - runner = *s; 360 - 361 - while (runner < *e) { 362 - /* scan for vendor:device delimiter */ 363 - if (*runner == ':') { 364 - *vendor_id = simple_strtol((char*) *s, (char**) &p, 16); 365 - runner = p + 1; 366 - break; 367 - } 368 - 369 - runner++; 370 - } 371 - 372 - if (!isxdigit(*runner)) { 373 - *s = ++runner; 374 - return 0; 375 - } 376 - 377 - /* parse device_id */ 378 - if (runner < *e) { 379 - *device_id = simple_strtol((char*)runner, (char**)&p, 16); 380 - runner = p; 381 - } 382 - 383 - *s = runner; 384 - return 1; 385 - } 386 - 387 - static ssize_t edac_pci_list_string_store(void *ptr, const char *buffer, 388 - size_t count) 389 - { 390 - struct list_control *listctl; 391 - struct edac_pci_device_list *list; 392 - unsigned int vendor_id, device_id; 393 - const char *s, *e; 394 - int *index; 395 - 396 - s = (char*)buffer; 397 - e = s + count; 398 - listctl = ptr; 399 - list = listctl->list; 400 - index = listctl->count; 401 - *index = 0; 402 - 403 - while (*index < MAX_LISTED_PCI_DEVICES) { 404 - if (parse_one_device(&s,&e,&vendor_id,&device_id)) { 405 - list[ *index ].vendor = vendor_id; 406 - list[ *index ].device = device_id; 407 - (*index)++; 408 - } 409 - 410 - /* check for all data consume */ 411 - if (s >= e) 412 - break; 413 - } 414 - 415 - return count; 416 - } 417 - 418 - #endif 419 330 static ssize_t edac_pci_int_show(void *ptr, char *buffer) 420 331 { 421 332 int *value = ptr; ··· 348 529 .store = _store, \ 349 530 }; 350 531 351 - #if 0 352 - static struct list_control pci_whitelist_control = { 353 - .list = pci_whitelist, 354 - .count = &pci_whitelist_count 355 - }; 356 - 357 - static struct list_control pci_blacklist_control = { 358 - .list = pci_blacklist, 359 - .count = &pci_blacklist_count 360 - }; 361 - 362 - /* whitelist attribute */ 363 - EDAC_PCI_STRING_ATTR(pci_parity_whitelist, 364 - &pci_whitelist_control, 365 - S_IRUGO|S_IWUSR, 366 - edac_pci_list_string_show, 367 - edac_pci_list_string_store); 368 - 369 - EDAC_PCI_STRING_ATTR(pci_parity_blacklist, 370 - &pci_blacklist_control, 371 - S_IRUGO|S_IWUSR, 372 - edac_pci_list_string_show, 373 - edac_pci_list_string_store); 374 - #endif 375 - 376 532 /* PCI Parity control files */ 377 533 EDAC_PCI_ATTR(check_pci_parity, S_IRUGO|S_IWUSR, edac_pci_int_show, 378 534 edac_pci_int_store); ··· 376 582 .default_attrs = (struct attribute **) edac_pci_attr, 377 583 }; 378 584 379 - #endif /* DISABLE_EDAC_SYSFS */ 380 - 381 585 /** 382 586 * edac_sysfs_pci_setup() 383 587 * 384 588 */ 385 589 static int edac_sysfs_pci_setup(void) 386 - #ifdef DISABLE_EDAC_SYSFS 387 - { 388 - return 0; 389 - } 390 - #else 391 590 { 392 591 int err; 393 592 ··· 404 617 405 618 return err; 406 619 } 407 - #endif /* DISABLE_EDAC_SYSFS */ 408 620 409 621 static void edac_sysfs_pci_teardown(void) 410 622 { 411 - #ifndef DISABLE_EDAC_SYSFS 412 623 debugf0("%s()\n", __func__); 413 624 init_completion(&edac_pci_kobj_complete); 414 625 kobject_unregister(&edac_pci_kobj); 415 626 wait_for_completion(&edac_pci_kobj_complete); 416 - #endif 417 627 } 418 628 419 629 ··· 540 756 } 541 757 542 758 /* 543 - * check_dev_on_list: Scan for a PCI device on a white/black list 544 - * @list: an EDAC &edac_pci_device_list white/black list pointer 545 - * @free_index: index of next free entry on the list 546 - * @pci_dev: PCI Device pointer 547 - * 548 - * see if list contains the device. 549 - * 550 - * Returns: 0 not found 551 - * 1 found on list 552 - */ 553 - static int check_dev_on_list(struct edac_pci_device_list *list, 554 - int free_index, struct pci_dev *dev) 555 - { 556 - int i; 557 - int rc = 0; /* Assume not found */ 558 - unsigned short vendor=dev->vendor; 559 - unsigned short device=dev->device; 560 - 561 - /* Scan the list, looking for a vendor/device match */ 562 - for (i = 0; i < free_index; i++, list++ ) { 563 - if ((list->vendor == vendor ) && (list->device == device )) { 564 - rc = 1; 565 - break; 566 - } 567 - } 568 - 569 - return rc; 570 - } 571 - 572 - /* 573 759 * pci_dev parity list iterator 574 760 * Scan the PCI device list for one iteration, looking for SERRORs 575 761 * Master Parity ERRORS or Parity ERRORs on primary or secondary devices ··· 553 799 * bumped until we are done with it 554 800 */ 555 801 while((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { 556 - /* if whitelist exists then it has priority, so only scan 557 - * those devices on the whitelist 558 - */ 559 - if (pci_whitelist_count > 0 ) { 560 - if (check_dev_on_list(pci_whitelist, 561 - pci_whitelist_count, dev)) 562 - fn(dev); 563 - } else { 564 - /* 565 - * if no whitelist, then check if this devices is 566 - * blacklisted 567 - */ 568 - if (!check_dev_on_list(pci_blacklist, 569 - pci_blacklist_count, dev)) 570 - fn(dev); 571 - } 802 + fn(dev); 572 803 } 573 804 } 574 805 ··· 594 855 595 856 #else /* CONFIG_PCI */ 596 857 597 - static inline void do_pci_parity_check(void) 598 - { 599 - /* no-op */ 600 - } 858 + /* pre-process these away */ 859 + #define do_pci_parity_check() 860 + #define clear_pci_parity_errors() 861 + #define edac_sysfs_pci_teardown() 862 + #define edac_sysfs_pci_setup() (0) 601 863 602 - static inline void clear_pci_parity_errors(void) 603 - { 604 - /* no-op */ 605 - } 606 - 607 - static void edac_sysfs_pci_teardown(void) 608 - { 609 - } 610 - 611 - static int edac_sysfs_pci_setup(void) 612 - { 613 - return 0; 614 - } 615 864 #endif /* CONFIG_PCI */ 616 865 617 - #ifndef DISABLE_EDAC_SYSFS 866 + /* EDAC sysfs CSROW data structures and methods 867 + */ 618 868 619 - /* EDAC sysfs CSROW data structures and methods */ 620 - 621 - /* Set of more detailed csrow<id> attribute show/store functions */ 622 - static ssize_t csrow_ch0_dimm_label_show(struct csrow_info *csrow, char *data) 623 - { 624 - ssize_t size = 0; 625 - 626 - if (csrow->nr_channels > 0) { 627 - size = snprintf(data, EDAC_MC_LABEL_LEN,"%s\n", 628 - csrow->channels[0].label); 629 - } 630 - 631 - return size; 632 - } 633 - 634 - static ssize_t csrow_ch1_dimm_label_show(struct csrow_info *csrow, char *data) 635 - { 636 - ssize_t size = 0; 637 - 638 - if (csrow->nr_channels > 0) { 639 - size = snprintf(data, EDAC_MC_LABEL_LEN, "%s\n", 640 - csrow->channels[1].label); 641 - } 642 - 643 - return size; 644 - } 645 - 646 - static ssize_t csrow_ch0_dimm_label_store(struct csrow_info *csrow, 647 - const char *data, size_t size) 648 - { 649 - ssize_t max_size = 0; 650 - 651 - if (csrow->nr_channels > 0) { 652 - max_size = min((ssize_t)size,(ssize_t)EDAC_MC_LABEL_LEN-1); 653 - strncpy(csrow->channels[0].label, data, max_size); 654 - csrow->channels[0].label[max_size] = '\0'; 655 - } 656 - 657 - return size; 658 - } 659 - 660 - static ssize_t csrow_ch1_dimm_label_store(struct csrow_info *csrow, 661 - const char *data, size_t size) 662 - { 663 - ssize_t max_size = 0; 664 - 665 - if (csrow->nr_channels > 1) { 666 - max_size = min((ssize_t)size,(ssize_t)EDAC_MC_LABEL_LEN-1); 667 - strncpy(csrow->channels[1].label, data, max_size); 668 - csrow->channels[1].label[max_size] = '\0'; 669 - } 670 - 671 - return max_size; 672 - } 673 - 674 - static ssize_t csrow_ue_count_show(struct csrow_info *csrow, char *data) 869 + /* Set of more default csrow<id> attribute show/store functions */ 870 + static ssize_t csrow_ue_count_show(struct csrow_info *csrow, char *data, int private) 675 871 { 676 872 return sprintf(data,"%u\n", csrow->ue_count); 677 873 } 678 874 679 - static ssize_t csrow_ce_count_show(struct csrow_info *csrow, char *data) 875 + static ssize_t csrow_ce_count_show(struct csrow_info *csrow, char *data, int private) 680 876 { 681 877 return sprintf(data,"%u\n", csrow->ce_count); 682 878 } 683 879 684 - static ssize_t csrow_ch0_ce_count_show(struct csrow_info *csrow, char *data) 685 - { 686 - ssize_t size = 0; 687 - 688 - if (csrow->nr_channels > 0) { 689 - size = sprintf(data,"%u\n", csrow->channels[0].ce_count); 690 - } 691 - 692 - return size; 693 - } 694 - 695 - static ssize_t csrow_ch1_ce_count_show(struct csrow_info *csrow, char *data) 696 - { 697 - ssize_t size = 0; 698 - 699 - if (csrow->nr_channels > 1) { 700 - size = sprintf(data,"%u\n", csrow->channels[1].ce_count); 701 - } 702 - 703 - return size; 704 - } 705 - 706 - static ssize_t csrow_size_show(struct csrow_info *csrow, char *data) 880 + static ssize_t csrow_size_show(struct csrow_info *csrow, char *data, int private) 707 881 { 708 882 return sprintf(data,"%u\n", PAGES_TO_MiB(csrow->nr_pages)); 709 883 } 710 884 711 - static ssize_t csrow_mem_type_show(struct csrow_info *csrow, char *data) 885 + static ssize_t csrow_mem_type_show(struct csrow_info *csrow, char *data, int private) 712 886 { 713 887 return sprintf(data,"%s\n", mem_types[csrow->mtype]); 714 888 } 715 889 716 - static ssize_t csrow_dev_type_show(struct csrow_info *csrow, char *data) 890 + static ssize_t csrow_dev_type_show(struct csrow_info *csrow, char *data, int private) 717 891 { 718 892 return sprintf(data,"%s\n", dev_types[csrow->dtype]); 719 893 } 720 894 721 - static ssize_t csrow_edac_mode_show(struct csrow_info *csrow, char *data) 895 + static ssize_t csrow_edac_mode_show(struct csrow_info *csrow, char *data, int private) 722 896 { 723 897 return sprintf(data,"%s\n", edac_caps[csrow->edac_mode]); 724 898 } 725 899 900 + /* show/store functions for DIMM Label attributes */ 901 + static ssize_t channel_dimm_label_show(struct csrow_info *csrow, 902 + char *data, int channel) 903 + { 904 + return snprintf(data, EDAC_MC_LABEL_LEN,"%s", 905 + csrow->channels[channel].label); 906 + } 907 + 908 + static ssize_t channel_dimm_label_store(struct csrow_info *csrow, 909 + const char *data, 910 + size_t count, 911 + int channel) 912 + { 913 + ssize_t max_size = 0; 914 + 915 + max_size = min((ssize_t)count,(ssize_t)EDAC_MC_LABEL_LEN-1); 916 + strncpy(csrow->channels[channel].label, data, max_size); 917 + csrow->channels[channel].label[max_size] = '\0'; 918 + 919 + return max_size; 920 + } 921 + 922 + /* show function for dynamic chX_ce_count attribute */ 923 + static ssize_t channel_ce_count_show(struct csrow_info *csrow, 924 + char *data, 925 + int channel) 926 + { 927 + return sprintf(data, "%u\n", csrow->channels[channel].ce_count); 928 + } 929 + 930 + /* csrow specific attribute structure */ 726 931 struct csrowdev_attribute { 727 932 struct attribute attr; 728 - ssize_t (*show)(struct csrow_info *,char *); 729 - ssize_t (*store)(struct csrow_info *, const char *,size_t); 933 + ssize_t (*show)(struct csrow_info *,char *,int); 934 + ssize_t (*store)(struct csrow_info *, const char *,size_t,int); 935 + int private; 730 936 }; 731 937 732 938 #define to_csrow(k) container_of(k, struct csrow_info, kobj) 733 939 #define to_csrowdev_attr(a) container_of(a, struct csrowdev_attribute, attr) 734 940 735 - /* Set of show/store higher level functions for csrow objects */ 736 - static ssize_t csrowdev_show(struct kobject *kobj, struct attribute *attr, 737 - char *buffer) 941 + /* Set of show/store higher level functions for default csrow attributes */ 942 + static ssize_t csrowdev_show(struct kobject *kobj, 943 + struct attribute *attr, 944 + char *buffer) 738 945 { 739 946 struct csrow_info *csrow = to_csrow(kobj); 740 947 struct csrowdev_attribute *csrowdev_attr = to_csrowdev_attr(attr); 741 948 742 949 if (csrowdev_attr->show) 743 - return csrowdev_attr->show(csrow, buffer); 744 - 950 + return csrowdev_attr->show(csrow, 951 + buffer, 952 + csrowdev_attr->private); 745 953 return -EIO; 746 954 } 747 955 ··· 699 1013 struct csrowdev_attribute * csrowdev_attr = to_csrowdev_attr(attr); 700 1014 701 1015 if (csrowdev_attr->store) 702 - return csrowdev_attr->store(csrow, buffer, count); 703 - 1016 + return csrowdev_attr->store(csrow, 1017 + buffer, 1018 + count, 1019 + csrowdev_attr->private); 704 1020 return -EIO; 705 1021 } 706 1022 ··· 711 1023 .store = csrowdev_store 712 1024 }; 713 1025 714 - #define CSROWDEV_ATTR(_name,_mode,_show,_store) \ 1026 + #define CSROWDEV_ATTR(_name,_mode,_show,_store,_private) \ 715 1027 struct csrowdev_attribute attr_##_name = { \ 716 1028 .attr = {.name = __stringify(_name), .mode = _mode }, \ 717 1029 .show = _show, \ 718 1030 .store = _store, \ 1031 + .private = _private, \ 719 1032 }; 720 1033 721 - /* cwrow<id>/attribute files */ 722 - CSROWDEV_ATTR(size_mb,S_IRUGO,csrow_size_show,NULL); 723 - CSROWDEV_ATTR(dev_type,S_IRUGO,csrow_dev_type_show,NULL); 724 - CSROWDEV_ATTR(mem_type,S_IRUGO,csrow_mem_type_show,NULL); 725 - CSROWDEV_ATTR(edac_mode,S_IRUGO,csrow_edac_mode_show,NULL); 726 - CSROWDEV_ATTR(ue_count,S_IRUGO,csrow_ue_count_show,NULL); 727 - CSROWDEV_ATTR(ce_count,S_IRUGO,csrow_ce_count_show,NULL); 728 - CSROWDEV_ATTR(ch0_ce_count,S_IRUGO,csrow_ch0_ce_count_show,NULL); 729 - CSROWDEV_ATTR(ch1_ce_count,S_IRUGO,csrow_ch1_ce_count_show,NULL); 1034 + /* default cwrow<id>/attribute files */ 1035 + CSROWDEV_ATTR(size_mb,S_IRUGO,csrow_size_show,NULL,0); 1036 + CSROWDEV_ATTR(dev_type,S_IRUGO,csrow_dev_type_show,NULL,0); 1037 + CSROWDEV_ATTR(mem_type,S_IRUGO,csrow_mem_type_show,NULL,0); 1038 + CSROWDEV_ATTR(edac_mode,S_IRUGO,csrow_edac_mode_show,NULL,0); 1039 + CSROWDEV_ATTR(ue_count,S_IRUGO,csrow_ue_count_show,NULL,0); 1040 + CSROWDEV_ATTR(ce_count,S_IRUGO,csrow_ce_count_show,NULL,0); 730 1041 731 - /* control/attribute files */ 732 - CSROWDEV_ATTR(ch0_dimm_label,S_IRUGO|S_IWUSR, 733 - csrow_ch0_dimm_label_show, 734 - csrow_ch0_dimm_label_store); 735 - CSROWDEV_ATTR(ch1_dimm_label,S_IRUGO|S_IWUSR, 736 - csrow_ch1_dimm_label_show, 737 - csrow_ch1_dimm_label_store); 738 - 739 - /* Attributes of the CSROW<id> object */ 740 - static struct csrowdev_attribute *csrow_attr[] = { 1042 + /* default attributes of the CSROW<id> object */ 1043 + static struct csrowdev_attribute *default_csrow_attr[] = { 741 1044 &attr_dev_type, 742 1045 &attr_mem_type, 743 1046 &attr_edac_mode, 744 1047 &attr_size_mb, 745 1048 &attr_ue_count, 746 1049 &attr_ce_count, 747 - &attr_ch0_ce_count, 748 - &attr_ch1_ce_count, 749 - &attr_ch0_dimm_label, 750 - &attr_ch1_dimm_label, 751 1050 NULL, 752 1051 }; 753 1052 754 - /* No memory to release */ 1053 + 1054 + /* possible dynamic channel DIMM Label attribute files */ 1055 + CSROWDEV_ATTR(ch0_dimm_label,S_IRUGO|S_IWUSR, 1056 + channel_dimm_label_show, 1057 + channel_dimm_label_store, 1058 + 0 ); 1059 + CSROWDEV_ATTR(ch1_dimm_label,S_IRUGO|S_IWUSR, 1060 + channel_dimm_label_show, 1061 + channel_dimm_label_store, 1062 + 1 ); 1063 + CSROWDEV_ATTR(ch2_dimm_label,S_IRUGO|S_IWUSR, 1064 + channel_dimm_label_show, 1065 + channel_dimm_label_store, 1066 + 2 ); 1067 + CSROWDEV_ATTR(ch3_dimm_label,S_IRUGO|S_IWUSR, 1068 + channel_dimm_label_show, 1069 + channel_dimm_label_store, 1070 + 3 ); 1071 + CSROWDEV_ATTR(ch4_dimm_label,S_IRUGO|S_IWUSR, 1072 + channel_dimm_label_show, 1073 + channel_dimm_label_store, 1074 + 4 ); 1075 + CSROWDEV_ATTR(ch5_dimm_label,S_IRUGO|S_IWUSR, 1076 + channel_dimm_label_show, 1077 + channel_dimm_label_store, 1078 + 5 ); 1079 + 1080 + /* Total possible dynamic DIMM Label attribute file table */ 1081 + static struct csrowdev_attribute *dynamic_csrow_dimm_attr[] = { 1082 + &attr_ch0_dimm_label, 1083 + &attr_ch1_dimm_label, 1084 + &attr_ch2_dimm_label, 1085 + &attr_ch3_dimm_label, 1086 + &attr_ch4_dimm_label, 1087 + &attr_ch5_dimm_label 1088 + }; 1089 + 1090 + /* possible dynamic channel ce_count attribute files */ 1091 + CSROWDEV_ATTR(ch0_ce_count,S_IRUGO|S_IWUSR, 1092 + channel_ce_count_show, 1093 + NULL, 1094 + 0 ); 1095 + CSROWDEV_ATTR(ch1_ce_count,S_IRUGO|S_IWUSR, 1096 + channel_ce_count_show, 1097 + NULL, 1098 + 1 ); 1099 + CSROWDEV_ATTR(ch2_ce_count,S_IRUGO|S_IWUSR, 1100 + channel_ce_count_show, 1101 + NULL, 1102 + 2 ); 1103 + CSROWDEV_ATTR(ch3_ce_count,S_IRUGO|S_IWUSR, 1104 + channel_ce_count_show, 1105 + NULL, 1106 + 3 ); 1107 + CSROWDEV_ATTR(ch4_ce_count,S_IRUGO|S_IWUSR, 1108 + channel_ce_count_show, 1109 + NULL, 1110 + 4 ); 1111 + CSROWDEV_ATTR(ch5_ce_count,S_IRUGO|S_IWUSR, 1112 + channel_ce_count_show, 1113 + NULL, 1114 + 5 ); 1115 + 1116 + /* Total possible dynamic ce_count attribute file table */ 1117 + static struct csrowdev_attribute *dynamic_csrow_ce_count_attr[] = { 1118 + &attr_ch0_ce_count, 1119 + &attr_ch1_ce_count, 1120 + &attr_ch2_ce_count, 1121 + &attr_ch3_ce_count, 1122 + &attr_ch4_ce_count, 1123 + &attr_ch5_ce_count 1124 + }; 1125 + 1126 + 1127 + #define EDAC_NR_CHANNELS 6 1128 + 1129 + /* Create dynamic CHANNEL files, indexed by 'chan', under specifed CSROW */ 1130 + static int edac_create_channel_files(struct kobject *kobj, int chan) 1131 + { 1132 + int err=-ENODEV; 1133 + 1134 + if (chan >= EDAC_NR_CHANNELS) 1135 + return err; 1136 + 1137 + /* create the DIMM label attribute file */ 1138 + err = sysfs_create_file(kobj, 1139 + (struct attribute *) dynamic_csrow_dimm_attr[chan]); 1140 + 1141 + if (!err) { 1142 + /* create the CE Count attribute file */ 1143 + err = sysfs_create_file(kobj, 1144 + (struct attribute *) dynamic_csrow_ce_count_attr[chan]); 1145 + } else { 1146 + debugf1("%s() dimm labels and ce_count files created", __func__); 1147 + } 1148 + 1149 + return err; 1150 + } 1151 + 1152 + /* No memory to release for this kobj */ 755 1153 static void edac_csrow_instance_release(struct kobject *kobj) 756 1154 { 757 1155 struct csrow_info *cs; 758 1156 759 - debugf1("%s()\n", __func__); 760 1157 cs = container_of(kobj, struct csrow_info, kobj); 761 1158 complete(&cs->kobj_complete); 762 1159 } 763 1160 1161 + /* the kobj_type instance for a CSROW */ 764 1162 static struct kobj_type ktype_csrow = { 765 1163 .release = edac_csrow_instance_release, 766 1164 .sysfs_ops = &csrowfs_ops, 767 - .default_attrs = (struct attribute **) csrow_attr, 1165 + .default_attrs = (struct attribute **) default_csrow_attr, 768 1166 }; 769 1167 770 1168 /* Create a CSROW object under specifed edac_mc_device */ 771 - static int edac_create_csrow_object(struct kobject *edac_mci_kobj, 772 - struct csrow_info *csrow, int index) 1169 + static int edac_create_csrow_object( 1170 + struct kobject *edac_mci_kobj, 1171 + struct csrow_info *csrow, 1172 + int index) 773 1173 { 774 1174 int err = 0; 1175 + int chan; 775 1176 776 - debugf0("%s()\n", __func__); 777 1177 memset(&csrow->kobj, 0, sizeof(csrow->kobj)); 778 1178 779 1179 /* generate ..../edac/mc/mc<id>/csrow<index> */ ··· 871 1095 872 1096 /* name this instance of csrow<id> */ 873 1097 err = kobject_set_name(&csrow->kobj,"csrow%d",index); 1098 + if (err) 1099 + goto error_exit; 874 1100 1101 + /* Instanstiate the csrow object */ 1102 + err = kobject_register(&csrow->kobj); 875 1103 if (!err) { 876 - /* Instanstiate the csrow object */ 877 - err = kobject_register(&csrow->kobj); 878 - 879 - if (err) 880 - debugf0("Failed to register CSROW%d\n",index); 881 - else 882 - debugf0("Registered CSROW%d\n",index); 1104 + /* Create the dyanmic attribute files on this csrow, 1105 + * namely, the DIMM labels and the channel ce_count 1106 + */ 1107 + for (chan = 0; chan < csrow->nr_channels; chan++) { 1108 + err = edac_create_channel_files(&csrow->kobj,chan); 1109 + if (err) 1110 + break; 1111 + } 883 1112 } 884 1113 1114 + error_exit: 885 1115 return err; 886 1116 } 887 1117 888 - /* sysfs data structures and methods for the MCI kobjects */ 1118 + /* default sysfs methods and data structures for the main MCI kobject */ 889 1119 890 1120 static ssize_t mci_reset_counters_store(struct mem_ctl_info *mci, 891 1121 const char *data, size_t count) ··· 917 1135 return count; 918 1136 } 919 1137 1138 + /* default attribute files for the MCI object */ 920 1139 static ssize_t mci_ue_count_show(struct mem_ctl_info *mci, char *data) 921 1140 { 922 1141 return sprintf(data,"%d\n", mci->ue_count); ··· 943 1160 return sprintf(data,"%ld\n", (jiffies - mci->start_time) / HZ); 944 1161 } 945 1162 946 - static ssize_t mci_mod_name_show(struct mem_ctl_info *mci, char *data) 947 - { 948 - return sprintf(data,"%s %s\n", mci->mod_name, mci->mod_ver); 949 - } 950 - 951 1163 static ssize_t mci_ctl_name_show(struct mem_ctl_info *mci, char *data) 952 1164 { 953 1165 return sprintf(data,"%s\n", mci->ctl_name); 954 - } 955 - 956 - static int mci_output_edac_cap(char *buf, unsigned long edac_cap) 957 - { 958 - char *p = buf; 959 - int bit_idx; 960 - 961 - for (bit_idx = 0; bit_idx < 8 * sizeof(edac_cap); bit_idx++) { 962 - if ((edac_cap >> bit_idx) & 0x1) 963 - p += sprintf(p, "%s ", edac_caps[bit_idx]); 964 - } 965 - 966 - return p - buf; 967 - } 968 - 969 - static ssize_t mci_edac_capability_show(struct mem_ctl_info *mci, char *data) 970 - { 971 - char *p = data; 972 - 973 - p += mci_output_edac_cap(p,mci->edac_ctl_cap); 974 - p += sprintf(p, "\n"); 975 - return p - data; 976 - } 977 - 978 - static ssize_t mci_edac_current_capability_show(struct mem_ctl_info *mci, 979 - char *data) 980 - { 981 - char *p = data; 982 - 983 - p += mci_output_edac_cap(p,mci->edac_cap); 984 - p += sprintf(p, "\n"); 985 - return p - data; 986 - } 987 - 988 - static int mci_output_mtype_cap(char *buf, unsigned long mtype_cap) 989 - { 990 - char *p = buf; 991 - int bit_idx; 992 - 993 - for (bit_idx = 0; bit_idx < 8 * sizeof(mtype_cap); bit_idx++) { 994 - if ((mtype_cap >> bit_idx) & 0x1) 995 - p += sprintf(p, "%s ", mem_types[bit_idx]); 996 - } 997 - 998 - return p - buf; 999 - } 1000 - 1001 - static ssize_t mci_supported_mem_type_show(struct mem_ctl_info *mci, 1002 - char *data) 1003 - { 1004 - char *p = data; 1005 - 1006 - p += mci_output_mtype_cap(p,mci->mtype_cap); 1007 - p += sprintf(p, "\n"); 1008 - return p - data; 1009 1166 } 1010 1167 1011 1168 static ssize_t mci_size_mb_show(struct mem_ctl_info *mci, char *data) ··· 974 1251 #define to_mci(k) container_of(k, struct mem_ctl_info, edac_mci_kobj) 975 1252 #define to_mcidev_attr(a) container_of(a, struct mcidev_attribute, attr) 976 1253 1254 + /* MCI show/store functions for top most object */ 977 1255 static ssize_t mcidev_show(struct kobject *kobj, struct attribute *attr, 978 1256 char *buffer) 979 1257 { ··· 1011 1287 .store = _store, \ 1012 1288 }; 1013 1289 1014 - /* Control file */ 1290 + /* default Control file */ 1015 1291 MCIDEV_ATTR(reset_counters,S_IWUSR,NULL,mci_reset_counters_store); 1016 1292 1017 - /* Attribute files */ 1293 + /* default Attribute files */ 1018 1294 MCIDEV_ATTR(mc_name,S_IRUGO,mci_ctl_name_show,NULL); 1019 - MCIDEV_ATTR(module_name,S_IRUGO,mci_mod_name_show,NULL); 1020 - MCIDEV_ATTR(edac_capability,S_IRUGO,mci_edac_capability_show,NULL); 1021 1295 MCIDEV_ATTR(size_mb,S_IRUGO,mci_size_mb_show,NULL); 1022 1296 MCIDEV_ATTR(seconds_since_reset,S_IRUGO,mci_seconds_show,NULL); 1023 1297 MCIDEV_ATTR(ue_noinfo_count,S_IRUGO,mci_ue_noinfo_show,NULL); 1024 1298 MCIDEV_ATTR(ce_noinfo_count,S_IRUGO,mci_ce_noinfo_show,NULL); 1025 1299 MCIDEV_ATTR(ue_count,S_IRUGO,mci_ue_count_show,NULL); 1026 1300 MCIDEV_ATTR(ce_count,S_IRUGO,mci_ce_count_show,NULL); 1027 - MCIDEV_ATTR(edac_current_capability,S_IRUGO, 1028 - mci_edac_current_capability_show,NULL); 1029 - MCIDEV_ATTR(supported_mem_type,S_IRUGO, 1030 - mci_supported_mem_type_show,NULL); 1031 1301 1032 1302 static struct mcidev_attribute *mci_attr[] = { 1033 1303 &mci_attr_reset_counters, 1034 - &mci_attr_module_name, 1035 1304 &mci_attr_mc_name, 1036 - &mci_attr_edac_capability, 1037 - &mci_attr_edac_current_capability, 1038 - &mci_attr_supported_mem_type, 1039 1305 &mci_attr_size_mb, 1040 1306 &mci_attr_seconds_since_reset, 1041 1307 &mci_attr_ue_noinfo_count, ··· 1053 1339 .default_attrs = (struct attribute **) mci_attr, 1054 1340 }; 1055 1341 1056 - #endif /* DISABLE_EDAC_SYSFS */ 1057 1342 1058 1343 #define EDAC_DEVICE_SYMLINK "device" 1059 1344 ··· 1065 1352 * !0 Failure 1066 1353 */ 1067 1354 static int edac_create_sysfs_mci_device(struct mem_ctl_info *mci) 1068 - #ifdef DISABLE_EDAC_SYSFS 1069 - { 1070 - return 0; 1071 - } 1072 - #else 1073 1355 { 1074 1356 int i; 1075 1357 int err; ··· 1076 1368 1077 1369 /* set the name of the mc<id> object */ 1078 1370 err = kobject_set_name(edac_mci_kobj,"mc%d",mci->mc_idx); 1079 - 1080 1371 if (err) 1081 1372 return err; 1082 1373 ··· 1085 1378 1086 1379 /* register the mc<id> kobject */ 1087 1380 err = kobject_register(edac_mci_kobj); 1088 - 1089 1381 if (err) 1090 1382 return err; 1091 1383 1092 1384 /* create a symlink for the device */ 1093 1385 err = sysfs_create_link(edac_mci_kobj, &mci->dev->kobj, 1094 1386 EDAC_DEVICE_SYMLINK); 1095 - 1096 1387 if (err) 1097 1388 goto fail0; 1098 1389 ··· 1103 1398 /* Only expose populated CSROWs */ 1104 1399 if (csrow->nr_pages > 0) { 1105 1400 err = edac_create_csrow_object(edac_mci_kobj,csrow,i); 1106 - 1107 1401 if (err) 1108 1402 goto fail1; 1109 1403 } ··· 1126 1422 wait_for_completion(&mci->kobj_complete); 1127 1423 return err; 1128 1424 } 1129 - #endif /* DISABLE_EDAC_SYSFS */ 1130 1425 1131 1426 /* 1132 1427 * remove a Memory Controller instance 1133 1428 */ 1134 1429 static void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci) 1135 1430 { 1136 - #ifndef DISABLE_EDAC_SYSFS 1137 1431 int i; 1138 1432 1139 1433 debugf0("%s()\n", __func__); ··· 1149 1447 init_completion(&mci->kobj_complete); 1150 1448 kobject_unregister(&mci->edac_mci_kobj); 1151 1449 wait_for_completion(&mci->kobj_complete); 1152 - #endif /* DISABLE_EDAC_SYSFS */ 1153 1450 } 1154 1451 1155 1452 /* END OF sysfs data and methods */