irqchip/gic-v4.1: Avoid 64bit division for the sake of 32bit ARM

In order to allow the GICv4 code to link properly on 32bit ARM,
make sure we don't use 64bit divisions when it isn't strictly
necessary.

Fixes: 4e6437f12d6e ("irqchip/gic-v4.1: Ensure L2 vPE table is allocated at RD level")
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Zenghui Yu <yuzenghui@huawei.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

authored by Marc Zyngier and committed by Linus Torvalds 490d332e d1ea35f4

Changed files
+2 -2
drivers
+2 -2
drivers/irqchip/irq-gic-v3-its.c
··· 2444 2444 static bool allocate_vpe_l2_table(int cpu, u32 id) 2445 2445 { 2446 2446 void __iomem *base = gic_data_rdist_cpu(cpu)->rd_base; 2447 - u64 val, gpsz, npg; 2448 - unsigned int psz, esz, idx; 2447 + unsigned int psz, esz, idx, npg, gpsz; 2448 + u64 val; 2449 2449 struct page *page; 2450 2450 __le64 *table; 2451 2451