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linux
Add support for ADP5055 triple buck regulator.
Merge series from Alexis Czezar Torreno <alexisczezar.torreno@analog.com>:
Introduce a regulator driver support for ADP5055. The device combines 3
high performance buck regulators in a 43-termminal land grid array
package. The device enables direct connection to high input voltages up
to 18V with no preregulator. Channel 1 and 2 deliver a programmable
output current of 3.5A or 7.5A or provide a single output with up to 14A
in parallel operation. Channel 3 has a programmable output current of
1.5A or 3A.
+606
+157
Documentation/devicetree/bindings/regulator/adi,adp5055-regulator.yaml
+157
Documentation/devicetree/bindings/regulator/adi,adp5055-regulator.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/regulator/adi,adp5055-regulator.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Analog Devices ADP5055 Triple Buck Regulator
8
+
9
+
maintainers:
10
+
- Alexis Czezar Torreno <alexisczezar.torreno@analog.com>
11
+
12
+
description: |
13
+
The ADP5055 combines three high performance buck regulator. The device enables
14
+
direct connection to high input voltages up to 18 V with no preregulators.
15
+
https://www.analog.com/media/en/technical-documentation/data-sheets/adp5055.pdf
16
+
17
+
properties:
18
+
compatible:
19
+
enum:
20
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- adi,adp5055
21
+
22
+
reg:
23
+
enum:
24
+
- 0x70
25
+
- 0x71
26
+
27
+
adi,tset-us:
28
+
description:
29
+
Setting time used by the device. This is changed via soldering specific
30
+
resistor values on the CFG2 pin.
31
+
enum: [2600, 20800]
32
+
default: 2600
33
+
34
+
adi,ocp-blanking:
35
+
description:
36
+
If present, overcurrent protection (OCP) blanking for all regulator is on.
37
+
type: boolean
38
+
39
+
adi,delay-power-good:
40
+
description:
41
+
Configures delay timer of the power good (PWRGD) pin. Delay is based on
42
+
Tset which can be 2.6 ms or 20.8 ms.
43
+
type: boolean
44
+
45
+
'#address-cells':
46
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const: 1
47
+
48
+
'#size-cells':
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const: 0
50
+
51
+
patternProperties:
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+
'^buck[0-2]$':
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+
type: object
54
+
$ref: regulator.yaml#
55
+
unevaluatedProperties: false
56
+
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+
properties:
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+
enable-gpios:
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+
maxItems: 1
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+
description:
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GPIO specifier to enable the GPIO control for each regulator. The
62
+
driver supports two modes of enable, hardware only (GPIOs) or software
63
+
only (Registers). Pure hardware enabling requires each regulator to
64
+
contain this property. If at least one regulator does not have this,
65
+
the driver automatically switches to software only mode.
66
+
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+
adi,dvs-limit-upper-microvolt:
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+
description:
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+
Configure the allowable upper side limit of the voltage output of each
70
+
regulator in microvolt. Relative to the default Vref trimming value.
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+
Vref = 600 mV. Voltages are in 12 mV steps, value is autoadjusted.
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+
Vout_high = Vref_trim + dvs-limit-upper.
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minimum: 12000
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maximum: 192000
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default: 192000
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+
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adi,dvs-limit-lower-microvolt:
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description:
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Configure the allowable lower side limit of the voltage output of each
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+
regulator in microvolt. Relative to the default Vref trimming value.
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Vref = 600 mV. Voltages are in 12 mV steps, value is autoadjusted.
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Vout_low = Vref_trim + dvs-limit-lower.
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minimum: -190500
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maximum: -10500
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default: -190500
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+
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adi,fast-transient:
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+
description:
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Configures the fast transient sensitivity for each regulator.
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"none" - No fast transient.
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"3G_1.5%" - 1.5% window with 3*350uA/V
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"5G_1.5%" - 1.5% window with 5*350uA/V
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"5G_2.5%" - 2.5% window with 5*350uA/V
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+
enum: [none, 3G_1.5%, 5G_1.5%, 5G_2.5%]
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+
default: 5G_2.5%
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+
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adi,mask-power-good:
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+
description:
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If present, masks individual regulators PWRGD signal to the external
100
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PWRGD hardware pin.
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type: boolean
102
+
103
+
required:
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- regulator-name
105
+
106
+
required:
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+
- compatible
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+
- reg
109
+
110
+
additionalProperties: false
111
+
112
+
examples:
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+
- |
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#include <dt-bindings/gpio/gpio.h>
115
+
116
+
i2c {
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#address-cells = <1>;
118
+
#size-cells = <0>;
119
+
120
+
regulator@70 {
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+
compatible = "adi,adp5055";
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+
reg = <0x70>;
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+
#address-cells = <1>;
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+
#size-cells = <0>;
125
+
126
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adi,tset-us = <2600>;
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+
adi,ocp-blanking;
128
+
adi,delay-power-good;
129
+
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+
buck0 {
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regulator-name = "buck0";
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+
enable-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
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+
adi,dvs-limit-upper-microvolt = <192000>;
134
+
adi,dvs-limit-lower-microvolt = <(-190500)>;
135
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adi,fast-transient = "5G_2.5%";
136
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adi,mask-power-good;
137
+
};
138
+
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buck1 {
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regulator-name = "buck1";
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enable-gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
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+
adi,dvs-limit-upper-microvolt = <192000>;
143
+
adi,dvs-limit-lower-microvolt = <(-190500)>;
144
+
adi,fast-transient = "5G_2.5%";
145
+
adi,mask-power-good;
146
+
};
147
+
148
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buck2 {
149
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regulator-name = "buck2";
150
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enable-gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
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adi,dvs-limit-upper-microvolt = <192000>;
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+
adi,dvs-limit-lower-microvolt = <(-190500)>;
153
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adi,fast-transient = "5G_2.5%";
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+
adi,mask-power-good;
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+
};
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};
157
+
};
+7
MAINTAINERS
+7
MAINTAINERS
···
1567
1567
F: Documentation/devicetree/bindings/iio/filter/adi,admv8818.yaml
1568
1568
F: drivers/iio/filter/admv8818.c
1569
1569
1570
+
ANALOG DEVICES INC ADP5055 DRIVER
1571
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M: Alexis Czezar Torreno <alexisczezar.torreno@analog.com>
1572
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S: Supported
1573
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W: https://ez.analog.com/linux-software-drivers
1574
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F: Documentation/devicetree/bindings/regulator/adi,adp5055-regulator.yaml
1575
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F: drivers/regulator/adp5055-regulator.c
1576
+
1570
1577
ANALOG DEVICES INC ADP5061 DRIVER
1571
1578
M: Michael Hennerich <Michael.Hennerich@analog.com>
1572
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L: linux-pm@vger.kernel.org
+11
drivers/regulator/Kconfig
+11
drivers/regulator/Kconfig
···
122
122
This driver supports AD5398 and AD5821 current regulator chips.
123
123
If building into module, its name is ad5398.ko.
124
124
125
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config REGULATOR_ADP5055
126
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tristate "Analog Devices ADP5055 Triple Buck Regulator"
127
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depends on I2C
128
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select REGMAP_I2C
129
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help
130
+
This driver controls an Analog Devices ADP5055 with triple buck
131
+
regulators using an I2C interface.
132
+
133
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Say M here if you want to include support for the regulator as a
134
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module.
135
+
125
136
config REGULATOR_ANATOP
126
137
tristate "Freescale i.MX on-chip ANATOP LDO regulators"
127
138
depends on ARCH_MXC || COMPILE_TEST
+1
drivers/regulator/Makefile
+1
drivers/regulator/Makefile
···
22
22
obj-$(CONFIG_REGULATOR_ACT8865) += act8865-regulator.o
23
23
obj-$(CONFIG_REGULATOR_ACT8945A) += act8945a-regulator.o
24
24
obj-$(CONFIG_REGULATOR_AD5398) += ad5398.o
25
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obj-$(CONFIG_REGULATOR_ADP5055) += adp5055-regulator.o
25
26
obj-$(CONFIG_REGULATOR_ANATOP) += anatop-regulator.o
26
27
obj-$(CONFIG_REGULATOR_ARIZONA_LDO1) += arizona-ldo1.o
27
28
obj-$(CONFIG_REGULATOR_ARIZONA_MICSUPP) += arizona-micsupp.o
+430
drivers/regulator/adp5055-regulator.c
+430
drivers/regulator/adp5055-regulator.c
···
1
+
// SPDX-License-Identifier: GPL-2.0
2
+
//
3
+
// Regulator driver for Analog Devices ADP5055
4
+
//
5
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// Copyright (C) 2025 Analog Devices, Inc.
6
+
7
+
#include <linux/bitfield.h>
8
+
#include <linux/device.h>
9
+
#include <linux/gpio/consumer.h>
10
+
#include <linux/i2c.h>
11
+
#include <linux/module.h>
12
+
#include <linux/mod_devicetable.h>
13
+
#include <linux/regmap.h>
14
+
#include <linux/regulator/driver.h>
15
+
#include <linux/regulator/machine.h>
16
+
#include <linux/regulator/of_regulator.h>
17
+
18
+
// ADP5055 Register Map.
19
+
20
+
#define ADP5055_CTRL123 0xD1
21
+
#define ADP5055_CTRL_MODE1 0xD3
22
+
#define ADP5055_CTRL_MODE2 0xD4
23
+
#define ADP5055_DLY0 0xD5
24
+
#define ADP5055_DLY1 0xD6
25
+
#define ADP5055_DLY2 0xD7
26
+
#define ADP5055_VID0 0xD8
27
+
#define ADP5055_VID1 0xD9
28
+
#define ADP5055_VID2 0xDA
29
+
#define ADP5055_DVS_LIM0 0xDC
30
+
#define ADP5055_DVS_LIM1 0xDD
31
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#define ADP5055_DVS_LIM2 0xDE
32
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#define ADP5055_FT_CFG 0xDF
33
+
#define ADP5055_PG_CFG 0xE0
34
+
35
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// ADP5055 Field Masks.
36
+
37
+
#define ADP5055_MASK_EN_MODE BIT(0)
38
+
#define ADP5055_MASK_OCP_BLANKING BIT(7)
39
+
#define ADP5055_MASK_PSM BIT(4)
40
+
#define ADP5055_MASK_DIS2 BIT(2)
41
+
#define ADP5055_MASK_DIS1 BIT(1)
42
+
#define ADP5055_MASK_DIS0 BIT(0)
43
+
#define ADP5055_MASK_DIS_DLY GENMASK(6, 4)
44
+
#define ADP5055_MASK_EN_DLY GENMASK(2, 0)
45
+
#define ADP5055_MASK_DVS_LIM_UPPER GENMASK(7, 4)
46
+
#define ADP5055_MASK_DVS_LIM_LOWER GENMASK(3, 0)
47
+
#define ADP5055_MASK_FAST_TRANSIENT2 GENMASK(5, 4)
48
+
#define ADP5055_MASK_FAST_TRANSIENT1 GENMASK(3, 2)
49
+
#define ADP5055_MASK_FAST_TRANSIENT0 GENMASK(1, 0)
50
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#define ADP5055_MASK_DLY_PWRGD BIT(4)
51
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#define ADP5055_MASK_PWRGD2 BIT(2)
52
+
#define ADP5055_MASK_PWRGD1 BIT(1)
53
+
#define ADP5055_MASK_PWRGD0 BIT(0)
54
+
55
+
#define ADP5055_MIN_VOUT 408000
56
+
#define ADP5055_NUM_CH 3
57
+
58
+
struct adp5055 {
59
+
struct device *dev;
60
+
struct regmap *regmap;
61
+
u32 tset;
62
+
struct gpio_desc *en_gpiod[ADP5055_NUM_CH];
63
+
bool en_mode_software;
64
+
int dvs_limit_upper[ADP5055_NUM_CH];
65
+
int dvs_limit_lower[ADP5055_NUM_CH];
66
+
u32 fast_transient[ADP5055_NUM_CH];
67
+
bool mask_power_good[ADP5055_NUM_CH];
68
+
};
69
+
70
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static const unsigned int adp5055_tset_vals[] = {
71
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2600,
72
+
20800,
73
+
};
74
+
75
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static const unsigned int adp5055_enable_delay_vals_2_6[] = {
76
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0,
77
+
2600,
78
+
5200,
79
+
7800,
80
+
10400,
81
+
13000,
82
+
15600,
83
+
18200,
84
+
};
85
+
86
+
static const unsigned int adp5055_enable_delay_vals_20_8[] = {
87
+
0,
88
+
20800,
89
+
41600,
90
+
62400,
91
+
83200,
92
+
104000,
93
+
124800,
94
+
145600,
95
+
};
96
+
97
+
static const char * const adp5055_fast_transient_vals[] = {
98
+
"none",
99
+
"3G_1.5%",
100
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"5G_1.5%",
101
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"5G_2.5%",
102
+
};
103
+
104
+
static int adp5055_get_prop_index(const u32 *table, size_t table_size,
105
+
u32 value)
106
+
{
107
+
int i;
108
+
109
+
for (i = 0; i < table_size; i++)
110
+
if (table[i] == value)
111
+
return i;
112
+
113
+
return -EINVAL;
114
+
}
115
+
116
+
static const struct regmap_range adp5055_reg_ranges[] = {
117
+
regmap_reg_range(0xD1, 0xE0),
118
+
};
119
+
120
+
static const struct regmap_access_table adp5055_access_ranges_table = {
121
+
.yes_ranges = adp5055_reg_ranges,
122
+
.n_yes_ranges = ARRAY_SIZE(adp5055_reg_ranges),
123
+
};
124
+
125
+
static const struct regmap_config adp5055_regmap_config = {
126
+
.reg_bits = 8,
127
+
.val_bits = 8,
128
+
.max_register = 0xE0,
129
+
.wr_table = &adp5055_access_ranges_table,
130
+
.rd_table = &adp5055_access_ranges_table,
131
+
};
132
+
133
+
static const struct linear_range adp5055_voltage_ranges[] = {
134
+
REGULATOR_LINEAR_RANGE(ADP5055_MIN_VOUT, 0, 255, 1500),
135
+
};
136
+
137
+
static int adp5055_parse_fw(struct device *dev, struct adp5055 *adp5055)
138
+
{
139
+
int i, ret;
140
+
struct regmap *regmap = adp5055->regmap;
141
+
int val;
142
+
bool ocp_blanking;
143
+
bool delay_power_good;
144
+
145
+
ret = device_property_read_u32(dev, "adi,tset-us", &adp5055->tset);
146
+
if (!ret) {
147
+
ret = adp5055_get_prop_index(adp5055_tset_vals,
148
+
ARRAY_SIZE(adp5055_tset_vals), adp5055->tset);
149
+
if (ret < 0)
150
+
return dev_err_probe(dev, ret,
151
+
"Failed to initialize tset.");
152
+
adp5055->tset = adp5055_tset_vals[ret];
153
+
}
154
+
155
+
ocp_blanking = device_property_read_bool(dev, "adi,ocp-blanking");
156
+
157
+
delay_power_good = device_property_read_bool(dev,
158
+
"adi,delay-power-good");
159
+
160
+
for (i = 0; i < ADP5055_NUM_CH; i++) {
161
+
val = FIELD_PREP(ADP5055_MASK_DVS_LIM_UPPER,
162
+
DIV_ROUND_CLOSEST_ULL(192000 - adp5055->dvs_limit_upper[i], 12000));
163
+
val |= FIELD_PREP(ADP5055_MASK_DVS_LIM_LOWER,
164
+
DIV_ROUND_CLOSEST_ULL(adp5055->dvs_limit_lower[i] + 190500, 12000));
165
+
ret = regmap_write(regmap, ADP5055_DVS_LIM0 + i, val);
166
+
if (ret)
167
+
return ret;
168
+
};
169
+
170
+
val = FIELD_PREP(ADP5055_MASK_EN_MODE, adp5055->en_mode_software);
171
+
ret = regmap_write(regmap, ADP5055_CTRL_MODE1, val);
172
+
if (ret)
173
+
return ret;
174
+
175
+
val = FIELD_PREP(ADP5055_MASK_OCP_BLANKING, ocp_blanking);
176
+
ret = regmap_update_bits(regmap, ADP5055_CTRL_MODE2,
177
+
ADP5055_MASK_OCP_BLANKING, val);
178
+
if (ret)
179
+
return ret;
180
+
181
+
val = FIELD_PREP(ADP5055_MASK_FAST_TRANSIENT2, adp5055->fast_transient[2]);
182
+
val |= FIELD_PREP(ADP5055_MASK_FAST_TRANSIENT1, adp5055->fast_transient[1]);
183
+
val |= FIELD_PREP(ADP5055_MASK_FAST_TRANSIENT0, adp5055->fast_transient[0]);
184
+
ret = regmap_write(regmap, ADP5055_FT_CFG, val);
185
+
if (ret)
186
+
return ret;
187
+
188
+
val = FIELD_PREP(ADP5055_MASK_DLY_PWRGD, delay_power_good);
189
+
val |= FIELD_PREP(ADP5055_MASK_PWRGD2, adp5055->mask_power_good[2]);
190
+
val |= FIELD_PREP(ADP5055_MASK_PWRGD1, adp5055->mask_power_good[1]);
191
+
val |= FIELD_PREP(ADP5055_MASK_PWRGD0, adp5055->mask_power_good[0]);
192
+
ret = regmap_write(regmap, ADP5055_PG_CFG, val);
193
+
if (ret)
194
+
return ret;
195
+
196
+
return 0;
197
+
}
198
+
199
+
static int adp5055_of_parse_cb(struct device_node *np,
200
+
const struct regulator_desc *desc,
201
+
struct regulator_config *config)
202
+
{
203
+
struct adp5055 *adp5055 = config->driver_data;
204
+
int id, ret, pval, i;
205
+
206
+
id = desc->id;
207
+
208
+
if (of_property_read_bool(np, "enable-gpios")) {
209
+
adp5055->en_gpiod[id] = devm_fwnode_gpiod_get(config->dev,
210
+
of_fwnode_handle(np), "enable",
211
+
GPIOD_OUT_LOW, "enable");
212
+
if (IS_ERR(adp5055->en_gpiod[id]))
213
+
return dev_err_probe(config->dev, PTR_ERR(adp5055->en_gpiod[id]),
214
+
"Failed to get enable GPIO\n");
215
+
216
+
config->ena_gpiod = adp5055->en_gpiod[id];
217
+
} else {
218
+
adp5055->en_mode_software = true;
219
+
}
220
+
221
+
ret = of_property_read_u32(np, "adi,dvs-limit-upper-microvolt", &pval);
222
+
if (ret)
223
+
adp5055->dvs_limit_upper[id] = 192000;
224
+
else
225
+
adp5055->dvs_limit_upper[id] = pval;
226
+
227
+
if (adp5055->dvs_limit_upper[id] > 192000 || adp5055->dvs_limit_upper[id] < 12000)
228
+
return dev_err_probe(config->dev, adp5055->dvs_limit_upper[id],
229
+
"Out of range - dvs-limit-upper-microvolt value.");
230
+
231
+
ret = of_property_read_u32(np, "adi,dvs-limit-lower-microvolt", &pval);
232
+
if (ret)
233
+
adp5055->dvs_limit_lower[id] = -190500;
234
+
else
235
+
adp5055->dvs_limit_lower[id] = pval;
236
+
237
+
if (adp5055->dvs_limit_lower[id] > -10500 || adp5055->dvs_limit_lower[id] < -190500)
238
+
return dev_err_probe(config->dev, adp5055->dvs_limit_lower[id],
239
+
"Out of range - dvs-limit-lower-microvolt value.");
240
+
241
+
for (i = 0; i < 4; i++) {
242
+
ret = of_property_match_string(np, "adi,fast-transient",
243
+
adp5055_fast_transient_vals[i]);
244
+
if (!ret)
245
+
break;
246
+
}
247
+
248
+
if (ret < 0)
249
+
adp5055->fast_transient[id] = 3;
250
+
else
251
+
adp5055->fast_transient[id] = i;
252
+
253
+
adp5055->mask_power_good[id] = of_property_read_bool(np, "adi,mask-power-good");
254
+
255
+
return 0;
256
+
}
257
+
258
+
static int adp5055_set_mode(struct regulator_dev *rdev, u32 mode)
259
+
{
260
+
struct adp5055 *adp5055 = rdev_get_drvdata(rdev);
261
+
int id, ret;
262
+
263
+
id = rdev_get_id(rdev);
264
+
265
+
switch (mode) {
266
+
case REGULATOR_MODE_NORMAL:
267
+
ret = regmap_update_bits(adp5055->regmap, ADP5055_CTRL_MODE2,
268
+
ADP5055_MASK_PSM << id, 0);
269
+
break;
270
+
case REGULATOR_MODE_IDLE:
271
+
ret = regmap_update_bits(adp5055->regmap, ADP5055_CTRL_MODE2,
272
+
ADP5055_MASK_PSM << id, ADP5055_MASK_PSM << id);
273
+
break;
274
+
default:
275
+
return dev_err_probe(&rdev->dev, -EINVAL,
276
+
"Unsupported mode: %d\n", mode);
277
+
}
278
+
279
+
return ret;
280
+
}
281
+
282
+
static unsigned int adp5055_get_mode(struct regulator_dev *rdev)
283
+
{
284
+
struct adp5055 *adp5055 = rdev_get_drvdata(rdev);
285
+
int id, ret, regval;
286
+
287
+
id = rdev_get_id(rdev);
288
+
289
+
ret = regmap_read(adp5055->regmap, ADP5055_CTRL_MODE2, ®val);
290
+
if (ret)
291
+
return ret;
292
+
293
+
if (regval & (ADP5055_MASK_PSM << id))
294
+
return REGULATOR_MODE_IDLE;
295
+
else
296
+
return REGULATOR_MODE_NORMAL;
297
+
}
298
+
299
+
static const struct regulator_ops adp5055_ops = {
300
+
.list_voltage = regulator_list_voltage_linear_range,
301
+
.map_voltage = regulator_map_voltage_linear_range,
302
+
.set_voltage_sel = regulator_set_voltage_sel_regmap,
303
+
.get_voltage_sel = regulator_get_voltage_sel_regmap,
304
+
.set_active_discharge = regulator_set_active_discharge_regmap,
305
+
.enable = regulator_enable_regmap,
306
+
.disable = regulator_disable_regmap,
307
+
.is_enabled = regulator_is_enabled_regmap,
308
+
.set_mode = adp5055_set_mode,
309
+
.get_mode = adp5055_get_mode,
310
+
.set_ramp_delay = regulator_set_ramp_delay_regmap,
311
+
};
312
+
313
+
#define ADP5055_REG_(_name, _id, _ch, _ops) \
314
+
[_id] = { \
315
+
.name = _name, \
316
+
.of_match = of_match_ptr(_name), \
317
+
.of_parse_cb = adp5055_of_parse_cb, \
318
+
.id = _id, \
319
+
.ops = _ops, \
320
+
.linear_ranges = adp5055_voltage_ranges, \
321
+
.n_linear_ranges = ARRAY_SIZE(adp5055_voltage_ranges), \
322
+
.vsel_reg = ADP5055_VID##_ch, \
323
+
.vsel_mask = GENMASK(7, 0), \
324
+
.enable_reg = ADP5055_CTRL123, \
325
+
.enable_mask = BIT(_ch), \
326
+
.active_discharge_on = ADP5055_MASK_DIS##_id, \
327
+
.active_discharge_off = 0, \
328
+
.active_discharge_mask = ADP5055_MASK_DIS##_id, \
329
+
.active_discharge_reg = ADP5055_CTRL_MODE2, \
330
+
.ramp_reg = ADP5055_DLY##_ch, \
331
+
.ramp_mask = ADP5055_MASK_EN_DLY, \
332
+
.n_ramp_values = ARRAY_SIZE(adp5055_enable_delay_vals_2_6), \
333
+
.type = REGULATOR_VOLTAGE, \
334
+
.owner = THIS_MODULE, \
335
+
}
336
+
337
+
#define ADP5055_REG(_name, _id, _ch) \
338
+
ADP5055_REG_(_name, _id, _ch, &adp5055_ops)
339
+
340
+
static struct regulator_desc adp5055_regulators[] = {
341
+
ADP5055_REG("buck0", 0, 0),
342
+
ADP5055_REG("buck1", 1, 1),
343
+
ADP5055_REG("buck2", 2, 2),
344
+
};
345
+
346
+
static const struct of_device_id adp5055_dt_ids[] = {
347
+
{ .compatible = "adi,adp5055"},
348
+
{ }
349
+
};
350
+
MODULE_DEVICE_TABLE(of, adp5055_dt_ids);
351
+
352
+
static int adp5055_probe(struct i2c_client *client)
353
+
{
354
+
struct regulator_init_data *init_data;
355
+
struct device *dev = &client->dev;
356
+
struct adp5055 *adp5055;
357
+
int i, ret;
358
+
359
+
init_data = of_get_regulator_init_data(dev, client->dev.of_node,
360
+
&adp5055_regulators[0]);
361
+
if (!init_data)
362
+
return -EINVAL;
363
+
364
+
adp5055 = devm_kzalloc(dev, sizeof(struct adp5055), GFP_KERNEL);
365
+
if (!adp5055)
366
+
return -ENOMEM;
367
+
368
+
adp5055->tset = 2600;
369
+
adp5055->en_mode_software = false;
370
+
371
+
adp5055->regmap = devm_regmap_init_i2c(client, &adp5055_regmap_config);
372
+
if (IS_ERR(adp5055->regmap))
373
+
return dev_err_probe(dev, PTR_ERR(adp5055->regmap), "Failed to allocate reg map");
374
+
375
+
for (i = 0; i < ADP5055_NUM_CH; i++) {
376
+
const struct regulator_desc *desc;
377
+
struct regulator_config config = { };
378
+
struct regulator_dev *rdev;
379
+
380
+
if (adp5055->tset == 2600)
381
+
adp5055_regulators[i].ramp_delay_table = adp5055_enable_delay_vals_2_6;
382
+
else
383
+
adp5055_regulators[i].ramp_delay_table = adp5055_enable_delay_vals_20_8;
384
+
385
+
desc = &adp5055_regulators[i];
386
+
387
+
config.dev = dev;
388
+
config.driver_data = adp5055;
389
+
config.regmap = adp5055->regmap;
390
+
config.init_data = init_data;
391
+
392
+
rdev = devm_regulator_register(dev, desc, &config);
393
+
if (IS_ERR(rdev)) {
394
+
return dev_err_probe(dev, PTR_ERR(rdev),
395
+
"Failed to register %s\n", desc->name);
396
+
}
397
+
}
398
+
399
+
ret = adp5055_parse_fw(dev, adp5055);
400
+
if (ret < 0)
401
+
return ret;
402
+
403
+
return 0;
404
+
}
405
+
406
+
static const struct of_device_id adp5055_of_match[] = {
407
+
{ .compatible = "adi,adp5055", },
408
+
{ }
409
+
};
410
+
MODULE_DEVICE_TABLE(of, adp5055_of_match);
411
+
412
+
static const struct i2c_device_id adp5055_ids[] = {
413
+
{ .name = "adp5055"},
414
+
{ },
415
+
};
416
+
MODULE_DEVICE_TABLE(i2c, adp5055_ids);
417
+
418
+
static struct i2c_driver adp5055_driver = {
419
+
.driver = {
420
+
.name = "adp5055",
421
+
.of_match_table = adp5055_of_match,
422
+
},
423
+
.probe = adp5055_probe,
424
+
.id_table = adp5055_ids,
425
+
};
426
+
module_i2c_driver(adp5055_driver);
427
+
428
+
MODULE_DESCRIPTION("ADP5055 Voltage Regulator Driver");
429
+
MODULE_AUTHOR("Alexis Czezar Torreno <alexisczezar.torreno@analog.com>");
430
+
MODULE_LICENSE("GPL");