mmc: Consolidate emmc tuning blocks · tjh.dev/kernel@48d11e0

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

mmc: Consolidate emmc tuning blocks

The same tuning block exists in the dw_mmc h.c and sdhci-msm.c
files. Move these into mmc.c so that they can be shared across
drivers.

Reported-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

authored by

Stephen Boyd and committed by

Ulf Hansson 11 years ago 48d11e06 ffed1b94

+41 -64

4 changed files

expand all

drivers

mmc

core

mmc.c

host

dw_mmc.c

sdhci-msm.c

include

linux

mmc

mmc.h

+32

drivers/mmc/core/mmc.c

··· 1177 1177 return err; 1178 1178 } 1179 1179 1180 + const u8 tuning_blk_pattern_4bit[MMC_TUNING_BLK_PATTERN_4BIT_SIZE] = { 1181 + 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc, 1182 + 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef, 1183 + 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb, 1184 + 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef, 1185 + 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c, 1186 + 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee, 1187 + 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff, 1188 + 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde, 1189 + }; 1190 + EXPORT_SYMBOL(tuning_blk_pattern_4bit); 1191 + 1192 + const u8 tuning_blk_pattern_8bit[MMC_TUNING_BLK_PATTERN_8BIT_SIZE] = { 1193 + 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00, 1194 + 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc, 1195 + 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff, 1196 + 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff, 1197 + 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd, 1198 + 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb, 1199 + 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff, 1200 + 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff, 1201 + 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 1202 + 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 1203 + 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 1204 + 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 1205 + 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 1206 + 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 1207 + 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 1208 + 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 1209 + }; 1210 + EXPORT_SYMBOL(tuning_blk_pattern_8bit); 1211 + 1180 1212 /* 1181 1213 * Execute tuning sequence to seek the proper bus operating 1182 1214 * conditions for HS200 and HS400, which sends CMD21 to the device.

-30

drivers/mmc/host/dw_mmc.c

··· 82 82 }; 83 83 #endif /* CONFIG_MMC_DW_IDMAC */ 84 84 85 - static const u8 tuning_blk_pattern_4bit[] = { 86 - 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc, 87 - 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef, 88 - 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb, 89 - 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef, 90 - 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c, 91 - 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee, 92 - 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff, 93 - 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde, 94 - }; 95 - 96 - static const u8 tuning_blk_pattern_8bit[] = { 97 - 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00, 98 - 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc, 99 - 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff, 100 - 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff, 101 - 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd, 102 - 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb, 103 - 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff, 104 - 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff, 105 - 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 106 - 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 107 - 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 108 - 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 109 - 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 110 - 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 111 - 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 112 - 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 113 - }; 114 - 115 85 static bool dw_mci_reset(struct dw_mci *host); 116 86 117 87 #if defined(CONFIG_DEBUG_FS)

+4 -34

drivers/mmc/host/sdhci-msm.c

··· 46 46 #define CMUX_SHIFT_PHASE_SHIFT 24 47 47 #define CMUX_SHIFT_PHASE_MASK (7 << CMUX_SHIFT_PHASE_SHIFT) 48 48 49 - static const u8 tuning_block_64[] = { 50 - 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc, 51 - 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef, 52 - 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb, 53 - 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef, 54 - 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c, 55 - 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee, 56 - 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff, 57 - 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde, 58 - }; 59 - 60 - static const u8 tuning_block_128[] = { 61 - 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00, 62 - 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc, 63 - 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff, 64 - 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff, 65 - 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd, 66 - 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb, 67 - 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff, 68 - 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff, 69 - 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 70 - 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 71 - 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 72 - 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 73 - 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 74 - 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 75 - 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 76 - 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 77 - }; 78 - 79 49 struct sdhci_msm_host { 80 50 struct platform_device *pdev; 81 51 void __iomem *core_mem; /* MSM SDCC mapped address */ ··· 340 370 { 341 371 int tuning_seq_cnt = 3; 342 372 u8 phase, *data_buf, tuned_phases[16], tuned_phase_cnt = 0; 343 - const u8 *tuning_block_pattern = tuning_block_64; 344 - int size = sizeof(tuning_block_64); /* Pattern size in bytes */ 373 + const u8 *tuning_block_pattern = tuning_blk_pattern_4bit; 374 + int size = sizeof(tuning_blk_pattern_4bit); 345 375 int rc; 346 376 struct mmc_host *mmc = host->mmc; 347 377 struct mmc_ios ios = host->mmc->ios; ··· 357 387 358 388 if ((opcode == MMC_SEND_TUNING_BLOCK_HS200) && 359 389 (mmc->ios.bus_width == MMC_BUS_WIDTH_8)) { 360 - tuning_block_pattern = tuning_block_128; 361 - size = sizeof(tuning_block_128); 390 + tuning_block_pattern = tuning_blk_pattern_8bit; 391 + size = sizeof(tuning_blk_pattern_8bit); 362 392 } 363 393 364 394 data_buf = kmalloc(size, GFP_KERNEL);

include/linux/mmc/mmc.h

··· 53 53 #define MMC_SEND_TUNING_BLOCK 19 /* adtc R1 */ 54 54 #define MMC_SEND_TUNING_BLOCK_HS200 21 /* adtc R1 */ 55 55 56 + #define MMC_TUNING_BLK_PATTERN_4BIT_SIZE 64 57 + #define MMC_TUNING_BLK_PATTERN_8BIT_SIZE 128 58 + extern const u8 tuning_blk_pattern_4bit[MMC_TUNING_BLK_PATTERN_4BIT_SIZE]; 59 + extern const u8 tuning_blk_pattern_8bit[MMC_TUNING_BLK_PATTERN_8BIT_SIZE]; 60 + 56 61 /* class 3 */ 57 62 #define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */ 58 63