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dt-bindings: crypto: Convert fsl,sec-2.0 to YAML
Convert the Freescale security engine (crypto accelerator) binding from
text form to YAML. The list of compatible strings reflects what was
previously described in prose; not all combinations occur in existing
devicetrees.
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
authored by
J. Neuschäfer
and committed by
Herbert Xu
48a1bfc2
641938d3
+144
-65
+144
Documentation/devicetree/bindings/crypto/fsl,sec2.0.yaml
+144
Documentation/devicetree/bindings/crypto/fsl,sec2.0.yaml
···
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale SoC SEC Security Engines versions 1.x-2.x-3.x
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maintainers:
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- J. Neuschäfer <j.ne@posteo.net>
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properties:
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compatible:
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description:
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Should contain entries for this and backward compatible SEC versions,
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high to low. Warning - SEC1 and SEC2 are mutually exclusive.
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oneOf:
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- items:
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- const: fsl,sec3.3
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- const: fsl,sec3.1
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- const: fsl,sec3.0
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- const: fsl,sec2.4
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- const: fsl,sec2.2
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- const: fsl,sec2.1
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- const: fsl,sec2.0
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- items:
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- const: fsl,sec3.1
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- const: fsl,sec3.0
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- const: fsl,sec2.4
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- const: fsl,sec2.2
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- const: fsl,sec2.1
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- const: fsl,sec2.0
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- items:
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- const: fsl,sec3.0
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- const: fsl,sec2.4
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- const: fsl,sec2.2
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- const: fsl,sec2.1
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- const: fsl,sec2.0
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- items:
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- const: fsl,sec2.4
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- const: fsl,sec2.2
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- const: fsl,sec2.1
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- const: fsl,sec2.0
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- items:
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- const: fsl,sec2.2
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- const: fsl,sec2.1
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- const: fsl,sec2.0
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- items:
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- const: fsl,sec2.1
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- const: fsl,sec2.0
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- items:
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- const: fsl,sec2.0
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- items:
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- const: fsl,sec1.2
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- const: fsl,sec1.0
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- items:
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- const: fsl,sec1.0
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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fsl,num-channels:
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [ 1, 4 ]
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description: An integer representing the number of channels available.
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fsl,channel-fifo-len:
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$ref: /schemas/types.yaml#/definitions/uint32
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maximum: 100
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description:
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An integer representing the number of descriptor pointers each channel
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fetch fifo can hold.
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fsl,exec-units-mask:
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$ref: /schemas/types.yaml#/definitions/uint32
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maximum: 0xfff
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description: |
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The bitmask representing what execution units (EUs) are available.
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EU information should be encoded following the SEC's Descriptor Header
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Dword EU_SEL0 field documentation, i.e. as follows:
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bit 0 = reserved - should be 0
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bit 1 = set if SEC has the ARC4 EU (AFEU)
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bit 2 = set if SEC has the DES/3DES EU (DEU)
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bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
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bit 4 = set if SEC has the random number generator EU (RNG)
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bit 5 = set if SEC has the public key EU (PKEU)
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bit 6 = set if SEC has the AES EU (AESU)
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bit 7 = set if SEC has the Kasumi EU (KEU)
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bit 8 = set if SEC has the CRC EU (CRCU)
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bit 11 = set if SEC has the message digest EU extended alg set (MDEU-B)
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remaining bits are reserved for future SEC EUs.
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fsl,descriptor-types-mask:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: |
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The bitmask representing what descriptors are available. Descriptor type
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information should be encoded following the SEC's Descriptor Header Dword
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DESC_TYPE field documentation, i.e. as follows:
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bit 0 = SEC supports descriptor type aesu_ctr_nonsnoop
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bit 1 = SEC supports descriptor type ipsec_esp
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bit 2 = SEC supports descriptor type common_nonsnoop
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bit 3 = SEC supports descriptor type 802.11i AES ccmp
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bit 4 = SEC supports descriptor type hmac_snoop_no_afeu
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bit 5 = SEC supports descriptor type srtp
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bit 6 = SEC supports descriptor type non_hmac_snoop_no_afeu
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bit 7 = SEC supports descriptor type pkeu_assemble
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bit 8 = SEC supports descriptor type aesu_key_expand_output
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bit 9 = SEC supports descriptor type pkeu_ptmul
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bit 10 = SEC supports descriptor type common_nonsnoop_afeu
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bit 11 = SEC supports descriptor type pkeu_ptadd_dbl
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..and so on and so forth.
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required:
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- compatible
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- reg
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- fsl,num-channels
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- fsl,channel-fifo-len
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- fsl,exec-units-mask
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- fsl,descriptor-types-mask
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unevaluatedProperties: false
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examples:
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- |
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/* MPC8548E */
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crypto@30000 {
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compatible = "fsl,sec2.1", "fsl,sec2.0";
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reg = <0x30000 0x10000>;
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interrupts = <29 2>;
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interrupt-parent = <&mpic>;
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fsl,num-channels = <4>;
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fsl,channel-fifo-len = <24>;
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fsl,exec-units-mask = <0xfe>;
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fsl,descriptor-types-mask = <0x12b0ebf>;
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};
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...
-65
Documentation/devicetree/bindings/crypto/fsl-sec2.txt
-65
Documentation/devicetree/bindings/crypto/fsl-sec2.txt
···
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Freescale SoC SEC Security Engines versions 1.x-2.x-3.x
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Required properties:
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- compatible : Should contain entries for this and backward compatible
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SEC versions, high to low, e.g., "fsl,sec2.1", "fsl,sec2.0" (SEC2/3)
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e.g., "fsl,sec1.2", "fsl,sec1.0" (SEC1)
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warning: SEC1 and SEC2 are mutually exclusive
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- reg : Offset and length of the register set for the device
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- interrupts : the SEC's interrupt number
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- fsl,num-channels : An integer representing the number of channels
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available.
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- fsl,channel-fifo-len : An integer representing the number of
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descriptor pointers each channel fetch fifo can hold.
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- fsl,exec-units-mask : The bitmask representing what execution units
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(EUs) are available. It's a single 32-bit cell. EU information
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should be encoded following the SEC's Descriptor Header Dword
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EU_SEL0 field documentation, i.e. as follows:
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-
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bit 0 = reserved - should be 0
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bit 1 = set if SEC has the ARC4 EU (AFEU)
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bit 2 = set if SEC has the DES/3DES EU (DEU)
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bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
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bit 4 = set if SEC has the random number generator EU (RNG)
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bit 5 = set if SEC has the public key EU (PKEU)
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bit 6 = set if SEC has the AES EU (AESU)
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bit 7 = set if SEC has the Kasumi EU (KEU)
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bit 8 = set if SEC has the CRC EU (CRCU)
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bit 11 = set if SEC has the message digest EU extended alg set (MDEU-B)
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remaining bits are reserved for future SEC EUs.
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- fsl,descriptor-types-mask : The bitmask representing what descriptors
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are available. It's a single 32-bit cell. Descriptor type information
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should be encoded following the SEC's Descriptor Header Dword DESC_TYPE
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field documentation, i.e. as follows:
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-
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bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type
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bit 1 = set if SEC supports the ipsec_esp descriptor type
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bit 2 = set if SEC supports the common_nonsnoop desc. type
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bit 3 = set if SEC supports the 802.11i AES ccmp desc. type
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bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type
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bit 5 = set if SEC supports the srtp descriptor type
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bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type
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bit 7 = set if SEC supports the pkeu_assemble descriptor type
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bit 8 = set if SEC supports the aesu_key_expand_output desc.type
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bit 9 = set if SEC supports the pkeu_ptmul descriptor type
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bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type
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bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type
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-
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..and so on and so forth.
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Example:
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/* MPC8548E */
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crypto@30000 {
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compatible = "fsl,sec2.1", "fsl,sec2.0";
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reg = <0x30000 0x10000>;
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interrupts = <29 2>;
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interrupt-parent = <&mpic>;
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fsl,num-channels = <4>;
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fsl,channel-fifo-len = <24>;
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fsl,exec-units-mask = <0xfe>;
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fsl,descriptor-types-mask = <0x12b0ebf>;
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};