Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch 'lan743x-enhancements'

Raju Lakkaraju says:

====================
net: lan743x: PCI11010 / PCI11414 devices Enhancements

This patch series adds support of the Ethernet function of the PCI11010 / PCI11414 devices to the LAN743x driver.
The PCI1xxxx family of devices consists of a PCIe switch with a variety of embedded PCI endpoints on its downstream ports.
The PCI11010 / PCI11414 devices include an Ethernet 10/100/1000/2500 function as one of those embedded endpoints.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>

+305 -39
+244 -30
drivers/net/ethernet/microchip/lan743x_main.c
··· 18 18 #include "lan743x_main.h" 19 19 #include "lan743x_ethtool.h" 20 20 21 + #define MMD_ACCESS_ADDRESS 0 22 + #define MMD_ACCESS_WRITE 1 23 + #define MMD_ACCESS_READ 2 24 + #define MMD_ACCESS_READ_INC 3 25 + 26 + static void pci11x1x_strap_get_status(struct lan743x_adapter *adapter) 27 + { 28 + u32 chip_rev; 29 + u32 strap; 30 + 31 + strap = lan743x_csr_read(adapter, STRAP_READ); 32 + if (strap & STRAP_READ_USE_SGMII_EN_) { 33 + if (strap & STRAP_READ_SGMII_EN_) 34 + adapter->is_sgmii_en = true; 35 + else 36 + adapter->is_sgmii_en = false; 37 + netif_dbg(adapter, drv, adapter->netdev, 38 + "STRAP_READ: 0x%08X\n", strap); 39 + } else { 40 + chip_rev = lan743x_csr_read(adapter, FPGA_REV); 41 + if (chip_rev) { 42 + if (chip_rev & FPGA_SGMII_OP) 43 + adapter->is_sgmii_en = true; 44 + else 45 + adapter->is_sgmii_en = false; 46 + netif_dbg(adapter, drv, adapter->netdev, 47 + "FPGA_REV: 0x%08X\n", chip_rev); 48 + } else { 49 + adapter->is_sgmii_en = false; 50 + } 51 + } 52 + } 53 + 54 + static bool is_pci11x1x_chip(struct lan743x_adapter *adapter) 55 + { 56 + struct lan743x_csr *csr = &adapter->csr; 57 + u32 id_rev = csr->id_rev; 58 + 59 + if (((id_rev & 0xFFFF0000) == ID_REV_ID_A011_) || 60 + ((id_rev & 0xFFFF0000) == ID_REV_ID_A041_)) { 61 + return true; 62 + } 63 + return false; 64 + } 65 + 21 66 static void lan743x_pci_cleanup(struct lan743x_adapter *adapter) 22 67 { 23 68 pci_release_selected_regions(adapter->pdev, ··· 295 250 } 296 251 } 297 252 if (int_sts & INT_BIT_ALL_TX_) { 298 - for (channel = 0; channel < LAN743X_USED_TX_CHANNELS; 253 + for (channel = 0; channel < adapter->used_tx_channels; 299 254 channel++) { 300 255 u32 int_bit = INT_BIT_DMA_TX_(channel); 301 256 ··· 455 410 { 456 411 int index; 457 412 458 - for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++) { 413 + for (index = 0; index < adapter->max_vector_count; index++) { 459 414 if (adapter->intr.vector_list[index].int_mask & int_mask) 460 415 return adapter->intr.vector_list[index].flags; 461 416 } ··· 468 423 int index = 0; 469 424 470 425 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_); 471 - lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x000000FF); 426 + if (adapter->is_pci11x1x) 427 + lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x0000FFFF); 428 + else 429 + lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x000000FF); 472 430 473 - for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++) { 431 + for (index = 0; index < intr->number_of_vectors; index++) { 474 432 if (intr->flags & INTR_FLAG_IRQ_REQUESTED(index)) { 475 433 lan743x_intr_unregister_isr(adapter, index); 476 434 intr->flags &= ~INTR_FLAG_IRQ_REQUESTED(index); ··· 493 445 494 446 static int lan743x_intr_open(struct lan743x_adapter *adapter) 495 447 { 496 - struct msix_entry msix_entries[LAN743X_MAX_VECTOR_COUNT]; 448 + struct msix_entry msix_entries[PCI11X1X_MAX_VECTOR_COUNT]; 497 449 struct lan743x_intr *intr = &adapter->intr; 450 + unsigned int used_tx_channels; 498 451 u32 int_vec_en_auto_clr = 0; 452 + u8 max_vector_count; 499 453 u32 int_vec_map0 = 0; 500 454 u32 int_vec_map1 = 0; 501 455 int ret = -ENODEV; ··· 507 457 intr->number_of_vectors = 0; 508 458 509 459 /* Try to set up MSIX interrupts */ 460 + max_vector_count = adapter->max_vector_count; 510 461 memset(&msix_entries[0], 0, 511 - sizeof(struct msix_entry) * LAN743X_MAX_VECTOR_COUNT); 512 - for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++) 462 + sizeof(struct msix_entry) * max_vector_count); 463 + for (index = 0; index < max_vector_count; index++) 513 464 msix_entries[index].entry = index; 465 + used_tx_channels = adapter->used_tx_channels; 514 466 ret = pci_enable_msix_range(adapter->pdev, 515 467 msix_entries, 1, 516 - 1 + LAN743X_USED_TX_CHANNELS + 468 + 1 + used_tx_channels + 517 469 LAN743X_USED_RX_CHANNELS); 518 470 519 471 if (ret > 0) { ··· 608 556 lan743x_csr_write(adapter, INT_MOD_CFG5, LAN743X_INT_MOD); 609 557 lan743x_csr_write(adapter, INT_MOD_CFG6, LAN743X_INT_MOD); 610 558 lan743x_csr_write(adapter, INT_MOD_CFG7, LAN743X_INT_MOD); 611 - lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00005432); 612 - lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00000001); 559 + if (adapter->is_pci11x1x) { 560 + lan743x_csr_write(adapter, INT_MOD_CFG8, LAN743X_INT_MOD); 561 + lan743x_csr_write(adapter, INT_MOD_CFG9, LAN743X_INT_MOD); 562 + lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00007654); 563 + lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00003210); 564 + } else { 565 + lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00005432); 566 + lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00000001); 567 + } 613 568 lan743x_csr_write(adapter, INT_MOD_MAP2, 0x00FFFFFF); 614 569 } 615 570 ··· 629 570 if (intr->number_of_vectors > 1) { 630 571 int number_of_tx_vectors = intr->number_of_vectors - 1; 631 572 632 - if (number_of_tx_vectors > LAN743X_USED_TX_CHANNELS) 633 - number_of_tx_vectors = LAN743X_USED_TX_CHANNELS; 573 + if (number_of_tx_vectors > used_tx_channels) 574 + number_of_tx_vectors = used_tx_channels; 634 575 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 635 576 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 636 577 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | ··· 668 609 INT_VEC_EN_(vector)); 669 610 } 670 611 } 671 - if ((intr->number_of_vectors - LAN743X_USED_TX_CHANNELS) > 1) { 612 + if ((intr->number_of_vectors - used_tx_channels) > 1) { 672 613 int number_of_rx_vectors = intr->number_of_vectors - 673 - LAN743X_USED_TX_CHANNELS - 1; 614 + used_tx_channels - 1; 674 615 675 616 if (number_of_rx_vectors > LAN743X_USED_RX_CHANNELS) 676 617 number_of_rx_vectors = LAN743X_USED_RX_CHANNELS; ··· 691 632 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR; 692 633 } 693 634 for (index = 0; index < number_of_rx_vectors; index++) { 694 - int vector = index + 1 + LAN743X_USED_TX_CHANNELS; 635 + int vector = index + 1 + used_tx_channels; 695 636 u32 int_bit = INT_BIT_DMA_RX_(index); 696 637 697 638 /* map RX interrupt to vector */ ··· 816 757 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_WRITE); 817 758 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access); 818 759 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 760 + return ret; 761 + } 762 + 763 + static u32 lan743x_mac_mmd_access(int id, int index, int op) 764 + { 765 + u16 dev_addr; 766 + u32 ret; 767 + 768 + dev_addr = (index >> 16) & 0x1f; 769 + ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) & 770 + MAC_MII_ACC_PHY_ADDR_MASK_; 771 + ret |= (dev_addr << MAC_MII_ACC_MIIMMD_SHIFT_) & 772 + MAC_MII_ACC_MIIMMD_MASK_; 773 + if (op == MMD_ACCESS_WRITE) 774 + ret |= MAC_MII_ACC_MIICMD_WRITE_; 775 + else if (op == MMD_ACCESS_READ) 776 + ret |= MAC_MII_ACC_MIICMD_READ_; 777 + else if (op == MMD_ACCESS_READ_INC) 778 + ret |= MAC_MII_ACC_MIICMD_READ_INC_; 779 + else 780 + ret |= MAC_MII_ACC_MIICMD_ADDR_; 781 + ret |= (MAC_MII_ACC_MII_BUSY_ | MAC_MII_ACC_MIICL45_); 782 + 783 + return ret; 784 + } 785 + 786 + static int lan743x_mdiobus_c45_read(struct mii_bus *bus, int phy_id, int index) 787 + { 788 + struct lan743x_adapter *adapter = bus->priv; 789 + u32 mmd_access; 790 + int ret; 791 + 792 + /* comfirm MII not busy */ 793 + ret = lan743x_mac_mii_wait_till_not_busy(adapter); 794 + if (ret < 0) 795 + return ret; 796 + if (index & MII_ADDR_C45) { 797 + /* Load Register Address */ 798 + lan743x_csr_write(adapter, MAC_MII_DATA, (u32)(index & 0xffff)); 799 + mmd_access = lan743x_mac_mmd_access(phy_id, index, 800 + MMD_ACCESS_ADDRESS); 801 + lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 802 + ret = lan743x_mac_mii_wait_till_not_busy(adapter); 803 + if (ret < 0) 804 + return ret; 805 + /* Read Data */ 806 + mmd_access = lan743x_mac_mmd_access(phy_id, index, 807 + MMD_ACCESS_READ); 808 + lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 809 + ret = lan743x_mac_mii_wait_till_not_busy(adapter); 810 + if (ret < 0) 811 + return ret; 812 + ret = lan743x_csr_read(adapter, MAC_MII_DATA); 813 + return (int)(ret & 0xFFFF); 814 + } 815 + 816 + ret = lan743x_mdiobus_read(bus, phy_id, index); 817 + return ret; 818 + } 819 + 820 + static int lan743x_mdiobus_c45_write(struct mii_bus *bus, 821 + int phy_id, int index, u16 regval) 822 + { 823 + struct lan743x_adapter *adapter = bus->priv; 824 + u32 mmd_access; 825 + int ret; 826 + 827 + /* confirm MII not busy */ 828 + ret = lan743x_mac_mii_wait_till_not_busy(adapter); 829 + if (ret < 0) 830 + return ret; 831 + if (index & MII_ADDR_C45) { 832 + /* Load Register Address */ 833 + lan743x_csr_write(adapter, MAC_MII_DATA, (u32)(index & 0xffff)); 834 + mmd_access = lan743x_mac_mmd_access(phy_id, index, 835 + MMD_ACCESS_ADDRESS); 836 + lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 837 + ret = lan743x_mac_mii_wait_till_not_busy(adapter); 838 + if (ret < 0) 839 + return ret; 840 + /* Write Data */ 841 + lan743x_csr_write(adapter, MAC_MII_DATA, (u32)regval); 842 + mmd_access = lan743x_mac_mmd_access(phy_id, index, 843 + MMD_ACCESS_WRITE); 844 + lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 845 + ret = lan743x_mac_mii_wait_till_not_busy(adapter); 846 + } else { 847 + ret = lan743x_mdiobus_write(bus, phy_id, index, regval); 848 + } 849 + 819 850 return ret; 820 851 } 821 852 ··· 2640 2491 struct lan743x_adapter *adapter = netdev_priv(netdev); 2641 2492 int index; 2642 2493 2643 - lan743x_tx_close(&adapter->tx[0]); 2494 + for (index = 0; index < adapter->used_tx_channels; index++) 2495 + lan743x_tx_close(&adapter->tx[index]); 2644 2496 2645 2497 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) 2646 2498 lan743x_rx_close(&adapter->rx[index]); ··· 2687 2537 goto close_rx; 2688 2538 } 2689 2539 2690 - ret = lan743x_tx_open(&adapter->tx[0]); 2691 - if (ret) 2692 - goto close_rx; 2693 - 2540 + for (index = 0; index < adapter->used_tx_channels; index++) { 2541 + ret = lan743x_tx_open(&adapter->tx[index]); 2542 + if (ret) 2543 + goto close_tx; 2544 + } 2694 2545 return 0; 2546 + 2547 + close_tx: 2548 + for (index = 0; index < adapter->used_tx_channels; index++) { 2549 + if (adapter->tx[index].ring_cpu_ptr) 2550 + lan743x_tx_close(&adapter->tx[index]); 2551 + } 2695 2552 2696 2553 close_rx: 2697 2554 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { ··· 2726 2569 struct net_device *netdev) 2727 2570 { 2728 2571 struct lan743x_adapter *adapter = netdev_priv(netdev); 2572 + u8 ch = 0; 2729 2573 2730 - return lan743x_tx_xmit_frame(&adapter->tx[0], skb); 2574 + if (adapter->is_pci11x1x) 2575 + ch = skb->queue_mapping % PCI11X1X_USED_TX_CHANNELS; 2576 + 2577 + return lan743x_tx_xmit_frame(&adapter->tx[ch], skb); 2731 2578 } 2732 2579 2733 2580 static int lan743x_netdev_ioctl(struct net_device *netdev, ··· 2862 2701 int index; 2863 2702 int ret; 2864 2703 2704 + adapter->is_pci11x1x = is_pci11x1x_chip(adapter); 2705 + if (adapter->is_pci11x1x) { 2706 + adapter->max_tx_channels = PCI11X1X_MAX_TX_CHANNELS; 2707 + adapter->used_tx_channels = PCI11X1X_USED_TX_CHANNELS; 2708 + adapter->max_vector_count = PCI11X1X_MAX_VECTOR_COUNT; 2709 + pci11x1x_strap_get_status(adapter); 2710 + } else { 2711 + adapter->max_tx_channels = LAN743X_MAX_TX_CHANNELS; 2712 + adapter->used_tx_channels = LAN743X_USED_TX_CHANNELS; 2713 + adapter->max_vector_count = LAN743X_MAX_VECTOR_COUNT; 2714 + } 2715 + 2865 2716 adapter->intr.irq = adapter->pdev->irq; 2866 2717 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF); 2867 2718 ··· 2904 2731 adapter->rx[index].channel_number = index; 2905 2732 } 2906 2733 2907 - tx = &adapter->tx[0]; 2908 - tx->adapter = adapter; 2909 - tx->channel_number = 0; 2910 - spin_lock_init(&tx->ring_lock); 2734 + for (index = 0; index < adapter->used_tx_channels; index++) { 2735 + tx = &adapter->tx[index]; 2736 + tx->adapter = adapter; 2737 + tx->channel_number = index; 2738 + spin_lock_init(&tx->ring_lock); 2739 + } 2740 + 2911 2741 return 0; 2912 2742 } 2913 2743 2914 2744 static int lan743x_mdiobus_init(struct lan743x_adapter *adapter) 2915 2745 { 2746 + u32 sgmii_ctl; 2916 2747 int ret; 2917 2748 2918 2749 adapter->mdiobus = devm_mdiobus_alloc(&adapter->pdev->dev); ··· 2926 2749 } 2927 2750 2928 2751 adapter->mdiobus->priv = (void *)adapter; 2929 - adapter->mdiobus->read = lan743x_mdiobus_read; 2930 - adapter->mdiobus->write = lan743x_mdiobus_write; 2931 - adapter->mdiobus->name = "lan743x-mdiobus"; 2752 + if (adapter->is_pci11x1x) { 2753 + if (adapter->is_sgmii_en) { 2754 + sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL); 2755 + sgmii_ctl |= SGMII_CTL_SGMII_ENABLE_; 2756 + sgmii_ctl &= ~SGMII_CTL_SGMII_POWER_DN_; 2757 + lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl); 2758 + netif_dbg(adapter, drv, adapter->netdev, 2759 + "SGMII operation\n"); 2760 + } else { 2761 + sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL); 2762 + sgmii_ctl &= ~SGMII_CTL_SGMII_ENABLE_; 2763 + sgmii_ctl |= SGMII_CTL_SGMII_POWER_DN_; 2764 + lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl); 2765 + netif_dbg(adapter, drv, adapter->netdev, 2766 + "(R)GMII operation\n"); 2767 + } 2768 + 2769 + adapter->mdiobus->probe_capabilities = MDIOBUS_C22_C45; 2770 + adapter->mdiobus->read = lan743x_mdiobus_c45_read; 2771 + adapter->mdiobus->write = lan743x_mdiobus_c45_write; 2772 + adapter->mdiobus->name = "lan743x-mdiobus-c45"; 2773 + netif_dbg(adapter, drv, adapter->netdev, "lan743x-mdiobus-c45\n"); 2774 + } else { 2775 + adapter->mdiobus->read = lan743x_mdiobus_read; 2776 + adapter->mdiobus->write = lan743x_mdiobus_write; 2777 + adapter->mdiobus->name = "lan743x-mdiobus"; 2778 + netif_dbg(adapter, drv, adapter->netdev, "lan743x-mdiobus\n"); 2779 + } 2780 + 2932 2781 snprintf(adapter->mdiobus->id, MII_BUS_ID_SIZE, 2933 2782 "pci-%s", pci_name(adapter->pdev)); 2934 2783 ··· 2989 2786 struct net_device *netdev = NULL; 2990 2787 int ret = -ENODEV; 2991 2788 2992 - netdev = devm_alloc_etherdev(&pdev->dev, 2993 - sizeof(struct lan743x_adapter)); 2789 + if (id->device == PCI_DEVICE_ID_SMSC_A011 || 2790 + id->device == PCI_DEVICE_ID_SMSC_A041) { 2791 + netdev = devm_alloc_etherdev_mqs(&pdev->dev, 2792 + sizeof(struct lan743x_adapter), 2793 + PCI11X1X_USED_TX_CHANNELS, 2794 + LAN743X_USED_RX_CHANNELS); 2795 + } else { 2796 + netdev = devm_alloc_etherdev(&pdev->dev, 2797 + sizeof(struct lan743x_adapter)); 2798 + } 2799 + 2994 2800 if (!netdev) 2995 2801 goto return_error; 2996 2802 ··· 3268 3056 static const struct pci_device_id lan743x_pcidev_tbl[] = { 3269 3057 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7430) }, 3270 3058 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7431) }, 3059 + { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_A011) }, 3060 + { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_A041) }, 3271 3061 { 0, } 3272 3062 }; 3273 3063
+57 -5
drivers/net/ethernet/microchip/lan743x_main.h
··· 16 16 #define ID_REV_ID_MASK_ (0xFFFF0000) 17 17 #define ID_REV_ID_LAN7430_ (0x74300000) 18 18 #define ID_REV_ID_LAN7431_ (0x74310000) 19 - #define ID_REV_IS_VALID_CHIP_ID_(id_rev) \ 20 - (((id_rev) & 0xFFF00000) == 0x74300000) 19 + #define ID_REV_ID_LAN743X_ (0x74300000) 20 + #define ID_REV_ID_A011_ (0xA0110000) // PCI11010 21 + #define ID_REV_ID_A041_ (0xA0410000) // PCI11414 22 + #define ID_REV_ID_A0X1_ (0xA0010000) 23 + #define ID_REV_IS_VALID_CHIP_ID_(id_rev) \ 24 + ((((id_rev) & 0xFFF00000) == ID_REV_ID_LAN743X_) || \ 25 + (((id_rev) & 0xFF0F0000) == ID_REV_ID_A0X1_)) 21 26 #define ID_REV_CHIP_REV_MASK_ (0x0000FFFF) 22 27 #define ID_REV_CHIP_REV_A0_ (0x00000000) 23 28 #define ID_REV_CHIP_REV_B0_ (0x00000010) ··· 30 25 #define FPGA_REV (0x04) 31 26 #define FPGA_REV_GET_MINOR_(fpga_rev) (((fpga_rev) >> 8) & 0x000000FF) 32 27 #define FPGA_REV_GET_MAJOR_(fpga_rev) ((fpga_rev) & 0x000000FF) 28 + #define FPGA_SGMII_OP BIT(24) 29 + 30 + #define STRAP_READ (0x0C) 31 + #define STRAP_READ_USE_SGMII_EN_ BIT(22) 32 + #define STRAP_READ_SGMII_EN_ BIT(6) 33 + #define STRAP_READ_SGMII_REFCLK_ BIT(5) 34 + #define STRAP_READ_SGMII_2_5G_ BIT(4) 35 + #define STRAP_READ_BASE_X_ BIT(3) 36 + #define STRAP_READ_RGMII_TXC_DELAY_EN_ BIT(2) 37 + #define STRAP_READ_RGMII_RXC_DELAY_EN_ BIT(1) 38 + #define STRAP_READ_ADV_PM_DISABLE_ BIT(0) 33 39 34 40 #define HW_CFG (0x010) 35 41 #define HW_CFG_RELOAD_TYPE_ALL_ (0x00000FC0) ··· 151 135 #define MAC_RX_ADDRL (0x11C) 152 136 153 137 #define MAC_MII_ACC (0x120) 138 + #define MAC_MII_ACC_MDC_CYCLE_SHIFT_ (16) 139 + #define MAC_MII_ACC_MDC_CYCLE_MASK_ (0x00070000) 140 + #define MAC_MII_ACC_MDC_CYCLE_2_5MHZ_ (0) 141 + #define MAC_MII_ACC_MDC_CYCLE_5MHZ_ (1) 142 + #define MAC_MII_ACC_MDC_CYCLE_12_5MHZ_ (2) 143 + #define MAC_MII_ACC_MDC_CYCLE_25MHZ_ (3) 144 + #define MAC_MII_ACC_MDC_CYCLE_1_25MHZ_ (4) 154 145 #define MAC_MII_ACC_PHY_ADDR_SHIFT_ (11) 155 146 #define MAC_MII_ACC_PHY_ADDR_MASK_ (0x0000F800) 156 147 #define MAC_MII_ACC_MIIRINDA_SHIFT_ (6) ··· 165 142 #define MAC_MII_ACC_MII_READ_ (0x00000000) 166 143 #define MAC_MII_ACC_MII_WRITE_ (0x00000002) 167 144 #define MAC_MII_ACC_MII_BUSY_ BIT(0) 145 + 146 + #define MAC_MII_ACC_MIIMMD_SHIFT_ (6) 147 + #define MAC_MII_ACC_MIIMMD_MASK_ (0x000007C0) 148 + #define MAC_MII_ACC_MIICL45_ BIT(3) 149 + #define MAC_MII_ACC_MIICMD_MASK_ (0x00000006) 150 + #define MAC_MII_ACC_MIICMD_ADDR_ (0x00000000) 151 + #define MAC_MII_ACC_MIICMD_WRITE_ (0x00000002) 152 + #define MAC_MII_ACC_MIICMD_READ_ (0x00000004) 153 + #define MAC_MII_ACC_MIICMD_READ_INC_ (0x00000006) 168 154 169 155 #define MAC_MII_DATA (0x124) 170 156 ··· 246 214 247 215 #define MAC_WUCSR2 (0x600) 248 216 217 + #define SGMII_CTL (0x728) 218 + #define SGMII_CTL_SGMII_ENABLE_ BIT(31) 219 + #define SGMII_CTL_LINK_STATUS_SOURCE_ BIT(8) 220 + #define SGMII_CTL_SGMII_POWER_DN_ BIT(1) 221 + 249 222 #define INT_STS (0x780) 250 223 #define INT_BIT_DMA_RX_(channel) BIT(24 + (channel)) 251 224 #define INT_BIT_ALL_RX_ (0x0F000000) ··· 298 261 #define INT_MOD_CFG5 (0x7D4) 299 262 #define INT_MOD_CFG6 (0x7D8) 300 263 #define INT_MOD_CFG7 (0x7DC) 264 + #define INT_MOD_CFG8 (0x7E0) 265 + #define INT_MOD_CFG9 (0x7E4) 301 266 302 267 #define PTP_CMD_CTL (0x0A00) 303 268 #define PTP_CMD_CTL_PTP_CLK_STP_NSEC_ BIT(6) ··· 580 541 581 542 #define LAN743X_MAX_RX_CHANNELS (4) 582 543 #define LAN743X_MAX_TX_CHANNELS (1) 544 + #define PCI11X1X_MAX_TX_CHANNELS (4) 583 545 struct lan743x_adapter; 584 546 585 547 #define LAN743X_USED_RX_CHANNELS (4) 586 548 #define LAN743X_USED_TX_CHANNELS (1) 549 + #define PCI11X1X_USED_TX_CHANNELS (4) 587 550 #define LAN743X_INT_MOD (400) 588 551 589 552 #if (LAN743X_USED_RX_CHANNELS > LAN743X_MAX_RX_CHANNELS) ··· 594 553 #if (LAN743X_USED_TX_CHANNELS > LAN743X_MAX_TX_CHANNELS) 595 554 #error Invalid LAN743X_USED_TX_CHANNELS 596 555 #endif 556 + #if (PCI11X1X_USED_TX_CHANNELS > PCI11X1X_MAX_TX_CHANNELS) 557 + #error Invalid PCI11X1X_USED_TX_CHANNELS 558 + #endif 597 559 598 560 /* PCI */ 599 561 /* SMSC acquired EFAR late 1990's, MCHP acquired SMSC 2012 */ 600 562 #define PCI_VENDOR_ID_SMSC PCI_VENDOR_ID_EFAR 601 563 #define PCI_DEVICE_ID_SMSC_LAN7430 (0x7430) 602 564 #define PCI_DEVICE_ID_SMSC_LAN7431 (0x7431) 565 + #define PCI_DEVICE_ID_SMSC_A011 (0xA011) 566 + #define PCI_DEVICE_ID_SMSC_A041 (0xA041) 603 567 604 568 #define PCI_CONFIG_LENGTH (0x1000) 605 569 ··· 653 607 }; 654 608 655 609 #define LAN743X_MAX_VECTOR_COUNT (8) 610 + #define PCI11X1X_MAX_VECTOR_COUNT (16) 656 611 657 612 struct lan743x_intr { 658 613 int flags; 659 614 660 615 unsigned int irq; 661 616 662 - struct lan743x_vector vector_list[LAN743X_MAX_VECTOR_COUNT]; 617 + struct lan743x_vector vector_list[PCI11X1X_MAX_VECTOR_COUNT]; 663 618 int number_of_vectors; 664 619 bool using_vectors; 665 620 ··· 768 721 u8 mac_address[ETH_ALEN]; 769 722 770 723 struct lan743x_phy phy; 771 - struct lan743x_tx tx[LAN743X_MAX_TX_CHANNELS]; 772 - struct lan743x_rx rx[LAN743X_MAX_RX_CHANNELS]; 724 + struct lan743x_tx tx[PCI11X1X_USED_TX_CHANNELS]; 725 + struct lan743x_rx rx[LAN743X_USED_RX_CHANNELS]; 726 + bool is_pci11x1x; 727 + bool is_sgmii_en; 728 + u8 max_tx_channels; 729 + u8 used_tx_channels; 730 + u8 max_vector_count; 773 731 774 732 #define LAN743X_ADAPTER_FLAG_OTP BIT(0) 775 733 u32 flags;
+4 -4
drivers/net/ethernet/microchip/lan743x_ptp.c
··· 1307 1307 1308 1308 switch (config.tx_type) { 1309 1309 case HWTSTAMP_TX_OFF: 1310 - for (index = 0; index < LAN743X_MAX_TX_CHANNELS; 1311 - index++) 1310 + for (index = 0; index < adapter->used_tx_channels; 1311 + index++) 1312 1312 lan743x_tx_set_timestamping_mode(&adapter->tx[index], 1313 1313 false, false); 1314 1314 lan743x_ptp_set_sync_ts_insert(adapter, false); 1315 1315 break; 1316 1316 case HWTSTAMP_TX_ON: 1317 - for (index = 0; index < LAN743X_MAX_TX_CHANNELS; 1317 + for (index = 0; index < adapter->used_tx_channels; 1318 1318 index++) 1319 1319 lan743x_tx_set_timestamping_mode(&adapter->tx[index], 1320 1320 true, false); 1321 1321 lan743x_ptp_set_sync_ts_insert(adapter, false); 1322 1322 break; 1323 1323 case HWTSTAMP_TX_ONESTEP_SYNC: 1324 - for (index = 0; index < LAN743X_MAX_TX_CHANNELS; 1324 + for (index = 0; index < adapter->used_tx_channels; 1325 1325 index++) 1326 1326 lan743x_tx_set_timestamping_mode(&adapter->tx[index], 1327 1327 true, true);