Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/nouveau/i2c: do parsing of i2c-related vbios info in nouveau_i2c.c

Not much point parsing the vbios data into a struct which is only used once
to parse the data into another struct, go directly from vbios to
nouveau_i2c_chan.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

+222 -278
+10 -156
drivers/gpu/drm/nouveau/nouveau_bios.c
··· 720 720 return dcb_entry; 721 721 } 722 722 723 - static int 724 - read_dcb_i2c_entry(struct drm_device *dev, int dcb_version, uint8_t *i2ctable, int index, struct dcb_i2c_entry *i2c) 725 - { 726 - uint8_t dcb_i2c_ver = dcb_version, headerlen = 0, entry_len = 4; 727 - int i2c_entries = DCB_MAX_NUM_I2C_ENTRIES; 728 - int recordoffset = 0, rdofs = 1, wrofs = 0; 729 - uint8_t port_type = 0; 730 - 731 - if (!i2ctable) 732 - return -EINVAL; 733 - 734 - if (dcb_version >= 0x30) { 735 - if (i2ctable[0] != dcb_version) /* necessary? */ 736 - NV_WARN(dev, 737 - "DCB I2C table version mismatch (%02X vs %02X)\n", 738 - i2ctable[0], dcb_version); 739 - dcb_i2c_ver = i2ctable[0]; 740 - headerlen = i2ctable[1]; 741 - if (i2ctable[2] <= DCB_MAX_NUM_I2C_ENTRIES) 742 - i2c_entries = i2ctable[2]; 743 - else 744 - NV_WARN(dev, 745 - "DCB I2C table has more entries than indexable " 746 - "(%d entries, max %d)\n", i2ctable[2], 747 - DCB_MAX_NUM_I2C_ENTRIES); 748 - entry_len = i2ctable[3]; 749 - /* [4] is i2c_default_indices, read in parse_dcb_table() */ 750 - } 751 - /* 752 - * It's your own fault if you call this function on a DCB 1.1 BIOS -- 753 - * the test below is for DCB 1.2 754 - */ 755 - if (dcb_version < 0x14) { 756 - recordoffset = 2; 757 - rdofs = 0; 758 - wrofs = 1; 759 - } 760 - 761 - if (index == 0xf) 762 - return 0; 763 - if (index >= i2c_entries) { 764 - NV_ERROR(dev, "DCB I2C index too big (%d >= %d)\n", 765 - index, i2ctable[2]); 766 - return -ENOENT; 767 - } 768 - if (i2ctable[headerlen + entry_len * index + 3] == 0xff) { 769 - NV_ERROR(dev, "DCB I2C entry invalid\n"); 770 - return -EINVAL; 771 - } 772 - 773 - if (dcb_i2c_ver >= 0x30) { 774 - port_type = i2ctable[headerlen + recordoffset + 3 + entry_len * index]; 775 - 776 - /* 777 - * Fixup for chips using same address offset for read and 778 - * write. 779 - */ 780 - if (port_type == 4) /* seen on C51 */ 781 - rdofs = wrofs = 1; 782 - if (port_type >= 5) /* G80+ */ 783 - rdofs = wrofs = 0; 784 - } 785 - 786 - if (dcb_i2c_ver >= 0x40) { 787 - if (port_type != 5 && port_type != 6) 788 - NV_WARN(dev, "DCB I2C table has port type %d\n", port_type); 789 - 790 - i2c->entry = ROM32(i2ctable[headerlen + recordoffset + entry_len * index]); 791 - } 792 - 793 - i2c->port_type = port_type; 794 - i2c->read = i2ctable[headerlen + recordoffset + rdofs + entry_len * index]; 795 - i2c->write = i2ctable[headerlen + recordoffset + wrofs + entry_len * index]; 796 - 797 - return 0; 798 - } 799 - 800 723 static struct nouveau_i2c_chan * 801 724 init_i2c_device_find(struct drm_device *dev, int i2c_index) 802 725 { 803 - struct drm_nouveau_private *dev_priv = dev->dev_private; 804 - struct dcb_table *dcb = &dev_priv->vbios.dcb; 805 - 806 726 if (i2c_index == 0xff) { 727 + struct drm_nouveau_private *dev_priv = dev->dev_private; 728 + struct dcb_table *dcb = &dev_priv->vbios.dcb; 807 729 /* note: dcb_entry_idx_from_crtchead needs pre-script set-up */ 808 - int idx = dcb_entry_idx_from_crtchead(dev), shift = 0; 809 - int default_indices = dcb->i2c_default_indices; 730 + int idx = dcb_entry_idx_from_crtchead(dev); 810 731 732 + i2c_index = NV_I2C_DEFAULT(0); 811 733 if (idx != 0x7f && dcb->entry[idx].i2c_upper_default) 812 - shift = 4; 813 - 814 - i2c_index = (default_indices >> shift) & 0xf; 734 + i2c_index = NV_I2C_DEFAULT(1); 815 735 } 816 - if (i2c_index == 0x80) /* g80+ */ 817 - i2c_index = dcb->i2c_default_indices & 0xf; 818 - else 819 - if (i2c_index == 0x81) 820 - i2c_index = (dcb->i2c_default_indices & 0xf0) >> 4; 821 - 822 - if (i2c_index >= DCB_MAX_NUM_I2C_ENTRIES) { 823 - NV_ERROR(dev, "invalid i2c_index 0x%x\n", i2c_index); 824 - return NULL; 825 - } 826 - 827 - /* Make sure i2c table entry has been parsed, it may not 828 - * have been if this is a bus not referenced by a DCB encoder 829 - */ 830 - read_dcb_i2c_entry(dev, dcb->version, dcb->i2c_table, 831 - i2c_index, &dcb->i2c[i2c_index]); 832 736 833 737 return nouveau_i2c_find(dev, i2c_index); 834 738 } ··· 5499 5595 uint16_t legacy_scripts_offset, legacy_i2c_offset; 5500 5596 5501 5597 /* load needed defaults in case we can't parse this info */ 5502 - bios->dcb.i2c[0].write = NV_CIO_CRE_DDC_WR__INDEX; 5503 - bios->dcb.i2c[0].read = NV_CIO_CRE_DDC_STATUS__INDEX; 5504 - bios->dcb.i2c[1].write = NV_CIO_CRE_DDC0_WR__INDEX; 5505 - bios->dcb.i2c[1].read = NV_CIO_CRE_DDC0_STATUS__INDEX; 5506 5598 bios->digital_min_front_porch = 0x4b; 5507 5599 bios->fmaxvco = 256000; 5508 5600 bios->fminvco = 128000; ··· 5606 5706 bios->legacy.i2c_indices.crt = bios->data[legacy_i2c_offset]; 5607 5707 bios->legacy.i2c_indices.tv = bios->data[legacy_i2c_offset + 1]; 5608 5708 bios->legacy.i2c_indices.panel = bios->data[legacy_i2c_offset + 2]; 5609 - if (bios->data[legacy_i2c_offset + 4]) 5610 - bios->dcb.i2c[0].write = bios->data[legacy_i2c_offset + 4]; 5611 - if (bios->data[legacy_i2c_offset + 5]) 5612 - bios->dcb.i2c[0].read = bios->data[legacy_i2c_offset + 5]; 5613 - if (bios->data[legacy_i2c_offset + 6]) 5614 - bios->dcb.i2c[1].write = bios->data[legacy_i2c_offset + 6]; 5615 - if (bios->data[legacy_i2c_offset + 7]) 5616 - bios->dcb.i2c[1].read = bios->data[legacy_i2c_offset + 7]; 5617 5709 5618 5710 if (bmplength > 74) { 5619 5711 bios->fmaxvco = ROM32(bmp[67]); ··· 6441 6549 ret = parse_dcb15_entry(dev, dcb, conn, conf, entry); 6442 6550 if (!ret) 6443 6551 return 1; /* stop parsing */ 6444 - 6445 - read_dcb_i2c_entry(dev, dcb->version, dcb->i2c_table, 6446 - entry->i2c_index, 6447 - &dcb->i2c[entry->i2c_index]); 6448 6552 } 6449 6553 6450 6554 return 0; ··· 6450 6562 parse_dcb_table(struct drm_device *dev, struct nvbios *bios) 6451 6563 { 6452 6564 struct dcb_table *dcb = &bios->dcb; 6453 - u16 i2ctabptr = 0x0000; 6454 6565 u8 *dcbt; 6455 6566 6456 6567 dcbt = dcb_table(dev); ··· 6467 6580 6468 6581 dcb->version = dcbt[0]; 6469 6582 if (dcb->version >= 0x30) { 6470 - i2ctabptr = ROM16(dcbt[4]); 6471 6583 dcb->gpio_table_ptr = ROM16(dcbt[10]); 6472 6584 dcb->connector_table_ptr = ROM16(dcbt[20]); 6473 - } else 6474 - if (dcb->version >= 0x15) { 6475 - i2ctabptr = ROM16(dcbt[2]); 6476 - } 6477 - 6478 - if (!i2ctabptr) 6479 - NV_WARN(dev, "No pointer to DCB I2C port table\n"); 6480 - else { 6481 - dcb->i2c_table = &bios->data[i2ctabptr]; 6482 - if (dcb->version >= 0x30) 6483 - dcb->i2c_default_indices = dcb->i2c_table[4]; 6484 - 6485 - /* 6486 - * Parse the "management" I2C bus, used for hardware 6487 - * monitoring and some external TMDS transmitters. 6488 - */ 6489 - if (dcb->version >= 0x22) { 6490 - int idx = (dcb->version >= 0x40 ? 6491 - dcb->i2c_default_indices & 0xf : 2); 6492 - 6493 - read_dcb_i2c_entry(dev, dcb->version, dcb->i2c_table, 6494 - idx, &dcb->i2c[idx]); 6495 - } 6496 6585 } 6497 6586 6498 6587 dcb_outp_foreach(dev, NULL, parse_dcb_entry); ··· 6756 6893 return ret; 6757 6894 } 6758 6895 6759 - static void 6760 - nouveau_bios_i2c_devices_takedown(struct drm_device *dev) 6761 - { 6762 - struct drm_nouveau_private *dev_priv = dev->dev_private; 6763 - struct nvbios *bios = &dev_priv->vbios; 6764 - struct dcb_i2c_entry *entry; 6765 - int i; 6766 - 6767 - entry = &bios->dcb.i2c[0]; 6768 - for (i = 0; i < DCB_MAX_NUM_I2C_ENTRIES; i++, entry++) 6769 - nouveau_i2c_fini(dev, entry); 6770 - } 6771 - 6772 6896 static bool 6773 6897 nouveau_bios_posted(struct drm_device *dev) 6774 6898 { ··· 6789 6939 return -ENODEV; 6790 6940 6791 6941 ret = nouveau_parse_vbios_struct(dev); 6942 + if (ret) 6943 + return ret; 6944 + 6945 + ret = nouveau_i2c_init(dev); 6792 6946 if (ret) 6793 6947 return ret; 6794 6948 ··· 6838 6984 void 6839 6985 nouveau_bios_takedown(struct drm_device *dev) 6840 6986 { 6841 - nouveau_bios_i2c_devices_takedown(dev); 6987 + nouveau_i2c_fini(dev); 6842 6988 }
-11
drivers/gpu/drm/nouveau/nouveau_bios.h
··· 53 53 54 54 int bit_table(struct drm_device *, u8 id, struct bit_entry *); 55 55 56 - struct dcb_i2c_entry { 57 - uint32_t entry; 58 - uint8_t port_type; 59 - uint8_t read, write; 60 - struct nouveau_i2c_chan *chan; 61 - }; 62 - 63 56 enum dcb_gpio_tag { 64 57 DCB_GPIO_TVDAC0 = 0xc, 65 58 DCB_GPIO_TVDAC1 = 0x2d, ··· 158 165 159 166 int entries; 160 167 struct dcb_entry entry[DCB_MAX_NUM_ENTRIES]; 161 - 162 - uint8_t *i2c_table; 163 - uint8_t i2c_default_indices; 164 - struct dcb_i2c_entry i2c[DCB_MAX_NUM_I2C_ENTRIES]; 165 168 166 169 uint16_t gpio_table_ptr; 167 170 struct dcb_gpio_table gpio;
+1
drivers/gpu/drm/nouveau/nouveau_drv.h
··· 793 793 struct nouveau_vm *chan_vm; 794 794 795 795 struct nvbios vbios; 796 + struct list_head i2c_ports; 796 797 797 798 struct nv04_mode_state mode_reg; 798 799 struct nv04_mode_state saved_reg;
+200 -102
drivers/gpu/drm/nouveau/nouveau_i2c.c
··· 109 109 return !!((nv_rd32(dev, i2c->rd) >> 16) & 8); 110 110 } 111 111 112 - static const uint32_t nv50_i2c_port[] = { 113 - 0x00e138, 0x00e150, 0x00e168, 0x00e180, 114 - 0x00e254, 0x00e274, 0x00e764, 0x00e780, 115 - 0x00e79c, 0x00e7b8 116 - }; 117 - #define NV50_I2C_PORTS ARRAY_SIZE(nv50_i2c_port) 118 - 119 112 static int 120 113 nv50_i2c_getscl(void *data) 121 114 { ··· 117 124 118 125 return !!(nv_rd32(dev, i2c->rd) & 1); 119 126 } 120 - 121 127 122 128 static int 123 129 nv50_i2c_getsda(void *data) ··· 158 166 return !!(nv_rd32(i2c->dev, i2c->rd) & 0x20); 159 167 } 160 168 169 + static const uint32_t nv50_i2c_port[] = { 170 + 0x00e138, 0x00e150, 0x00e168, 0x00e180, 171 + 0x00e254, 0x00e274, 0x00e764, 0x00e780, 172 + 0x00e79c, 0x00e7b8 173 + }; 174 + 175 + static u8 * 176 + i2c_table(struct drm_device *dev, u8 *version) 177 + { 178 + u8 *dcb = dcb_table(dev), *i2c = NULL; 179 + if (dcb) { 180 + if (dcb[0] >= 0x15) 181 + i2c = ROMPTR(dev, dcb[2]); 182 + if (dcb[0] >= 0x30) 183 + i2c = ROMPTR(dev, dcb[4]); 184 + } 185 + 186 + /* early revisions had no version number, use dcb version */ 187 + if (i2c) { 188 + *version = dcb[0]; 189 + if (*version >= 0x30) 190 + *version = i2c[0]; 191 + } 192 + 193 + return i2c; 194 + } 195 + 161 196 int 162 - nouveau_i2c_init(struct drm_device *dev, struct dcb_i2c_entry *entry, int index) 197 + nouveau_i2c_init(struct drm_device *dev) 163 198 { 164 199 struct drm_nouveau_private *dev_priv = dev->dev_private; 165 - struct nouveau_i2c_chan *i2c; 166 - int ret; 200 + struct nvbios *bios = &dev_priv->vbios; 201 + struct nouveau_i2c_chan *port; 202 + u8 *i2c, *entry, legacy[2][4] = {}; 203 + u8 version, entries, recordlen; 204 + int ret, i; 167 205 168 - if (entry->chan) 169 - return -EEXIST; 206 + INIT_LIST_HEAD(&dev_priv->i2c_ports); 170 207 171 - if (dev_priv->card_type >= NV_50 && 172 - dev_priv->card_type <= NV_C0 && entry->read >= NV50_I2C_PORTS) { 173 - NV_ERROR(dev, "unknown i2c port %d\n", entry->read); 174 - return -EINVAL; 208 + i2c = i2c_table(dev, &version); 209 + if (!i2c) { 210 + u8 *bmp = &bios->data[bios->offset]; 211 + if (bios->type != NVBIOS_BMP) 212 + return -ENODEV; 213 + 214 + legacy[0][0] = NV_CIO_CRE_DDC_WR__INDEX; 215 + legacy[0][1] = NV_CIO_CRE_DDC_STATUS__INDEX; 216 + legacy[1][0] = NV_CIO_CRE_DDC0_WR__INDEX; 217 + legacy[1][1] = NV_CIO_CRE_DDC0_STATUS__INDEX; 218 + 219 + /* BMP (from v4.0) has i2c info in the structure, it's in a 220 + * fixed location on earlier VBIOS 221 + */ 222 + if (bmp[5] < 4) 223 + i2c = &bios->data[0x48]; 224 + else 225 + i2c = &bmp[0x36]; 226 + 227 + if (i2c[4]) legacy[0][0] = i2c[4]; 228 + if (i2c[5]) legacy[0][1] = i2c[5]; 229 + if (i2c[6]) legacy[1][0] = i2c[6]; 230 + if (i2c[7]) legacy[1][1] = i2c[7]; 175 231 } 176 232 177 - i2c = kzalloc(sizeof(*i2c), GFP_KERNEL); 178 - if (i2c == NULL) 179 - return -ENOMEM; 180 - 181 - switch (entry->port_type) { 182 - case 0: 183 - i2c->bit.setsda = nv04_i2c_setsda; 184 - i2c->bit.setscl = nv04_i2c_setscl; 185 - i2c->bit.getsda = nv04_i2c_getsda; 186 - i2c->bit.getscl = nv04_i2c_getscl; 187 - i2c->rd = entry->read; 188 - i2c->wr = entry->write; 189 - break; 190 - case 4: 191 - i2c->bit.setsda = nv4e_i2c_setsda; 192 - i2c->bit.setscl = nv4e_i2c_setscl; 193 - i2c->bit.getsda = nv4e_i2c_getsda; 194 - i2c->bit.getscl = nv4e_i2c_getscl; 195 - i2c->rd = 0x600800 + entry->read; 196 - i2c->wr = 0x600800 + entry->write; 197 - break; 198 - case 5: 199 - i2c->bit.setsda = nv50_i2c_setsda; 200 - i2c->bit.setscl = nv50_i2c_setscl; 201 - if (dev_priv->card_type < NV_D0) { 202 - i2c->bit.getsda = nv50_i2c_getsda; 203 - i2c->bit.getscl = nv50_i2c_getscl; 204 - i2c->rd = nv50_i2c_port[entry->read]; 205 - i2c->wr = i2c->rd; 206 - } else { 207 - i2c->bit.getsda = nvd0_i2c_getsda; 208 - i2c->bit.getscl = nvd0_i2c_getscl; 209 - i2c->rd = 0x00d014 + (entry->read * 0x20); 210 - i2c->wr = i2c->rd; 211 - } 212 - break; 213 - case 6: 214 - i2c->rd = entry->read; 215 - i2c->wr = entry->write; 216 - break; 217 - default: 218 - NV_ERROR(dev, "DCB I2C port type %d unknown\n", 219 - entry->port_type); 220 - kfree(i2c); 221 - return -EINVAL; 222 - } 223 - 224 - snprintf(i2c->adapter.name, sizeof(i2c->adapter.name), 225 - "nouveau-%s-%d", pci_name(dev->pdev), index); 226 - i2c->adapter.owner = THIS_MODULE; 227 - i2c->adapter.dev.parent = &dev->pdev->dev; 228 - i2c->dev = dev; 229 - i2c_set_adapdata(&i2c->adapter, i2c); 230 - 231 - if (entry->port_type < 6) { 232 - i2c->adapter.algo_data = &i2c->bit; 233 - i2c->bit.udelay = 40; 234 - i2c->bit.timeout = usecs_to_jiffies(5000); 235 - i2c->bit.data = i2c; 236 - ret = i2c_bit_add_bus(&i2c->adapter); 233 + if (i2c && version >= 0x30) { 234 + entry = i2c[1] + i2c; 235 + entries = i2c[2]; 236 + recordlen = i2c[3]; 237 + } else 238 + if (i2c) { 239 + entry = i2c; 240 + entries = 16; 241 + recordlen = 4; 237 242 } else { 238 - i2c->adapter.algo = &nouveau_dp_i2c_algo; 239 - ret = i2c_add_adapter(&i2c->adapter); 243 + entry = legacy[0]; 244 + entries = 2; 245 + recordlen = 4; 240 246 } 241 247 242 - if (ret) { 243 - NV_ERROR(dev, "Failed to register i2c %d\n", index); 244 - kfree(i2c); 245 - return ret; 248 + for (i = 0; i < entries; i++, entry += recordlen) { 249 + port = kzalloc(sizeof(*port), GFP_KERNEL); 250 + if (port == NULL) { 251 + nouveau_i2c_fini(dev); 252 + return -ENOMEM; 253 + } 254 + 255 + port->type = entry[3]; 256 + if (version < 0x30) { 257 + port->type &= 0x07; 258 + if (port->type == 0x07) 259 + port->type = 0xff; 260 + } 261 + 262 + if (port->type == 0xff) { 263 + kfree(port); 264 + continue; 265 + } 266 + 267 + switch (port->type) { 268 + case 0: /* NV04:NV50 */ 269 + port->wr = entry[0]; 270 + port->rd = entry[1]; 271 + port->bit.setsda = nv04_i2c_setsda; 272 + port->bit.setscl = nv04_i2c_setscl; 273 + port->bit.getsda = nv04_i2c_getsda; 274 + port->bit.getscl = nv04_i2c_getscl; 275 + break; 276 + case 4: /* NV4E */ 277 + port->wr = 0x600800 + entry[1]; 278 + port->rd = port->wr; 279 + port->bit.setsda = nv4e_i2c_setsda; 280 + port->bit.setscl = nv4e_i2c_setscl; 281 + port->bit.getsda = nv4e_i2c_getsda; 282 + port->bit.getscl = nv4e_i2c_getscl; 283 + break; 284 + case 5: /* NV50- */ 285 + port->wr = entry[0] & 0x0f; 286 + if (dev_priv->card_type < NV_D0) { 287 + if (port->wr >= ARRAY_SIZE(nv50_i2c_port)) 288 + break; 289 + port->wr = nv50_i2c_port[port->wr]; 290 + port->rd = port->wr; 291 + port->bit.getsda = nv50_i2c_getsda; 292 + port->bit.getscl = nv50_i2c_getscl; 293 + } else { 294 + port->wr = 0x00d014 + (port->wr * 0x20); 295 + port->rd = port->wr; 296 + port->bit.getsda = nvd0_i2c_getsda; 297 + port->bit.getscl = nvd0_i2c_getscl; 298 + } 299 + port->bit.setsda = nv50_i2c_setsda; 300 + port->bit.setscl = nv50_i2c_setscl; 301 + break; 302 + case 6: /* NV50- DP AUX */ 303 + port->wr = entry[0]; 304 + port->rd = port->wr; 305 + port->adapter.algo = &nouveau_dp_i2c_algo; 306 + break; 307 + default: 308 + break; 309 + } 310 + 311 + if (!port->adapter.algo && !port->wr) { 312 + NV_ERROR(dev, "I2C%d: type %d index %x/%x unknown\n", 313 + i, port->type, port->wr, port->rd); 314 + kfree(port); 315 + continue; 316 + } 317 + 318 + snprintf(port->adapter.name, sizeof(port->adapter.name), 319 + "nouveau-%s-%d", pci_name(dev->pdev), i); 320 + port->adapter.owner = THIS_MODULE; 321 + port->adapter.dev.parent = &dev->pdev->dev; 322 + port->dev = dev; 323 + port->index = i; 324 + port->dcb = ROM32(entry[0]); 325 + i2c_set_adapdata(&port->adapter, i2c); 326 + 327 + if (port->adapter.algo != &nouveau_dp_i2c_algo) { 328 + port->adapter.algo_data = &port->bit; 329 + port->bit.udelay = 40; 330 + port->bit.timeout = usecs_to_jiffies(5000); 331 + port->bit.data = port; 332 + ret = i2c_bit_add_bus(&port->adapter); 333 + } else { 334 + port->adapter.algo = &nouveau_dp_i2c_algo; 335 + ret = i2c_add_adapter(&port->adapter); 336 + } 337 + 338 + if (ret) { 339 + NV_ERROR(dev, "I2C%d: failed register: %d\n", i, ret); 340 + kfree(port); 341 + continue; 342 + } 343 + 344 + list_add_tail(&port->head, &dev_priv->i2c_ports); 246 345 } 247 346 248 - entry->chan = i2c; 249 347 return 0; 250 348 } 251 349 252 350 void 253 - nouveau_i2c_fini(struct drm_device *dev, struct dcb_i2c_entry *entry) 351 + nouveau_i2c_fini(struct drm_device *dev) 254 352 { 255 - if (!entry->chan) 256 - return; 353 + struct drm_nouveau_private *dev_priv = dev->dev_private; 354 + struct nouveau_i2c_chan *port, *tmp; 257 355 258 - i2c_del_adapter(&entry->chan->adapter); 259 - kfree(entry->chan); 260 - entry->chan = NULL; 356 + list_for_each_entry_safe(port, tmp, &dev_priv->i2c_ports, head) { 357 + i2c_del_adapter(&port->adapter); 358 + kfree(port); 359 + } 261 360 } 262 361 263 362 struct nouveau_i2c_chan * 264 - nouveau_i2c_find(struct drm_device *dev, int index) 363 + nouveau_i2c_find(struct drm_device *dev, u8 index) 265 364 { 266 365 struct drm_nouveau_private *dev_priv = dev->dev_private; 267 - struct dcb_i2c_entry *i2c = &dev_priv->vbios.dcb.i2c[index]; 366 + struct nouveau_i2c_chan *port; 268 367 269 - if (index >= DCB_MAX_NUM_I2C_ENTRIES) 368 + if (index == NV_I2C_DEFAULT(0) || 369 + index == NV_I2C_DEFAULT(1)) { 370 + u8 version, *i2c = i2c_table(dev, &version); 371 + if (i2c && version >= 0x30) { 372 + if (index == NV_I2C_DEFAULT(0)) 373 + index = (i2c[4] & 0x0f); 374 + else 375 + index = (i2c[4] & 0xf0) >> 4; 376 + } else { 377 + index = 2; 378 + } 379 + } 380 + 381 + list_for_each_entry(port, &dev_priv->i2c_ports, head) { 382 + if (port->index == index) 383 + break; 384 + } 385 + 386 + if (&port->head == &dev_priv->i2c_ports) 270 387 return NULL; 271 388 272 - if (dev_priv->card_type >= NV_50 && (i2c->entry & 0x00000100)) { 273 - uint32_t reg = 0xe500, val; 274 - 275 - if (i2c->port_type == 6) { 276 - reg += i2c->read * 0x50; 389 + if (dev_priv->card_type >= NV_50 && (port->dcb & 0x00000100)) { 390 + u32 reg = 0x00e500, val; 391 + if (port->type == 6) { 392 + reg += port->rd * 0x50; 277 393 val = 0x2002; 278 394 } else { 279 - reg += ((i2c->entry & 0x1e00) >> 9) * 0x50; 395 + reg += ((port->dcb & 0x1e00) >> 9) * 0x50; 280 396 val = 0xe001; 281 397 } 282 398 ··· 394 294 nv_mask(dev, reg + 0x00, 0x0000f003, val); 395 295 } 396 296 397 - if (!i2c->chan && nouveau_i2c_init(dev, i2c, index)) 398 - return NULL; 399 - return i2c->chan; 297 + return port; 400 298 } 401 299 402 300 bool
+10 -4
drivers/gpu/drm/nouveau/nouveau_i2c.h
··· 27 27 #include <linux/i2c-algo-bit.h> 28 28 #include "drm_dp_helper.h" 29 29 30 - struct dcb_i2c_entry; 30 + #define NV_I2C_PORT(n) (0x00 + (n)) 31 + #define NV_I2C_PORT_NUM 0x10 32 + #define NV_I2C_DEFAULT(n) (0x80 + (n)) 31 33 32 34 struct nouveau_i2c_chan { 33 35 struct i2c_adapter adapter; 34 36 struct drm_device *dev; 35 37 struct i2c_algo_bit_data bit; 38 + struct list_head head; 39 + u8 index; 40 + u8 type; 41 + u32 dcb; 36 42 unsigned rd; 37 43 unsigned wr; 38 44 unsigned data; 39 45 }; 40 46 41 - int nouveau_i2c_init(struct drm_device *, struct dcb_i2c_entry *, int index); 42 - void nouveau_i2c_fini(struct drm_device *, struct dcb_i2c_entry *); 43 - struct nouveau_i2c_chan *nouveau_i2c_find(struct drm_device *, int index); 47 + int nouveau_i2c_init(struct drm_device *); 48 + void nouveau_i2c_fini(struct drm_device *); 49 + struct nouveau_i2c_chan *nouveau_i2c_find(struct drm_device *, u8 index); 44 50 bool nouveau_probe_i2c_addr(struct nouveau_i2c_chan *i2c, int addr); 45 51 int nouveau_i2c_identify(struct drm_device *dev, const char *what, 46 52 struct i2c_board_info *info,
+1 -5
drivers/gpu/drm/nouveau/nouveau_temp.c
··· 286 286 static void 287 287 nouveau_temp_probe_i2c(struct drm_device *dev) 288 288 { 289 - struct drm_nouveau_private *dev_priv = dev->dev_private; 290 - struct dcb_table *dcb = &dev_priv->vbios.dcb; 291 289 struct i2c_board_info info[] = { 292 290 { I2C_BOARD_INFO("w83l785ts", 0x2d) }, 293 291 { I2C_BOARD_INFO("w83781d", 0x2d) }, ··· 294 296 { I2C_BOARD_INFO("lm99", 0x4c) }, 295 297 { } 296 298 }; 297 - int idx = (dcb->version >= 0x40 ? 298 - dcb->i2c_default_indices & 0xf : 2); 299 299 300 300 nouveau_i2c_identify(dev, "monitoring device", info, 301 - probe_monitoring_device, idx); 301 + probe_monitoring_device, NV_I2C_DEFAULT(0)); 302 302 } 303 303 304 304 void