mfd: Align ab8500 with the abx500 interface

+2 -2

drivers/mfd/Kconfig

··· 434 434 435 435 config ABX500_CORE 436 436 bool "ST-Ericsson ABX500 Mixed Signal Circuit register functions" 437 - default y if ARCH_U300 437 + default y if ARCH_U300 || ARCH_U8500 438 438 help 439 439 Say yes here if you have the ABX500 Mixed Signal IC family 440 440 chips. This core driver expose register access functions. ··· 475 475 476 476 config AB8500_CORE 477 477 bool "ST-Ericsson AB8500 Mixed Signal Power Management chip" 478 - depends on SPI=y && GENERIC_HARDIRQS 478 + depends on SPI=y && GENERIC_HARDIRQS && ABX500_CORE 479 479 select MFD_CORE 480 480 help 481 481 Select this option to enable access to AB8500 power management

+196 -145

drivers/mfd/ab8500-core.c

··· 4 4 * License Terms: GNU General Public License v2 5 5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> 6 6 * Author: Rabin Vincent <rabin.vincent@stericsson.com> 7 + * Changes: Mattias Wallin <mattias.wallin@stericsson.com> 7 8 */ 8 9 9 10 #include <linux/kernel.h> ··· 16 15 #include <linux/module.h> 17 16 #include <linux/platform_device.h> 18 17 #include <linux/mfd/core.h> 18 + #include <linux/mfd/abx500.h> 19 19 #include <linux/mfd/ab8500.h> 20 20 #include <linux/regulator/ab8500.h> 21 21 ··· 24 22 * Interrupt register offsets 25 23 * Bank : 0x0E 26 24 */ 27 - #define AB8500_IT_SOURCE1_REG 0x0E00 28 - #define AB8500_IT_SOURCE2_REG 0x0E01 29 - #define AB8500_IT_SOURCE3_REG 0x0E02 30 - #define AB8500_IT_SOURCE4_REG 0x0E03 31 - #define AB8500_IT_SOURCE5_REG 0x0E04 32 - #define AB8500_IT_SOURCE6_REG 0x0E05 33 - #define AB8500_IT_SOURCE7_REG 0x0E06 34 - #define AB8500_IT_SOURCE8_REG 0x0E07 35 - #define AB8500_IT_SOURCE19_REG 0x0E12 36 - #define AB8500_IT_SOURCE20_REG 0x0E13 37 - #define AB8500_IT_SOURCE21_REG 0x0E14 38 - #define AB8500_IT_SOURCE22_REG 0x0E15 39 - #define AB8500_IT_SOURCE23_REG 0x0E16 40 - #define AB8500_IT_SOURCE24_REG 0x0E17 25 + #define AB8500_IT_SOURCE1_REG 0x00 26 + #define AB8500_IT_SOURCE2_REG 0x01 27 + #define AB8500_IT_SOURCE3_REG 0x02 28 + #define AB8500_IT_SOURCE4_REG 0x03 29 + #define AB8500_IT_SOURCE5_REG 0x04 30 + #define AB8500_IT_SOURCE6_REG 0x05 31 + #define AB8500_IT_SOURCE7_REG 0x06 32 + #define AB8500_IT_SOURCE8_REG 0x07 33 + #define AB8500_IT_SOURCE19_REG 0x12 34 + #define AB8500_IT_SOURCE20_REG 0x13 35 + #define AB8500_IT_SOURCE21_REG 0x14 36 + #define AB8500_IT_SOURCE22_REG 0x15 37 + #define AB8500_IT_SOURCE23_REG 0x16 38 + #define AB8500_IT_SOURCE24_REG 0x17 41 39 42 40 /* 43 41 * latch registers 44 42 */ 45 - #define AB8500_IT_LATCH1_REG 0x0E20 46 - #define AB8500_IT_LATCH2_REG 0x0E21 47 - #define AB8500_IT_LATCH3_REG 0x0E22 48 - #define AB8500_IT_LATCH4_REG 0x0E23 49 - #define AB8500_IT_LATCH5_REG 0x0E24 50 - #define AB8500_IT_LATCH6_REG 0x0E25 51 - #define AB8500_IT_LATCH7_REG 0x0E26 52 - #define AB8500_IT_LATCH8_REG 0x0E27 53 - #define AB8500_IT_LATCH9_REG 0x0E28 54 - #define AB8500_IT_LATCH10_REG 0x0E29 55 - #define AB8500_IT_LATCH19_REG 0x0E32 56 - #define AB8500_IT_LATCH20_REG 0x0E33 57 - #define AB8500_IT_LATCH21_REG 0x0E34 58 - #define AB8500_IT_LATCH22_REG 0x0E35 59 - #define AB8500_IT_LATCH23_REG 0x0E36 60 - #define AB8500_IT_LATCH24_REG 0x0E37 43 + #define AB8500_IT_LATCH1_REG 0x20 44 + #define AB8500_IT_LATCH2_REG 0x21 45 + #define AB8500_IT_LATCH3_REG 0x22 46 + #define AB8500_IT_LATCH4_REG 0x23 47 + #define AB8500_IT_LATCH5_REG 0x24 48 + #define AB8500_IT_LATCH6_REG 0x25 49 + #define AB8500_IT_LATCH7_REG 0x26 50 + #define AB8500_IT_LATCH8_REG 0x27 51 + #define AB8500_IT_LATCH9_REG 0x28 52 + #define AB8500_IT_LATCH10_REG 0x29 53 + #define AB8500_IT_LATCH19_REG 0x32 54 + #define AB8500_IT_LATCH20_REG 0x33 55 + #define AB8500_IT_LATCH21_REG 0x34 56 + #define AB8500_IT_LATCH22_REG 0x35 57 + #define AB8500_IT_LATCH23_REG 0x36 58 + #define AB8500_IT_LATCH24_REG 0x37 61 59 62 60 /* 63 61 * mask registers 64 62 */ 65 63 66 - #define AB8500_IT_MASK1_REG 0x0E40 67 - #define AB8500_IT_MASK2_REG 0x0E41 68 - #define AB8500_IT_MASK3_REG 0x0E42 69 - #define AB8500_IT_MASK4_REG 0x0E43 70 - #define AB8500_IT_MASK5_REG 0x0E44 71 - #define AB8500_IT_MASK6_REG 0x0E45 72 - #define AB8500_IT_MASK7_REG 0x0E46 73 - #define AB8500_IT_MASK8_REG 0x0E47 74 - #define AB8500_IT_MASK9_REG 0x0E48 75 - #define AB8500_IT_MASK10_REG 0x0E49 76 - #define AB8500_IT_MASK11_REG 0x0E4A 77 - #define AB8500_IT_MASK12_REG 0x0E4B 78 - #define AB8500_IT_MASK13_REG 0x0E4C 79 - #define AB8500_IT_MASK14_REG 0x0E4D 80 - #define AB8500_IT_MASK15_REG 0x0E4E 81 - #define AB8500_IT_MASK16_REG 0x0E4F 82 - #define AB8500_IT_MASK17_REG 0x0E50 83 - #define AB8500_IT_MASK18_REG 0x0E51 84 - #define AB8500_IT_MASK19_REG 0x0E52 85 - #define AB8500_IT_MASK20_REG 0x0E53 86 - #define AB8500_IT_MASK21_REG 0x0E54 87 - #define AB8500_IT_MASK22_REG 0x0E55 88 - #define AB8500_IT_MASK23_REG 0x0E56 89 - #define AB8500_IT_MASK24_REG 0x0E57 64 + #define AB8500_IT_MASK1_REG 0x40 65 + #define AB8500_IT_MASK2_REG 0x41 66 + #define AB8500_IT_MASK3_REG 0x42 67 + #define AB8500_IT_MASK4_REG 0x43 68 + #define AB8500_IT_MASK5_REG 0x44 69 + #define AB8500_IT_MASK6_REG 0x45 70 + #define AB8500_IT_MASK7_REG 0x46 71 + #define AB8500_IT_MASK8_REG 0x47 72 + #define AB8500_IT_MASK9_REG 0x48 73 + #define AB8500_IT_MASK10_REG 0x49 74 + #define AB8500_IT_MASK11_REG 0x4A 75 + #define AB8500_IT_MASK12_REG 0x4B 76 + #define AB8500_IT_MASK13_REG 0x4C 77 + #define AB8500_IT_MASK14_REG 0x4D 78 + #define AB8500_IT_MASK15_REG 0x4E 79 + #define AB8500_IT_MASK16_REG 0x4F 80 + #define AB8500_IT_MASK17_REG 0x50 81 + #define AB8500_IT_MASK18_REG 0x51 82 + #define AB8500_IT_MASK19_REG 0x52 83 + #define AB8500_IT_MASK20_REG 0x53 84 + #define AB8500_IT_MASK21_REG 0x54 85 + #define AB8500_IT_MASK22_REG 0x55 86 + #define AB8500_IT_MASK23_REG 0x56 87 + #define AB8500_IT_MASK24_REG 0x57 90 88 91 - #define AB8500_REV_REG 0x1080 89 + #define AB8500_REV_REG 0x80 92 90 93 91 /* 94 92 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt ··· 101 99 0, 1, 2, 3, 4, 6, 7, 8, 9, 18, 19, 20, 21, 102 100 }; 103 101 104 - static int __ab8500_write(struct ab8500 *ab8500, u16 addr, u8 data) 102 + static int ab8500_get_chip_id(struct device *dev) 103 + { 104 + struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 105 + return (int)ab8500->chip_id; 106 + } 107 + 108 + static int set_register_interruptible(struct ab8500 *ab8500, u8 bank, 109 + u8 reg, u8 data) 105 110 { 106 111 int ret; 112 + /* 113 + * Put the u8 bank and u8 register together into a an u16. 114 + * The bank on higher 8 bits and register in lower 8 bits. 115 + * */ 116 + u16 addr = ((u16)bank) << 8 | reg; 107 117 108 118 dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data); 119 + 120 + ret = mutex_lock_interruptible(&ab8500->lock); 121 + if (ret) 122 + return ret; 123 + 124 + ret = ab8500->write(ab8500, addr, data); 125 + if (ret < 0) 126 + dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 127 + addr, ret); 128 + mutex_unlock(&ab8500->lock); 129 + 130 + return ret; 131 + } 132 + 133 + static int ab8500_set_register(struct device *dev, u8 bank, 134 + u8 reg, u8 value) 135 + { 136 + struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 137 + 138 + return set_register_interruptible(ab8500, bank, reg, value); 139 + } 140 + 141 + static int get_register_interruptible(struct ab8500 *ab8500, u8 bank, 142 + u8 reg, u8 *value) 143 + { 144 + int ret; 145 + /* put the u8 bank and u8 reg together into a an u16. 146 + * bank on higher 8 bits and reg in lower */ 147 + u16 addr = ((u16)bank) << 8 | reg; 148 + 149 + ret = mutex_lock_interruptible(&ab8500->lock); 150 + if (ret) 151 + return ret; 152 + 153 + ret = ab8500->read(ab8500, addr); 154 + if (ret < 0) 155 + dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 156 + addr, ret); 157 + else 158 + *value = ret; 159 + 160 + mutex_unlock(&ab8500->lock); 161 + dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret); 162 + 163 + return ret; 164 + } 165 + 166 + static int ab8500_get_register(struct device *dev, u8 bank, 167 + u8 reg, u8 *value) 168 + { 169 + struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 170 + 171 + return get_register_interruptible(ab8500, bank, reg, value); 172 + } 173 + 174 + static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank, 175 + u8 reg, u8 bitmask, u8 bitvalues) 176 + { 177 + int ret; 178 + u8 data; 179 + /* put the u8 bank and u8 reg together into a an u16. 180 + * bank on higher 8 bits and reg in lower */ 181 + u16 addr = ((u16)bank) << 8 | reg; 182 + 183 + ret = mutex_lock_interruptible(&ab8500->lock); 184 + if (ret) 185 + return ret; 186 + 187 + ret = ab8500->read(ab8500, addr); 188 + if (ret < 0) { 189 + dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 190 + addr, ret); 191 + goto out; 192 + } 193 + 194 + data = (u8)ret; 195 + data = (~bitmask & data) | (bitmask & bitvalues); 109 196 110 197 ret = ab8500->write(ab8500, addr, data); 111 198 if (ret < 0) 112 199 dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 113 200 addr, ret); 114 201 115 - return ret; 116 - } 117 - 118 - /** 119 - * ab8500_write() - write an AB8500 register 120 - * @ab8500: device to write to 121 - * @addr: address of the register 122 - * @data: value to write 123 - */ 124 - int ab8500_write(struct ab8500 *ab8500, u16 addr, u8 data) 125 - { 126 - int ret; 127 - 128 - mutex_lock(&ab8500->lock); 129 - ret = __ab8500_write(ab8500, addr, data); 130 - mutex_unlock(&ab8500->lock); 131 - 132 - return ret; 133 - } 134 - EXPORT_SYMBOL_GPL(ab8500_write); 135 - 136 - static int __ab8500_read(struct ab8500 *ab8500, u16 addr) 137 - { 138 - int ret; 139 - 140 - ret = ab8500->read(ab8500, addr); 141 - if (ret < 0) 142 - dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 143 - addr, ret); 144 - 145 - dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret); 146 - 147 - return ret; 148 - } 149 - 150 - /** 151 - * ab8500_read() - read an AB8500 register 152 - * @ab8500: device to read from 153 - * @addr: address of the register 154 - */ 155 - int ab8500_read(struct ab8500 *ab8500, u16 addr) 156 - { 157 - int ret; 158 - 159 - mutex_lock(&ab8500->lock); 160 - ret = __ab8500_read(ab8500, addr); 161 - mutex_unlock(&ab8500->lock); 162 - 163 - return ret; 164 - } 165 - EXPORT_SYMBOL_GPL(ab8500_read); 166 - 167 - /** 168 - * ab8500_set_bits() - set a bitfield in an AB8500 register 169 - * @ab8500: device to read from 170 - * @addr: address of the register 171 - * @mask: mask of the bitfield to modify 172 - * @data: value to set to the bitfield 173 - */ 174 - int ab8500_set_bits(struct ab8500 *ab8500, u16 addr, u8 mask, u8 data) 175 - { 176 - int ret; 177 - 178 - mutex_lock(&ab8500->lock); 179 - 180 - ret = __ab8500_read(ab8500, addr); 181 - if (ret < 0) 182 - goto out; 183 - 184 - ret &= ~mask; 185 - ret |= data; 186 - 187 - ret = __ab8500_write(ab8500, addr, ret); 188 - 202 + dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, data); 189 203 out: 190 204 mutex_unlock(&ab8500->lock); 191 205 return ret; 192 206 } 193 - EXPORT_SYMBOL_GPL(ab8500_set_bits); 207 + 208 + static int ab8500_mask_and_set_register(struct device *dev, 209 + u8 bank, u8 reg, u8 bitmask, u8 bitvalues) 210 + { 211 + struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 212 + 213 + return mask_and_set_register_interruptible(ab8500, bank, reg, 214 + bitmask, bitvalues); 215 + 216 + } 217 + 218 + static struct abx500_ops ab8500_ops = { 219 + .get_chip_id = ab8500_get_chip_id, 220 + .get_register = ab8500_get_register, 221 + .set_register = ab8500_set_register, 222 + .get_register_page = NULL, 223 + .set_register_page = NULL, 224 + .mask_and_set_register = ab8500_mask_and_set_register, 225 + .event_registers_startup_state_get = NULL, 226 + .startup_irq_enabled = NULL, 227 + }; 194 228 195 229 static void ab8500_irq_lock(unsigned int irq) 196 230 { ··· 251 213 ab8500->oldmask[i] = new; 252 214 253 215 reg = AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i]; 254 - ab8500_write(ab8500, reg, new); 216 + set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new); 255 217 } 256 218 257 219 mutex_unlock(&ab8500->irq_lock); ··· 295 257 for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) { 296 258 int regoffset = ab8500_irq_regoffset[i]; 297 259 int status; 260 + u8 value; 298 261 299 - status = ab8500_read(ab8500, AB8500_IT_LATCH1_REG + regoffset); 300 - if (status <= 0) 262 + status = get_register_interruptible(ab8500, AB8500_INTERRUPT, 263 + AB8500_IT_LATCH1_REG + regoffset, &value); 264 + if (status < 0 || value == 0) 301 265 continue; 302 266 303 267 do { ··· 307 267 int line = i * 8 + bit; 308 268 309 269 handle_nested_irq(ab8500->irq_base + line); 310 - status &= ~(1 << bit); 311 - } while (status); 270 + value &= ~(1 << bit); 271 + } while (value); 312 272 } 313 273 314 274 return IRQ_HANDLED; ··· 421 381 struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev); 422 382 int ret; 423 383 int i; 384 + u8 value; 424 385 425 386 if (plat) 426 387 ab8500->irq_base = plat->irq_base; ··· 429 388 mutex_init(&ab8500->lock); 430 389 mutex_init(&ab8500->irq_lock); 431 390 432 - ret = ab8500_read(ab8500, AB8500_REV_REG); 391 + ret = get_register_interruptible(ab8500, AB8500_MISC, 392 + AB8500_REV_REG, &value); 433 393 if (ret < 0) 434 394 return ret; 435 395 ··· 439 397 * 0x10 - Cut 1.0 440 398 * 0x11 - Cut 1.1 441 399 */ 442 - if (ret == 0x0 || ret == 0x10 || ret == 0x11) { 443 - ab8500->revision = ret; 444 - dev_info(ab8500->dev, "detected chip, revision: %#x\n", ret); 400 + if (value == 0x0 || value == 0x10 || value == 0x11) { 401 + ab8500->revision = value; 402 + dev_info(ab8500->dev, "detected chip, revision: %#x\n", value); 445 403 } else { 446 - dev_err(ab8500->dev, "unknown chip, revision: %#x\n", ret); 404 + dev_err(ab8500->dev, "unknown chip, revision: %#x\n", value); 447 405 return -EINVAL; 448 406 } 407 + ab8500->chip_id = value; 449 408 450 409 if (plat && plat->init) 451 410 plat->init(ab8500); 452 411 453 412 /* Clear and mask all interrupts */ 454 413 for (i = 0; i < 10; i++) { 455 - ab8500_read(ab8500, AB8500_IT_LATCH1_REG + i); 456 - ab8500_write(ab8500, AB8500_IT_MASK1_REG + i, 0xff); 414 + get_register_interruptible(ab8500, AB8500_INTERRUPT, 415 + AB8500_IT_LATCH1_REG + i, &value); 416 + set_register_interruptible(ab8500, AB8500_INTERRUPT, 417 + AB8500_IT_MASK1_REG + i, 0xff); 457 418 } 458 419 459 420 for (i = 18; i < 24; i++) { 460 - ab8500_read(ab8500, AB8500_IT_LATCH1_REG + i); 461 - ab8500_write(ab8500, AB8500_IT_MASK1_REG + i, 0xff); 421 + get_register_interruptible(ab8500, AB8500_INTERRUPT, 422 + AB8500_IT_LATCH1_REG + i, &value); 423 + set_register_interruptible(ab8500, AB8500_INTERRUPT, 424 + AB8500_IT_MASK1_REG + i, 0xff); 462 425 } 426 + 427 + ret = abx500_register_ops(ab8500->dev, &ab8500_ops); 428 + if (ret) 429 + return ret; 463 430 464 431 for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) 465 432 ab8500->mask[i] = ab8500->oldmask[i] = 0xff;

+50 -36

drivers/regulator/ab8500.c

··· 21 21 #include <linux/err.h> 22 22 #include <linux/platform_device.h> 23 23 #include <linux/mfd/ab8500.h> 24 + #include <linux/mfd/abx500.h> 24 25 #include <linux/regulator/driver.h> 25 26 #include <linux/regulator/machine.h> 26 27 #include <linux/regulator/ab8500.h> ··· 34 33 * @max_uV: maximum voltage (for variable voltage supplies) 35 34 * @min_uV: minimum voltage (for variable voltage supplies) 36 35 * @fixed_uV: typical voltage (for fixed voltage supplies) 36 + * @update_bank: bank to control on/off 37 37 * @update_reg: register to control on/off 38 38 * @mask: mask to enable/disable regulator 39 39 * @enable: bits to enable the regulator in normal(high power) mode 40 + * @voltage_bank: bank to control regulator voltage 40 41 * @voltage_reg: register to control regulator voltage 41 42 * @voltage_mask: mask to control regulator voltage 42 43 * @supported_voltages: supported voltage table ··· 52 49 int max_uV; 53 50 int min_uV; 54 51 int fixed_uV; 55 - int update_reg; 56 - int mask; 57 - int enable; 58 - int voltage_reg; 59 - int voltage_mask; 52 + u8 update_bank; 53 + u8 update_reg; 54 + u8 mask; 55 + u8 enable; 56 + u8 voltage_bank; 57 + u8 voltage_reg; 58 + u8 voltage_mask; 60 59 int const *supported_voltages; 61 60 int voltages_len; 62 61 }; ··· 102 97 if (regulator_id >= AB8500_NUM_REGULATORS) 103 98 return -EINVAL; 104 99 105 - ret = ab8500_set_bits(info->ab8500, info->update_reg, 106 - info->mask, info->enable); 100 + ret = abx500_mask_and_set_register_interruptible(info->dev, 101 + info->update_bank, info->update_reg, info->mask, info->enable); 107 102 if (ret < 0) 108 103 dev_err(rdev_get_dev(rdev), 109 104 "couldn't set enable bits for regulator\n"); ··· 119 114 if (regulator_id >= AB8500_NUM_REGULATORS) 120 115 return -EINVAL; 121 116 122 - ret = ab8500_set_bits(info->ab8500, info->update_reg, 123 - info->mask, 0x0); 117 + ret = abx500_mask_and_set_register_interruptible(info->dev, 118 + info->update_bank, info->update_reg, info->mask, 0x0); 124 119 if (ret < 0) 125 120 dev_err(rdev_get_dev(rdev), 126 121 "couldn't set disable bits for regulator\n"); ··· 131 126 { 132 127 int regulator_id, ret; 133 128 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); 129 + u8 value; 134 130 135 131 regulator_id = rdev_get_id(rdev); 136 132 if (regulator_id >= AB8500_NUM_REGULATORS) 137 133 return -EINVAL; 138 134 139 - ret = ab8500_read(info->ab8500, info->update_reg); 135 + ret = abx500_get_register_interruptible(info->dev, 136 + info->update_bank, info->update_reg, &value); 140 137 if (ret < 0) { 141 138 dev_err(rdev_get_dev(rdev), 142 139 "couldn't read 0x%x register\n", info->update_reg); 143 140 return ret; 144 141 } 145 142 146 - if (ret & info->mask) 143 + if (value & info->mask) 147 144 return true; 148 145 else 149 146 return false; ··· 172 165 173 166 static int ab8500_regulator_get_voltage(struct regulator_dev *rdev) 174 167 { 175 - int regulator_id, ret, val; 168 + int regulator_id, ret; 176 169 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); 170 + u8 value; 177 171 178 172 regulator_id = rdev_get_id(rdev); 179 173 if (regulator_id >= AB8500_NUM_REGULATORS) 180 174 return -EINVAL; 181 175 182 - ret = ab8500_read(info->ab8500, info->voltage_reg); 176 + ret = abx500_get_register_interruptible(info->dev, info->voltage_bank, 177 + info->voltage_reg, &value); 183 178 if (ret < 0) { 184 179 dev_err(rdev_get_dev(rdev), 185 180 "couldn't read voltage reg for regulator\n"); ··· 189 180 } 190 181 191 182 /* vintcore has a different layout */ 192 - val = ret & info->voltage_mask; 183 + value &= info->voltage_mask; 193 184 if (regulator_id == AB8500_LDO_INTCORE) 194 - ret = info->supported_voltages[val >> 0x3]; 185 + ret = info->supported_voltages[value >> 0x3]; 195 186 else 196 - ret = info->supported_voltages[val]; 187 + ret = info->supported_voltages[value]; 197 188 198 189 return ret; 199 190 } ··· 233 224 } 234 225 235 226 /* set the registers for the request */ 236 - ret = ab8500_set_bits(info->ab8500, info->voltage_reg, 237 - info->voltage_mask, ret); 227 + ret = abx500_mask_and_set_register_interruptible(info->dev, 228 + info->voltage_bank, info->voltage_reg, 229 + info->voltage_mask, (u8)ret); 238 230 if (ret < 0) 239 231 dev_err(rdev_get_dev(rdev), 240 232 "couldn't set voltage reg for regulator\n"); ··· 272 262 .list_voltage = ab8500_list_voltage, 273 263 }; 274 264 275 - #define AB8500_LDO(_id, min, max, reg, reg_mask, reg_enable, \ 276 - volt_reg, volt_mask, voltages, \ 277 - len_volts) \ 265 + #define AB8500_LDO(_id, min, max, bank, reg, reg_mask, \ 266 + reg_enable, volt_bank, volt_reg, volt_mask, \ 267 + voltages, len_volts) \ 278 268 { \ 279 269 .desc = { \ 280 270 .name = "LDO-" #_id, \ ··· 285 275 }, \ 286 276 .min_uV = (min) * 1000, \ 287 277 .max_uV = (max) * 1000, \ 278 + .update_bank = bank, \ 288 279 .update_reg = reg, \ 289 280 .mask = reg_mask, \ 290 281 .enable = reg_enable, \ 282 + .voltage_bank = volt_bank, \ 291 283 .voltage_reg = volt_reg, \ 292 284 .voltage_mask = volt_mask, \ 293 285 .supported_voltages = voltages, \ ··· 297 285 .fixed_uV = 0, \ 298 286 } 299 287 300 - #define AB8500_FIXED_LDO(_id, fixed, reg, reg_mask, \ 301 - reg_enable) \ 288 + #define AB8500_FIXED_LDO(_id, fixed, bank, reg, \ 289 + reg_mask, reg_enable) \ 302 290 { \ 303 291 .desc = { \ 304 292 .name = "LDO-" #_id, \ ··· 308 296 .owner = THIS_MODULE, \ 309 297 }, \ 310 298 .fixed_uV = fixed * 1000, \ 299 + .update_bank = bank, \ 311 300 .update_reg = reg, \ 312 301 .mask = reg_mask, \ 313 302 .enable = reg_enable, \ ··· 317 304 static struct ab8500_regulator_info ab8500_regulator_info[] = { 318 305 /* 319 306 * Variable Voltage LDOs 320 - * name, min uV, max uV, ctrl reg, reg mask, enable mask, 321 - * volt ctrl reg, volt ctrl mask, volt table, num supported volts 307 + * name, min uV, max uV, ctrl bank, ctrl reg, reg mask, enable mask, 308 + * volt ctrl bank, volt ctrl reg, volt ctrl mask, volt table, 309 + * num supported volts 322 310 */ 323 - AB8500_LDO(AUX1, 1100, 3300, 0x0409, 0x3, 0x1, 0x041f, 0xf, 311 + AB8500_LDO(AUX1, 1100, 3300, 0x04, 0x09, 0x3, 0x1, 0x04, 0x1f, 0xf, 324 312 ldo_vauxn_voltages, ARRAY_SIZE(ldo_vauxn_voltages)), 325 - AB8500_LDO(AUX2, 1100, 3300, 0x0409, 0xc, 0x4, 0x0420, 0xf, 313 + AB8500_LDO(AUX2, 1100, 3300, 0x04, 0x09, 0xc, 0x4, 0x04, 0x20, 0xf, 326 314 ldo_vauxn_voltages, ARRAY_SIZE(ldo_vauxn_voltages)), 327 - AB8500_LDO(AUX3, 1100, 3300, 0x040a, 0x3, 0x1, 0x0421, 0xf, 315 + AB8500_LDO(AUX3, 1100, 3300, 0x04, 0x0a, 0x3, 0x1, 0x04, 0x21, 0xf, 328 316 ldo_vauxn_voltages, ARRAY_SIZE(ldo_vauxn_voltages)), 329 - AB8500_LDO(INTCORE, 1100, 3300, 0x0380, 0x4, 0x4, 0x0380, 0x38, 317 + AB8500_LDO(INTCORE, 1100, 3300, 0x03, 0x80, 0x4, 0x4, 0x03, 0x80, 0x38, 330 318 ldo_vintcore_voltages, ARRAY_SIZE(ldo_vintcore_voltages)), 331 319 332 320 /* 333 321 * Fixed Voltage LDOs 334 - * name, o/p uV, ctrl reg, enable, disable 322 + * name, o/p uV, ctrl bank, ctrl reg, enable, disable 335 323 */ 336 - AB8500_FIXED_LDO(TVOUT, 2000, 0x0380, 0x2, 0x2), 337 - AB8500_FIXED_LDO(AUDIO, 2000, 0x0383, 0x2, 0x2), 338 - AB8500_FIXED_LDO(ANAMIC1, 2050, 0x0383, 0x4, 0x4), 339 - AB8500_FIXED_LDO(ANAMIC2, 2050, 0x0383, 0x8, 0x8), 340 - AB8500_FIXED_LDO(DMIC, 1800, 0x0383, 0x10, 0x10), 341 - AB8500_FIXED_LDO(ANA, 1200, 0x0383, 0xc, 0x4), 324 + AB8500_FIXED_LDO(TVOUT, 2000, 0x03, 0x80, 0x2, 0x2), 325 + AB8500_FIXED_LDO(AUDIO, 2000, 0x03, 0x83, 0x2, 0x2), 326 + AB8500_FIXED_LDO(ANAMIC1, 2050, 0x03, 0x83, 0x4, 0x4), 327 + AB8500_FIXED_LDO(ANAMIC2, 2050, 0x03, 0x83, 0x8, 0x8), 328 + AB8500_FIXED_LDO(DMIC, 1800, 0x03, 0x83, 0x10, 0x10), 329 + AB8500_FIXED_LDO(ANA, 1200, 0x03, 0x83, 0xc, 0x4), 342 330 }; 343 331 344 332 static inline struct ab8500_regulator_info *find_regulator_info(int id)

+53 -50

drivers/rtc/rtc-ab8500.c

··· 14 14 #include <linux/init.h> 15 15 #include <linux/platform_device.h> 16 16 #include <linux/rtc.h> 17 + #include <linux/mfd/abx500.h> 17 18 #include <linux/mfd/ab8500.h> 18 19 #include <linux/delay.h> 19 20 20 - #define AB8500_RTC_SOFF_STAT_REG 0x0F00 21 - #define AB8500_RTC_CC_CONF_REG 0x0F01 22 - #define AB8500_RTC_READ_REQ_REG 0x0F02 23 - #define AB8500_RTC_WATCH_TSECMID_REG 0x0F03 24 - #define AB8500_RTC_WATCH_TSECHI_REG 0x0F04 25 - #define AB8500_RTC_WATCH_TMIN_LOW_REG 0x0F05 26 - #define AB8500_RTC_WATCH_TMIN_MID_REG 0x0F06 27 - #define AB8500_RTC_WATCH_TMIN_HI_REG 0x0F07 28 - #define AB8500_RTC_ALRM_MIN_LOW_REG 0x0F08 29 - #define AB8500_RTC_ALRM_MIN_MID_REG 0x0F09 30 - #define AB8500_RTC_ALRM_MIN_HI_REG 0x0F0A 31 - #define AB8500_RTC_STAT_REG 0x0F0B 32 - #define AB8500_RTC_BKUP_CHG_REG 0x0F0C 33 - #define AB8500_RTC_FORCE_BKUP_REG 0x0F0D 34 - #define AB8500_RTC_CALIB_REG 0x0F0E 35 - #define AB8500_RTC_SWITCH_STAT_REG 0x0F0F 36 - #define AB8500_REV_REG 0x1080 21 + #define AB8500_RTC_SOFF_STAT_REG 0x00 22 + #define AB8500_RTC_CC_CONF_REG 0x01 23 + #define AB8500_RTC_READ_REQ_REG 0x02 24 + #define AB8500_RTC_WATCH_TSECMID_REG 0x03 25 + #define AB8500_RTC_WATCH_TSECHI_REG 0x04 26 + #define AB8500_RTC_WATCH_TMIN_LOW_REG 0x05 27 + #define AB8500_RTC_WATCH_TMIN_MID_REG 0x06 28 + #define AB8500_RTC_WATCH_TMIN_HI_REG 0x07 29 + #define AB8500_RTC_ALRM_MIN_LOW_REG 0x08 30 + #define AB8500_RTC_ALRM_MIN_MID_REG 0x09 31 + #define AB8500_RTC_ALRM_MIN_HI_REG 0x0A 32 + #define AB8500_RTC_STAT_REG 0x0B 33 + #define AB8500_RTC_BKUP_CHG_REG 0x0C 34 + #define AB8500_RTC_FORCE_BKUP_REG 0x0D 35 + #define AB8500_RTC_CALIB_REG 0x0E 36 + #define AB8500_RTC_SWITCH_STAT_REG 0x0F 37 37 38 38 /* RtcReadRequest bits */ 39 39 #define RTC_READ_REQUEST 0x01 ··· 46 46 #define COUNTS_PER_SEC (0xF000 / 60) 47 47 #define AB8500_RTC_EPOCH 2000 48 48 49 - static const unsigned long ab8500_rtc_time_regs[] = { 49 + static const u8 ab8500_rtc_time_regs[] = { 50 50 AB8500_RTC_WATCH_TMIN_HI_REG, AB8500_RTC_WATCH_TMIN_MID_REG, 51 51 AB8500_RTC_WATCH_TMIN_LOW_REG, AB8500_RTC_WATCH_TSECHI_REG, 52 52 AB8500_RTC_WATCH_TSECMID_REG 53 53 }; 54 54 55 - static const unsigned long ab8500_rtc_alarm_regs[] = { 55 + static const u8 ab8500_rtc_alarm_regs[] = { 56 56 AB8500_RTC_ALRM_MIN_HI_REG, AB8500_RTC_ALRM_MIN_MID_REG, 57 57 AB8500_RTC_ALRM_MIN_LOW_REG 58 58 }; ··· 76 76 77 77 static int ab8500_rtc_read_time(struct device *dev, struct rtc_time *tm) 78 78 { 79 - struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 80 79 unsigned long timeout = jiffies + HZ; 81 80 int retval, i; 82 81 unsigned long mins, secs; 83 82 unsigned char buf[ARRAY_SIZE(ab8500_rtc_time_regs)]; 83 + u8 value; 84 84 85 85 /* Request a data read */ 86 - retval = ab8500_write(ab8500, AB8500_RTC_READ_REQ_REG, 87 - RTC_READ_REQUEST); 86 + retval = abx500_set_register_interruptible(dev, 87 + AB8500_RTC, AB8500_RTC_READ_REQ_REG, RTC_READ_REQUEST); 88 88 if (retval < 0) 89 89 return retval; 90 90 91 91 /* Early AB8500 chips will not clear the rtc read request bit */ 92 - if (ab8500->revision == 0) { 92 + if (abx500_get_chip_id(dev) == 0) { 93 93 msleep(1); 94 94 } else { 95 95 /* Wait for some cycles after enabling the rtc read in ab8500 */ 96 96 while (time_before(jiffies, timeout)) { 97 - retval = ab8500_read(ab8500, AB8500_RTC_READ_REQ_REG); 97 + retval = abx500_get_register_interruptible(dev, 98 + AB8500_RTC, AB8500_RTC_READ_REQ_REG, &value); 98 99 if (retval < 0) 99 100 return retval; 100 101 101 - if (!(retval & RTC_READ_REQUEST)) 102 + if (!(value & RTC_READ_REQUEST)) 102 103 break; 103 104 104 105 msleep(1); ··· 108 107 109 108 /* Read the Watchtime registers */ 110 109 for (i = 0; i < ARRAY_SIZE(ab8500_rtc_time_regs); i++) { 111 - retval = ab8500_read(ab8500, ab8500_rtc_time_regs[i]); 110 + retval = abx500_get_register_interruptible(dev, 111 + AB8500_RTC, ab8500_rtc_time_regs[i], &value); 112 112 if (retval < 0) 113 113 return retval; 114 - buf[i] = retval; 114 + buf[i] = value; 115 115 } 116 116 117 117 mins = (buf[0] << 16) | (buf[1] << 8) | buf[2]; ··· 130 128 131 129 static int ab8500_rtc_set_time(struct device *dev, struct rtc_time *tm) 132 130 { 133 - struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 134 131 int retval, i; 135 132 unsigned char buf[ARRAY_SIZE(ab8500_rtc_time_regs)]; 136 133 unsigned long no_secs, no_mins, secs = 0; ··· 163 162 buf[0] = (no_mins >> 16) & 0xFF; 164 163 165 164 for (i = 0; i < ARRAY_SIZE(ab8500_rtc_time_regs); i++) { 166 - retval = ab8500_write(ab8500, ab8500_rtc_time_regs[i], buf[i]); 165 + retval = abx500_set_register_interruptible(dev, AB8500_RTC, 166 + ab8500_rtc_time_regs[i], buf[i]); 167 167 if (retval < 0) 168 168 return retval; 169 169 } 170 170 171 171 /* Request a data write */ 172 - return ab8500_write(ab8500, AB8500_RTC_READ_REQ_REG, RTC_WRITE_REQUEST); 172 + return abx500_set_register_interruptible(dev, AB8500_RTC, 173 + AB8500_RTC_READ_REQ_REG, RTC_WRITE_REQUEST); 173 174 } 174 175 175 176 static int ab8500_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) 176 177 { 177 - struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 178 178 int retval, i; 179 - int rtc_ctrl; 179 + u8 rtc_ctrl, value; 180 180 unsigned char buf[ARRAY_SIZE(ab8500_rtc_alarm_regs)]; 181 181 unsigned long secs, mins; 182 182 183 183 /* Check if the alarm is enabled or not */ 184 - rtc_ctrl = ab8500_read(ab8500, AB8500_RTC_STAT_REG); 185 - if (rtc_ctrl < 0) 186 - return rtc_ctrl; 184 + retval = abx500_get_register_interruptible(dev, AB8500_RTC, 185 + AB8500_RTC_STAT_REG, &rtc_ctrl); 186 + if (retval < 0) 187 + return retval; 187 188 188 189 if (rtc_ctrl & RTC_ALARM_ENA) 189 190 alarm->enabled = 1; ··· 195 192 alarm->pending = 0; 196 193 197 194 for (i = 0; i < ARRAY_SIZE(ab8500_rtc_alarm_regs); i++) { 198 - retval = ab8500_read(ab8500, ab8500_rtc_alarm_regs[i]); 195 + retval = abx500_get_register_interruptible(dev, AB8500_RTC, 196 + ab8500_rtc_alarm_regs[i], &value); 199 197 if (retval < 0) 200 198 return retval; 201 - buf[i] = retval; 199 + buf[i] = value; 202 200 } 203 201 204 202 mins = (buf[0] << 16) | (buf[1] << 8) | (buf[2]); ··· 215 211 216 212 static int ab8500_rtc_irq_enable(struct device *dev, unsigned int enabled) 217 213 { 218 - struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 219 - 220 - return ab8500_set_bits(ab8500, AB8500_RTC_STAT_REG, RTC_ALARM_ENA, 221 - enabled ? RTC_ALARM_ENA : 0); 214 + return abx500_mask_and_set_register_interruptible(dev, AB8500_RTC, 215 + AB8500_RTC_STAT_REG, RTC_ALARM_ENA, 216 + enabled ? RTC_ALARM_ENA : 0); 222 217 } 223 218 224 219 static int ab8500_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) 225 220 { 226 - struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 227 221 int retval, i; 228 222 unsigned char buf[ARRAY_SIZE(ab8500_rtc_alarm_regs)]; 229 223 unsigned long mins, secs = 0; ··· 249 247 250 248 /* Set the alarm time */ 251 249 for (i = 0; i < ARRAY_SIZE(ab8500_rtc_alarm_regs); i++) { 252 - retval = ab8500_write(ab8500, ab8500_rtc_alarm_regs[i], buf[i]); 250 + retval = abx500_set_register_interruptible(dev, AB8500_RTC, 251 + ab8500_rtc_alarm_regs[i], buf[i]); 253 252 if (retval < 0) 254 253 return retval; 255 254 } ··· 279 276 280 277 static int __devinit ab8500_rtc_probe(struct platform_device *pdev) 281 278 { 282 - struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent); 283 279 int err; 284 280 struct rtc_device *rtc; 285 - int rtc_ctrl; 281 + u8 rtc_ctrl; 286 282 int irq; 287 283 288 284 irq = platform_get_irq_byname(pdev, "ALARM"); ··· 289 287 return irq; 290 288 291 289 /* For RTC supply test */ 292 - err = ab8500_set_bits(ab8500, AB8500_RTC_STAT_REG, RTC_STATUS_DATA, 293 - RTC_STATUS_DATA); 290 + err = abx500_mask_and_set_register_interruptible(&pdev->dev, AB8500_RTC, 291 + AB8500_RTC_STAT_REG, RTC_STATUS_DATA, RTC_STATUS_DATA); 294 292 if (err < 0) 295 293 return err; 296 294 297 295 /* Wait for reset by the PorRtc */ 298 296 msleep(1); 299 297 300 - rtc_ctrl = ab8500_read(ab8500, AB8500_RTC_STAT_REG); 301 - if (rtc_ctrl < 0) 302 - return rtc_ctrl; 298 + err = abx500_get_register_interruptible(&pdev->dev, AB8500_RTC, 299 + AB8500_RTC_STAT_REG, &rtc_ctrl); 300 + if (err < 0) 301 + return err; 303 302 304 303 /* Check if the RTC Supply fails */ 305 304 if (!(rtc_ctrl & RTC_STATUS_DATA)) {

+24 -4

include/linux/mfd/ab8500.h

··· 10 10 #include <linux/device.h> 11 11 12 12 /* 13 + * AB8500 bank addresses 14 + */ 15 + #define AB8500_SYS_CTRL1_BLOCK 0x1 16 + #define AB8500_SYS_CTRL2_BLOCK 0x2 17 + #define AB8500_REGU_CTRL1 0x3 18 + #define AB8500_REGU_CTRL2 0x4 19 + #define AB8500_USB 0x5 20 + #define AB8500_TVOUT 0x6 21 + #define AB8500_DBI 0x7 22 + #define AB8500_ECI_AV_ACC 0x8 23 + #define AB8500_RESERVED 0x9 24 + #define AB8500_GPADC 0xA 25 + #define AB8500_CHARGER 0xB 26 + #define AB8500_GAS_GAUGE 0xC 27 + #define AB8500_AUDIO 0xD 28 + #define AB8500_INTERRUPT 0xE 29 + #define AB8500_RTC 0xF 30 + #define AB8500_MISC 0x10 31 + #define AB8500_DEBUG 0x12 32 + #define AB8500_PROD_TEST 0x13 33 + #define AB8500_OTP_EMUL 0x15 34 + 35 + /* 13 36 * Interrupts 14 37 */ 15 38 ··· 122 99 int revision; 123 100 int irq_base; 124 101 int irq; 102 + u8 chip_id; 125 103 126 104 int (*write) (struct ab8500 *a8500, u16 addr, u8 data); 127 105 int (*read) (struct ab8500 *a8500, u16 addr); ··· 147 123 void (*init) (struct ab8500 *); 148 124 struct regulator_init_data *regulator[AB8500_NUM_REGULATORS]; 149 125 }; 150 - 151 - extern int ab8500_write(struct ab8500 *a8500, u16 addr, u8 data); 152 - extern int ab8500_read(struct ab8500 *a8500, u16 addr); 153 - extern int ab8500_set_bits(struct ab8500 *a8500, u16 addr, u8 mask, u8 data); 154 126 155 127 extern int __devinit ab8500_init(struct ab8500 *ab8500); 156 128 extern int __devexit ab8500_exit(struct ab8500 *ab8500);

+1 -2

include/linux/mfd/abx500.h

··· 6 6 * 7 7 * ABX500 core access functions. 8 8 * The abx500 interface is used for the Analog Baseband chip 9 - * ab3100, ab3550, ab5500 and possibly comming. It is not used for 10 - * ab4500 and ab8500 since they are another family of chip. 9 + * ab3100, ab3550, ab5500, and ab8500. 11 10 * 12 11 * Author: Mattias Wallin <mattias.wallin@stericsson.com> 13 12 * Author: Mattias Nilsson <mattias.i.nilsson@stericsson.com>