tjh.dev / kernel
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[media] m88ds3103: use regmap for I2C register access

Use regmap for I2C register access.
Remove own I2C repeated mutex as it should not be needed. I2C adapter
lock is already taken when I2C mux adapter is called, no need for
double locking.

Signed-off-by: Antti Palosaari <crope@iki.fi>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>

authored by

Antti Palosaari and committed by
Mauro Carvalho Chehab 478932b1 7978b8a1

+145 -290
+1
drivers/media/dvb-frontends/Kconfig
··· 38 38 config DVB_M88DS3103 39 39 tristate "Montage Technology M88DS3103" 40 40 depends on DVB_CORE && I2C && I2C_MUX 41 + select REGMAP_I2C 41 42 default m if !MEDIA_SUBDRV_AUTOSELECT 42 43 help 43 44 Say Y when you want to support this frontend.
+141 -288
drivers/media/dvb-frontends/m88ds3103.c
··· 18 18 19 19 static struct dvb_frontend_ops m88ds3103_ops; 20 20 21 - /* write multiple registers */ 22 - static int m88ds3103_wr_regs(struct m88ds3103_dev *dev, 23 - u8 reg, const u8 *val, int len) 24 - { 25 - #define MAX_WR_LEN 32 26 - #define MAX_WR_XFER_LEN (MAX_WR_LEN + 1) 27 - struct i2c_client *client = dev->client; 28 - int ret; 29 - u8 buf[MAX_WR_XFER_LEN]; 30 - struct i2c_msg msg[1] = { 31 - { 32 - .addr = client->addr, 33 - .flags = 0, 34 - .len = 1 + len, 35 - .buf = buf, 36 - } 37 - }; 38 - 39 - if (WARN_ON(len > MAX_WR_LEN)) 40 - return -EINVAL; 41 - 42 - buf[0] = reg; 43 - memcpy(&buf[1], val, len); 44 - 45 - mutex_lock(&dev->i2c_mutex); 46 - ret = i2c_transfer(client->adapter, msg, 1); 47 - mutex_unlock(&dev->i2c_mutex); 48 - if (ret == 1) { 49 - ret = 0; 50 - } else { 51 - dev_warn(&client->dev, "i2c wr failed=%d reg=%02x len=%d\n", 52 - ret, reg, len); 53 - ret = -EREMOTEIO; 54 - } 55 - 56 - return ret; 57 - } 58 - 59 - /* read multiple registers */ 60 - static int m88ds3103_rd_regs(struct m88ds3103_dev *dev, 61 - u8 reg, u8 *val, int len) 62 - { 63 - #define MAX_RD_LEN 3 64 - #define MAX_RD_XFER_LEN (MAX_RD_LEN) 65 - struct i2c_client *client = dev->client; 66 - int ret; 67 - u8 buf[MAX_RD_XFER_LEN]; 68 - struct i2c_msg msg[2] = { 69 - { 70 - .addr = client->addr, 71 - .flags = 0, 72 - .len = 1, 73 - .buf = &reg, 74 - }, { 75 - .addr = client->addr, 76 - .flags = I2C_M_RD, 77 - .len = len, 78 - .buf = buf, 79 - } 80 - }; 81 - 82 - if (WARN_ON(len > MAX_RD_LEN)) 83 - return -EINVAL; 84 - 85 - mutex_lock(&dev->i2c_mutex); 86 - ret = i2c_transfer(client->adapter, msg, 2); 87 - mutex_unlock(&dev->i2c_mutex); 88 - if (ret == 2) { 89 - memcpy(val, buf, len); 90 - ret = 0; 91 - } else { 92 - dev_warn(&client->dev, "i2c rd failed=%d reg=%02x len=%d\n", 93 - ret, reg, len); 94 - ret = -EREMOTEIO; 95 - } 96 - 97 - return ret; 98 - } 99 - 100 - /* write single register */ 101 - static int m88ds3103_wr_reg(struct m88ds3103_dev *dev, u8 reg, u8 val) 102 - { 103 - return m88ds3103_wr_regs(dev, reg, &val, 1); 104 - } 105 - 106 - /* read single register */ 107 - static int m88ds3103_rd_reg(struct m88ds3103_dev *dev, u8 reg, u8 *val) 108 - { 109 - return m88ds3103_rd_regs(dev, reg, val, 1); 110 - } 111 - 112 - /* write single register with mask */ 113 - static int m88ds3103_wr_reg_mask(struct m88ds3103_dev *dev, 114 - u8 reg, u8 val, u8 mask) 115 - { 116 - int ret; 117 - u8 u8tmp; 118 - 119 - /* no need for read if whole reg is written */ 120 - if (mask != 0xff) { 121 - ret = m88ds3103_rd_regs(dev, reg, &u8tmp, 1); 122 - if (ret) 123 - return ret; 124 - 125 - val &= mask; 126 - u8tmp &= ~mask; 127 - val |= u8tmp; 128 - } 129 - 130 - return m88ds3103_wr_regs(dev, reg, &val, 1); 131 - } 132 - 133 - /* read single register with mask */ 134 - static int m88ds3103_rd_reg_mask(struct m88ds3103_dev *dev, 135 - u8 reg, u8 *val, u8 mask) 136 - { 137 - int ret, i; 138 - u8 u8tmp; 139 - 140 - ret = m88ds3103_rd_regs(dev, reg, &u8tmp, 1); 141 - if (ret) 142 - return ret; 143 - 144 - u8tmp &= mask; 145 - 146 - /* find position of the first bit */ 147 - for (i = 0; i < 8; i++) { 148 - if ((mask >> i) & 0x01) 149 - break; 150 - } 151 - *val = u8tmp >> i; 152 - 153 - return 0; 154 - } 155 - 156 21 /* write reg val table using reg addr auto increment */ 157 22 static int m88ds3103_wr_reg_val_tab(struct m88ds3103_dev *dev, 158 23 const struct m88ds3103_reg_val *tab, int tab_len) ··· 38 173 39 174 if (i == tab_len - 1 || tab[i].reg != tab[i + 1].reg - 1 || 40 175 !((j + 1) % (dev->cfg->i2c_wr_max - 1))) { 41 - ret = m88ds3103_wr_regs(dev, tab[i].reg - j, buf, j + 1); 176 + ret = regmap_bulk_write(dev->regmap, tab[i].reg - j, buf, j + 1); 42 177 if (ret) 43 178 goto err; 44 179 ··· 59 194 struct i2c_client *client = dev->client; 60 195 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 61 196 int ret, i, itmp; 62 - u8 u8tmp; 197 + unsigned int utmp; 63 198 u8 buf[3]; 64 199 65 200 *status = 0; ··· 71 206 72 207 switch (c->delivery_system) { 73 208 case SYS_DVBS: 74 - ret = m88ds3103_rd_reg_mask(dev, 0xd1, &u8tmp, 0x07); 209 + ret = regmap_read(dev->regmap, 0xd1, &utmp); 75 210 if (ret) 76 211 goto err; 77 212 78 - if (u8tmp == 0x07) 213 + if ((utmp & 0x07) == 0x07) 79 214 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER | 80 215 FE_HAS_VITERBI | FE_HAS_SYNC | 81 216 FE_HAS_LOCK; 82 217 break; 83 218 case SYS_DVBS2: 84 - ret = m88ds3103_rd_reg_mask(dev, 0x0d, &u8tmp, 0x8f); 219 + ret = regmap_read(dev->regmap, 0x0d, &utmp); 85 220 if (ret) 86 221 goto err; 87 222 88 - if (u8tmp == 0x8f) 223 + if ((utmp & 0x8f) == 0x8f) 89 224 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER | 90 225 FE_HAS_VITERBI | FE_HAS_SYNC | 91 226 FE_HAS_LOCK; ··· 97 232 } 98 233 99 234 dev->fe_status = *status; 100 - 101 - dev_dbg(&client->dev, "lock=%02x status=%02x\n", u8tmp, *status); 235 + dev_dbg(&client->dev, "lock=%02x status=%02x\n", utmp, *status); 102 236 103 237 /* CNR */ 104 238 if (dev->fe_status & FE_HAS_VITERBI) { ··· 112 248 itmp = 0; 113 249 114 250 for (i = 0; i < M88DS3103_SNR_ITERATIONS; i++) { 115 - ret = m88ds3103_rd_reg(dev, 0xff, &buf[0]); 251 + ret = regmap_read(dev->regmap, 0xff, &utmp); 116 252 if (ret) 117 253 goto err; 118 254 119 - itmp += buf[0]; 255 + itmp += utmp; 120 256 } 121 257 122 258 /* use of single register limits max value to 15 dB */ ··· 130 266 signal_tot = 0; 131 267 132 268 for (i = 0; i < M88DS3103_SNR_ITERATIONS; i++) { 133 - ret = m88ds3103_rd_regs(dev, 0x8c, buf, 3); 269 + ret = regmap_bulk_read(dev->regmap, 0x8c, buf, 3); 134 270 if (ret) 135 271 goto err; 136 272 ··· 175 311 176 312 switch (c->delivery_system) { 177 313 case SYS_DVBS: 178 - ret = m88ds3103_wr_reg(dev, 0xf9, 0x04); 314 + ret = regmap_write(dev->regmap, 0xf9, 0x04); 179 315 if (ret) 180 316 goto err; 181 317 182 - ret = m88ds3103_rd_reg(dev, 0xf8, &u8tmp); 318 + ret = regmap_read(dev->regmap, 0xf8, &utmp); 183 319 if (ret) 184 320 goto err; 185 321 186 322 /* measurement ready? */ 187 - if (!(u8tmp & 0x10)) { 188 - ret = m88ds3103_rd_regs(dev, 0xf6, buf, 2); 323 + if (!(utmp & 0x10)) { 324 + ret = regmap_bulk_read(dev->regmap, 0xf6, buf, 2); 189 325 if (ret) 190 326 goto err; 191 327 ··· 196 332 dev->dvbv3_ber = post_bit_error; 197 333 198 334 /* restart measurement */ 199 - u8tmp |= 0x10; 200 - ret = m88ds3103_wr_reg(dev, 0xf8, u8tmp); 335 + utmp |= 0x10; 336 + ret = regmap_write(dev->regmap, 0xf8, utmp); 201 337 if (ret) 202 338 goto err; 203 339 } 204 340 break; 205 341 case SYS_DVBS2: 206 - ret = m88ds3103_rd_regs(dev, 0xd5, buf, 3); 342 + ret = regmap_bulk_read(dev->regmap, 0xd5, buf, 3); 207 343 if (ret) 208 344 goto err; 209 345 ··· 211 347 212 348 /* enough data? */ 213 349 if (utmp > 4000) { 214 - ret = m88ds3103_rd_regs(dev, 0xf7, buf, 2); 350 + ret = regmap_bulk_read(dev->regmap, 0xf7, buf, 2); 215 351 if (ret) 216 352 goto err; 217 353 ··· 222 358 dev->dvbv3_ber = post_bit_error; 223 359 224 360 /* restart measurement */ 225 - ret = m88ds3103_wr_reg(dev, 0xd1, 0x01); 361 + ret = regmap_write(dev->regmap, 0xd1, 0x01); 226 362 if (ret) 227 363 goto err; 228 364 229 - ret = m88ds3103_wr_reg(dev, 0xf9, 0x01); 365 + ret = regmap_write(dev->regmap, 0xf9, 0x01); 230 366 if (ret) 231 367 goto err; 232 368 233 - ret = m88ds3103_wr_reg(dev, 0xf9, 0x00); 369 + ret = regmap_write(dev->regmap, 0xf9, 0x00); 234 370 if (ret) 235 371 goto err; 236 372 237 - ret = m88ds3103_wr_reg(dev, 0xd1, 0x00); 373 + ret = regmap_write(dev->regmap, 0xd1, 0x00); 238 374 if (ret) 239 375 goto err; 240 376 } ··· 284 420 } 285 421 286 422 /* reset */ 287 - ret = m88ds3103_wr_reg(dev, 0x07, 0x80); 423 + ret = regmap_write(dev->regmap, 0x07, 0x80); 288 424 if (ret) 289 425 goto err; 290 426 291 - ret = m88ds3103_wr_reg(dev, 0x07, 0x00); 427 + ret = regmap_write(dev->regmap, 0x07, 0x00); 292 428 if (ret) 293 429 goto err; 294 430 295 431 /* Disable demod clock path */ 296 432 if (dev->chip_id == M88RS6000_CHIP_ID) { 297 - ret = m88ds3103_wr_reg(dev, 0x06, 0xe0); 433 + ret = regmap_write(dev->regmap, 0x06, 0xe0); 298 434 if (ret) 299 435 goto err; 300 436 } ··· 332 468 target_mclk = 144000; 333 469 334 470 /* Enable demod clock path */ 335 - ret = m88ds3103_wr_reg(dev, 0x06, 0x00); 471 + ret = regmap_write(dev->regmap, 0x06, 0x00); 336 472 if (ret) 337 473 goto err; 338 474 usleep_range(10000, 20000); ··· 378 514 u8tmp2 = 0x00; /* 0b00 */ 379 515 break; 380 516 } 381 - ret = m88ds3103_wr_reg_mask(dev, 0x22, u8tmp1 << 6, 0xc0); 517 + ret = regmap_update_bits(dev->regmap, 0x22, 0xc0, u8tmp1 << 6); 382 518 if (ret) 383 519 goto err; 384 - ret = m88ds3103_wr_reg_mask(dev, 0x24, u8tmp2 << 6, 0xc0); 520 + ret = regmap_update_bits(dev->regmap, 0x24, 0xc0, u8tmp2 << 6); 385 521 if (ret) 386 522 goto err; 387 523 } 388 524 389 - ret = m88ds3103_wr_reg(dev, 0xb2, 0x01); 525 + ret = regmap_write(dev->regmap, 0xb2, 0x01); 390 526 if (ret) 391 527 goto err; 392 528 393 - ret = m88ds3103_wr_reg(dev, 0x00, 0x01); 529 + ret = regmap_write(dev->regmap, 0x00, 0x01); 394 530 if (ret) 395 531 goto err; 396 532 ··· 429 565 if (dev->chip_id == M88RS6000_CHIP_ID) { 430 566 if ((c->delivery_system == SYS_DVBS2) 431 567 && ((c->symbol_rate / 1000) <= 5000)) { 432 - ret = m88ds3103_wr_reg(dev, 0xc0, 0x04); 568 + ret = regmap_write(dev->regmap, 0xc0, 0x04); 433 569 if (ret) 434 570 goto err; 435 571 buf[0] = 0x09; 436 572 buf[1] = 0x22; 437 573 buf[2] = 0x88; 438 - ret = m88ds3103_wr_regs(dev, 0x8a, buf, 3); 574 + ret = regmap_bulk_write(dev->regmap, 0x8a, buf, 3); 439 575 if (ret) 440 576 goto err; 441 577 } 442 - ret = m88ds3103_wr_reg_mask(dev, 0x9d, 0x08, 0x08); 578 + ret = regmap_update_bits(dev->regmap, 0x9d, 0x08, 0x08); 443 579 if (ret) 444 580 goto err; 445 - ret = m88ds3103_wr_reg(dev, 0xf1, 0x01); 581 + ret = regmap_write(dev->regmap, 0xf1, 0x01); 446 582 if (ret) 447 583 goto err; 448 - ret = m88ds3103_wr_reg_mask(dev, 0x30, 0x80, 0x80); 584 + ret = regmap_update_bits(dev->regmap, 0x30, 0x80, 0x80); 449 585 if (ret) 450 586 goto err; 451 587 } ··· 475 611 u8tmp |= 0x40; 476 612 477 613 /* TS mode */ 478 - ret = m88ds3103_wr_reg(dev, 0xfd, u8tmp); 614 + ret = regmap_write(dev->regmap, 0xfd, u8tmp); 479 615 if (ret) 480 616 goto err; 481 617 482 618 switch (dev->cfg->ts_mode) { 483 619 case M88DS3103_TS_SERIAL: 484 620 case M88DS3103_TS_SERIAL_D7: 485 - ret = m88ds3103_wr_reg_mask(dev, 0x29, u8tmp1, 0x20); 621 + ret = regmap_update_bits(dev->regmap, 0x29, 0x20, u8tmp1); 486 622 if (ret) 487 623 goto err; 488 624 u8tmp1 = 0; ··· 507 643 /* u8tmp2[5:0] => ea[5:0] */ 508 644 u8tmp2 &= 0x3f; 509 645 510 - ret = m88ds3103_rd_reg(dev, 0xfe, &u8tmp); 646 + ret = regmap_bulk_read(dev->regmap, 0xfe, &u8tmp, 1); 511 647 if (ret) 512 648 goto err; 513 649 514 650 u8tmp = ((u8tmp & 0xf0) << 0) | u8tmp1 >> 2; 515 - ret = m88ds3103_wr_reg(dev, 0xfe, u8tmp); 651 + ret = regmap_write(dev->regmap, 0xfe, u8tmp); 516 652 if (ret) 517 653 goto err; 518 654 519 655 u8tmp = ((u8tmp1 & 0x03) << 6) | u8tmp2 >> 0; 520 - ret = m88ds3103_wr_reg(dev, 0xea, u8tmp); 656 + ret = regmap_write(dev->regmap, 0xea, u8tmp); 521 657 if (ret) 522 658 goto err; 523 659 ··· 528 664 else 529 665 u8tmp = 0x06; 530 666 531 - ret = m88ds3103_wr_reg(dev, 0xc3, 0x08); 667 + ret = regmap_write(dev->regmap, 0xc3, 0x08); 532 668 if (ret) 533 669 goto err; 534 670 535 - ret = m88ds3103_wr_reg(dev, 0xc8, u8tmp); 671 + ret = regmap_write(dev->regmap, 0xc8, u8tmp); 536 672 if (ret) 537 673 goto err; 538 674 539 - ret = m88ds3103_wr_reg(dev, 0xc4, 0x08); 675 + ret = regmap_write(dev->regmap, 0xc4, 0x08); 540 676 if (ret) 541 677 goto err; 542 678 543 - ret = m88ds3103_wr_reg(dev, 0xc7, 0x00); 679 + ret = regmap_write(dev->regmap, 0xc7, 0x00); 544 680 if (ret) 545 681 goto err; 546 682 547 683 u16tmp = DIV_ROUND_CLOSEST((c->symbol_rate / 1000) << 15, dev->mclk_khz / 2); 548 684 buf[0] = (u16tmp >> 0) & 0xff; 549 685 buf[1] = (u16tmp >> 8) & 0xff; 550 - ret = m88ds3103_wr_regs(dev, 0x61, buf, 2); 686 + ret = regmap_bulk_write(dev->regmap, 0x61, buf, 2); 551 687 if (ret) 552 688 goto err; 553 689 554 - ret = m88ds3103_wr_reg_mask(dev, 0x4d, dev->cfg->spec_inv << 1, 0x02); 690 + ret = regmap_update_bits(dev->regmap, 0x4d, 0x02, dev->cfg->spec_inv << 1); 555 691 if (ret) 556 692 goto err; 557 693 558 - ret = m88ds3103_wr_reg_mask(dev, 0x30, dev->cfg->agc_inv << 4, 0x10); 694 + ret = regmap_update_bits(dev->regmap, 0x30, 0x10, dev->cfg->agc_inv << 4); 559 695 if (ret) 560 696 goto err; 561 697 562 - ret = m88ds3103_wr_reg(dev, 0x33, dev->cfg->agc); 698 + ret = regmap_write(dev->regmap, 0x33, dev->cfg->agc); 563 699 if (ret) 564 700 goto err; 565 701 ··· 573 709 574 710 buf[0] = (s32tmp >> 0) & 0xff; 575 711 buf[1] = (s32tmp >> 8) & 0xff; 576 - ret = m88ds3103_wr_regs(dev, 0x5e, buf, 2); 712 + ret = regmap_bulk_write(dev->regmap, 0x5e, buf, 2); 577 713 if (ret) 578 714 goto err; 579 715 580 - ret = m88ds3103_wr_reg(dev, 0x00, 0x00); 716 + ret = regmap_write(dev->regmap, 0x00, 0x00); 581 717 if (ret) 582 718 goto err; 583 719 584 - ret = m88ds3103_wr_reg(dev, 0xb2, 0x00); 720 + ret = regmap_write(dev->regmap, 0xb2, 0x00); 585 721 if (ret) 586 722 goto err; 587 723 ··· 599 735 struct i2c_client *client = dev->client; 600 736 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 601 737 int ret, len, remaining; 738 + unsigned int utmp; 602 739 const struct firmware *fw = NULL; 603 740 u8 *fw_file; 604 - u8 u8tmp; 605 741 606 742 dev_dbg(&client->dev, "\n"); 607 743 ··· 609 745 dev->warm = false; 610 746 611 747 /* wake up device from sleep */ 612 - ret = m88ds3103_wr_reg_mask(dev, 0x08, 0x01, 0x01); 748 + ret = regmap_update_bits(dev->regmap, 0x08, 0x01, 0x01); 613 749 if (ret) 614 750 goto err; 615 - 616 - ret = m88ds3103_wr_reg_mask(dev, 0x04, 0x00, 0x01); 751 + ret = regmap_update_bits(dev->regmap, 0x04, 0x01, 0x00); 617 752 if (ret) 618 753 goto err; 619 - 620 - ret = m88ds3103_wr_reg_mask(dev, 0x23, 0x00, 0x10); 754 + ret = regmap_update_bits(dev->regmap, 0x23, 0x10, 0x00); 621 755 if (ret) 622 756 goto err; 623 757 624 758 /* firmware status */ 625 - ret = m88ds3103_rd_reg(dev, 0xb9, &u8tmp); 759 + ret = regmap_read(dev->regmap, 0xb9, &utmp); 626 760 if (ret) 627 761 goto err; 628 762 629 - dev_dbg(&client->dev, "firmware=%02x\n", u8tmp); 763 + dev_dbg(&client->dev, "firmware=%02x\n", utmp); 630 764 631 - if (u8tmp) 765 + if (utmp) 632 766 goto skip_fw_download; 633 767 634 768 /* global reset, global diseqc reset, golbal fec reset */ 635 - ret = m88ds3103_wr_reg(dev, 0x07, 0xe0); 769 + ret = regmap_write(dev->regmap, 0x07, 0xe0); 636 770 if (ret) 637 771 goto err; 638 - 639 - ret = m88ds3103_wr_reg(dev, 0x07, 0x00); 772 + ret = regmap_write(dev->regmap, 0x07, 0x00); 640 773 if (ret) 641 774 goto err; 642 775 ··· 655 794 dev_info(&client->dev, "downloading firmware from file '%s'\n", 656 795 fw_file); 657 796 658 - ret = m88ds3103_wr_reg(dev, 0xb2, 0x01); 797 + ret = regmap_write(dev->regmap, 0xb2, 0x01); 659 798 if (ret) 660 799 goto error_fw_release; 661 800 ··· 665 804 if (len > (dev->cfg->i2c_wr_max - 1)) 666 805 len = (dev->cfg->i2c_wr_max - 1); 667 806 668 - ret = m88ds3103_wr_regs(dev, 0xb0, 807 + ret = regmap_bulk_write(dev->regmap, 0xb0, 669 808 &fw->data[fw->size - remaining], len); 670 809 if (ret) { 671 810 dev_err(&client->dev, "firmware download failed=%d\n", ··· 674 813 } 675 814 } 676 815 677 - ret = m88ds3103_wr_reg(dev, 0xb2, 0x00); 816 + ret = regmap_write(dev->regmap, 0xb2, 0x00); 678 817 if (ret) 679 818 goto error_fw_release; 680 819 681 820 release_firmware(fw); 682 821 fw = NULL; 683 822 684 - ret = m88ds3103_rd_reg(dev, 0xb9, &u8tmp); 823 + ret = regmap_read(dev->regmap, 0xb9, &utmp); 685 824 if (ret) 686 825 goto err; 687 826 688 - if (!u8tmp) { 827 + if (!utmp) { 689 828 dev_info(&client->dev, "firmware did not run\n"); 690 829 ret = -EFAULT; 691 830 goto err; ··· 694 833 dev_info(&client->dev, "found a '%s' in warm state\n", 695 834 m88ds3103_ops.info.name); 696 835 dev_info(&client->dev, "firmware version: %X.%X\n", 697 - (u8tmp >> 4) & 0xf, (u8tmp >> 0 & 0xf)); 836 + (utmp >> 4) & 0xf, (utmp >> 0 & 0xf)); 698 837 699 838 skip_fw_download: 700 839 /* warm state */ ··· 721 860 struct m88ds3103_dev *dev = fe->demodulator_priv; 722 861 struct i2c_client *client = dev->client; 723 862 int ret; 724 - u8 u8tmp; 863 + unsigned int utmp; 725 864 726 865 dev_dbg(&client->dev, "\n"); 727 866 ··· 730 869 731 870 /* TS Hi-Z */ 732 871 if (dev->chip_id == M88RS6000_CHIP_ID) 733 - u8tmp = 0x29; 872 + utmp = 0x29; 734 873 else 735 - u8tmp = 0x27; 736 - ret = m88ds3103_wr_reg_mask(dev, u8tmp, 0x00, 0x01); 874 + utmp = 0x27; 875 + ret = regmap_update_bits(dev->regmap, utmp, 0x01, 0x00); 737 876 if (ret) 738 877 goto err; 739 878 740 879 /* sleep */ 741 - ret = m88ds3103_wr_reg_mask(dev, 0x08, 0x00, 0x01); 880 + ret = regmap_update_bits(dev->regmap, 0x08, 0x01, 0x00); 742 881 if (ret) 743 882 goto err; 744 - 745 - ret = m88ds3103_wr_reg_mask(dev, 0x04, 0x01, 0x01); 883 + ret = regmap_update_bits(dev->regmap, 0x04, 0x01, 0x01); 746 884 if (ret) 747 885 goto err; 748 - 749 - ret = m88ds3103_wr_reg_mask(dev, 0x23, 0x10, 0x10); 886 + ret = regmap_update_bits(dev->regmap, 0x23, 0x10, 0x10); 750 887 if (ret) 751 888 goto err; 752 889 ··· 771 912 772 913 switch (c->delivery_system) { 773 914 case SYS_DVBS: 774 - ret = m88ds3103_rd_reg(dev, 0xe0, &buf[0]); 915 + ret = regmap_bulk_read(dev->regmap, 0xe0, &buf[0], 1); 775 916 if (ret) 776 917 goto err; 777 918 778 - ret = m88ds3103_rd_reg(dev, 0xe6, &buf[1]); 919 + ret = regmap_bulk_read(dev->regmap, 0xe6, &buf[1], 1); 779 920 if (ret) 780 921 goto err; 781 922 ··· 812 953 813 954 break; 814 955 case SYS_DVBS2: 815 - ret = m88ds3103_rd_reg(dev, 0x7e, &buf[0]); 956 + ret = regmap_bulk_read(dev->regmap, 0x7e, &buf[0], 1); 816 957 if (ret) 817 958 goto err; 818 959 819 - ret = m88ds3103_rd_reg(dev, 0x89, &buf[1]); 960 + ret = regmap_bulk_read(dev->regmap, 0x89, &buf[1], 1); 820 961 if (ret) 821 962 goto err; 822 963 823 - ret = m88ds3103_rd_reg(dev, 0xf2, &buf[2]); 964 + ret = regmap_bulk_read(dev->regmap, 0xf2, &buf[2], 1); 824 965 if (ret) 825 966 goto err; 826 967 ··· 911 1052 goto err; 912 1053 } 913 1054 914 - ret = m88ds3103_rd_regs(dev, 0x6d, buf, 2); 1055 + ret = regmap_bulk_read(dev->regmap, 0x6d, buf, 2); 915 1056 if (ret) 916 1057 goto err; 917 1058 ··· 951 1092 struct m88ds3103_dev *dev = fe->demodulator_priv; 952 1093 struct i2c_client *client = dev->client; 953 1094 int ret; 954 - u8 u8tmp, tone, reg_a1_mask; 1095 + unsigned int utmp, tone, reg_a1_mask; 955 1096 956 1097 dev_dbg(&client->dev, "fe_sec_tone_mode=%d\n", fe_sec_tone_mode); 957 1098 ··· 975 1116 goto err; 976 1117 } 977 1118 978 - u8tmp = tone << 7 | dev->cfg->envelope_mode << 5; 979 - ret = m88ds3103_wr_reg_mask(dev, 0xa2, u8tmp, 0xe0); 1119 + utmp = tone << 7 | dev->cfg->envelope_mode << 5; 1120 + ret = regmap_update_bits(dev->regmap, 0xa2, 0xe0, utmp); 980 1121 if (ret) 981 1122 goto err; 982 1123 983 - u8tmp = 1 << 2; 984 - ret = m88ds3103_wr_reg_mask(dev, 0xa1, u8tmp, reg_a1_mask); 1124 + utmp = 1 << 2; 1125 + ret = regmap_update_bits(dev->regmap, 0xa1, reg_a1_mask, utmp); 985 1126 if (ret) 986 1127 goto err; 987 1128 ··· 997 1138 struct m88ds3103_dev *dev = fe->demodulator_priv; 998 1139 struct i2c_client *client = dev->client; 999 1140 int ret; 1000 - u8 u8tmp; 1141 + unsigned int utmp; 1001 1142 bool voltage_sel, voltage_dis; 1002 1143 1003 1144 dev_dbg(&client->dev, "fe_sec_voltage=%d\n", fe_sec_voltage); ··· 1030 1171 voltage_sel ^= dev->cfg->lnb_hv_pol; 1031 1172 voltage_dis ^= dev->cfg->lnb_en_pol; 1032 1173 1033 - u8tmp = voltage_dis << 1 | voltage_sel << 0; 1034 - ret = m88ds3103_wr_reg_mask(dev, 0xa2, u8tmp, 0x03); 1174 + utmp = voltage_dis << 1 | voltage_sel << 0; 1175 + ret = regmap_update_bits(dev->regmap, 0xa2, 0x03, utmp); 1035 1176 if (ret) 1036 1177 goto err; 1037 1178 ··· 1047 1188 struct m88ds3103_dev *dev = fe->demodulator_priv; 1048 1189 struct i2c_client *client = dev->client; 1049 1190 int ret; 1191 + unsigned int utmp; 1050 1192 unsigned long timeout; 1051 - u8 u8tmp; 1052 1193 1053 1194 dev_dbg(&client->dev, "msg=%*ph\n", 1054 1195 diseqc_cmd->msg_len, diseqc_cmd->msg); ··· 1063 1204 goto err; 1064 1205 } 1065 1206 1066 - u8tmp = dev->cfg->envelope_mode << 5; 1067 - ret = m88ds3103_wr_reg_mask(dev, 0xa2, u8tmp, 0xe0); 1207 + utmp = dev->cfg->envelope_mode << 5; 1208 + ret = regmap_update_bits(dev->regmap, 0xa2, 0xe0, utmp); 1068 1209 if (ret) 1069 1210 goto err; 1070 1211 1071 - ret = m88ds3103_wr_regs(dev, 0xa3, diseqc_cmd->msg, 1212 + ret = regmap_bulk_write(dev->regmap, 0xa3, diseqc_cmd->msg, 1072 1213 diseqc_cmd->msg_len); 1073 1214 if (ret) 1074 1215 goto err; 1075 1216 1076 - ret = m88ds3103_wr_reg(dev, 0xa1, 1217 + ret = regmap_write(dev->regmap, 0xa1, 1077 1218 (diseqc_cmd->msg_len - 1) << 3 | 0x07); 1078 1219 if (ret) 1079 1220 goto err; ··· 1085 1226 /* DiSEqC message typical period is 54 ms */ 1086 1227 usleep_range(50000, 54000); 1087 1228 1088 - for (u8tmp = 1; !time_after(jiffies, timeout) && u8tmp;) { 1089 - ret = m88ds3103_rd_reg_mask(dev, 0xa1, &u8tmp, 0x40); 1229 + for (utmp = 1; !time_after(jiffies, timeout) && utmp;) { 1230 + ret = regmap_read(dev->regmap, 0xa1, &utmp); 1090 1231 if (ret) 1091 1232 goto err; 1233 + utmp = (utmp >> 6) & 0x1; 1092 1234 } 1093 1235 1094 - if (u8tmp == 0) { 1236 + if (utmp == 0) { 1095 1237 dev_dbg(&client->dev, "diseqc tx took %u ms\n", 1096 1238 jiffies_to_msecs(jiffies) - 1097 1239 (jiffies_to_msecs(timeout) - SEND_MASTER_CMD_TIMEOUT)); 1098 1240 } else { 1099 1241 dev_dbg(&client->dev, "diseqc tx timeout\n"); 1100 1242 1101 - ret = m88ds3103_wr_reg_mask(dev, 0xa1, 0x40, 0xc0); 1243 + ret = regmap_update_bits(dev->regmap, 0xa1, 0xc0, 0x40); 1102 1244 if (ret) 1103 1245 goto err; 1104 1246 } 1105 1247 1106 - ret = m88ds3103_wr_reg_mask(dev, 0xa2, 0x80, 0xc0); 1248 + ret = regmap_update_bits(dev->regmap, 0xa2, 0xc0, 0x80); 1107 1249 if (ret) 1108 1250 goto err; 1109 1251 1110 - if (u8tmp == 1) { 1252 + if (utmp == 1) { 1111 1253 ret = -ETIMEDOUT; 1112 1254 goto err; 1113 1255 } ··· 1125 1265 struct m88ds3103_dev *dev = fe->demodulator_priv; 1126 1266 struct i2c_client *client = dev->client; 1127 1267 int ret; 1268 + unsigned int utmp, burst; 1128 1269 unsigned long timeout; 1129 - u8 u8tmp, burst; 1130 1270 1131 1271 dev_dbg(&client->dev, "fe_sec_mini_cmd=%d\n", fe_sec_mini_cmd); 1132 1272 ··· 1135 1275 goto err; 1136 1276 } 1137 1277 1138 - u8tmp = dev->cfg->envelope_mode << 5; 1139 - ret = m88ds3103_wr_reg_mask(dev, 0xa2, u8tmp, 0xe0); 1278 + utmp = dev->cfg->envelope_mode << 5; 1279 + ret = regmap_update_bits(dev->regmap, 0xa2, 0xe0, utmp); 1140 1280 if (ret) 1141 1281 goto err; 1142 1282 ··· 1153 1293 goto err; 1154 1294 } 1155 1295 1156 - ret = m88ds3103_wr_reg(dev, 0xa1, burst); 1296 + ret = regmap_write(dev->regmap, 0xa1, burst); 1157 1297 if (ret) 1158 1298 goto err; 1159 1299 ··· 1164 1304 /* DiSEqC ToneBurst period is 12.5 ms */ 1165 1305 usleep_range(8500, 12500); 1166 1306 1167 - for (u8tmp = 1; !time_after(jiffies, timeout) && u8tmp;) { 1168 - ret = m88ds3103_rd_reg_mask(dev, 0xa1, &u8tmp, 0x40); 1307 + for (utmp = 1; !time_after(jiffies, timeout) && utmp;) { 1308 + ret = regmap_read(dev->regmap, 0xa1, &utmp); 1169 1309 if (ret) 1170 1310 goto err; 1311 + utmp = (utmp >> 6) & 0x1; 1171 1312 } 1172 1313 1173 - if (u8tmp == 0) { 1314 + if (utmp == 0) { 1174 1315 dev_dbg(&client->dev, "diseqc tx took %u ms\n", 1175 1316 jiffies_to_msecs(jiffies) - 1176 1317 (jiffies_to_msecs(timeout) - SEND_BURST_TIMEOUT)); 1177 1318 } else { 1178 1319 dev_dbg(&client->dev, "diseqc tx timeout\n"); 1179 1320 1180 - ret = m88ds3103_wr_reg_mask(dev, 0xa1, 0x40, 0xc0); 1321 + ret = regmap_update_bits(dev->regmap, 0xa1, 0xc0, 0x40); 1181 1322 if (ret) 1182 1323 goto err; 1183 1324 } 1184 1325 1185 - ret = m88ds3103_wr_reg_mask(dev, 0xa2, 0x80, 0xc0); 1326 + ret = regmap_update_bits(dev->regmap, 0xa2, 0xc0, 0x80); 1186 1327 if (ret) 1187 1328 goto err; 1188 1329 1189 - if (u8tmp == 1) { 1330 + if (utmp == 1) { 1190 1331 ret = -ETIMEDOUT; 1191 1332 goto err; 1192 1333 } ··· 1219 1358 struct m88ds3103_dev *dev = mux_priv; 1220 1359 struct i2c_client *client = dev->client; 1221 1360 int ret; 1222 - struct i2c_msg gate_open_msg[1] = { 1223 - { 1224 - .addr = client->addr, 1225 - .flags = 0, 1226 - .len = 2, 1227 - .buf = "\x03\x11", 1228 - } 1361 + struct i2c_msg msg = { 1362 + .addr = client->addr, 1363 + .flags = 0, 1364 + .len = 2, 1365 + .buf = "\x03\x11", 1229 1366 }; 1230 1367 1231 - mutex_lock(&dev->i2c_mutex); 1232 - 1233 - /* open tuner I2C repeater for 1 xfer, closes automatically */ 1234 - ret = __i2c_transfer(client->adapter, gate_open_msg, 1); 1368 + /* Open tuner I2C repeater for 1 xfer, closes automatically */ 1369 + ret = __i2c_transfer(client->adapter, &msg, 1); 1235 1370 if (ret != 1) { 1236 1371 dev_warn(&client->dev, "i2c wr failed=%d\n", ret); 1237 1372 if (ret >= 0) 1238 1373 ret = -EREMOTEIO; 1239 - 1240 1374 return ret; 1241 1375 } 1242 - 1243 - return 0; 1244 - } 1245 - 1246 - static int m88ds3103_deselect(struct i2c_adapter *adap, void *mux_priv, 1247 - u32 chan) 1248 - { 1249 - struct m88ds3103_dev *dev = mux_priv; 1250 - 1251 - mutex_unlock(&dev->i2c_mutex); 1252 1376 1253 1377 return 0; 1254 1378 } ··· 1346 1500 struct m88ds3103_dev *dev; 1347 1501 struct m88ds3103_platform_data *pdata = client->dev.platform_data; 1348 1502 int ret; 1349 - u8 chip_id, u8tmp; 1503 + unsigned int utmp; 1350 1504 1351 1505 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1352 1506 if (!dev) { ··· 1368 1522 dev->config.lnb_hv_pol = pdata->lnb_hv_pol; 1369 1523 dev->config.lnb_en_pol = pdata->lnb_en_pol; 1370 1524 dev->cfg = &dev->config; 1371 - mutex_init(&dev->i2c_mutex); 1525 + /* create regmap */ 1526 + dev->regmap_config.reg_bits = 8, 1527 + dev->regmap_config.val_bits = 8, 1528 + dev->regmap_config.lock_arg = dev, 1529 + dev->regmap = devm_regmap_init_i2c(client, &dev->regmap_config); 1530 + if (IS_ERR(dev->regmap)) { 1531 + ret = PTR_ERR(dev->regmap); 1532 + goto err_kfree; 1533 + } 1372 1534 1373 1535 /* 0x00: chip id[6:0], 0x01: chip ver[7:0], 0x02: chip ver[15:8] */ 1374 - ret = m88ds3103_rd_reg(dev, 0x00, &chip_id); 1536 + ret = regmap_read(dev->regmap, 0x00, &utmp); 1375 1537 if (ret) 1376 1538 goto err_kfree; 1377 1539 1378 - chip_id >>= 1; 1379 - dev_dbg(&client->dev, "chip_id=%02x\n", chip_id); 1540 + dev->chip_id = utmp >> 1; 1541 + dev_dbg(&client->dev, "chip_id=%02x\n", dev->chip_id); 1380 1542 1381 - switch (chip_id) { 1543 + switch (dev->chip_id) { 1382 1544 case M88RS6000_CHIP_ID: 1383 1545 case M88DS3103_CHIP_ID: 1384 1546 break; 1385 1547 default: 1386 1548 goto err_kfree; 1387 1549 } 1388 - dev->chip_id = chip_id; 1389 1550 1390 1551 switch (dev->cfg->clock_out) { 1391 1552 case M88DS3103_CLOCK_OUT_DISABLED: 1392 - u8tmp = 0x80; 1553 + utmp = 0x80; 1393 1554 break; 1394 1555 case M88DS3103_CLOCK_OUT_ENABLED: 1395 - u8tmp = 0x00; 1556 + utmp = 0x00; 1396 1557 break; 1397 1558 case M88DS3103_CLOCK_OUT_ENABLED_DIV2: 1398 - u8tmp = 0x10; 1559 + utmp = 0x10; 1399 1560 break; 1400 1561 default: 1401 1562 ret = -EINVAL; ··· 1411 1558 1412 1559 /* 0x29 register is defined differently for m88rs6000. */ 1413 1560 /* set internal tuner address to 0x21 */ 1414 - if (chip_id == M88RS6000_CHIP_ID) 1415 - u8tmp = 0x00; 1561 + if (dev->chip_id == M88RS6000_CHIP_ID) 1562 + utmp = 0x00; 1416 1563 1417 - ret = m88ds3103_wr_reg(dev, 0x29, u8tmp); 1564 + ret = regmap_write(dev->regmap, 0x29, utmp); 1418 1565 if (ret) 1419 1566 goto err_kfree; 1420 1567 1421 1568 /* sleep */ 1422 - ret = m88ds3103_wr_reg_mask(dev, 0x08, 0x00, 0x01); 1569 + ret = regmap_update_bits(dev->regmap, 0x08, 0x01, 0x00); 1423 1570 if (ret) 1424 1571 goto err_kfree; 1425 - ret = m88ds3103_wr_reg_mask(dev, 0x04, 0x01, 0x01); 1572 + ret = regmap_update_bits(dev->regmap, 0x04, 0x01, 0x01); 1426 1573 if (ret) 1427 1574 goto err_kfree; 1428 - ret = m88ds3103_wr_reg_mask(dev, 0x23, 0x10, 0x10); 1575 + ret = regmap_update_bits(dev->regmap, 0x23, 0x10, 0x10); 1429 1576 if (ret) 1430 1577 goto err_kfree; 1431 1578 1432 1579 /* create mux i2c adapter for tuner */ 1433 1580 dev->i2c_adapter = i2c_add_mux_adapter(client->adapter, &client->dev, 1434 1581 dev, 0, 0, 0, m88ds3103_select, 1435 - m88ds3103_deselect); 1582 + NULL); 1436 1583 if (dev->i2c_adapter == NULL) { 1437 1584 ret = -ENOMEM; 1438 1585 goto err_kfree;
+3 -2
drivers/media/dvb-frontends/m88ds3103_priv.h
··· 22 22 #include "dvb_math.h" 23 23 #include <linux/firmware.h> 24 24 #include <linux/i2c-mux.h> 25 + #include <linux/regmap.h> 25 26 #include <linux/math64.h> 26 27 27 28 #define M88DS3103_FIRMWARE "dvb-demod-m88ds3103.fw" ··· 33 32 34 33 struct m88ds3103_dev { 35 34 struct i2c_client *client; 36 - /* mutex needed due to own tuner I2C adapter */ 37 - struct mutex i2c_mutex; 35 + struct regmap_config regmap_config; 36 + struct regmap *regmap; 38 37 struct m88ds3103_config config; 39 38 const struct m88ds3103_config *cfg; 40 39 struct dvb_frontend fe;