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staging: comedi: ni_tio: remove BUG() checks for ni_tio_get_gate_src()

This function calls some helper functions to convert the counter variant
specific gate select bits into the generic enum ni_gpct_clock_source_bits
equivelent. These helper functions currently BUG() if the gate select
bits are invalid.

This should never happen but refactor the code to return -EINVAL instead
and remove the BUG() checks.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

H Hartley Sweeten and committed by
Greg Kroah-Hartman 475ea1ed d87f5e90

+97 -49
+97 -49
drivers/staging/comedi/drivers/ni_tio.c
··· 1065 1065 return 0; 1066 1066 } 1067 1067 1068 - static unsigned int ni_660x_gate_to_generic_gate(unsigned int gate) 1068 + static int ni_660x_gate_to_generic_gate(unsigned int gate, unsigned int *src) 1069 1069 { 1070 + unsigned int source; 1070 1071 unsigned int i; 1071 1072 1072 1073 switch (gate) { 1073 1074 case NI_660X_SRC_PIN_I_GATE_SEL: 1074 - return NI_GPCT_SOURCE_PIN_i_GATE_SELECT; 1075 + source = NI_GPCT_SOURCE_PIN_i_GATE_SELECT; 1076 + break; 1075 1077 case NI_660X_GATE_PIN_I_GATE_SEL: 1076 - return NI_GPCT_GATE_PIN_i_GATE_SELECT; 1078 + source = NI_GPCT_GATE_PIN_i_GATE_SELECT; 1079 + break; 1077 1080 case NI_660X_NEXT_SRC_GATE_SEL: 1078 - return NI_GPCT_NEXT_SOURCE_GATE_SELECT; 1081 + source = NI_GPCT_NEXT_SOURCE_GATE_SELECT; 1082 + break; 1079 1083 case NI_660X_NEXT_OUT_GATE_SEL: 1080 - return NI_GPCT_NEXT_OUT_GATE_SELECT; 1084 + source = NI_GPCT_NEXT_OUT_GATE_SELECT; 1085 + break; 1081 1086 case NI_660X_LOGIC_LOW_GATE_SEL: 1082 - return NI_GPCT_LOGIC_LOW_GATE_SELECT; 1087 + source = NI_GPCT_LOGIC_LOW_GATE_SELECT; 1088 + break; 1083 1089 default: 1084 1090 for (i = 0; i <= NI_660X_MAX_RTSI_CHAN; ++i) { 1085 - if (gate == NI_660X_RTSI_GATE_SEL(i)) 1086 - return NI_GPCT_RTSI_GATE_SELECT(i); 1091 + if (gate == NI_660X_RTSI_GATE_SEL(i)) { 1092 + source = NI_GPCT_RTSI_GATE_SELECT(i); 1093 + break; 1094 + } 1087 1095 } 1096 + if (i <= NI_660X_MAX_RTSI_CHAN) 1097 + break; 1088 1098 for (i = 0; i <= NI_660X_MAX_GATE_PIN; ++i) { 1089 - if (gate == NI_660X_PIN_GATE_SEL(i)) 1090 - return NI_GPCT_GATE_PIN_GATE_SELECT(i); 1099 + if (gate == NI_660X_PIN_GATE_SEL(i)) { 1100 + source = NI_GPCT_GATE_PIN_GATE_SELECT(i); 1101 + break; 1102 + } 1091 1103 } 1092 - BUG(); 1093 - break; 1104 + if (i <= NI_660X_MAX_GATE_PIN) 1105 + break; 1106 + return -EINVAL; 1094 1107 } 1108 + *src = source; 1095 1109 return 0; 1096 1110 }; 1097 1111 1098 - static unsigned int ni_m_gate_to_generic_gate(unsigned int gate) 1112 + static int ni_m_gate_to_generic_gate(unsigned int gate, unsigned int *src) 1099 1113 { 1114 + unsigned int source; 1100 1115 unsigned int i; 1101 1116 1102 1117 switch (gate) { 1103 1118 case NI_M_TIMESTAMP_MUX_GATE_SEL: 1104 - return NI_GPCT_TIMESTAMP_MUX_GATE_SELECT; 1119 + source = NI_GPCT_TIMESTAMP_MUX_GATE_SELECT; 1120 + break; 1105 1121 case NI_M_AI_START2_GATE_SEL: 1106 - return NI_GPCT_AI_START2_GATE_SELECT; 1122 + source = NI_GPCT_AI_START2_GATE_SELECT; 1123 + break; 1107 1124 case NI_M_PXI_STAR_TRIGGER_GATE_SEL: 1108 - return NI_GPCT_PXI_STAR_TRIGGER_GATE_SELECT; 1125 + source = NI_GPCT_PXI_STAR_TRIGGER_GATE_SELECT; 1126 + break; 1109 1127 case NI_M_NEXT_OUT_GATE_SEL: 1110 - return NI_GPCT_NEXT_OUT_GATE_SELECT; 1128 + source = NI_GPCT_NEXT_OUT_GATE_SELECT; 1129 + break; 1111 1130 case NI_M_AI_START1_GATE_SEL: 1112 - return NI_GPCT_AI_START1_GATE_SELECT; 1131 + source = NI_GPCT_AI_START1_GATE_SELECT; 1132 + break; 1113 1133 case NI_M_NEXT_SRC_GATE_SEL: 1114 - return NI_GPCT_NEXT_SOURCE_GATE_SELECT; 1134 + source = NI_GPCT_NEXT_SOURCE_GATE_SELECT; 1135 + break; 1115 1136 case NI_M_ANALOG_TRIG_OUT_GATE_SEL: 1116 - return NI_GPCT_ANALOG_TRIGGER_OUT_GATE_SELECT; 1137 + source = NI_GPCT_ANALOG_TRIGGER_OUT_GATE_SELECT; 1138 + break; 1117 1139 case NI_M_LOGIC_LOW_GATE_SEL: 1118 - return NI_GPCT_LOGIC_LOW_GATE_SELECT; 1140 + source = NI_GPCT_LOGIC_LOW_GATE_SELECT; 1141 + break; 1119 1142 default: 1120 1143 for (i = 0; i <= NI_M_MAX_RTSI_CHAN; ++i) { 1121 - if (gate == NI_M_RTSI_GATE_SEL(i)) 1122 - return NI_GPCT_RTSI_GATE_SELECT(i); 1144 + if (gate == NI_M_RTSI_GATE_SEL(i)) { 1145 + source = NI_GPCT_RTSI_GATE_SELECT(i); 1146 + break; 1147 + } 1123 1148 } 1149 + if (i <= NI_M_MAX_RTSI_CHAN) 1150 + break; 1124 1151 for (i = 0; i <= NI_M_MAX_PFI_CHAN; ++i) { 1125 - if (gate == NI_M_PFI_GATE_SEL(i)) 1126 - return NI_GPCT_PFI_GATE_SELECT(i); 1152 + if (gate == NI_M_PFI_GATE_SEL(i)) { 1153 + source = NI_GPCT_PFI_GATE_SELECT(i); 1154 + break; 1155 + } 1127 1156 } 1128 - BUG(); 1129 - break; 1157 + if (i <= NI_M_MAX_PFI_CHAN) 1158 + break; 1159 + return -EINVAL; 1130 1160 } 1161 + *src = source; 1131 1162 return 0; 1132 1163 }; 1133 1164 1134 - static unsigned int ni_660x_gate2_to_generic_gate(unsigned int gate) 1165 + static int ni_660x_gate2_to_generic_gate(unsigned int gate, unsigned int *src) 1135 1166 { 1167 + unsigned int source; 1136 1168 unsigned int i; 1137 1169 1138 1170 switch (gate) { 1139 1171 case NI_660X_SRC_PIN_I_GATE2_SEL: 1140 - return NI_GPCT_SOURCE_PIN_i_GATE_SELECT; 1172 + source = NI_GPCT_SOURCE_PIN_i_GATE_SELECT; 1173 + break; 1141 1174 case NI_660X_UD_PIN_I_GATE2_SEL: 1142 - return NI_GPCT_UP_DOWN_PIN_i_GATE_SELECT; 1175 + source = NI_GPCT_UP_DOWN_PIN_i_GATE_SELECT; 1176 + break; 1143 1177 case NI_660X_NEXT_SRC_GATE2_SEL: 1144 - return NI_GPCT_NEXT_SOURCE_GATE_SELECT; 1178 + source = NI_GPCT_NEXT_SOURCE_GATE_SELECT; 1179 + break; 1145 1180 case NI_660X_NEXT_OUT_GATE2_SEL: 1146 - return NI_GPCT_NEXT_OUT_GATE_SELECT; 1181 + source = NI_GPCT_NEXT_OUT_GATE_SELECT; 1182 + break; 1147 1183 case NI_660X_SELECTED_GATE2_SEL: 1148 - return NI_GPCT_SELECTED_GATE_GATE_SELECT; 1184 + source = NI_GPCT_SELECTED_GATE_GATE_SELECT; 1185 + break; 1149 1186 case NI_660X_LOGIC_LOW_GATE2_SEL: 1150 - return NI_GPCT_LOGIC_LOW_GATE_SELECT; 1187 + source = NI_GPCT_LOGIC_LOW_GATE_SELECT; 1188 + break; 1151 1189 default: 1152 1190 for (i = 0; i <= NI_660X_MAX_RTSI_CHAN; ++i) { 1153 - if (gate == NI_660X_RTSI_GATE2_SEL(i)) 1154 - return NI_GPCT_RTSI_GATE_SELECT(i); 1191 + if (gate == NI_660X_RTSI_GATE2_SEL(i)) { 1192 + source = NI_GPCT_RTSI_GATE_SELECT(i); 1193 + break; 1194 + } 1155 1195 } 1196 + if (i <= NI_660X_MAX_RTSI_CHAN) 1197 + break; 1156 1198 for (i = 0; i <= NI_660X_MAX_UP_DOWN_PIN; ++i) { 1157 - if (gate == NI_660X_UD_PIN_GATE2_SEL(i)) 1158 - return NI_GPCT_UP_DOWN_PIN_GATE_SELECT(i); 1199 + if (gate == NI_660X_UD_PIN_GATE2_SEL(i)) { 1200 + source = NI_GPCT_UP_DOWN_PIN_GATE_SELECT(i); 1201 + break; 1202 + } 1159 1203 } 1160 - BUG(); 1161 - break; 1204 + if (i <= NI_660X_MAX_UP_DOWN_PIN) 1205 + break; 1206 + return -EINVAL; 1162 1207 } 1208 + *src = source; 1163 1209 return 0; 1164 1210 }; 1165 1211 1166 - static unsigned int ni_m_gate2_to_generic_gate(unsigned int gate) 1212 + static int ni_m_gate2_to_generic_gate(unsigned int gate, unsigned int *src) 1167 1213 { 1168 1214 /* 1169 1215 * FIXME: the second gate sources for the m series are undocumented, 1170 1216 * so we just return the raw bits for now. 1171 1217 */ 1172 - switch (gate) { 1173 - default: 1174 - return gate; 1175 - } 1218 + *src = gate; 1176 1219 return 0; 1177 1220 }; 1178 1221 ··· 1227 1184 unsigned int mode; 1228 1185 unsigned int reg; 1229 1186 unsigned int gate; 1187 + int ret; 1230 1188 1231 1189 mode = ni_tio_get_soft_copy(counter, NITIO_MODE_REG(cidx)); 1232 1190 if (((mode & GI_GATING_MODE_MASK) == GI_GATING_DISABLED) || ··· 1246 1202 case ni_gpct_variant_e_series: 1247 1203 case ni_gpct_variant_m_series: 1248 1204 default: 1249 - *gate_source = ni_m_gate_to_generic_gate(gate); 1205 + ret = ni_m_gate_to_generic_gate(gate, gate_source); 1250 1206 break; 1251 1207 case ni_gpct_variant_660x: 1252 - *gate_source = ni_660x_gate_to_generic_gate(gate); 1208 + ret = ni_660x_gate_to_generic_gate(gate, gate_source); 1253 1209 break; 1254 1210 } 1211 + if (ret) 1212 + return ret; 1255 1213 if (mode & GI_GATE_POL_INVERT) 1256 1214 *gate_source |= CR_INVERT; 1257 1215 if ((mode & GI_GATING_MODE_MASK) != GI_LEVEL_GATING) ··· 1267 1221 case ni_gpct_variant_e_series: 1268 1222 case ni_gpct_variant_m_series: 1269 1223 default: 1270 - *gate_source = ni_m_gate2_to_generic_gate(gate); 1224 + ret = ni_m_gate2_to_generic_gate(gate, gate_source); 1271 1225 break; 1272 1226 case ni_gpct_variant_660x: 1273 - *gate_source = ni_660x_gate2_to_generic_gate(gate); 1227 + ret = ni_660x_gate2_to_generic_gate(gate, gate_source); 1274 1228 break; 1275 1229 } 1230 + if (ret) 1231 + return ret; 1276 1232 if (counter_dev->regs[reg] & GI_GATE2_POL_INVERT) 1277 1233 *gate_source |= CR_INVERT; 1278 1234 /* second gate can't have edge/level mode set independently */