tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Blackfin arch: kgdb specific code
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
authored by
Sonic Zhang
and committed by
Bryan Wu
474f1a66
1c5d2265
+866
-1
+155
Documentation/blackfin/kgdb.txt
+155
Documentation/blackfin/kgdb.txt
···
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A Simple Guide to Configure KGDB
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Sonic Zhang <sonic.zhang@analog.com>
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Aug. 24th 2006
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This KGDB patch enables the kernel developer to do source level debugging on
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the kernel for the Blackfin architecture. The debugging works over either the
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ethernet interface or one of the uarts. Both software breakpoints and
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hardware breakpoints are supported in this version.
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http://docs.blackfin.uclinux.org/doku.php?id=kgdb
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2 known issues:
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1. This bug:
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http://blackfin.uclinux.org/tracker/index.php?func=detail&aid=544&group_id=18&atid=145
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The GDB client for Blackfin uClinux causes incorrect values of local
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variables to be displayed when the user breaks the running of kernel in GDB.
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2. Because of a hardware bug in Blackfin 533 v1.0.3:
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05000067 - Watchpoints (Hardware Breakpoints) are not supported
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Hardware breakpoints cannot be set properly.
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Debug over Ethernet:
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1. Compile and install the cross platform version of gdb for blackfin, which
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can be found at $(BINROOT)/bfin-elf-gdb.
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2. Apply this patch to the 2.6.x kernel. Select the menuconfig option under
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"Kernel hacking" -> "Kernel debugging" -> "KGDB: kernel debug with remote gdb".
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With this selected, option "Full Symbolic/Source Debugging support" and
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"Compile the kernel with frame pointers" are also selected.
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3. Select option "KGDB: connect over (Ethernet)". Add "kgdboe=@target-IP/,@host-IP/" to
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the option "Compiled-in Kernel Boot Parameter" under "Kernel hacking".
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4. Connect minicom to the serial port and boot the kernel image.
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5. Configure the IP "/> ifconfig eth0 target-IP"
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6. Start GDB client "bfin-elf-gdb vmlinux".
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7. Connect to the target "(gdb) target remote udp:target-IP:6443".
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8. Set software breakpoint "(gdb) break sys_open".
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9. Continue "(gdb) c".
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10. Run ls in the target console "/> ls".
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11. Breakpoint hits. "Breakpoint 1: sys_open(..."
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12. Display local variables and function paramters.
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(*) This operation gives wrong results, see known issue 1.
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13. Single stepping "(gdb) si".
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14. Remove breakpoint 1. "(gdb) del 1"
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15. Set hardware breakpoint "(gdb) hbreak sys_open".
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16. Continue "(gdb) c".
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17. Run ls in the target console "/> ls".
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18. Hardware breakpoint hits. "Breakpoint 1: sys_open(...".
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(*) This hardware breakpoint will not be hit, see known issue 2.
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19. Continue "(gdb) c".
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20. Interrupt the target in GDB "Ctrl+C".
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21. Detach from the target "(gdb) detach".
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22. Exit GDB "(gdb) quit".
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Debug over the UART:
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1. Compile and install the cross platform version of gdb for blackfin, which
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can be found at $(BINROOT)/bfin-elf-gdb.
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2. Apply this patch to the 2.6.x kernel. Select the menuconfig option under
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"Kernel hacking" -> "Kernel debugging" -> "KGDB: kernel debug with remote gdb".
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With this selected, option "Full Symbolic/Source Debugging support" and
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"Compile the kernel with frame pointers" are also selected.
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3. Select option "KGDB: connect over (UART)". Set "KGDB: UART port number" to be
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a different one from the console. Don't forget to change the mode of
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blackfin serial driver to PIO. Otherwise kgdb works incorrectly on UART.
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4. If you want connect to kgdb when the kernel boots, enable
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"KGDB: Wait for gdb connection early"
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5. Compile kernel.
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6. Connect minicom to the serial port of the console and boot the kernel image.
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7. Start GDB client "bfin-elf-gdb vmlinux".
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8. Set the baud rate in GDB "(gdb) set remotebaud 57600".
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9. Connect to the target on the second serial port "(gdb) target remote /dev/ttyS1".
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10. Set software breakpoint "(gdb) break sys_open".
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11. Continue "(gdb) c".
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12. Run ls in the target console "/> ls".
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13. A breakpoint is hit. "Breakpoint 1: sys_open(..."
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14. All other operations are the same as that in KGDB over Ethernet.
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Debug over the same UART as console:
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1. Compile and install the cross platform version of gdb for blackfin, which
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can be found at $(BINROOT)/bfin-elf-gdb.
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2. Apply this patch to the 2.6.x kernel. Select the menuconfig option under
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"Kernel hacking" -> "Kernel debugging" -> "KGDB: kernel debug with remote gdb".
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With this selected, option "Full Symbolic/Source Debugging support" and
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"Compile the kernel with frame pointers" are also selected.
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3. Select option "KGDB: connect over UART". Set "KGDB: UART port number" to console.
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Don't forget to change the mode of blackfin serial driver to PIO.
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Otherwise kgdb works incorrectly on UART.
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4. If you want connect to kgdb when the kernel boots, enable
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"KGDB: Wait for gdb connection early"
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5. Connect minicom to the serial port and boot the kernel image.
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6. (Optional) Ask target to wait for gdb connection by entering Ctrl+A. In minicom, you should enter Ctrl+A+A.
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7. Start GDB client "bfin-elf-gdb vmlinux".
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8. Set the baud rate in GDB "(gdb) set remotebaud 57600".
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9. Connect to the target "(gdb) target remote /dev/ttyS0".
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10. Set software breakpoint "(gdb) break sys_open".
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11. Continue "(gdb) c". Then enter Ctrl+C twice to stop GDB connection.
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12. Run ls in the target console "/> ls". Dummy string can be seen on the console.
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13. Then connect the gdb to target again. "(gdb) target remote /dev/ttyS0".
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Now you will find a breakpoint is hit. "Breakpoint 1: sys_open(..."
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14. All other operations are the same as that in KGDB over Ethernet. The only
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difference is that after continue command in GDB, please stop GDB
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connection by 2 "Ctrl+C"s and connect again after breakpoints are hit or
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Ctrl+A is entered.
+1
arch/blackfin/kernel/Makefile
+1
arch/blackfin/kernel/Makefile
+421
arch/blackfin/kernel/kgdb.c
+421
arch/blackfin/kernel/kgdb.c
···
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/*
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* File: arch/blackfin/kernel/kgdb.c
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* Based on:
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* Author: Sonic Zhang
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*
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* Created:
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* Description:
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*
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* Rev: $Id: kgdb_bfin_linux-2.6.x.patch 4934 2007-02-13 09:32:11Z sonicz $
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*
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* Modified:
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* Copyright 2005-2006 Analog Devices Inc.
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*
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see the file COPYING, or write
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* to the Free Software Foundation, Inc.,
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/string.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/smp.h>
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#include <linux/spinlock.h>
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#include <linux/delay.h>
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#include <linux/ptrace.h> /* for linux pt_regs struct */
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#include <linux/kgdb.h>
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#include <linux/console.h>
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#include <linux/init.h>
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#include <linux/debugger.h>
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#include <linux/errno.h>
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#include <linux/irq.h>
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#include <asm/system.h>
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#include <asm/traps.h>
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#include <asm/blackfin.h>
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/* Put the error code here just in case the user cares. */
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int gdb_bf533errcode;
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/* Likewise, the vector number here (since GDB only gets the signal
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number through the usual means, and that's not very specific). */
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int gdb_bf533vector = -1;
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#if KGDB_MAX_NO_CPUS != 8
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#error change the definition of slavecpulocks
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#endif
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void regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
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{
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gdb_regs[BFIN_R0] = regs->r0;
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gdb_regs[BFIN_R1] = regs->r1;
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gdb_regs[BFIN_R2] = regs->r2;
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gdb_regs[BFIN_R3] = regs->r3;
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gdb_regs[BFIN_R4] = regs->r4;
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gdb_regs[BFIN_R5] = regs->r5;
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gdb_regs[BFIN_R6] = regs->r6;
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gdb_regs[BFIN_R7] = regs->r7;
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gdb_regs[BFIN_P0] = regs->p0;
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gdb_regs[BFIN_P1] = regs->p1;
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gdb_regs[BFIN_P2] = regs->p2;
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gdb_regs[BFIN_P3] = regs->p3;
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gdb_regs[BFIN_P4] = regs->p4;
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gdb_regs[BFIN_P5] = regs->p5;
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gdb_regs[BFIN_SP] = regs->reserved;
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gdb_regs[BFIN_FP] = regs->fp;
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gdb_regs[BFIN_I0] = regs->i0;
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gdb_regs[BFIN_I1] = regs->i1;
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gdb_regs[BFIN_I2] = regs->i2;
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gdb_regs[BFIN_I3] = regs->i3;
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gdb_regs[BFIN_M0] = regs->m0;
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gdb_regs[BFIN_M1] = regs->m1;
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gdb_regs[BFIN_M2] = regs->m2;
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gdb_regs[BFIN_M3] = regs->m3;
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gdb_regs[BFIN_B0] = regs->b0;
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gdb_regs[BFIN_B1] = regs->b1;
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gdb_regs[BFIN_B2] = regs->b2;
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gdb_regs[BFIN_B3] = regs->b3;
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gdb_regs[BFIN_L0] = regs->l0;
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gdb_regs[BFIN_L1] = regs->l1;
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gdb_regs[BFIN_L2] = regs->l2;
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gdb_regs[BFIN_L3] = regs->l3;
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gdb_regs[BFIN_A0_DOT_X] = regs->a0x;
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gdb_regs[BFIN_A0_DOT_W] = regs->a0w;
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gdb_regs[BFIN_A1_DOT_X] = regs->a1x;
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gdb_regs[BFIN_A1_DOT_W] = regs->a1w;
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gdb_regs[BFIN_ASTAT] = regs->astat;
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gdb_regs[BFIN_RETS] = regs->rets;
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gdb_regs[BFIN_LC0] = regs->lc0;
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gdb_regs[BFIN_LT0] = regs->lt0;
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gdb_regs[BFIN_LB0] = regs->lb0;
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gdb_regs[BFIN_LC1] = regs->lc1;
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gdb_regs[BFIN_LT1] = regs->lt1;
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gdb_regs[BFIN_LB1] = regs->lb1;
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gdb_regs[BFIN_CYCLES] = 0;
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gdb_regs[BFIN_CYCLES2] = 0;
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gdb_regs[BFIN_USP] = regs->usp;
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gdb_regs[BFIN_SEQSTAT] = regs->seqstat;
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gdb_regs[BFIN_SYSCFG] = regs->syscfg;
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gdb_regs[BFIN_RETI] = regs->pc;
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gdb_regs[BFIN_RETX] = regs->retx;
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gdb_regs[BFIN_RETN] = regs->retn;
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gdb_regs[BFIN_RETE] = regs->rete;
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gdb_regs[BFIN_PC] = regs->pc;
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gdb_regs[BFIN_CC] = 0;
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gdb_regs[BFIN_EXTRA1] = 0;
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gdb_regs[BFIN_EXTRA2] = 0;
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gdb_regs[BFIN_EXTRA3] = 0;
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gdb_regs[BFIN_IPEND] = regs->ipend;
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}
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/*
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* Extracts ebp, esp and eip values understandable by gdb from the values
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* saved by switch_to.
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* thread.esp points to ebp. flags and ebp are pushed in switch_to hence esp
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* prior to entering switch_to is 8 greater then the value that is saved.
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* If switch_to changes, change following code appropriately.
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*/
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void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p)
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{
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gdb_regs[BFIN_SP] = p->thread.ksp;
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gdb_regs[BFIN_PC] = p->thread.pc;
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gdb_regs[BFIN_SEQSTAT] = p->thread.seqstat;
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}
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void gdb_regs_to_regs(unsigned long *gdb_regs, struct pt_regs *regs)
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{
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regs->r0 = gdb_regs[BFIN_R0];
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regs->r1 = gdb_regs[BFIN_R1];
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regs->r2 = gdb_regs[BFIN_R2];
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regs->r3 = gdb_regs[BFIN_R3];
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regs->r4 = gdb_regs[BFIN_R4];
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regs->r5 = gdb_regs[BFIN_R5];
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regs->r6 = gdb_regs[BFIN_R6];
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regs->r7 = gdb_regs[BFIN_R7];
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regs->p0 = gdb_regs[BFIN_P0];
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regs->p1 = gdb_regs[BFIN_P1];
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regs->p2 = gdb_regs[BFIN_P2];
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regs->p3 = gdb_regs[BFIN_P3];
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regs->p4 = gdb_regs[BFIN_P4];
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regs->p5 = gdb_regs[BFIN_P5];
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regs->fp = gdb_regs[BFIN_FP];
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regs->i0 = gdb_regs[BFIN_I0];
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regs->i1 = gdb_regs[BFIN_I1];
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regs->i2 = gdb_regs[BFIN_I2];
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regs->i3 = gdb_regs[BFIN_I3];
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regs->m0 = gdb_regs[BFIN_M0];
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regs->m1 = gdb_regs[BFIN_M1];
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regs->m2 = gdb_regs[BFIN_M2];
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regs->m3 = gdb_regs[BFIN_M3];
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regs->b0 = gdb_regs[BFIN_B0];
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regs->b1 = gdb_regs[BFIN_B1];
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regs->b2 = gdb_regs[BFIN_B2];
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regs->b3 = gdb_regs[BFIN_B3];
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regs->l0 = gdb_regs[BFIN_L0];
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regs->l1 = gdb_regs[BFIN_L1];
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regs->l2 = gdb_regs[BFIN_L2];
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regs->l3 = gdb_regs[BFIN_L3];
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regs->a0x = gdb_regs[BFIN_A0_DOT_X];
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regs->a0w = gdb_regs[BFIN_A0_DOT_W];
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regs->a1x = gdb_regs[BFIN_A1_DOT_X];
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regs->a1w = gdb_regs[BFIN_A1_DOT_W];
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regs->rets = gdb_regs[BFIN_RETS];
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regs->lc0 = gdb_regs[BFIN_LC0];
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regs->lt0 = gdb_regs[BFIN_LT0];
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regs->lb0 = gdb_regs[BFIN_LB0];
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regs->lc1 = gdb_regs[BFIN_LC1];
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regs->lt1 = gdb_regs[BFIN_LT1];
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regs->lb1 = gdb_regs[BFIN_LB1];
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regs->usp = gdb_regs[BFIN_USP];
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regs->syscfg = gdb_regs[BFIN_SYSCFG];
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regs->retx = gdb_regs[BFIN_PC];
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regs->retn = gdb_regs[BFIN_RETN];
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regs->rete = gdb_regs[BFIN_RETE];
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regs->pc = gdb_regs[BFIN_PC];
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+
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#if 0 /* can't change these */
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regs->astat = gdb_regs[BFIN_ASTAT];
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regs->seqstat = gdb_regs[BFIN_SEQSTAT];
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regs->ipend = gdb_regs[BFIN_IPEND];
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#endif
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}
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+
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struct hw_breakpoint {
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unsigned int occupied:1;
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unsigned int skip:1;
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unsigned int enabled:1;
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unsigned int type:1;
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unsigned int dataacc:2;
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unsigned short count;
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unsigned int addr;
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} breakinfo[HW_BREAKPOINT_NUM];
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+
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int kgdb_arch_init(void)
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{
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kgdb_remove_all_hw_break();
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return 0;
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}
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int kgdb_set_hw_break(unsigned long addr)
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{
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int breakno;
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for (breakno = 0; breakno < HW_BREAKPOINT_NUM; breakno++)
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if (!breakinfo[breakno].occupied) {
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breakinfo[breakno].occupied = 1;
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breakinfo[breakno].enabled = 1;
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breakinfo[breakno].type = 1;
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breakinfo[breakno].addr = addr;
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return 0;
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}
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return -ENOSPC;
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}
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+
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int kgdb_remove_hw_break(unsigned long addr)
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{
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int breakno;
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for (breakno = 0; breakno < HW_BREAKPOINT_NUM; breakno++)
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if (breakinfo[breakno].addr == addr)
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memset(&(breakinfo[breakno]), 0, sizeof(struct hw_breakpoint));
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+
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return 0;
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}
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+
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void kgdb_remove_all_hw_break(void)
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{
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memset(breakinfo, 0, sizeof(struct hw_breakpoint)*8);
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}
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+
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/*
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void kgdb_show_info(void)
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{
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printk(KERN_DEBUG "hwd: wpia0=0x%x, wpiacnt0=%d, wpiactl=0x%x, wpstat=0x%x\n",
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bfin_read_WPIA0(), bfin_read_WPIACNT0(),
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bfin_read_WPIACTL(), bfin_read_WPSTAT());
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}
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*/
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+
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void kgdb_correct_hw_break(void)
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{
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int breakno;
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int correctit;
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uint32_t wpdactl = bfin_read_WPDACTL();
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+
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correctit = 0;
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for (breakno = 0; breakno < HW_BREAKPOINT_NUM; breakno++) {
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if (breakinfo[breakno].type == 1) {
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switch (breakno) {
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case 0:
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if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN0)) {
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correctit = 1;
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wpdactl &= ~(WPIREN01|EMUSW0);
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wpdactl |= WPIAEN0|WPICNTEN0;
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bfin_write_WPIA0(breakinfo[breakno].addr);
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bfin_write_WPIACNT0(breakinfo[breakno].skip);
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} else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN0)) {
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correctit = 1;
268
+
wpdactl &= ~WPIAEN0;
269
+
}
270
+
break;
271
+
272
+
case 1:
273
+
if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN1)) {
274
+
correctit = 1;
275
+
wpdactl &= ~(WPIREN01|EMUSW1);
276
+
wpdactl |= WPIAEN1|WPICNTEN1;
277
+
bfin_write_WPIA1(breakinfo[breakno].addr);
278
+
bfin_write_WPIACNT1(breakinfo[breakno].skip);
279
+
} else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN1)) {
280
+
correctit = 1;
281
+
wpdactl &= ~WPIAEN1;
282
+
}
283
+
break;
284
+
285
+
case 2:
286
+
if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN2)) {
287
+
correctit = 1;
288
+
wpdactl &= ~(WPIREN23|EMUSW2);
289
+
wpdactl |= WPIAEN2|WPICNTEN2;
290
+
bfin_write_WPIA2(breakinfo[breakno].addr);
291
+
bfin_write_WPIACNT2(breakinfo[breakno].skip);
292
+
} else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN2)) {
293
+
correctit = 1;
294
+
wpdactl &= ~WPIAEN2;
295
+
}
296
+
break;
297
+
298
+
case 3:
299
+
if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN3)) {
300
+
correctit = 1;
301
+
wpdactl &= ~(WPIREN23|EMUSW3);
302
+
wpdactl |= WPIAEN3|WPICNTEN3;
303
+
bfin_write_WPIA3(breakinfo[breakno].addr);
304
+
bfin_write_WPIACNT3(breakinfo[breakno].skip);
305
+
} else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN3)) {
306
+
correctit = 1;
307
+
wpdactl &= ~WPIAEN3;
308
+
}
309
+
break;
310
+
case 4:
311
+
if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN4)) {
312
+
correctit = 1;
313
+
wpdactl &= ~(WPIREN45|EMUSW4);
314
+
wpdactl |= WPIAEN4|WPICNTEN4;
315
+
bfin_write_WPIA4(breakinfo[breakno].addr);
316
+
bfin_write_WPIACNT4(breakinfo[breakno].skip);
317
+
} else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN4)) {
318
+
correctit = 1;
319
+
wpdactl &= ~WPIAEN4;
320
+
}
321
+
break;
322
+
case 5:
323
+
if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN5)) {
324
+
correctit = 1;
325
+
wpdactl &= ~(WPIREN45|EMUSW5);
326
+
wpdactl |= WPIAEN5|WPICNTEN5;
327
+
bfin_write_WPIA5(breakinfo[breakno].addr);
328
+
bfin_write_WPIACNT5(breakinfo[breakno].skip);
329
+
} else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN5)) {
330
+
correctit = 1;
331
+
wpdactl &= ~WPIAEN5;
332
+
}
333
+
break;
334
+
}
335
+
}
336
+
}
337
+
if (correctit) {
338
+
wpdactl &= ~WPAND;
339
+
wpdactl |= WPPWR;
340
+
/*printk("correct_hw_break: wpdactl=0x%x\n", wpdactl);*/
341
+
bfin_write_WPDACTL(wpdactl);
342
+
CSYNC();
343
+
/*kgdb_show_info();*/
344
+
}
345
+
}
346
+
347
+
void kgdb_disable_hw_debug(struct pt_regs *regs)
348
+
{
349
+
/* Disable hardware debugging while we are in kgdb */
350
+
bfin_write_WPIACTL(bfin_read_WPIACTL() & ~0x1);
351
+
CSYNC();
352
+
}
353
+
354
+
void kgdb_post_master_code(struct pt_regs *regs, int eVector, int err_code)
355
+
{
356
+
/* Master processor is completely in the debugger */
357
+
gdb_bf533vector = eVector;
358
+
gdb_bf533errcode = err_code;
359
+
}
360
+
361
+
int kgdb_arch_handle_exception(int exceptionVector, int signo,
362
+
int err_code, char *remcom_in_buffer,
363
+
char *remcom_out_buffer,
364
+
struct pt_regs *linux_regs)
365
+
{
366
+
long addr;
367
+
long breakno;
368
+
char *ptr;
369
+
int newPC;
370
+
int wp_status;
371
+
372
+
switch (remcom_in_buffer[0]) {
373
+
case 'c':
374
+
case 's':
375
+
if (kgdb_contthread && kgdb_contthread != current) {
376
+
strcpy(remcom_out_buffer, "E00");
377
+
break;
378
+
}
379
+
380
+
kgdb_contthread = NULL;
381
+
382
+
/* try to read optional parameter, pc unchanged if no parm */
383
+
ptr = &remcom_in_buffer[1];
384
+
if (kgdb_hex2long(&ptr, &addr)) {
385
+
linux_regs->retx = addr;
386
+
}
387
+
newPC = linux_regs->retx;
388
+
389
+
/* clear the trace bit */
390
+
linux_regs->syscfg &= 0xfffffffe;
391
+
392
+
/* set the trace bit if we're stepping */
393
+
if (remcom_in_buffer[0] == 's') {
394
+
linux_regs->syscfg |= 0x1;
395
+
debugger_step = 1;
396
+
}
397
+
398
+
wp_status = bfin_read_WPSTAT();
399
+
CSYNC();
400
+
401
+
if (exceptionVector == VEC_WATCH) {
402
+
for (breakno = 0; breakno < 6; ++breakno) {
403
+
if (wp_status & (1 << breakno)) {
404
+
breakinfo->skip = 1;
405
+
break;
406
+
}
407
+
}
408
+
}
409
+
kgdb_correct_hw_break();
410
+
411
+
bfin_write_WPSTAT(0);
412
+
413
+
return 0;
414
+
} /* switch */
415
+
return -1; /* this means that we do not want to exit from the handler */
416
+
}
417
+
418
+
struct kgdb_arch arch_kgdb_ops = {
419
+
.gdb_bpt_instr = {0xa1},
420
+
.flags = KGDB_HW_BREAKPOINT,
421
+
};
+1
-1
drivers/serial/Kconfig
+1
-1
drivers/serial/Kconfig
+105
drivers/serial/bfin_5xx.c
+105
drivers/serial/bfin_5xx.c
···
41
41
#include <linux/tty_flip.h>
42
42
#include <linux/serial_core.h>
43
43
44
+
#ifdef CONFIG_KGDB_UART
45
+
#include <linux/kgdb.h>
46
+
#include <asm/irq_regs.h>
47
+
#endif
48
+
44
49
#include <asm/gpio.h>
45
50
#include <asm/mach/bfin_serial_5xx.h>
46
51
···
124
119
unsigned short ier;
125
120
126
121
ier = UART_GET_IER(uart);
122
+
#ifdef CONFIG_KGDB_UART
123
+
if (uart->port.line != CONFIG_KGDB_UART_PORT)
124
+
#endif
127
125
ier &= ~ERBFI;
128
126
UART_PUT_IER(uart, ier);
129
127
}
···
137
129
static void bfin_serial_enable_ms(struct uart_port *port)
138
130
{
139
131
}
132
+
133
+
#ifdef CONFIG_KGDB_UART
134
+
static int kgdb_entry_state;
135
+
136
+
void kgdb_put_debug_char(int chr)
137
+
{
138
+
struct bfin_serial_port *uart;
139
+
140
+
if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
141
+
uart = &bfin_serial_ports[0];
142
+
else
143
+
uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
144
+
145
+
while (!(UART_GET_LSR(uart) & THRE)) {
146
+
__builtin_bfin_ssync();
147
+
}
148
+
UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
149
+
__builtin_bfin_ssync();
150
+
UART_PUT_CHAR(uart, (unsigned char)chr);
151
+
__builtin_bfin_ssync();
152
+
}
153
+
154
+
int kgdb_get_debug_char(void)
155
+
{
156
+
struct bfin_serial_port *uart;
157
+
unsigned char chr;
158
+
159
+
if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
160
+
uart = &bfin_serial_ports[0];
161
+
else
162
+
uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
163
+
164
+
while(!(UART_GET_LSR(uart) & DR)) {
165
+
__builtin_bfin_ssync();
166
+
}
167
+
UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
168
+
__builtin_bfin_ssync();
169
+
chr = UART_GET_CHAR(uart);
170
+
__builtin_bfin_ssync();
171
+
172
+
return chr;
173
+
}
174
+
#endif
140
175
141
176
#ifdef CONFIG_SERIAL_BFIN_PIO
142
177
static void local_put_char(struct bfin_serial_port *uart, char ch)
···
203
152
{
204
153
struct tty_struct *tty = uart->port.info->tty;
205
154
unsigned int status, ch, flg;
155
+
#ifdef CONFIG_KGDB_UART
156
+
struct pt_regs *regs = get_irq_regs();
157
+
#endif
206
158
#ifdef BF533_FAMILY
207
159
static int in_break = 0;
208
160
#endif
···
214
160
ch = UART_GET_CHAR(uart);
215
161
uart->port.icount.rx++;
216
162
163
+
#ifdef CONFIG_KGDB_UART
164
+
if (uart->port.line == CONFIG_KGDB_UART_PORT) {
165
+
if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
166
+
kgdb_breakkey_pressed(regs);
167
+
return;
168
+
} else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
169
+
kgdb_entry_state = 1;
170
+
} else if (kgdb_entry_state == 1 && ch == 'q') {
171
+
kgdb_entry_state = 0;
172
+
kgdb_breakkey_pressed(regs);
173
+
return;
174
+
} else if (ch == 0x3) {/* Ctrl + C */
175
+
kgdb_entry_state = 0;
176
+
kgdb_breakkey_pressed(regs);
177
+
return;
178
+
} else {
179
+
kgdb_entry_state = 0;
180
+
}
181
+
}
182
+
#endif
183
+
217
184
#ifdef BF533_FAMILY
218
185
/* The BF533 family of processors have a nice misbehavior where
219
186
* they continuously generate characters for a "single" break.
···
646
571
uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
647
572
add_timer(&(uart->rx_dma_timer));
648
573
#else
574
+
# ifdef CONFIG_KGDB_UART
575
+
if (uart->port.line != CONFIG_KGDB_UART_PORT && request_irq
576
+
# else
649
577
if (request_irq
578
+
# endif
650
579
(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
651
580
"BFIN_UART_RX", uart)) {
652
581
printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
···
680
601
free_dma(uart->rx_dma_channel);
681
602
del_timer(&(uart->rx_dma_timer));
682
603
#else
604
+
#ifdef CONFIG_KGDB_UART
605
+
if (uart->port.line != CONFIG_KGDB_UART_PORT)
606
+
#endif
683
607
free_irq(uart->port.irq, uart);
684
608
free_irq(uart->port.irq+1, uart);
685
609
#endif
···
1013
931
{
1014
932
bfin_serial_init_ports();
1015
933
register_console(&bfin_serial_console);
934
+
#ifdef CONFIG_KGDB_UART
935
+
kgdb_entry_state = 0;
936
+
init_kgdb_uart();
937
+
#endif
1016
938
return 0;
1017
939
}
1018
940
console_initcall(bfin_serial_rs_console_init);
···
1109
1023
static int __init bfin_serial_init(void)
1110
1024
{
1111
1025
int ret;
1026
+
#ifdef CONFIG_KGDB_UART
1027
+
struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
1028
+
struct termios t;
1029
+
#endif
1112
1030
1113
1031
pr_info("Serial: Blackfin serial driver\n");
1114
1032
···
1126
1036
uart_unregister_driver(&bfin_serial_reg);
1127
1037
}
1128
1038
}
1039
+
#ifdef CONFIG_KGDB_UART
1040
+
if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
1041
+
request_irq(uart->port.irq, bfin_serial_int,
1042
+
IRQF_DISABLED, "BFIN_UART_RX", uart);
1043
+
pr_info("Request irq for kgdb uart port\n");
1044
+
UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
1045
+
__builtin_bfin_ssync();
1046
+
t.c_cflag = CS8|B57600;
1047
+
t.c_iflag = 0;
1048
+
t.c_oflag = 0;
1049
+
t.c_lflag = ICANON;
1050
+
t.c_line = CONFIG_KGDB_UART_PORT;
1051
+
bfin_serial_set_termios(&uart->port, &t, &t);
1052
+
}
1053
+
#endif
1129
1054
return ret;
1130
1055
}
1131
1056
+183
include/asm-blackfin/kgdb.h
+183
include/asm-blackfin/kgdb.h
···
1
+
/*
2
+
* File: include/asm-blackfin/kgdb.h
3
+
* Based on:
4
+
* Author: Sonic Zhang
5
+
*
6
+
* Created:
7
+
* Description:
8
+
*
9
+
* Rev: $Id: kgdb_bfin_linux-2.6.x.patch 4934 2007-02-13 09:32:11Z sonicz $
10
+
*
11
+
* Modified:
12
+
* Copyright 2005-2006 Analog Devices Inc.
13
+
*
14
+
* Bugs: Enter bugs at http://blackfin.uclinux.org/
15
+
*
16
+
* This program is free software; you can redistribute it and/or modify
17
+
* it under the terms of the GNU General Public License as published by
18
+
* the Free Software Foundation; either version 2 of the License, or
19
+
* (at your option) any later version.
20
+
*
21
+
* This program is distributed in the hope that it will be useful,
22
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
23
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24
+
* GNU General Public License for more details.
25
+
*
26
+
* You should have received a copy of the GNU General Public License
27
+
* along with this program; if not, see the file COPYING, or write
28
+
* to the Free Software Foundation, Inc.,
29
+
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
30
+
*/
31
+
32
+
#ifndef __ASM_BLACKFIN_KGDB_H__
33
+
#define __ASM_BLACKFIN_KGDB_H__
34
+
35
+
#include <linux/ptrace.h>
36
+
37
+
/* gdb locks */
38
+
#define KGDB_MAX_NO_CPUS 8
39
+
40
+
/************************************************************************/
41
+
/* BUFMAX defines the maximum number of characters in inbound/outbound buffers*/
42
+
/* at least NUMREGBYTES*2 are needed for register packets */
43
+
/* Longer buffer is needed to list all threads */
44
+
#define BUFMAX 2048
45
+
46
+
/*
47
+
* Note that this register image is different from
48
+
* the register image that Linux produces at interrupt time.
49
+
*
50
+
* Linux's register image is defined by struct pt_regs in ptrace.h.
51
+
*/
52
+
enum regnames {
53
+
/* Core Registers */
54
+
BFIN_R0 = 0,
55
+
BFIN_R1,
56
+
BFIN_R2,
57
+
BFIN_R3,
58
+
BFIN_R4,
59
+
BFIN_R5,
60
+
BFIN_R6,
61
+
BFIN_R7,
62
+
BFIN_P0,
63
+
BFIN_P1,
64
+
BFIN_P2,
65
+
BFIN_P3,
66
+
BFIN_P4,
67
+
BFIN_P5,
68
+
BFIN_SP,
69
+
BFIN_FP,
70
+
BFIN_I0,
71
+
BFIN_I1,
72
+
BFIN_I2,
73
+
BFIN_I3,
74
+
BFIN_M0,
75
+
BFIN_M1,
76
+
BFIN_M2,
77
+
BFIN_M3,
78
+
BFIN_B0,
79
+
BFIN_B1,
80
+
BFIN_B2,
81
+
BFIN_B3,
82
+
BFIN_L0,
83
+
BFIN_L1,
84
+
BFIN_L2,
85
+
BFIN_L3,
86
+
BFIN_A0_DOT_X,
87
+
BFIN_A0_DOT_W,
88
+
BFIN_A1_DOT_X,
89
+
BFIN_A1_DOT_W,
90
+
BFIN_ASTAT,
91
+
BFIN_RETS,
92
+
BFIN_LC0,
93
+
BFIN_LT0,
94
+
BFIN_LB0,
95
+
BFIN_LC1,
96
+
BFIN_LT1,
97
+
BFIN_LB1,
98
+
BFIN_CYCLES,
99
+
BFIN_CYCLES2,
100
+
BFIN_USP,
101
+
BFIN_SEQSTAT,
102
+
BFIN_SYSCFG,
103
+
BFIN_RETI,
104
+
BFIN_RETX,
105
+
BFIN_RETN,
106
+
BFIN_RETE,
107
+
108
+
/* Pseudo Registers */
109
+
BFIN_PC,
110
+
BFIN_CC,
111
+
BFIN_EXTRA1, /* Address of .text section. */
112
+
BFIN_EXTRA2, /* Address of .data section. */
113
+
BFIN_EXTRA3, /* Address of .bss section. */
114
+
BFIN_FDPIC_EXEC,
115
+
BFIN_FDPIC_INTERP,
116
+
117
+
/* MMRs */
118
+
BFIN_IPEND,
119
+
120
+
/* LAST ENTRY SHOULD NOT BE CHANGED. */
121
+
BFIN_NUM_REGS /* The number of all registers. */
122
+
};
123
+
124
+
/* Number of bytes of registers. */
125
+
#define NUMREGBYTES BFIN_NUM_REGS*4
126
+
127
+
#define BREAKPOINT() asm(" EXCPT 2;");
128
+
#define BREAK_INSTR_SIZE 2
129
+
#define HW_BREAKPOINT_NUM 6
130
+
131
+
/* Instruction watchpoint address control register bits mask */
132
+
#define WPPWR 0x1
133
+
#define WPIREN01 0x2
134
+
#define WPIRINV01 0x4
135
+
#define WPIAEN0 0x8
136
+
#define WPIAEN1 0x10
137
+
#define WPICNTEN0 0x20
138
+
#define WPICNTEN1 0x40
139
+
#define EMUSW0 0x80
140
+
#define EMUSW1 0x100
141
+
#define WPIREN23 0x200
142
+
#define WPIRINV23 0x400
143
+
#define WPIAEN2 0x800
144
+
#define WPIAEN3 0x1000
145
+
#define WPICNTEN2 0x2000
146
+
#define WPICNTEN3 0x4000
147
+
#define EMUSW2 0x8000
148
+
#define EMUSW3 0x10000
149
+
#define WPIREN45 0x20000
150
+
#define WPIRINV45 0x40000
151
+
#define WPIAEN4 0x80000
152
+
#define WPIAEN5 0x100000
153
+
#define WPICNTEN4 0x200000
154
+
#define WPICNTEN5 0x400000
155
+
#define EMUSW4 0x800000
156
+
#define EMUSW5 0x1000000
157
+
#define WPAND 0x2000000
158
+
159
+
/* Data watchpoint address control register bits mask */
160
+
#define WPDREN01 0x1
161
+
#define WPDRINV01 0x2
162
+
#define WPDAEN0 0x4
163
+
#define WPDAEN1 0x8
164
+
#define WPDCNTEN0 0x10
165
+
#define WPDCNTEN1 0x20
166
+
#define WPDSRC0 0xc0
167
+
#define WPDACC0 0x300
168
+
#define WPDSRC1 0xc00
169
+
#define WPDACC1 0x3000
170
+
171
+
/* Watchpoint status register bits mask */
172
+
#define STATIA0 0x1
173
+
#define STATIA1 0x2
174
+
#define STATIA2 0x4
175
+
#define STATIA3 0x8
176
+
#define STATIA4 0x10
177
+
#define STATIA5 0x20
178
+
#define STATDA0 0x40
179
+
#define STATDA1 0x80
180
+
181
+
extern void kgdb_print(const char *fmt, ...);
182
+
183
+
#endif