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ARM: dts: stm32: Add sdio pins definition for stm32f7
Add sdio pins definition for the 2 sdio instances embeds in stm32f746.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
authored by
Patrice Chotard
and committed by
Alexandre Torgue
46ea3e80
1fe23843
+62
+62
arch/arm/boot/dts/stm32f7-pinctrl.dtsi
+62
arch/arm/boot/dts/stm32f7-pinctrl.dtsi
···
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slew-rate = <2>;
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};
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};
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+
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sdio_pins_a: sdio_pins_a@0 {
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pins {
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pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1 D0 */
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<STM32_PINMUX('C', 9, AF12)>, /* SDMMC1 D1 */
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<STM32_PINMUX('C', 10, AF12)>, /* SDMMC1 D2 */
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<STM32_PINMUX('C', 11, AF12)>, /* SDMMC1 D3 */
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<STM32_PINMUX('C', 12, AF12)>, /* SDMMC1 CLK */
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<STM32_PINMUX('D', 2, AF12)>; /* SDMMC1 CMD */
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drive-push-pull;
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slew-rate = <2>;
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};
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};
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sdio_pins_od_a: sdio_pins_od_a@0 {
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pins1 {
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pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1 D0 */
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<STM32_PINMUX('C', 9, AF12)>, /* SDMMC1 D1 */
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<STM32_PINMUX('C', 10, AF12)>, /* SDMMC1 D2 */
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<STM32_PINMUX('C', 11, AF12)>, /* SDMMC1 D3 */
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<STM32_PINMUX('C', 12, AF12)>; /* SDMMC1 CLK */
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drive-push-pull;
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slew-rate = <2>;
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};
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pins2 {
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pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1 CMD */
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drive-open-drain;
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slew-rate = <2>;
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};
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};
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sdio_pins_b: sdio_pins_b@0 {
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pins {
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pinmux = <STM32_PINMUX('G', 9, AF11)>, /* SDMMC2 D0 */
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<STM32_PINMUX('G', 10, AF11)>, /* SDMMC2 D1 */
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<STM32_PINMUX('B', 3, AF10)>, /* SDMMC2 D2 */
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<STM32_PINMUX('B', 4, AF10)>, /* SDMMC2 D3 */
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<STM32_PINMUX('D', 6, AF11)>, /* SDMMC2 CLK */
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<STM32_PINMUX('D', 7, AF11)>; /* SDMMC2 CMD */
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drive-push-pull;
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slew-rate = <2>;
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};
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};
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sdio_pins_od_b: sdio_pins_od_b@0 {
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pins1 {
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pinmux = <STM32_PINMUX('G', 9, AF11)>, /* SDMMC2 D0 */
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<STM32_PINMUX('G', 10, AF11)>, /* SDMMC2 D1 */
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<STM32_PINMUX('B', 3, AF10)>, /* SDMMC2 D2 */
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<STM32_PINMUX('B', 4, AF10)>, /* SDMMC2 D3 */
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<STM32_PINMUX('D', 6, AF11)>; /* SDMMC2 CLK */
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drive-push-pull;
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slew-rate = <2>;
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};
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pins2 {
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pinmux = <STM32_PINMUX('D', 7, AF11)>; /* SDMMC2 CMD */
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drive-open-drain;
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slew-rate = <2>;
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};
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};
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};
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};
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};