MIPS: SGI-IP28: disable use of ll/sc in kernel

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

SGI-IP28 systems only use broken R10k rev 2.5 CPUs, which could lock
up, if ll/sc sequences are issued in certain order. Since those systems
are all non-SMP, we can disable ll/sc usage in kernel.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

Thomas Bogendoerfer 5 years ago 46dd40aa 43fab085

+1 -1

1 changed file

expand all

arch

mips

include

asm

mach-ip28

cpu-feature-overrides.h

+1 -1

arch/mips/include/asm/mach-ip28/cpu-feature-overrides.h

··· 25 25 #define cpu_has_mcheck 0 26 26 #define cpu_has_ejtag 0 27 27 28 - #define cpu_has_llsc 1 28 + #define cpu_has_llsc 0 29 29 #define cpu_has_vtag_icache 0 30 30 #define cpu_has_dc_aliases 0 /* see probe_pcache() */ 31 31 #define cpu_has_ic_fills_f_dc 0