Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: mx25: Add CLKO support

CLKO support is a clock output on mx25 which can output many of the internal
clock sources. It is useful for debugging purpose or also for driving the
audio codec for example.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

authored by

Fabio Estevam and committed by
Shawn Guo
46ae4249 d559cecc

+17 -1
+3
Documentation/devicetree/bindings/clock/imx25-clock.txt
··· 139 139 uart5_ipg 124 140 140 reserved 125 141 141 wdt_ipg 126 142 + cko_div 127 143 + cko_sel 128 144 + cko 129 142 145 143 146 Examples: 144 147
+14 -1
arch/arm/mach-imx/clk-imx25.c
··· 62 62 63 63 static const char *cpu_sel_clks[] = { "mpll", "mpll_cpu_3_4", }; 64 64 static const char *per_sel_clks[] = { "ahb", "upll", }; 65 + static const char *cko_sel_clks[] = { "dummy", "osc", "cpu", "ahb", 66 + "ipg", "dummy", "dummy", "dummy", 67 + "dummy", "dummy", "per0", "per2", 68 + "per13", "per14", "usbotg_ahb", "dummy",}; 65 69 66 70 enum mx25_clks { 67 71 dummy, osc, mpll, upll, mpll_cpu_3_4, cpu_sel, cpu, ahb, usb_div, ipg, ··· 86 82 pwm2_ipg, pwm3_ipg, pwm4_ipg, rngb_ipg, reserved16, scc_ipg, sdma_ipg, 87 83 sim1_ipg, sim2_ipg, slcdc_ipg, spba_ipg, ssi1_ipg, ssi2_ipg, tsc_ipg, 88 84 uart1_ipg, uart2_ipg, uart3_ipg, uart4_ipg, uart5_ipg, reserved17, 89 - wdt_ipg, clk_max 85 + wdt_ipg, cko_div, cko_sel, cko, clk_max 90 86 }; 91 87 92 88 static struct clk *clk[clk_max]; ··· 121 117 clk[per13_sel] = imx_clk_mux("per13_sel", ccm(CCM_MCR), 13, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); 122 118 clk[per14_sel] = imx_clk_mux("per14_sel", ccm(CCM_MCR), 14, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); 123 119 clk[per15_sel] = imx_clk_mux("per15_sel", ccm(CCM_MCR), 15, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)); 120 + clk[cko_div] = imx_clk_divider("cko_div", "cko_sel", ccm(CCM_MCR), 24, 6); 121 + clk[cko_sel] = imx_clk_mux("cko_sel", ccm(CCM_MCR), 20, 4, cko_sel_clks, ARRAY_SIZE(cko_sel_clks)); 122 + clk[cko] = imx_clk_gate("cko", "cko_div", ccm(CCM_MCR), 30); 124 123 clk[per0] = imx_clk_divider("per0", "per0_sel", ccm(CCM_PCDR0), 0, 6); 125 124 clk[per1] = imx_clk_divider("per1", "per1_sel", ccm(CCM_PCDR0), 8, 6); 126 125 clk[per2] = imx_clk_divider("per2", "per2_sel", ccm(CCM_PCDR0), 16, 6); ··· 236 229 237 230 clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0"); 238 231 clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0"); 232 + 233 + /* 234 + * Let's initially set up CLKO parent as ipg, since this configuration 235 + * is used on some imx25 board designs to clock the audio codec. 236 + */ 237 + clk_set_parent(clk[cko_sel], clk[ipg]); 239 238 240 239 return 0; 241 240 }