tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'kvm-fixes-6.15-rc4' into HEAD
* Single fix for broken usage of 'multi-MIDR' infrastructure in PI
code, adding an open-coded erratum check for Cavium ThunderX
* Bugfixes from a planned posted interrupt rework
* Do not use kvm_rip_read() unconditionally to cater for guests
with inaccessible register state.
+4718
-2303
+1
Documentation/admin-guide/hw-vuln/index.rst
+1
Documentation/admin-guide/hw-vuln/index.rst
+268
Documentation/admin-guide/hw-vuln/rsb.rst
+268
Documentation/admin-guide/hw-vuln/rsb.rst
···
1
+
.. SPDX-License-Identifier: GPL-2.0
2
+
3
+
=======================
4
+
RSB-related mitigations
5
+
=======================
6
+
7
+
.. warning::
8
+
Please keep this document up-to-date, otherwise you will be
9
+
volunteered to update it and convert it to a very long comment in
10
+
bugs.c!
11
+
12
+
Since 2018 there have been many Spectre CVEs related to the Return Stack
13
+
Buffer (RSB) (sometimes referred to as the Return Address Stack (RAS) or
14
+
Return Address Predictor (RAP) on AMD).
15
+
16
+
Information about these CVEs and how to mitigate them is scattered
17
+
amongst a myriad of microarchitecture-specific documents.
18
+
19
+
This document attempts to consolidate all the relevant information in
20
+
once place and clarify the reasoning behind the current RSB-related
21
+
mitigations. It's meant to be as concise as possible, focused only on
22
+
the current kernel mitigations: what are the RSB-related attack vectors
23
+
and how are they currently being mitigated?
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+
25
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It's *not* meant to describe how the RSB mechanism operates or how the
26
+
exploits work. More details about those can be found in the references
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below.
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+
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Rather, this is basically a glorified comment, but too long to actually
30
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be one. So when the next CVE comes along, a kernel developer can
31
+
quickly refer to this as a refresher to see what we're actually doing
32
+
and why.
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+
34
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At a high level, there are two classes of RSB attacks: RSB poisoning
35
+
(Intel and AMD) and RSB underflow (Intel only). They must each be
36
+
considered individually for each attack vector (and microarchitecture
37
+
where applicable).
38
+
39
+
----
40
+
41
+
RSB poisoning (Intel and AMD)
42
+
=============================
43
+
44
+
SpectreRSB
45
+
~~~~~~~~~~
46
+
47
+
RSB poisoning is a technique used by SpectreRSB [#spectre-rsb]_ where
48
+
an attacker poisons an RSB entry to cause a victim's return instruction
49
+
to speculate to an attacker-controlled address. This can happen when
50
+
there are unbalanced CALLs/RETs after a context switch or VMEXIT.
51
+
52
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* All attack vectors can potentially be mitigated by flushing out any
53
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poisoned RSB entries using an RSB filling sequence
54
+
[#intel-rsb-filling]_ [#amd-rsb-filling]_ when transitioning between
55
+
untrusted and trusted domains. But this has a performance impact and
56
+
should be avoided whenever possible.
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+
58
+
.. DANGER::
59
+
**FIXME**: Currently we're flushing 32 entries. However, some CPU
60
+
models have more than 32 entries. The loop count needs to be
61
+
increased for those. More detailed information is needed about RSB
62
+
sizes.
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+
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* On context switch, the user->user mitigation requires ensuring the
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+
RSB gets filled or cleared whenever IBPB gets written [#cond-ibpb]_
66
+
during a context switch:
67
+
68
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* AMD:
69
+
On Zen 4+, IBPB (or SBPB [#amd-sbpb]_ if used) clears the RSB.
70
+
This is indicated by IBPB_RET in CPUID [#amd-ibpb-rsb]_.
71
+
72
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On Zen < 4, the RSB filling sequence [#amd-rsb-filling]_ must be
73
+
always be done in addition to IBPB [#amd-ibpb-no-rsb]_. This is
74
+
indicated by X86_BUG_IBPB_NO_RET.
75
+
76
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* Intel:
77
+
IBPB always clears the RSB:
78
+
79
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"Software that executed before the IBPB command cannot control
80
+
the predicted targets of indirect branches executed after the
81
+
command on the same logical processor. The term indirect branch
82
+
in this context includes near return instructions, so these
83
+
predicted targets may come from the RSB." [#intel-ibpb-rsb]_
84
+
85
+
* On context switch, user->kernel attacks are prevented by SMEP. User
86
+
space can only insert user space addresses into the RSB. Even
87
+
non-canonical addresses can't be inserted due to the page gap at the
88
+
end of the user canonical address space reserved by TASK_SIZE_MAX.
89
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A SMEP #PF at instruction fetch prevents the kernel from speculatively
90
+
executing user space.
91
+
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+
* AMD:
93
+
"Finally, branches that are predicted as 'ret' instructions get
94
+
their predicted targets from the Return Address Predictor (RAP).
95
+
AMD recommends software use a RAP stuffing sequence (mitigation
96
+
V2-3 in [2]) and/or Supervisor Mode Execution Protection (SMEP)
97
+
to ensure that the addresses in the RAP are safe for
98
+
speculation. Collectively, we refer to these mitigations as "RAP
99
+
Protection"." [#amd-smep-rsb]_
100
+
101
+
* Intel:
102
+
"On processors with enhanced IBRS, an RSB overwrite sequence may
103
+
not suffice to prevent the predicted target of a near return
104
+
from using an RSB entry created in a less privileged predictor
105
+
mode. Software can prevent this by enabling SMEP (for
106
+
transitions from user mode to supervisor mode) and by having
107
+
IA32_SPEC_CTRL.IBRS set during VM exits." [#intel-smep-rsb]_
108
+
109
+
* On VMEXIT, guest->host attacks are mitigated by eIBRS (and PBRSB
110
+
mitigation if needed):
111
+
112
+
* AMD:
113
+
"When Automatic IBRS is enabled, the internal return address
114
+
stack used for return address predictions is cleared on VMEXIT."
115
+
[#amd-eibrs-vmexit]_
116
+
117
+
* Intel:
118
+
"On processors with enhanced IBRS, an RSB overwrite sequence may
119
+
not suffice to prevent the predicted target of a near return
120
+
from using an RSB entry created in a less privileged predictor
121
+
mode. Software can prevent this by enabling SMEP (for
122
+
transitions from user mode to supervisor mode) and by having
123
+
IA32_SPEC_CTRL.IBRS set during VM exits. Processors with
124
+
enhanced IBRS still support the usage model where IBRS is set
125
+
only in the OS/VMM for OSes that enable SMEP. To do this, such
126
+
processors will ensure that guest behavior cannot control the
127
+
RSB after a VM exit once IBRS is set, even if IBRS was not set
128
+
at the time of the VM exit." [#intel-eibrs-vmexit]_
129
+
130
+
Note that some Intel CPUs are susceptible to Post-barrier Return
131
+
Stack Buffer Predictions (PBRSB) [#intel-pbrsb]_, where the last
132
+
CALL from the guest can be used to predict the first unbalanced RET.
133
+
In this case the PBRSB mitigation is needed in addition to eIBRS.
134
+
135
+
AMD RETBleed / SRSO / Branch Type Confusion
136
+
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
137
+
138
+
On AMD, poisoned RSB entries can also be created by the AMD RETBleed
139
+
variant [#retbleed-paper]_ [#amd-btc]_ or by Speculative Return Stack
140
+
Overflow [#amd-srso]_ (Inception [#inception-paper]_). The kernel
141
+
protects itself by replacing every RET in the kernel with a branch to a
142
+
single safe RET.
143
+
144
+
----
145
+
146
+
RSB underflow (Intel only)
147
+
==========================
148
+
149
+
RSB Alternate (RSBA) ("Intel Retbleed")
150
+
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
151
+
152
+
Some Intel Skylake-generation CPUs are susceptible to the Intel variant
153
+
of RETBleed [#retbleed-paper]_ (Return Stack Buffer Underflow
154
+
[#intel-rsbu]_). If a RET is executed when the RSB buffer is empty due
155
+
to mismatched CALLs/RETs or returning from a deep call stack, the branch
156
+
predictor can fall back to using the Branch Target Buffer (BTB). If a
157
+
user forces a BTB collision then the RET can speculatively branch to a
158
+
user-controlled address.
159
+
160
+
* Note that RSB filling doesn't fully mitigate this issue. If there
161
+
are enough unbalanced RETs, the RSB may still underflow and fall back
162
+
to using a poisoned BTB entry.
163
+
164
+
* On context switch, user->user underflow attacks are mitigated by the
165
+
conditional IBPB [#cond-ibpb]_ on context switch which effectively
166
+
clears the BTB:
167
+
168
+
* "The indirect branch predictor barrier (IBPB) is an indirect branch
169
+
control mechanism that establishes a barrier, preventing software
170
+
that executed before the barrier from controlling the predicted
171
+
targets of indirect branches executed after the barrier on the same
172
+
logical processor." [#intel-ibpb-btb]_
173
+
174
+
* On context switch and VMEXIT, user->kernel and guest->host RSB
175
+
underflows are mitigated by IBRS or eIBRS:
176
+
177
+
* "Enabling IBRS (including enhanced IBRS) will mitigate the "RSBU"
178
+
attack demonstrated by the researchers. As previously documented,
179
+
Intel recommends the use of enhanced IBRS, where supported. This
180
+
includes any processor that enumerates RRSBA but not RRSBA_DIS_S."
181
+
[#intel-rsbu]_
182
+
183
+
However, note that eIBRS and IBRS do not mitigate intra-mode attacks.
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+
Like RRSBA below, this is mitigated by clearing the BHB on kernel
185
+
entry.
186
+
187
+
As an alternative to classic IBRS, call depth tracking (combined with
188
+
retpolines) can be used to track kernel returns and fill the RSB when
189
+
it gets close to being empty.
190
+
191
+
Restricted RSB Alternate (RRSBA)
192
+
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
193
+
194
+
Some newer Intel CPUs have Restricted RSB Alternate (RRSBA) behavior,
195
+
which, similar to RSBA described above, also falls back to using the BTB
196
+
on RSB underflow. The only difference is that the predicted targets are
197
+
restricted to the current domain when eIBRS is enabled:
198
+
199
+
* "Restricted RSB Alternate (RRSBA) behavior allows alternate branch
200
+
predictors to be used by near RET instructions when the RSB is
201
+
empty. When eIBRS is enabled, the predicted targets of these
202
+
alternate predictors are restricted to those belonging to the
203
+
indirect branch predictor entries of the current prediction domain.
204
+
[#intel-eibrs-rrsba]_
205
+
206
+
When a CPU with RRSBA is vulnerable to Branch History Injection
207
+
[#bhi-paper]_ [#intel-bhi]_, an RSB underflow could be used for an
208
+
intra-mode BTI attack. This is mitigated by clearing the BHB on
209
+
kernel entry.
210
+
211
+
However if the kernel uses retpolines instead of eIBRS, it needs to
212
+
disable RRSBA:
213
+
214
+
* "Where software is using retpoline as a mitigation for BHI or
215
+
intra-mode BTI, and the processor both enumerates RRSBA and
216
+
enumerates RRSBA_DIS controls, it should disable this behavior."
217
+
[#intel-retpoline-rrsba]_
218
+
219
+
----
220
+
221
+
References
222
+
==========
223
+
224
+
.. [#spectre-rsb] `Spectre Returns! Speculation Attacks using the Return Stack Buffer <https://arxiv.org/pdf/1807.07940.pdf>`_
225
+
226
+
.. [#intel-rsb-filling] "Empty RSB Mitigation on Skylake-generation" in `Retpoline: A Branch Target Injection Mitigation <https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/retpoline-branch-target-injection-mitigation.html#inpage-nav-5-1>`_
227
+
228
+
.. [#amd-rsb-filling] "Mitigation V2-3" in `Software Techniques for Managing Speculation <https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/programmer-references/software-techniques-for-managing-speculation.pdf>`_
229
+
230
+
.. [#cond-ibpb] Whether IBPB is written depends on whether the prev and/or next task is protected from Spectre attacks. It typically requires opting in per task or system-wide. For more details see the documentation for the ``spectre_v2_user`` cmdline option in Documentation/admin-guide/kernel-parameters.txt.
231
+
232
+
.. [#amd-sbpb] IBPB without flushing of branch type predictions. Only exists for AMD.
233
+
234
+
.. [#amd-ibpb-rsb] "Function 8000_0008h -- Processor Capacity Parameters and Extended Feature Identification" in `AMD64 Architecture Programmer's Manual Volume 3: General-Purpose and System Instructions <https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/programmer-references/24594.pdf>`_. SBPB behaves the same way according to `this email <https://lore.kernel.org/5175b163a3736ca5fd01cedf406735636c99a>`_.
235
+
236
+
.. [#amd-ibpb-no-rsb] `Spectre Attacks: Exploiting Speculative Execution <https://comsec.ethz.ch/wp-content/files/ibpb_sp25.pdf>`_
237
+
238
+
.. [#intel-ibpb-rsb] "Introduction" in `Post-barrier Return Stack Buffer Predictions / CVE-2022-26373 / INTEL-SA-00706 <https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/advisory-guidance/post-barrier-return-stack-buffer-predictions.html>`_
239
+
240
+
.. [#amd-smep-rsb] "Existing Mitigations" in `Technical Guidance for Mitigating Branch Type Confusion <https://www.amd.com/content/dam/amd/en/documents/resources/technical-guidance-for-mitigating-branch-type-confusion.pdf>`_
241
+
242
+
.. [#intel-smep-rsb] "Enhanced IBRS" in `Indirect Branch Restricted Speculation <https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/indirect-branch-restricted-speculation.html>`_
243
+
244
+
.. [#amd-eibrs-vmexit] "Extended Feature Enable Register (EFER)" in `AMD64 Architecture Programmer's Manual Volume 2: System Programming <https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/programmer-references/24593.pdf>`_
245
+
246
+
.. [#intel-eibrs-vmexit] "Enhanced IBRS" in `Indirect Branch Restricted Speculation <https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/indirect-branch-restricted-speculation.html>`_
247
+
248
+
.. [#intel-pbrsb] `Post-barrier Return Stack Buffer Predictions / CVE-2022-26373 / INTEL-SA-00706 <https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/advisory-guidance/post-barrier-return-stack-buffer-predictions.html>`_
249
+
250
+
.. [#retbleed-paper] `RETBleed: Arbitrary Speculative Code Execution with Return Instruction <https://comsec.ethz.ch/wp-content/files/retbleed_sec22.pdf>`_
251
+
252
+
.. [#amd-btc] `Technical Guidance for Mitigating Branch Type Confusion <https://www.amd.com/content/dam/amd/en/documents/resources/technical-guidance-for-mitigating-branch-type-confusion.pdf>`_
253
+
254
+
.. [#amd-srso] `Technical Update Regarding Speculative Return Stack Overflow <https://www.amd.com/content/dam/amd/en/documents/corporate/cr/speculative-return-stack-overflow-whitepaper.pdf>`_
255
+
256
+
.. [#inception-paper] `Inception: Exposing New Attack Surfaces with Training in Transient Execution <https://comsec.ethz.ch/wp-content/files/inception_sec23.pdf>`_
257
+
258
+
.. [#intel-rsbu] `Return Stack Buffer Underflow / Return Stack Buffer Underflow / CVE-2022-29901, CVE-2022-28693 / INTEL-SA-00702 <https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/advisory-guidance/return-stack-buffer-underflow.html>`_
259
+
260
+
.. [#intel-ibpb-btb] `Indirect Branch Predictor Barrier' <https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/indirect-branch-predictor-barrier.html>`_
261
+
262
+
.. [#intel-eibrs-rrsba] "Guidance for RSBU" in `Return Stack Buffer Underflow / Return Stack Buffer Underflow / CVE-2022-29901, CVE-2022-28693 / INTEL-SA-00702 <https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/advisory-guidance/return-stack-buffer-underflow.html>`_
263
+
264
+
.. [#bhi-paper] `Branch History Injection: On the Effectiveness of Hardware Mitigations Against Cross-Privilege Spectre-v2 Attacks <http://download.vusec.net/papers/bhi-spectre-bhb_sec22.pdf>`_
265
+
266
+
.. [#intel-bhi] `Branch History Injection and Intra-mode Branch Target Injection / CVE-2022-0001, CVE-2022-0002 / INTEL-SA-00598 <https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/branch-history-injection.html>`_
267
+
268
+
.. [#intel-retpoline-rrsba] "Retpoline" in `Branch History Injection and Intra-mode Branch Target Injection / CVE-2022-0001, CVE-2022-0002 / INTEL-SA-00598 <https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/branch-history-injection.html>`_
+1
-4
Documentation/admin-guide/kernel-parameters.txt
+1
-4
Documentation/admin-guide/kernel-parameters.txt
···
1407
1407
earlyprintk=serial[,0x...[,baudrate]]
1408
1408
earlyprintk=ttySn[,baudrate]
1409
1409
earlyprintk=dbgp[debugController#]
1410
+
earlyprintk=mmio32,membase[,{nocfg|baudrate}]
1410
1411
earlyprintk=pciserial[,force],bus:device.function[,{nocfg|baudrate}]
1411
1412
earlyprintk=xdbc[xhciController#]
1412
1413
earlyprintk=bios
1413
-
earlyprintk=mmio,membase[,{nocfg|baudrate}]
1414
1414
1415
1415
earlyprintk is useful when the kernel crashes before
1416
1416
the normal console is initialized. It is not enabled by
1417
1417
default because it has some cosmetic problems.
1418
-
1419
-
Only 32-bit memory addresses are supported for "mmio"
1420
-
and "pciserial" devices.
1421
1418
1422
1419
Use "nocfg" to skip UART configuration, assume
1423
1420
BIOS/firmware has configured UART correctly.
+36
-33
Documentation/arch/x86/cpuinfo.rst
+36
-33
Documentation/arch/x86/cpuinfo.rst
···
79
79
How are feature flags created?
80
80
==============================
81
81
82
-
a: Feature flags can be derived from the contents of CPUID leaves.
83
-
------------------------------------------------------------------
82
+
Feature flags can be derived from the contents of CPUID leaves
83
+
--------------------------------------------------------------
84
+
84
85
These feature definitions are organized mirroring the layout of CPUID
85
86
leaves and grouped in words with offsets as mapped in enum cpuid_leafs
86
87
in cpufeatures.h (see arch/x86/include/asm/cpufeatures.h for details).
···
90
89
displayed accordingly in /proc/cpuinfo. For example, the flag "avx2"
91
90
comes from X86_FEATURE_AVX2 in cpufeatures.h.
92
91
93
-
b: Flags can be from scattered CPUID-based features.
94
-
----------------------------------------------------
92
+
Flags can be from scattered CPUID-based features
93
+
------------------------------------------------
94
+
95
95
Hardware features enumerated in sparsely populated CPUID leaves get
96
96
software-defined values. Still, CPUID needs to be queried to determine
97
97
if a given feature is present. This is done in init_scattered_cpuid_features().
···
106
104
array. Since there is a struct cpuinfo_x86 for each possible CPU, the wasted
107
105
memory is not trivial.
108
106
109
-
c: Flags can be created synthetically under certain conditions for hardware features.
110
-
-------------------------------------------------------------------------------------
107
+
Flags can be created synthetically under certain conditions for hardware features
108
+
---------------------------------------------------------------------------------
109
+
111
110
Examples of conditions include whether certain features are present in
112
111
MSR_IA32_CORE_CAPS or specific CPU models are identified. If the needed
113
112
conditions are met, the features are enabled by the set_cpu_cap or
···
117
114
"split_lock_detect" will be displayed. The flag "ring3mwait" will be
118
115
displayed only when running on INTEL_XEON_PHI_[KNL|KNM] processors.
119
116
120
-
d: Flags can represent purely software features.
121
-
------------------------------------------------
117
+
Flags can represent purely software features
118
+
--------------------------------------------
122
119
These flags do not represent hardware features. Instead, they represent a
123
120
software feature implemented in the kernel. For example, Kernel Page Table
124
121
Isolation is purely software feature and its feature flag X86_FEATURE_PTI is
···
133
130
resulting x86_cap/bug_flags[] are used to populate /proc/cpuinfo. The naming
134
131
of flags in the x86_cap/bug_flags[] are as follows:
135
132
136
-
a: The name of the flag is from the string in X86_FEATURE_<name> by default.
137
-
----------------------------------------------------------------------------
138
-
By default, the flag <name> in /proc/cpuinfo is extracted from the respective
139
-
X86_FEATURE_<name> in cpufeatures.h. For example, the flag "avx2" is from
140
-
X86_FEATURE_AVX2.
133
+
Flags do not appear by default in /proc/cpuinfo
134
+
-----------------------------------------------
141
135
142
-
b: The naming can be overridden.
143
-
--------------------------------
136
+
Feature flags are omitted by default from /proc/cpuinfo as it does not make
137
+
sense for the feature to be exposed to userspace in most cases. For example,
138
+
X86_FEATURE_ALWAYS is defined in cpufeatures.h but that flag is an internal
139
+
kernel feature used in the alternative runtime patching functionality. So the
140
+
flag does not appear in /proc/cpuinfo.
141
+
142
+
Specify a flag name if absolutely needed
143
+
----------------------------------------
144
+
144
145
If the comment on the line for the #define X86_FEATURE_* starts with a
145
146
double-quote character (""), the string inside the double-quote characters
146
147
will be the name of the flags. For example, the flag "sse4_1" comes from
···
155
148
constant. If, for some reason, the naming of X86_FEATURE_<name> changes, one
156
149
shall override the new naming with the name already used in /proc/cpuinfo.
157
150
158
-
c: The naming override can be "", which means it will not appear in /proc/cpuinfo.
159
-
----------------------------------------------------------------------------------
160
-
The feature shall be omitted from /proc/cpuinfo if it does not make sense for
161
-
the feature to be exposed to userspace. For example, X86_FEATURE_ALWAYS is
162
-
defined in cpufeatures.h but that flag is an internal kernel feature used
163
-
in the alternative runtime patching functionality. So, its name is overridden
164
-
with "". Its flag will not appear in /proc/cpuinfo.
165
-
166
151
Flags are missing when one or more of these happen
167
152
==================================================
168
153
169
-
a: The hardware does not enumerate support for it.
170
-
--------------------------------------------------
154
+
The hardware does not enumerate support for it
155
+
----------------------------------------------
156
+
171
157
For example, when a new kernel is running on old hardware or the feature is
172
158
not enabled by boot firmware. Even if the hardware is new, there might be a
173
159
problem enabling the feature at run time, the flag will not be displayed.
174
160
175
-
b: The kernel does not know about the flag.
176
-
-------------------------------------------
161
+
The kernel does not know about the flag
162
+
---------------------------------------
163
+
177
164
For example, when an old kernel is running on new hardware.
178
165
179
-
c: The kernel disabled support for it at compile-time.
180
-
------------------------------------------------------
166
+
The kernel disabled support for it at compile-time
167
+
--------------------------------------------------
168
+
181
169
For example, if 5-level-paging is not enabled when building (i.e.,
182
170
CONFIG_X86_5LEVEL is not selected) the flag "la57" will not show up [#f1]_.
183
171
Even though the feature will still be detected via CPUID, the kernel disables
184
172
it by clearing via setup_clear_cpu_cap(X86_FEATURE_LA57).
185
173
186
-
d: The feature is disabled at boot-time.
187
-
----------------------------------------
174
+
The feature is disabled at boot-time
175
+
------------------------------------
188
176
A feature can be disabled either using a command-line parameter or because
189
177
it failed to be enabled. The command-line parameter clearcpuid= can be used
190
178
to disable features using the feature number as defined in
···
192
190
to, nofsgsbase, nosgx, noxsave, etc. 5-level paging can also be disabled using
193
191
"no5lvl".
194
192
195
-
e: The feature was known to be non-functional.
196
-
----------------------------------------------
193
+
The feature was known to be non-functional
194
+
------------------------------------------
195
+
197
196
The feature was known to be non-functional because a dependency was
198
197
missing at runtime. For example, AVX flags will not show up if XSAVE feature
199
198
is disabled since they depend on XSAVE feature. Another example would be broken
+14
-6
Documentation/filesystems/ext4/super.rst
+14
-6
Documentation/filesystems/ext4/super.rst
···
328
328
- s_checksum_type
329
329
- Metadata checksum algorithm type. The only valid value is 1 (crc32c).
330
330
* - 0x176
331
-
- __le16
332
-
- s_reserved_pad
333
-
-
331
+
- \_\_u8
332
+
- s\_encryption\_level
333
+
- Versioning level for encryption.
334
+
* - 0x177
335
+
- \_\_u8
336
+
- s\_reserved\_pad
337
+
- Padding to next 32bits.
334
338
* - 0x178
335
339
- __le64
336
340
- s_kbytes_written
···
470
466
- s_last_error_time_hi
471
467
- Upper 8 bits of the s_last_error_time field.
472
468
* - 0x27A
473
-
- __u8
474
-
- s_pad[2]
475
-
- Zero padding.
469
+
- \_\_u8
470
+
- s\_first\_error\_errcode
471
+
-
472
+
* - 0x27B
473
+
- \_\_u8
474
+
- s\_last\_error\_errcode
475
+
-
476
476
* - 0x27C
477
477
- __le16
478
478
- s_encoding
+6
-4
Documentation/networking/netdevices.rst
+6
-4
Documentation/networking/netdevices.rst
···
338
338
Devices drivers are encouraged to rely on the instance lock where possible.
339
339
340
340
For the (mostly software) drivers that need to interact with the core stack,
341
-
there are two sets of interfaces: ``dev_xxx`` and ``netif_xxx`` (e.g.,
342
-
``dev_set_mtu`` and ``netif_set_mtu``). The ``dev_xxx`` functions handle
343
-
acquiring the instance lock themselves, while the ``netif_xxx`` functions
344
-
assume that the driver has already acquired the instance lock.
341
+
there are two sets of interfaces: ``dev_xxx``/``netdev_xxx`` and ``netif_xxx``
342
+
(e.g., ``dev_set_mtu`` and ``netif_set_mtu``). The ``dev_xxx``/``netdev_xxx``
343
+
functions handle acquiring the instance lock themselves, while the
344
+
``netif_xxx`` functions assume that the driver has already acquired
345
+
the instance lock.
345
346
346
347
Notifiers and netdev instance lock
347
348
==================================
···
355
354
running under the lock:
356
355
* ``NETDEV_REGISTER``
357
356
* ``NETDEV_UP``
357
+
* ``NETDEV_CHANGE``
358
358
359
359
The following notifiers are running without the lock:
360
360
* ``NETDEV_UNREGISTER``
+2
MAINTAINERS
+2
MAINTAINERS
+4
-1
Makefile
+4
-1
Makefile
···
2
2
VERSION = 6
3
3
PATCHLEVEL = 15
4
4
SUBLEVEL = 0
5
-
EXTRAVERSION = -rc1
5
+
EXTRAVERSION = -rc2
6
6
NAME = Baby Opossum Posse
7
7
8
8
# *DOCUMENTATION*
···
1067
1067
ifdef CONFIG_CC_IS_GCC
1068
1068
KBUILD_CFLAGS += -fconserve-stack
1069
1069
endif
1070
+
1071
+
# Ensure compilers do not transform certain loops into calls to wcslen()
1072
+
KBUILD_CFLAGS += -fno-builtin-wcslen
1070
1073
1071
1074
# change __FILE__ to the relative path to the source directory
1072
1075
ifdef building_out_of_srctree
-1
arch/arm/configs/at91_dt_defconfig
-1
arch/arm/configs/at91_dt_defconfig
-1
arch/arm/configs/collie_defconfig
-1
arch/arm/configs/collie_defconfig
-1
arch/arm/configs/davinci_all_defconfig
-1
arch/arm/configs/davinci_all_defconfig
-1
arch/arm/configs/dove_defconfig
-1
arch/arm/configs/dove_defconfig
-1
arch/arm/configs/exynos_defconfig
-1
arch/arm/configs/exynos_defconfig
-2
arch/arm/configs/imx_v6_v7_defconfig
-2
arch/arm/configs/imx_v6_v7_defconfig
-1
arch/arm/configs/lpc18xx_defconfig
-1
arch/arm/configs/lpc18xx_defconfig
-1
arch/arm/configs/lpc32xx_defconfig
-1
arch/arm/configs/lpc32xx_defconfig
-2
arch/arm/configs/milbeaut_m10v_defconfig
-2
arch/arm/configs/milbeaut_m10v_defconfig
-1
arch/arm/configs/mmp2_defconfig
-1
arch/arm/configs/mmp2_defconfig
-1
arch/arm/configs/multi_v4t_defconfig
-1
arch/arm/configs/multi_v4t_defconfig
-1
arch/arm/configs/multi_v5_defconfig
-1
arch/arm/configs/multi_v5_defconfig
-1
arch/arm/configs/mvebu_v5_defconfig
-1
arch/arm/configs/mvebu_v5_defconfig
-1
arch/arm/configs/mxs_defconfig
-1
arch/arm/configs/mxs_defconfig
-3
arch/arm/configs/omap2plus_defconfig
-3
arch/arm/configs/omap2plus_defconfig
-1
arch/arm/configs/orion5x_defconfig
-1
arch/arm/configs/orion5x_defconfig
-1
arch/arm/configs/pxa168_defconfig
-1
arch/arm/configs/pxa168_defconfig
-1
arch/arm/configs/pxa910_defconfig
-1
arch/arm/configs/pxa910_defconfig
-2
arch/arm/configs/pxa_defconfig
-2
arch/arm/configs/pxa_defconfig
-1
arch/arm/configs/s5pv210_defconfig
-1
arch/arm/configs/s5pv210_defconfig
-2
arch/arm/configs/sama7_defconfig
-2
arch/arm/configs/sama7_defconfig
-1
arch/arm/configs/spitz_defconfig
-1
arch/arm/configs/spitz_defconfig
-1
arch/arm/configs/stm32_defconfig
-1
arch/arm/configs/stm32_defconfig
-2
arch/arm/configs/wpcm450_defconfig
-2
arch/arm/configs/wpcm450_defconfig
+42
-2
arch/arm64/include/asm/esr.h
+42
-2
arch/arm64/include/asm/esr.h
···
121
121
#define ESR_ELx_FSC_SEA_TTW(n) (0x14 + (n))
122
122
#define ESR_ELx_FSC_SECC (0x18)
123
123
#define ESR_ELx_FSC_SECC_TTW(n) (0x1c + (n))
124
+
#define ESR_ELx_FSC_ADDRSZ (0x00)
125
+
126
+
/*
127
+
* Annoyingly, the negative levels for Address size faults aren't laid out
128
+
* contiguously (or in the desired order)
129
+
*/
130
+
#define ESR_ELx_FSC_ADDRSZ_nL(n) ((n) == -1 ? 0x25 : 0x2C)
131
+
#define ESR_ELx_FSC_ADDRSZ_L(n) ((n) < 0 ? ESR_ELx_FSC_ADDRSZ_nL(n) : \
132
+
(ESR_ELx_FSC_ADDRSZ + (n)))
124
133
125
134
/* Status codes for individual page table levels */
126
135
#define ESR_ELx_FSC_ACCESS_L(n) (ESR_ELx_FSC_ACCESS + (n))
···
170
161
#define ESR_ELx_Xs_MASK (GENMASK_ULL(4, 0))
171
162
172
163
/* ISS field definitions for exceptions taken in to Hyp */
173
-
#define ESR_ELx_FSC_ADDRSZ (0x00)
174
-
#define ESR_ELx_FSC_ADDRSZ_L(n) (ESR_ELx_FSC_ADDRSZ + (n))
175
164
#define ESR_ELx_CV (UL(1) << 24)
176
165
#define ESR_ELx_COND_SHIFT (20)
177
166
#define ESR_ELx_COND_MASK (UL(0xF) << ESR_ELx_COND_SHIFT)
···
469
462
(esr == ESR_ELx_FSC_ACCESS_L(2)) ||
470
463
(esr == ESR_ELx_FSC_ACCESS_L(1)) ||
471
464
(esr == ESR_ELx_FSC_ACCESS_L(0));
465
+
}
466
+
467
+
static inline bool esr_fsc_is_addr_sz_fault(unsigned long esr)
468
+
{
469
+
esr &= ESR_ELx_FSC;
470
+
471
+
return (esr == ESR_ELx_FSC_ADDRSZ_L(3)) ||
472
+
(esr == ESR_ELx_FSC_ADDRSZ_L(2)) ||
473
+
(esr == ESR_ELx_FSC_ADDRSZ_L(1)) ||
474
+
(esr == ESR_ELx_FSC_ADDRSZ_L(0)) ||
475
+
(esr == ESR_ELx_FSC_ADDRSZ_L(-1));
476
+
}
477
+
478
+
static inline bool esr_fsc_is_sea_ttw(unsigned long esr)
479
+
{
480
+
esr = esr & ESR_ELx_FSC;
481
+
482
+
return (esr == ESR_ELx_FSC_SEA_TTW(3)) ||
483
+
(esr == ESR_ELx_FSC_SEA_TTW(2)) ||
484
+
(esr == ESR_ELx_FSC_SEA_TTW(1)) ||
485
+
(esr == ESR_ELx_FSC_SEA_TTW(0)) ||
486
+
(esr == ESR_ELx_FSC_SEA_TTW(-1));
487
+
}
488
+
489
+
static inline bool esr_fsc_is_secc_ttw(unsigned long esr)
490
+
{
491
+
esr = esr & ESR_ELx_FSC;
492
+
493
+
return (esr == ESR_ELx_FSC_SECC_TTW(3)) ||
494
+
(esr == ESR_ELx_FSC_SECC_TTW(2)) ||
495
+
(esr == ESR_ELx_FSC_SECC_TTW(1)) ||
496
+
(esr == ESR_ELx_FSC_SECC_TTW(0)) ||
497
+
(esr == ESR_ELx_FSC_SECC_TTW(-1));
472
498
}
473
499
474
500
/* Indicate whether ESR.EC==0x1A is for an ERETAx instruction */
+6
-1
arch/arm64/include/asm/kvm_emulate.h
+6
-1
arch/arm64/include/asm/kvm_emulate.h
···
305
305
306
306
static __always_inline phys_addr_t kvm_vcpu_get_fault_ipa(const struct kvm_vcpu *vcpu)
307
307
{
308
-
return ((phys_addr_t)vcpu->arch.fault.hpfar_el2 & HPFAR_MASK) << 8;
308
+
u64 hpfar = vcpu->arch.fault.hpfar_el2;
309
+
310
+
if (unlikely(!(hpfar & HPFAR_EL2_NS)))
311
+
return INVALID_GPA;
312
+
313
+
return FIELD_GET(HPFAR_EL2_FIPA, hpfar) << 12;
309
314
}
310
315
311
316
static inline u64 kvm_vcpu_get_disr(const struct kvm_vcpu *vcpu)
+5
arch/arm64/include/asm/kvm_host.h
+5
arch/arm64/include/asm/kvm_host.h
+1
-1
arch/arm64/include/asm/kvm_ras.h
+1
-1
arch/arm64/include/asm/kvm_ras.h
···
14
14
* Was this synchronous external abort a RAS notification?
15
15
* Returns '0' for errors handled by some RAS subsystem, or -ENOENT.
16
16
*/
17
-
static inline int kvm_handle_guest_sea(phys_addr_t addr, u64 esr)
17
+
static inline int kvm_handle_guest_sea(void)
18
18
{
19
19
/* apei_claim_sea(NULL) expects to mask interrupts itself */
20
20
lockdep_assert_irqs_enabled();
-11
arch/arm64/include/asm/mmu.h
-11
arch/arm64/include/asm/mmu.h
···
94
94
return false;
95
95
}
96
96
97
-
/*
98
-
* Systems affected by Cavium erratum 24756 are incompatible
99
-
* with KPTI.
100
-
*/
101
-
if (IS_ENABLED(CONFIG_CAVIUM_ERRATUM_27456)) {
102
-
extern const struct midr_range cavium_erratum_27456_cpus[];
103
-
104
-
if (is_midr_in_range_list(cavium_erratum_27456_cpus))
105
-
return false;
106
-
}
107
-
108
97
return true;
109
98
}
110
99
+1
-1
arch/arm64/include/asm/rqspinlock.h
+1
-1
arch/arm64/include/asm/rqspinlock.h
+1
-1
arch/arm64/kernel/cpu_errata.c
+1
-1
arch/arm64/kernel/cpu_errata.c
···
335
335
#endif
336
336
337
337
#ifdef CONFIG_CAVIUM_ERRATUM_27456
338
-
const struct midr_range cavium_erratum_27456_cpus[] = {
338
+
static const struct midr_range cavium_erratum_27456_cpus[] = {
339
339
/* Cavium ThunderX, T88 pass 1.x - 2.1 */
340
340
MIDR_RANGE(MIDR_THUNDERX, 0, 0, 1, 1),
341
341
/* Cavium ThunderX, T81 pass 1.0 */
-4
arch/arm64/kernel/image-vars.h
-4
arch/arm64/kernel/image-vars.h
···
47
47
PROVIDE(__pi_id_aa64zfr0_override = id_aa64zfr0_override);
48
48
PROVIDE(__pi_arm64_sw_feature_override = arm64_sw_feature_override);
49
49
PROVIDE(__pi_arm64_use_ng_mappings = arm64_use_ng_mappings);
50
-
#ifdef CONFIG_CAVIUM_ERRATUM_27456
51
-
PROVIDE(__pi_cavium_erratum_27456_cpus = cavium_erratum_27456_cpus);
52
-
PROVIDE(__pi_is_midr_in_range_list = is_midr_in_range_list);
53
-
#endif
54
50
PROVIDE(__pi__ctype = _ctype);
55
51
PROVIDE(__pi_memstart_offset_seed = memstart_offset_seed);
56
52
+24
-1
arch/arm64/kernel/pi/map_kernel.c
+24
-1
arch/arm64/kernel/pi/map_kernel.c
···
207
207
dsb(ishst);
208
208
}
209
209
210
+
/*
211
+
* PI version of the Cavium Eratum 27456 detection, which makes it
212
+
* impossible to use non-global mappings.
213
+
*/
214
+
static bool __init ng_mappings_allowed(void)
215
+
{
216
+
static const struct midr_range cavium_erratum_27456_cpus[] __initconst = {
217
+
/* Cavium ThunderX, T88 pass 1.x - 2.1 */
218
+
MIDR_RANGE(MIDR_THUNDERX, 0, 0, 1, 1),
219
+
/* Cavium ThunderX, T81 pass 1.0 */
220
+
MIDR_REV(MIDR_THUNDERX_81XX, 0, 0),
221
+
{},
222
+
};
223
+
224
+
for (const struct midr_range *r = cavium_erratum_27456_cpus; r->model; r++) {
225
+
if (midr_is_cpu_model_range(read_cpuid_id(), r->model,
226
+
r->rv_min, r->rv_max))
227
+
return false;
228
+
}
229
+
230
+
return true;
231
+
}
232
+
210
233
asmlinkage void __init early_map_kernel(u64 boot_status, void *fdt)
211
234
{
212
235
static char const chosen_str[] __initconst = "/chosen";
···
269
246
u64 kaslr_seed = kaslr_early_init(fdt, chosen);
270
247
271
248
if (kaslr_seed && kaslr_requires_kpti())
272
-
arm64_use_ng_mappings = true;
249
+
arm64_use_ng_mappings = ng_mappings_allowed();
273
250
274
251
kaslr_offset |= kaslr_seed & ~(MIN_KIMG_ALIGN - 1);
275
252
}
-5
arch/arm64/kvm/arm.c
-5
arch/arm64/kvm/arm.c
+48
-22
arch/arm64/kvm/hyp/include/hyp/fault.h
+48
-22
arch/arm64/kvm/hyp/include/hyp/fault.h
···
12
12
#include <asm/kvm_hyp.h>
13
13
#include <asm/kvm_mmu.h>
14
14
15
+
static inline bool __fault_safe_to_translate(u64 esr)
16
+
{
17
+
u64 fsc = esr & ESR_ELx_FSC;
18
+
19
+
if (esr_fsc_is_sea_ttw(esr) || esr_fsc_is_secc_ttw(esr))
20
+
return false;
21
+
22
+
return !(fsc == ESR_ELx_FSC_EXTABT && (esr & ESR_ELx_FnV));
23
+
}
24
+
15
25
static inline bool __translate_far_to_hpfar(u64 far, u64 *hpfar)
16
26
{
17
27
int ret;
···
54
44
return true;
55
45
}
56
46
47
+
/*
48
+
* Checks for the conditions when HPFAR_EL2 is written, per ARM ARM R_FKLWR.
49
+
*/
50
+
static inline bool __hpfar_valid(u64 esr)
51
+
{
52
+
/*
53
+
* CPUs affected by ARM erratum #834220 may incorrectly report a
54
+
* stage-2 translation fault when a stage-1 permission fault occurs.
55
+
*
56
+
* Re-walk the page tables to determine if a stage-1 fault actually
57
+
* occurred.
58
+
*/
59
+
if (cpus_have_final_cap(ARM64_WORKAROUND_834220) &&
60
+
esr_fsc_is_translation_fault(esr))
61
+
return false;
62
+
63
+
if (esr_fsc_is_translation_fault(esr) || esr_fsc_is_access_flag_fault(esr))
64
+
return true;
65
+
66
+
if ((esr & ESR_ELx_S1PTW) && esr_fsc_is_permission_fault(esr))
67
+
return true;
68
+
69
+
return esr_fsc_is_addr_sz_fault(esr);
70
+
}
71
+
57
72
static inline bool __get_fault_info(u64 esr, struct kvm_vcpu_fault_info *fault)
58
73
{
59
-
u64 hpfar, far;
74
+
u64 hpfar;
60
75
61
-
far = read_sysreg_el2(SYS_FAR);
76
+
fault->far_el2 = read_sysreg_el2(SYS_FAR);
77
+
fault->hpfar_el2 = 0;
78
+
79
+
if (__hpfar_valid(esr))
80
+
hpfar = read_sysreg(hpfar_el2);
81
+
else if (unlikely(!__fault_safe_to_translate(esr)))
82
+
return true;
83
+
else if (!__translate_far_to_hpfar(fault->far_el2, &hpfar))
84
+
return false;
62
85
63
86
/*
64
-
* The HPFAR can be invalid if the stage 2 fault did not
65
-
* happen during a stage 1 page table walk (the ESR_EL2.S1PTW
66
-
* bit is clear) and one of the two following cases are true:
67
-
* 1. The fault was due to a permission fault
68
-
* 2. The processor carries errata 834220
69
-
*
70
-
* Therefore, for all non S1PTW faults where we either have a
71
-
* permission fault or the errata workaround is enabled, we
72
-
* resolve the IPA using the AT instruction.
87
+
* Hijack HPFAR_EL2.NS (RES0 in Non-secure) to indicate a valid
88
+
* HPFAR value.
73
89
*/
74
-
if (!(esr & ESR_ELx_S1PTW) &&
75
-
(cpus_have_final_cap(ARM64_WORKAROUND_834220) ||
76
-
esr_fsc_is_permission_fault(esr))) {
77
-
if (!__translate_far_to_hpfar(far, &hpfar))
78
-
return false;
79
-
} else {
80
-
hpfar = read_sysreg(hpfar_el2);
81
-
}
82
-
83
-
fault->far_el2 = far;
84
-
fault->hpfar_el2 = hpfar;
90
+
fault->hpfar_el2 = hpfar | HPFAR_EL2_NS;
85
91
return true;
86
92
}
87
93
+5
-4
arch/arm64/kvm/hyp/nvhe/ffa.c
+5
-4
arch/arm64/kvm/hyp/nvhe/ffa.c
···
730
730
hyp_ffa_version = ffa_req_version;
731
731
}
732
732
733
-
if (hyp_ffa_post_init())
733
+
if (hyp_ffa_post_init()) {
734
734
res->a0 = FFA_RET_NOT_SUPPORTED;
735
-
else {
736
-
has_version_negotiated = true;
735
+
} else {
736
+
smp_store_release(&has_version_negotiated, true);
737
737
res->a0 = hyp_ffa_version;
738
738
}
739
739
unlock:
···
809
809
if (!is_ffa_call(func_id))
810
810
return false;
811
811
812
-
if (!has_version_negotiated && func_id != FFA_VERSION) {
812
+
if (func_id != FFA_VERSION &&
813
+
!smp_load_acquire(&has_version_negotiated)) {
813
814
ffa_to_smccc_error(&res, FFA_RET_INVALID_PARAMETERS);
814
815
goto out_handled;
815
816
}
+8
-1
arch/arm64/kvm/hyp/nvhe/mem_protect.c
+8
-1
arch/arm64/kvm/hyp/nvhe/mem_protect.c
···
578
578
return;
579
579
}
580
580
581
-
addr = (fault.hpfar_el2 & HPFAR_MASK) << 8;
581
+
582
+
/*
583
+
* Yikes, we couldn't resolve the fault IPA. This should reinject an
584
+
* abort into the host when we figure out how to do that.
585
+
*/
586
+
BUG_ON(!(fault.hpfar_el2 & HPFAR_EL2_NS));
587
+
addr = FIELD_GET(HPFAR_EL2_FIPA, fault.hpfar_el2) << 12;
588
+
582
589
ret = host_stage2_idmap(addr);
583
590
BUG_ON(ret && ret != -EAGAIN);
584
591
}
+19
-12
arch/arm64/kvm/mmu.c
+19
-12
arch/arm64/kvm/mmu.c
···
1794
1794
gfn_t gfn;
1795
1795
int ret, idx;
1796
1796
1797
+
/* Synchronous External Abort? */
1798
+
if (kvm_vcpu_abt_issea(vcpu)) {
1799
+
/*
1800
+
* For RAS the host kernel may handle this abort.
1801
+
* There is no need to pass the error into the guest.
1802
+
*/
1803
+
if (kvm_handle_guest_sea())
1804
+
kvm_inject_vabt(vcpu);
1805
+
1806
+
return 1;
1807
+
}
1808
+
1797
1809
esr = kvm_vcpu_get_esr(vcpu);
1798
1810
1811
+
/*
1812
+
* The fault IPA should be reliable at this point as we're not dealing
1813
+
* with an SEA.
1814
+
*/
1799
1815
ipa = fault_ipa = kvm_vcpu_get_fault_ipa(vcpu);
1816
+
if (KVM_BUG_ON(ipa == INVALID_GPA, vcpu->kvm))
1817
+
return -EFAULT;
1818
+
1800
1819
is_iabt = kvm_vcpu_trap_is_iabt(vcpu);
1801
1820
1802
1821
if (esr_fsc_is_translation_fault(esr)) {
···
1835
1816
kvm_inject_dabt(vcpu, fault_ipa);
1836
1817
return 1;
1837
1818
}
1838
-
}
1839
-
1840
-
/* Synchronous External Abort? */
1841
-
if (kvm_vcpu_abt_issea(vcpu)) {
1842
-
/*
1843
-
* For RAS the host kernel may handle this abort.
1844
-
* There is no need to pass the error into the guest.
1845
-
*/
1846
-
if (kvm_handle_guest_sea(fault_ipa, kvm_vcpu_get_esr(vcpu)))
1847
-
kvm_inject_vabt(vcpu);
1848
-
1849
-
return 1;
1850
1819
}
1851
1820
1852
1821
trace_kvm_guest_fault(*vcpu_pc(vcpu), kvm_vcpu_get_esr(vcpu),
+7
arch/arm64/tools/sysreg
+7
arch/arm64/tools/sysreg
-3
arch/hexagon/configs/comet_defconfig
-3
arch/hexagon/configs/comet_defconfig
-1
arch/m68k/configs/amcore_defconfig
-1
arch/m68k/configs/amcore_defconfig
-1
arch/mips/configs/ath79_defconfig
-1
arch/mips/configs/ath79_defconfig
-1
arch/mips/configs/bigsur_defconfig
-1
arch/mips/configs/bigsur_defconfig
-1
arch/mips/configs/fuloong2e_defconfig
-1
arch/mips/configs/fuloong2e_defconfig
-1
arch/mips/configs/ip22_defconfig
-1
arch/mips/configs/ip22_defconfig
-1
arch/mips/configs/ip27_defconfig
-1
arch/mips/configs/ip27_defconfig
-1
arch/mips/configs/ip30_defconfig
-1
arch/mips/configs/ip30_defconfig
-1
arch/mips/configs/ip32_defconfig
-1
arch/mips/configs/ip32_defconfig
-1
arch/mips/configs/omega2p_defconfig
-1
arch/mips/configs/omega2p_defconfig
-1
arch/mips/configs/rb532_defconfig
-1
arch/mips/configs/rb532_defconfig
-1
arch/mips/configs/rt305x_defconfig
-1
arch/mips/configs/rt305x_defconfig
-1
arch/mips/configs/sb1250_swarm_defconfig
-1
arch/mips/configs/sb1250_swarm_defconfig
-1
arch/mips/configs/vocore2_defconfig
-1
arch/mips/configs/vocore2_defconfig
-1
arch/mips/configs/xway_defconfig
-1
arch/mips/configs/xway_defconfig
-2
arch/parisc/configs/generic-32bit_defconfig
-2
arch/parisc/configs/generic-32bit_defconfig
-1
arch/parisc/configs/generic-64bit_defconfig
-1
arch/parisc/configs/generic-64bit_defconfig
-1
arch/powerpc/configs/44x/sam440ep_defconfig
-1
arch/powerpc/configs/44x/sam440ep_defconfig
-2
arch/powerpc/configs/44x/warp_defconfig
-2
arch/powerpc/configs/44x/warp_defconfig
-1
arch/powerpc/configs/83xx/mpc832x_rdb_defconfig
-1
arch/powerpc/configs/83xx/mpc832x_rdb_defconfig
-1
arch/powerpc/configs/83xx/mpc834x_itx_defconfig
-1
arch/powerpc/configs/83xx/mpc834x_itx_defconfig
-1
arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig
-1
arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig
-1
arch/powerpc/configs/83xx/mpc837x_rdb_defconfig
-1
arch/powerpc/configs/83xx/mpc837x_rdb_defconfig
-2
arch/powerpc/configs/85xx/ge_imp3a_defconfig
-2
arch/powerpc/configs/85xx/ge_imp3a_defconfig
-2
arch/powerpc/configs/85xx/stx_gp3_defconfig
-2
arch/powerpc/configs/85xx/stx_gp3_defconfig
-1
arch/powerpc/configs/85xx/xes_mpc85xx_defconfig
-1
arch/powerpc/configs/85xx/xes_mpc85xx_defconfig
-1
arch/powerpc/configs/86xx-hw.config
-1
arch/powerpc/configs/86xx-hw.config
-1
arch/powerpc/configs/amigaone_defconfig
-1
arch/powerpc/configs/amigaone_defconfig
-1
arch/powerpc/configs/chrp32_defconfig
-1
arch/powerpc/configs/chrp32_defconfig
-1
arch/powerpc/configs/fsl-emb-nonhw.config
-1
arch/powerpc/configs/fsl-emb-nonhw.config
-1
arch/powerpc/configs/g5_defconfig
-1
arch/powerpc/configs/g5_defconfig
-1
arch/powerpc/configs/gamecube_defconfig
-1
arch/powerpc/configs/gamecube_defconfig
-2
arch/powerpc/configs/linkstation_defconfig
-2
arch/powerpc/configs/linkstation_defconfig
-1
arch/powerpc/configs/mpc83xx_defconfig
-1
arch/powerpc/configs/mpc83xx_defconfig
-1
arch/powerpc/configs/mpc866_ads_defconfig
-1
arch/powerpc/configs/mpc866_ads_defconfig
-2
arch/powerpc/configs/mvme5100_defconfig
-2
arch/powerpc/configs/mvme5100_defconfig
-1
arch/powerpc/configs/pasemi_defconfig
-1
arch/powerpc/configs/pasemi_defconfig
-1
arch/powerpc/configs/pmac32_defconfig
-1
arch/powerpc/configs/pmac32_defconfig
-1
arch/powerpc/configs/ppc44x_defconfig
-1
arch/powerpc/configs/ppc44x_defconfig
-1
arch/powerpc/configs/ppc64e_defconfig
-1
arch/powerpc/configs/ppc64e_defconfig
-2
arch/powerpc/configs/ps3_defconfig
-2
arch/powerpc/configs/ps3_defconfig
-2
arch/powerpc/configs/skiroot_defconfig
-2
arch/powerpc/configs/skiroot_defconfig
-1
arch/powerpc/configs/storcenter_defconfig
-1
arch/powerpc/configs/storcenter_defconfig
-1
arch/powerpc/configs/wii_defconfig
-1
arch/powerpc/configs/wii_defconfig
+19
arch/s390/Kconfig
+19
arch/s390/Kconfig
···
332
332
def_bool n
333
333
select HAVE_MARCH_Z15_FEATURES
334
334
335
+
config HAVE_MARCH_Z17_FEATURES
336
+
def_bool n
337
+
select HAVE_MARCH_Z16_FEATURES
338
+
335
339
choice
336
340
prompt "Processor type"
337
341
default MARCH_Z196
···
401
397
Select this to enable optimizations for IBM z16 (3931 and
402
398
3932 series).
403
399
400
+
config MARCH_Z17
401
+
bool "IBM z17"
402
+
select HAVE_MARCH_Z17_FEATURES
403
+
depends on $(cc-option,-march=z17)
404
+
help
405
+
Select this to enable optimizations for IBM z17 (9175 and
406
+
9176 series).
407
+
404
408
endchoice
405
409
406
410
config MARCH_Z10_TUNE
···
431
419
432
420
config MARCH_Z16_TUNE
433
421
def_bool TUNE_Z16 || MARCH_Z16 && TUNE_DEFAULT
422
+
423
+
config MARCH_Z17_TUNE
424
+
def_bool TUNE_Z17 || MARCH_Z17 && TUNE_DEFAULT
434
425
435
426
choice
436
427
prompt "Tune code generation"
···
478
463
config TUNE_Z16
479
464
bool "IBM z16"
480
465
depends on $(cc-option,-mtune=z16)
466
+
467
+
config TUNE_Z17
468
+
bool "IBM z17"
469
+
depends on $(cc-option,-mtune=z17)
481
470
482
471
endchoice
483
472
+2
arch/s390/Makefile
+2
arch/s390/Makefile
···
48
48
mflags-$(CONFIG_MARCH_Z14) := -march=z14
49
49
mflags-$(CONFIG_MARCH_Z15) := -march=z15
50
50
mflags-$(CONFIG_MARCH_Z16) := -march=z16
51
+
mflags-$(CONFIG_MARCH_Z17) := -march=z17
51
52
52
53
export CC_FLAGS_MARCH := $(mflags-y)
53
54
···
62
61
cflags-$(CONFIG_MARCH_Z14_TUNE) += -mtune=z14
63
62
cflags-$(CONFIG_MARCH_Z15_TUNE) += -mtune=z15
64
63
cflags-$(CONFIG_MARCH_Z16_TUNE) += -mtune=z16
64
+
cflags-$(CONFIG_MARCH_Z17_TUNE) += -mtune=z17
65
65
66
66
cflags-y += -Wa,-I$(srctree)/arch/$(ARCH)/include
67
67
+4
arch/s390/include/asm/march.h
+4
arch/s390/include/asm/march.h
+2
-9
arch/s390/kernel/perf_cpum_cf.c
+2
-9
arch/s390/kernel/perf_cpum_cf.c
···
442
442
ctrset_size = 48;
443
443
else if (cpumf_ctr_info.csvn >= 3 && cpumf_ctr_info.csvn <= 5)
444
444
ctrset_size = 128;
445
-
else if (cpumf_ctr_info.csvn == 6 || cpumf_ctr_info.csvn == 7)
445
+
else if (cpumf_ctr_info.csvn >= 6 && cpumf_ctr_info.csvn <= 8)
446
446
ctrset_size = 160;
447
447
break;
448
448
case CPUMF_CTR_SET_MT_DIAG:
···
858
858
static int cpumf_pmu_event_init(struct perf_event *event)
859
859
{
860
860
unsigned int type = event->attr.type;
861
-
int err;
861
+
int err = -ENOENT;
862
862
863
863
if (type == PERF_TYPE_HARDWARE || type == PERF_TYPE_RAW)
864
864
err = __hw_perf_event_init(event, type);
865
865
else if (event->pmu->type == type)
866
866
/* Registered as unknown PMU */
867
867
err = __hw_perf_event_init(event, cpumf_pmu_event_type(event));
868
-
else
869
-
return -ENOENT;
870
-
871
-
if (unlikely(err) && event->destroy)
872
-
event->destroy(event);
873
868
874
869
return err;
875
870
}
···
1814
1819
event->destroy = hw_perf_event_destroy;
1815
1820
1816
1821
err = cfdiag_event_init2(event);
1817
-
if (unlikely(err))
1818
-
event->destroy(event);
1819
1822
out:
1820
1823
return err;
1821
1824
}
+164
-3
arch/s390/kernel/perf_cpum_cf_events.c
+164
-3
arch/s390/kernel/perf_cpum_cf_events.c
···
237
237
CPUMF_EVENT_ATTR(cf_z14, TX_C_TABORT_SPECIAL, 0x00f5);
238
238
CPUMF_EVENT_ATTR(cf_z14, MT_DIAG_CYCLES_ONE_THR_ACTIVE, 0x01c0);
239
239
CPUMF_EVENT_ATTR(cf_z14, MT_DIAG_CYCLES_TWO_THR_ACTIVE, 0x01c1);
240
-
241
240
CPUMF_EVENT_ATTR(cf_z15, L1D_RO_EXCL_WRITES, 0x0080);
242
241
CPUMF_EVENT_ATTR(cf_z15, DTLB2_WRITES, 0x0081);
243
242
CPUMF_EVENT_ATTR(cf_z15, DTLB2_MISSES, 0x0082);
···
364
365
CPUMF_EVENT_ATTR(cf_z16, NNPA_HOLD_LOCK, 0x010e);
365
366
CPUMF_EVENT_ATTR(cf_z16, MT_DIAG_CYCLES_ONE_THR_ACTIVE, 0x01c0);
366
367
CPUMF_EVENT_ATTR(cf_z16, MT_DIAG_CYCLES_TWO_THR_ACTIVE, 0x01c1);
368
+
CPUMF_EVENT_ATTR(cf_z17, L1D_RO_EXCL_WRITES, 0x0080);
369
+
CPUMF_EVENT_ATTR(cf_z17, DTLB2_WRITES, 0x0081);
370
+
CPUMF_EVENT_ATTR(cf_z17, DTLB2_MISSES, 0x0082);
371
+
CPUMF_EVENT_ATTR(cf_z17, CRSTE_1MB_WRITES, 0x0083);
372
+
CPUMF_EVENT_ATTR(cf_z17, DTLB2_GPAGE_WRITES, 0x0084);
373
+
CPUMF_EVENT_ATTR(cf_z17, ITLB2_WRITES, 0x0086);
374
+
CPUMF_EVENT_ATTR(cf_z17, ITLB2_MISSES, 0x0087);
375
+
CPUMF_EVENT_ATTR(cf_z17, TLB2_PTE_WRITES, 0x0089);
376
+
CPUMF_EVENT_ATTR(cf_z17, TLB2_CRSTE_WRITES, 0x008a);
377
+
CPUMF_EVENT_ATTR(cf_z17, TLB2_ENGINES_BUSY, 0x008b);
378
+
CPUMF_EVENT_ATTR(cf_z17, TX_C_TEND, 0x008c);
379
+
CPUMF_EVENT_ATTR(cf_z17, TX_NC_TEND, 0x008d);
380
+
CPUMF_EVENT_ATTR(cf_z17, L1C_TLB2_MISSES, 0x008f);
381
+
CPUMF_EVENT_ATTR(cf_z17, DCW_REQ, 0x0091);
382
+
CPUMF_EVENT_ATTR(cf_z17, DCW_REQ_IV, 0x0092);
383
+
CPUMF_EVENT_ATTR(cf_z17, DCW_REQ_CHIP_HIT, 0x0093);
384
+
CPUMF_EVENT_ATTR(cf_z17, DCW_REQ_DRAWER_HIT, 0x0094);
385
+
CPUMF_EVENT_ATTR(cf_z17, DCW_ON_CHIP, 0x0095);
386
+
CPUMF_EVENT_ATTR(cf_z17, DCW_ON_CHIP_IV, 0x0096);
387
+
CPUMF_EVENT_ATTR(cf_z17, DCW_ON_CHIP_CHIP_HIT, 0x0097);
388
+
CPUMF_EVENT_ATTR(cf_z17, DCW_ON_CHIP_DRAWER_HIT, 0x0098);
389
+
CPUMF_EVENT_ATTR(cf_z17, DCW_ON_MODULE, 0x0099);
390
+
CPUMF_EVENT_ATTR(cf_z17, DCW_ON_DRAWER, 0x009a);
391
+
CPUMF_EVENT_ATTR(cf_z17, DCW_OFF_DRAWER, 0x009b);
392
+
CPUMF_EVENT_ATTR(cf_z17, DCW_ON_CHIP_MEMORY, 0x009c);
393
+
CPUMF_EVENT_ATTR(cf_z17, DCW_ON_MODULE_MEMORY, 0x009d);
394
+
CPUMF_EVENT_ATTR(cf_z17, DCW_ON_DRAWER_MEMORY, 0x009e);
395
+
CPUMF_EVENT_ATTR(cf_z17, DCW_OFF_DRAWER_MEMORY, 0x009f);
396
+
CPUMF_EVENT_ATTR(cf_z17, IDCW_ON_MODULE_IV, 0x00a0);
397
+
CPUMF_EVENT_ATTR(cf_z17, IDCW_ON_MODULE_CHIP_HIT, 0x00a1);
398
+
CPUMF_EVENT_ATTR(cf_z17, IDCW_ON_MODULE_DRAWER_HIT, 0x00a2);
399
+
CPUMF_EVENT_ATTR(cf_z17, IDCW_ON_DRAWER_IV, 0x00a3);
400
+
CPUMF_EVENT_ATTR(cf_z17, IDCW_ON_DRAWER_CHIP_HIT, 0x00a4);
401
+
CPUMF_EVENT_ATTR(cf_z17, IDCW_ON_DRAWER_DRAWER_HIT, 0x00a5);
402
+
CPUMF_EVENT_ATTR(cf_z17, IDCW_OFF_DRAWER_IV, 0x00a6);
403
+
CPUMF_EVENT_ATTR(cf_z17, IDCW_OFF_DRAWER_CHIP_HIT, 0x00a7);
404
+
CPUMF_EVENT_ATTR(cf_z17, IDCW_OFF_DRAWER_DRAWER_HIT, 0x00a8);
405
+
CPUMF_EVENT_ATTR(cf_z17, ICW_REQ, 0x00a9);
406
+
CPUMF_EVENT_ATTR(cf_z17, ICW_REQ_IV, 0x00aa);
407
+
CPUMF_EVENT_ATTR(cf_z17, ICW_REQ_CHIP_HIT, 0x00ab);
408
+
CPUMF_EVENT_ATTR(cf_z17, ICW_REQ_DRAWER_HIT, 0x00ac);
409
+
CPUMF_EVENT_ATTR(cf_z17, ICW_ON_CHIP, 0x00ad);
410
+
CPUMF_EVENT_ATTR(cf_z17, ICW_ON_CHIP_IV, 0x00ae);
411
+
CPUMF_EVENT_ATTR(cf_z17, ICW_ON_CHIP_CHIP_HIT, 0x00af);
412
+
CPUMF_EVENT_ATTR(cf_z17, ICW_ON_CHIP_DRAWER_HIT, 0x00b0);
413
+
CPUMF_EVENT_ATTR(cf_z17, ICW_ON_MODULE, 0x00b1);
414
+
CPUMF_EVENT_ATTR(cf_z17, ICW_ON_DRAWER, 0x00b2);
415
+
CPUMF_EVENT_ATTR(cf_z17, ICW_OFF_DRAWER, 0x00b3);
416
+
CPUMF_EVENT_ATTR(cf_z17, CYCLES_SAMETHRD, 0x00ca);
417
+
CPUMF_EVENT_ATTR(cf_z17, CYCLES_DIFFTHRD, 0x00cb);
418
+
CPUMF_EVENT_ATTR(cf_z17, INST_SAMETHRD, 0x00cc);
419
+
CPUMF_EVENT_ATTR(cf_z17, INST_DIFFTHRD, 0x00cd);
420
+
CPUMF_EVENT_ATTR(cf_z17, WRONG_BRANCH_PREDICTION, 0x00ce);
421
+
CPUMF_EVENT_ATTR(cf_z17, VX_BCD_EXECUTION_SLOTS, 0x00e1);
422
+
CPUMF_EVENT_ATTR(cf_z17, DECIMAL_INSTRUCTIONS, 0x00e2);
423
+
CPUMF_EVENT_ATTR(cf_z17, LAST_HOST_TRANSLATIONS, 0x00e8);
424
+
CPUMF_EVENT_ATTR(cf_z17, TX_NC_TABORT, 0x00f4);
425
+
CPUMF_EVENT_ATTR(cf_z17, TX_C_TABORT_NO_SPECIAL, 0x00f5);
426
+
CPUMF_EVENT_ATTR(cf_z17, TX_C_TABORT_SPECIAL, 0x00f6);
427
+
CPUMF_EVENT_ATTR(cf_z17, DFLT_ACCESS, 0x00f8);
428
+
CPUMF_EVENT_ATTR(cf_z17, DFLT_CYCLES, 0x00fd);
429
+
CPUMF_EVENT_ATTR(cf_z17, SORTL, 0x0100);
430
+
CPUMF_EVENT_ATTR(cf_z17, DFLT_CC, 0x0109);
431
+
CPUMF_EVENT_ATTR(cf_z17, DFLT_CCFINISH, 0x010a);
432
+
CPUMF_EVENT_ATTR(cf_z17, NNPA_INVOCATIONS, 0x010b);
433
+
CPUMF_EVENT_ATTR(cf_z17, NNPA_COMPLETIONS, 0x010c);
434
+
CPUMF_EVENT_ATTR(cf_z17, NNPA_WAIT_LOCK, 0x010d);
435
+
CPUMF_EVENT_ATTR(cf_z17, NNPA_HOLD_LOCK, 0x010e);
436
+
CPUMF_EVENT_ATTR(cf_z17, NNPA_INST_ONCHIP, 0x0110);
437
+
CPUMF_EVENT_ATTR(cf_z17, NNPA_INST_OFFCHIP, 0x0111);
438
+
CPUMF_EVENT_ATTR(cf_z17, NNPA_INST_DIFF, 0x0112);
439
+
CPUMF_EVENT_ATTR(cf_z17, NNPA_4K_PREFETCH, 0x0114);
440
+
CPUMF_EVENT_ATTR(cf_z17, NNPA_COMPL_LOCK, 0x0115);
441
+
CPUMF_EVENT_ATTR(cf_z17, NNPA_RETRY_LOCK, 0x0116);
442
+
CPUMF_EVENT_ATTR(cf_z17, NNPA_RETRY_LOCK_WITH_PLO, 0x0117);
443
+
CPUMF_EVENT_ATTR(cf_z17, MT_DIAG_CYCLES_ONE_THR_ACTIVE, 0x01c0);
444
+
CPUMF_EVENT_ATTR(cf_z17, MT_DIAG_CYCLES_TWO_THR_ACTIVE, 0x01c1);
367
445
368
446
static struct attribute *cpumcf_fvn1_pmu_event_attr[] __initdata = {
369
447
CPUMF_EVENT_PTR(cf_fvn1, CPU_CYCLES),
···
490
414
NULL,
491
415
};
492
416
493
-
static struct attribute *cpumcf_svn_67_pmu_event_attr[] __initdata = {
417
+
static struct attribute *cpumcf_svn_678_pmu_event_attr[] __initdata = {
494
418
CPUMF_EVENT_PTR(cf_svn_12345, PRNG_FUNCTIONS),
495
419
CPUMF_EVENT_PTR(cf_svn_12345, PRNG_CYCLES),
496
420
CPUMF_EVENT_PTR(cf_svn_12345, PRNG_BLOCKED_FUNCTIONS),
···
855
779
NULL,
856
780
};
857
781
782
+
static struct attribute *cpumcf_z17_pmu_event_attr[] __initdata = {
783
+
CPUMF_EVENT_PTR(cf_z17, L1D_RO_EXCL_WRITES),
784
+
CPUMF_EVENT_PTR(cf_z17, DTLB2_WRITES),
785
+
CPUMF_EVENT_PTR(cf_z17, DTLB2_MISSES),
786
+
CPUMF_EVENT_PTR(cf_z17, CRSTE_1MB_WRITES),
787
+
CPUMF_EVENT_PTR(cf_z17, DTLB2_GPAGE_WRITES),
788
+
CPUMF_EVENT_PTR(cf_z17, ITLB2_WRITES),
789
+
CPUMF_EVENT_PTR(cf_z17, ITLB2_MISSES),
790
+
CPUMF_EVENT_PTR(cf_z17, TLB2_PTE_WRITES),
791
+
CPUMF_EVENT_PTR(cf_z17, TLB2_CRSTE_WRITES),
792
+
CPUMF_EVENT_PTR(cf_z17, TLB2_ENGINES_BUSY),
793
+
CPUMF_EVENT_PTR(cf_z17, TX_C_TEND),
794
+
CPUMF_EVENT_PTR(cf_z17, TX_NC_TEND),
795
+
CPUMF_EVENT_PTR(cf_z17, L1C_TLB2_MISSES),
796
+
CPUMF_EVENT_PTR(cf_z17, DCW_REQ),
797
+
CPUMF_EVENT_PTR(cf_z17, DCW_REQ_IV),
798
+
CPUMF_EVENT_PTR(cf_z17, DCW_REQ_CHIP_HIT),
799
+
CPUMF_EVENT_PTR(cf_z17, DCW_REQ_DRAWER_HIT),
800
+
CPUMF_EVENT_PTR(cf_z17, DCW_ON_CHIP),
801
+
CPUMF_EVENT_PTR(cf_z17, DCW_ON_CHIP_IV),
802
+
CPUMF_EVENT_PTR(cf_z17, DCW_ON_CHIP_CHIP_HIT),
803
+
CPUMF_EVENT_PTR(cf_z17, DCW_ON_CHIP_DRAWER_HIT),
804
+
CPUMF_EVENT_PTR(cf_z17, DCW_ON_MODULE),
805
+
CPUMF_EVENT_PTR(cf_z17, DCW_ON_DRAWER),
806
+
CPUMF_EVENT_PTR(cf_z17, DCW_OFF_DRAWER),
807
+
CPUMF_EVENT_PTR(cf_z17, DCW_ON_CHIP_MEMORY),
808
+
CPUMF_EVENT_PTR(cf_z17, DCW_ON_MODULE_MEMORY),
809
+
CPUMF_EVENT_PTR(cf_z17, DCW_ON_DRAWER_MEMORY),
810
+
CPUMF_EVENT_PTR(cf_z17, DCW_OFF_DRAWER_MEMORY),
811
+
CPUMF_EVENT_PTR(cf_z17, IDCW_ON_MODULE_IV),
812
+
CPUMF_EVENT_PTR(cf_z17, IDCW_ON_MODULE_CHIP_HIT),
813
+
CPUMF_EVENT_PTR(cf_z17, IDCW_ON_MODULE_DRAWER_HIT),
814
+
CPUMF_EVENT_PTR(cf_z17, IDCW_ON_DRAWER_IV),
815
+
CPUMF_EVENT_PTR(cf_z17, IDCW_ON_DRAWER_CHIP_HIT),
816
+
CPUMF_EVENT_PTR(cf_z17, IDCW_ON_DRAWER_DRAWER_HIT),
817
+
CPUMF_EVENT_PTR(cf_z17, IDCW_OFF_DRAWER_IV),
818
+
CPUMF_EVENT_PTR(cf_z17, IDCW_OFF_DRAWER_CHIP_HIT),
819
+
CPUMF_EVENT_PTR(cf_z17, IDCW_OFF_DRAWER_DRAWER_HIT),
820
+
CPUMF_EVENT_PTR(cf_z17, ICW_REQ),
821
+
CPUMF_EVENT_PTR(cf_z17, ICW_REQ_IV),
822
+
CPUMF_EVENT_PTR(cf_z17, ICW_REQ_CHIP_HIT),
823
+
CPUMF_EVENT_PTR(cf_z17, ICW_REQ_DRAWER_HIT),
824
+
CPUMF_EVENT_PTR(cf_z17, ICW_ON_CHIP),
825
+
CPUMF_EVENT_PTR(cf_z17, ICW_ON_CHIP_IV),
826
+
CPUMF_EVENT_PTR(cf_z17, ICW_ON_CHIP_CHIP_HIT),
827
+
CPUMF_EVENT_PTR(cf_z17, ICW_ON_CHIP_DRAWER_HIT),
828
+
CPUMF_EVENT_PTR(cf_z17, ICW_ON_MODULE),
829
+
CPUMF_EVENT_PTR(cf_z17, ICW_ON_DRAWER),
830
+
CPUMF_EVENT_PTR(cf_z17, ICW_OFF_DRAWER),
831
+
CPUMF_EVENT_PTR(cf_z17, CYCLES_SAMETHRD),
832
+
CPUMF_EVENT_PTR(cf_z17, CYCLES_DIFFTHRD),
833
+
CPUMF_EVENT_PTR(cf_z17, INST_SAMETHRD),
834
+
CPUMF_EVENT_PTR(cf_z17, INST_DIFFTHRD),
835
+
CPUMF_EVENT_PTR(cf_z17, WRONG_BRANCH_PREDICTION),
836
+
CPUMF_EVENT_PTR(cf_z17, VX_BCD_EXECUTION_SLOTS),
837
+
CPUMF_EVENT_PTR(cf_z17, DECIMAL_INSTRUCTIONS),
838
+
CPUMF_EVENT_PTR(cf_z17, LAST_HOST_TRANSLATIONS),
839
+
CPUMF_EVENT_PTR(cf_z17, TX_NC_TABORT),
840
+
CPUMF_EVENT_PTR(cf_z17, TX_C_TABORT_NO_SPECIAL),
841
+
CPUMF_EVENT_PTR(cf_z17, TX_C_TABORT_SPECIAL),
842
+
CPUMF_EVENT_PTR(cf_z17, DFLT_ACCESS),
843
+
CPUMF_EVENT_PTR(cf_z17, DFLT_CYCLES),
844
+
CPUMF_EVENT_PTR(cf_z17, SORTL),
845
+
CPUMF_EVENT_PTR(cf_z17, DFLT_CC),
846
+
CPUMF_EVENT_PTR(cf_z17, DFLT_CCFINISH),
847
+
CPUMF_EVENT_PTR(cf_z17, NNPA_INVOCATIONS),
848
+
CPUMF_EVENT_PTR(cf_z17, NNPA_COMPLETIONS),
849
+
CPUMF_EVENT_PTR(cf_z17, NNPA_WAIT_LOCK),
850
+
CPUMF_EVENT_PTR(cf_z17, NNPA_HOLD_LOCK),
851
+
CPUMF_EVENT_PTR(cf_z17, NNPA_INST_ONCHIP),
852
+
CPUMF_EVENT_PTR(cf_z17, NNPA_INST_OFFCHIP),
853
+
CPUMF_EVENT_PTR(cf_z17, NNPA_INST_DIFF),
854
+
CPUMF_EVENT_PTR(cf_z17, NNPA_4K_PREFETCH),
855
+
CPUMF_EVENT_PTR(cf_z17, NNPA_COMPL_LOCK),
856
+
CPUMF_EVENT_PTR(cf_z17, NNPA_RETRY_LOCK),
857
+
CPUMF_EVENT_PTR(cf_z17, NNPA_RETRY_LOCK_WITH_PLO),
858
+
CPUMF_EVENT_PTR(cf_z17, MT_DIAG_CYCLES_ONE_THR_ACTIVE),
859
+
CPUMF_EVENT_PTR(cf_z17, MT_DIAG_CYCLES_TWO_THR_ACTIVE),
860
+
NULL,
861
+
};
862
+
858
863
/* END: CPUM_CF COUNTER DEFINITIONS ===================================== */
859
864
860
865
static struct attribute_group cpumcf_pmu_events_group = {
···
1016
859
if (ci.csvn >= 1 && ci.csvn <= 5)
1017
860
csvn = cpumcf_svn_12345_pmu_event_attr;
1018
861
else if (ci.csvn >= 6)
1019
-
csvn = cpumcf_svn_67_pmu_event_attr;
862
+
csvn = cpumcf_svn_678_pmu_event_attr;
1020
863
1021
864
/* Determine model-specific counter set(s) */
1022
865
get_cpu_id(&cpu_id);
···
1048
891
case 0x3931:
1049
892
case 0x3932:
1050
893
model = cpumcf_z16_pmu_event_attr;
894
+
break;
895
+
case 0x9175:
896
+
case 0x9176:
897
+
model = cpumcf_z17_pmu_event_attr;
1051
898
break;
1052
899
default:
1053
900
model = none;
-3
arch/s390/kernel/perf_cpum_sf.c
-3
arch/s390/kernel/perf_cpum_sf.c
+4
arch/s390/kernel/processor.c
+4
arch/s390/kernel/processor.c
+3
arch/s390/tools/gen_facilities.c
+3
arch/s390/tools/gen_facilities.c
-1
arch/sh/configs/ap325rxa_defconfig
-1
arch/sh/configs/ap325rxa_defconfig
-1
arch/sh/configs/ecovec24_defconfig
-1
arch/sh/configs/ecovec24_defconfig
-1
arch/sh/configs/edosk7705_defconfig
-1
arch/sh/configs/edosk7705_defconfig
-1
arch/sh/configs/espt_defconfig
-1
arch/sh/configs/espt_defconfig
-2
arch/sh/configs/hp6xx_defconfig
-2
arch/sh/configs/hp6xx_defconfig
-1
arch/sh/configs/kfr2r09-romimage_defconfig
-1
arch/sh/configs/kfr2r09-romimage_defconfig
-1
arch/sh/configs/landisk_defconfig
-1
arch/sh/configs/landisk_defconfig
-1
arch/sh/configs/lboxre2_defconfig
-1
arch/sh/configs/lboxre2_defconfig
-2
arch/sh/configs/magicpanelr2_defconfig
-2
arch/sh/configs/magicpanelr2_defconfig
-1
arch/sh/configs/migor_defconfig
-1
arch/sh/configs/migor_defconfig
-1
arch/sh/configs/r7780mp_defconfig
-1
arch/sh/configs/r7780mp_defconfig
-1
arch/sh/configs/r7785rp_defconfig
-1
arch/sh/configs/r7785rp_defconfig
-1
arch/sh/configs/rts7751r2d1_defconfig
-1
arch/sh/configs/rts7751r2d1_defconfig
-1
arch/sh/configs/rts7751r2dplus_defconfig
-1
arch/sh/configs/rts7751r2dplus_defconfig
-1
arch/sh/configs/sdk7780_defconfig
-1
arch/sh/configs/sdk7780_defconfig
-3
arch/sh/configs/se7206_defconfig
-3
arch/sh/configs/se7206_defconfig
-1
arch/sh/configs/se7712_defconfig
-1
arch/sh/configs/se7712_defconfig
-1
arch/sh/configs/se7721_defconfig
-1
arch/sh/configs/se7721_defconfig
-1
arch/sh/configs/se7724_defconfig
-1
arch/sh/configs/se7724_defconfig
-1
arch/sh/configs/sh03_defconfig
-1
arch/sh/configs/sh03_defconfig
-2
arch/sh/configs/sh2007_defconfig
-2
arch/sh/configs/sh2007_defconfig
-1
arch/sh/configs/sh7724_generic_defconfig
-1
arch/sh/configs/sh7724_generic_defconfig
-1
arch/sh/configs/sh7763rdp_defconfig
-1
arch/sh/configs/sh7763rdp_defconfig
-1
arch/sh/configs/sh7770_generic_defconfig
-1
arch/sh/configs/sh7770_generic_defconfig
-1
arch/sh/configs/titan_defconfig
-1
arch/sh/configs/titan_defconfig
-1
arch/sparc/configs/sparc64_defconfig
-1
arch/sparc/configs/sparc64_defconfig
+5
-4
arch/x86/entry/entry.S
+5
-4
arch/x86/entry/entry.S
···
17
17
18
18
.pushsection .noinstr.text, "ax"
19
19
20
-
SYM_FUNC_START(entry_ibpb)
20
+
/* Clobbers AX, CX, DX */
21
+
SYM_FUNC_START(write_ibpb)
21
22
ANNOTATE_NOENDBR
22
23
movl $MSR_IA32_PRED_CMD, %ecx
23
-
movl $PRED_CMD_IBPB, %eax
24
+
movl _ASM_RIP(x86_pred_cmd), %eax
24
25
xorl %edx, %edx
25
26
wrmsr
26
27
27
28
/* Make sure IBPB clears return stack preductions too. */
28
29
FILL_RETURN_BUFFER %rax, RSB_CLEAR_LOOPS, X86_BUG_IBPB_NO_RET
29
30
RET
30
-
SYM_FUNC_END(entry_ibpb)
31
+
SYM_FUNC_END(write_ibpb)
31
32
/* For KVM */
32
-
EXPORT_SYMBOL_GPL(entry_ibpb);
33
+
EXPORT_SYMBOL_GPL(write_ibpb);
33
34
34
35
.popsection
35
36
+6
arch/x86/include/asm/kvm_host.h
+6
arch/x86/include/asm/kvm_host.h
···
35
35
#include <asm/mtrr.h>
36
36
#include <asm/msr-index.h>
37
37
#include <asm/asm.h>
38
+
#include <asm/irq_remapping.h>
38
39
#include <asm/kvm_page_track.h>
39
40
#include <asm/kvm_vcpu_regs.h>
40
41
#include <asm/reboot.h>
···
2441
2440
* remaining 31 lower bits must be 0 to preserve ABI.
2442
2441
*/
2443
2442
#define KVM_EXIT_HYPERCALL_MBZ GENMASK_ULL(31, 1)
2443
+
2444
+
static inline bool kvm_arch_has_irq_bypass(void)
2445
+
{
2446
+
return enable_apicv && irq_remapping_cap(IRQ_POSTING_CAP);
2447
+
}
2444
2448
2445
2449
#endif /* _ASM_X86_KVM_HOST_H */
+6
-6
arch/x86/include/asm/nospec-branch.h
+6
-6
arch/x86/include/asm/nospec-branch.h
···
269
269
* typically has NO_MELTDOWN).
270
270
*
271
271
* While retbleed_untrain_ret() doesn't clobber anything but requires stack,
272
-
* entry_ibpb() will clobber AX, CX, DX.
272
+
* write_ibpb() will clobber AX, CX, DX.
273
273
*
274
274
* As such, this must be placed after every *SWITCH_TO_KERNEL_CR3 at a point
275
275
* where we have a stack but before any RET instruction.
···
279
279
VALIDATE_UNRET_END
280
280
CALL_UNTRAIN_RET
281
281
ALTERNATIVE_2 "", \
282
-
"call entry_ibpb", \ibpb_feature, \
282
+
"call write_ibpb", \ibpb_feature, \
283
283
__stringify(\call_depth_insns), X86_FEATURE_CALL_DEPTH
284
284
#endif
285
285
.endm
···
368
368
extern void srso_alias_return_thunk(void);
369
369
370
370
extern void entry_untrain_ret(void);
371
-
extern void entry_ibpb(void);
371
+
extern void write_ibpb(void);
372
372
373
373
#ifdef CONFIG_X86_64
374
374
extern void clear_bhb_loop(void);
···
514
514
: "memory");
515
515
}
516
516
517
-
extern u64 x86_pred_cmd;
518
-
519
517
static inline void indirect_branch_prediction_barrier(void)
520
518
{
521
-
alternative_msr_write(MSR_IA32_PRED_CMD, x86_pred_cmd, X86_FEATURE_IBPB);
519
+
asm_inline volatile(ALTERNATIVE("", "call write_ibpb", X86_FEATURE_IBPB)
520
+
: ASM_CALL_CONSTRAINT
521
+
:: "rax", "rcx", "rdx", "memory");
522
522
}
523
523
524
524
/* The Intel SPEC CTRL MSR base value cache */
+6
-6
arch/x86/include/asm/smap.h
+6
-6
arch/x86/include/asm/smap.h
···
16
16
#ifdef __ASSEMBLER__
17
17
18
18
#define ASM_CLAC \
19
-
ALTERNATIVE __stringify(ANNOTATE_IGNORE_ALTERNATIVE), "clac", X86_FEATURE_SMAP
19
+
ALTERNATIVE "", "clac", X86_FEATURE_SMAP
20
20
21
21
#define ASM_STAC \
22
-
ALTERNATIVE __stringify(ANNOTATE_IGNORE_ALTERNATIVE), "stac", X86_FEATURE_SMAP
22
+
ALTERNATIVE "", "stac", X86_FEATURE_SMAP
23
23
24
24
#else /* __ASSEMBLER__ */
25
25
26
26
static __always_inline void clac(void)
27
27
{
28
28
/* Note: a barrier is implicit in alternative() */
29
-
alternative(ANNOTATE_IGNORE_ALTERNATIVE "", "clac", X86_FEATURE_SMAP);
29
+
alternative("", "clac", X86_FEATURE_SMAP);
30
30
}
31
31
32
32
static __always_inline void stac(void)
33
33
{
34
34
/* Note: a barrier is implicit in alternative() */
35
-
alternative(ANNOTATE_IGNORE_ALTERNATIVE "", "stac", X86_FEATURE_SMAP);
35
+
alternative("", "stac", X86_FEATURE_SMAP);
36
36
}
37
37
38
38
static __always_inline unsigned long smap_save(void)
···
59
59
60
60
/* These macros can be used in asm() statements */
61
61
#define ASM_CLAC \
62
-
ALTERNATIVE(ANNOTATE_IGNORE_ALTERNATIVE "", "clac", X86_FEATURE_SMAP)
62
+
ALTERNATIVE("", "clac", X86_FEATURE_SMAP)
63
63
#define ASM_STAC \
64
-
ALTERNATIVE(ANNOTATE_IGNORE_ALTERNATIVE "", "stac", X86_FEATURE_SMAP)
64
+
ALTERNATIVE("", "stac", X86_FEATURE_SMAP)
65
65
66
66
#define ASM_CLAC_UNSAFE \
67
67
ALTERNATIVE("", ANNOTATE_IGNORE_ALTERNATIVE "clac", X86_FEATURE_SMAP)
+11
arch/x86/kernel/acpi/boot.c
+11
arch/x86/kernel/acpi/boot.c
···
23
23
#include <linux/serial_core.h>
24
24
#include <linux/pgtable.h>
25
25
26
+
#include <xen/xen.h>
27
+
26
28
#include <asm/e820/api.h>
27
29
#include <asm/irqdomain.h>
28
30
#include <asm/pci_x86.h>
···
1731
1729
{
1732
1730
#if defined(CONFIG_X86_LOCAL_APIC) && !defined(CONFIG_X86_MPPARSE)
1733
1731
/* mptable code is not built-in*/
1732
+
1733
+
/*
1734
+
* Xen disables ACPI in PV DomU guests but it still emulates APIC and
1735
+
* supports SMP. Returning early here ensures that APIC is not disabled
1736
+
* unnecessarily and the guest is not limited to a single vCPU.
1737
+
*/
1738
+
if (xen_pv_domain() && !xen_initial_domain())
1739
+
return 0;
1740
+
1734
1741
if (acpi_disabled || acpi_noirq) {
1735
1742
pr_warn("MPS support code is not built-in, using acpi=off or acpi=noirq or pci=noacpi may have problem\n");
1736
1743
return 1;
+1
arch/x86/kernel/cpu/amd.c
+1
arch/x86/kernel/cpu/amd.c
···
805
805
static const struct x86_cpu_id erratum_1386_microcode[] = {
806
806
X86_MATCH_VFM_STEPS(VFM_MAKE(X86_VENDOR_AMD, 0x17, 0x01), 0x2, 0x2, 0x0800126e),
807
807
X86_MATCH_VFM_STEPS(VFM_MAKE(X86_VENDOR_AMD, 0x17, 0x31), 0x0, 0x0, 0x08301052),
808
+
{}
808
809
};
809
810
810
811
static void fix_erratum_1386(struct cpuinfo_x86 *c)
+34
-73
arch/x86/kernel/cpu/bugs.c
+34
-73
arch/x86/kernel/cpu/bugs.c
···
59
59
EXPORT_PER_CPU_SYMBOL_GPL(x86_spec_ctrl_current);
60
60
61
61
u64 x86_pred_cmd __ro_after_init = PRED_CMD_IBPB;
62
-
EXPORT_SYMBOL_GPL(x86_pred_cmd);
63
62
64
63
static u64 __ro_after_init x86_arch_cap_msr;
65
64
···
1141
1142
setup_clear_cpu_cap(X86_FEATURE_RETHUNK);
1142
1143
1143
1144
/*
1144
-
* There is no need for RSB filling: entry_ibpb() ensures
1145
+
* There is no need for RSB filling: write_ibpb() ensures
1145
1146
* all predictions, including the RSB, are invalidated,
1146
1147
* regardless of IBPB implementation.
1147
1148
*/
···
1591
1592
rrsba_disabled = true;
1592
1593
}
1593
1594
1594
-
static void __init spectre_v2_determine_rsb_fill_type_at_vmexit(enum spectre_v2_mitigation mode)
1595
+
static void __init spectre_v2_select_rsb_mitigation(enum spectre_v2_mitigation mode)
1595
1596
{
1596
1597
/*
1597
-
* Similar to context switches, there are two types of RSB attacks
1598
-
* after VM exit:
1598
+
* WARNING! There are many subtleties to consider when changing *any*
1599
+
* code related to RSB-related mitigations. Before doing so, carefully
1600
+
* read the following document, and update if necessary:
1599
1601
*
1600
-
* 1) RSB underflow
1602
+
* Documentation/admin-guide/hw-vuln/rsb.rst
1601
1603
*
1602
-
* 2) Poisoned RSB entry
1604
+
* In an overly simplified nutshell:
1603
1605
*
1604
-
* When retpoline is enabled, both are mitigated by filling/clearing
1605
-
* the RSB.
1606
+
* - User->user RSB attacks are conditionally mitigated during
1607
+
* context switches by cond_mitigation -> write_ibpb().
1606
1608
*
1607
-
* When IBRS is enabled, while #1 would be mitigated by the IBRS branch
1608
-
* prediction isolation protections, RSB still needs to be cleared
1609
-
* because of #2. Note that SMEP provides no protection here, unlike
1610
-
* user-space-poisoned RSB entries.
1609
+
* - User->kernel and guest->host attacks are mitigated by eIBRS or
1610
+
* RSB filling.
1611
1611
*
1612
-
* eIBRS should protect against RSB poisoning, but if the EIBRS_PBRSB
1613
-
* bug is present then a LITE version of RSB protection is required,
1614
-
* just a single call needs to retire before a RET is executed.
1612
+
* Though, depending on config, note that other alternative
1613
+
* mitigations may end up getting used instead, e.g., IBPB on
1614
+
* entry/vmexit, call depth tracking, or return thunks.
1615
1615
*/
1616
+
1616
1617
switch (mode) {
1617
1618
case SPECTRE_V2_NONE:
1618
-
return;
1619
+
break;
1619
1620
1620
-
case SPECTRE_V2_EIBRS_LFENCE:
1621
1621
case SPECTRE_V2_EIBRS:
1622
-
if (boot_cpu_has_bug(X86_BUG_EIBRS_PBRSB)) {
1623
-
setup_force_cpu_cap(X86_FEATURE_RSB_VMEXIT_LITE);
1624
-
pr_info("Spectre v2 / PBRSB-eIBRS: Retire a single CALL on VMEXIT\n");
1625
-
}
1626
-
return;
1627
-
1622
+
case SPECTRE_V2_EIBRS_LFENCE:
1628
1623
case SPECTRE_V2_EIBRS_RETPOLINE:
1624
+
if (boot_cpu_has_bug(X86_BUG_EIBRS_PBRSB)) {
1625
+
pr_info("Spectre v2 / PBRSB-eIBRS: Retire a single CALL on VMEXIT\n");
1626
+
setup_force_cpu_cap(X86_FEATURE_RSB_VMEXIT_LITE);
1627
+
}
1628
+
break;
1629
+
1629
1630
case SPECTRE_V2_RETPOLINE:
1630
1631
case SPECTRE_V2_LFENCE:
1631
1632
case SPECTRE_V2_IBRS:
1633
+
pr_info("Spectre v2 / SpectreRSB: Filling RSB on context switch and VMEXIT\n");
1634
+
setup_force_cpu_cap(X86_FEATURE_RSB_CTXSW);
1632
1635
setup_force_cpu_cap(X86_FEATURE_RSB_VMEXIT);
1633
-
pr_info("Spectre v2 / SpectreRSB : Filling RSB on VMEXIT\n");
1634
-
return;
1635
-
}
1636
+
break;
1636
1637
1637
-
pr_warn_once("Unknown Spectre v2 mode, disabling RSB mitigation at VM exit");
1638
-
dump_stack();
1638
+
default:
1639
+
pr_warn_once("Unknown Spectre v2 mode, disabling RSB mitigation\n");
1640
+
dump_stack();
1641
+
break;
1642
+
}
1639
1643
}
1640
1644
1641
1645
/*
···
1832
1830
spectre_v2_enabled = mode;
1833
1831
pr_info("%s\n", spectre_v2_strings[mode]);
1834
1832
1835
-
/*
1836
-
* If Spectre v2 protection has been enabled, fill the RSB during a
1837
-
* context switch. In general there are two types of RSB attacks
1838
-
* across context switches, for which the CALLs/RETs may be unbalanced.
1839
-
*
1840
-
* 1) RSB underflow
1841
-
*
1842
-
* Some Intel parts have "bottomless RSB". When the RSB is empty,
1843
-
* speculated return targets may come from the branch predictor,
1844
-
* which could have a user-poisoned BTB or BHB entry.
1845
-
*
1846
-
* AMD has it even worse: *all* returns are speculated from the BTB,
1847
-
* regardless of the state of the RSB.
1848
-
*
1849
-
* When IBRS or eIBRS is enabled, the "user -> kernel" attack
1850
-
* scenario is mitigated by the IBRS branch prediction isolation
1851
-
* properties, so the RSB buffer filling wouldn't be necessary to
1852
-
* protect against this type of attack.
1853
-
*
1854
-
* The "user -> user" attack scenario is mitigated by RSB filling.
1855
-
*
1856
-
* 2) Poisoned RSB entry
1857
-
*
1858
-
* If the 'next' in-kernel return stack is shorter than 'prev',
1859
-
* 'next' could be tricked into speculating with a user-poisoned RSB
1860
-
* entry.
1861
-
*
1862
-
* The "user -> kernel" attack scenario is mitigated by SMEP and
1863
-
* eIBRS.
1864
-
*
1865
-
* The "user -> user" scenario, also known as SpectreBHB, requires
1866
-
* RSB clearing.
1867
-
*
1868
-
* So to mitigate all cases, unconditionally fill RSB on context
1869
-
* switches.
1870
-
*
1871
-
* FIXME: Is this pointless for retbleed-affected AMD?
1872
-
*/
1873
-
setup_force_cpu_cap(X86_FEATURE_RSB_CTXSW);
1874
-
pr_info("Spectre v2 / SpectreRSB mitigation: Filling RSB on context switch\n");
1875
-
1876
-
spectre_v2_determine_rsb_fill_type_at_vmexit(mode);
1833
+
spectre_v2_select_rsb_mitigation(mode);
1877
1834
1878
1835
/*
1879
1836
* Retpoline protects the kernel, but doesn't protect firmware. IBRS
···
2637
2676
setup_clear_cpu_cap(X86_FEATURE_RETHUNK);
2638
2677
2639
2678
/*
2640
-
* There is no need for RSB filling: entry_ibpb() ensures
2679
+
* There is no need for RSB filling: write_ibpb() ensures
2641
2680
* all predictions, including the RSB, are invalidated,
2642
2681
* regardless of IBPB implementation.
2643
2682
*/
···
2662
2701
srso_mitigation = SRSO_MITIGATION_IBPB_ON_VMEXIT;
2663
2702
2664
2703
/*
2665
-
* There is no need for RSB filling: entry_ibpb() ensures
2704
+
* There is no need for RSB filling: write_ibpb() ensures
2666
2705
* all predictions, including the RSB, are invalidated,
2667
2706
* regardless of IBPB implementation.
2668
2707
*/
+27
-21
arch/x86/kernel/cpu/resctrl/rdtgroup.c
+27
-21
arch/x86/kernel/cpu/resctrl/rdtgroup.c
···
3553
3553
free_rmid(rgrp->closid, rgrp->mon.rmid);
3554
3554
}
3555
3555
3556
+
/*
3557
+
* We allow creating mon groups only with in a directory called "mon_groups"
3558
+
* which is present in every ctrl_mon group. Check if this is a valid
3559
+
* "mon_groups" directory.
3560
+
*
3561
+
* 1. The directory should be named "mon_groups".
3562
+
* 2. The mon group itself should "not" be named "mon_groups".
3563
+
* This makes sure "mon_groups" directory always has a ctrl_mon group
3564
+
* as parent.
3565
+
*/
3566
+
static bool is_mon_groups(struct kernfs_node *kn, const char *name)
3567
+
{
3568
+
return (!strcmp(rdt_kn_name(kn), "mon_groups") &&
3569
+
strcmp(name, "mon_groups"));
3570
+
}
3571
+
3556
3572
static int mkdir_rdt_prepare(struct kernfs_node *parent_kn,
3557
3573
const char *name, umode_t mode,
3558
3574
enum rdt_group_type rtype, struct rdtgroup **r)
···
3581
3565
prdtgrp = rdtgroup_kn_lock_live(parent_kn);
3582
3566
if (!prdtgrp) {
3583
3567
ret = -ENODEV;
3568
+
goto out_unlock;
3569
+
}
3570
+
3571
+
/*
3572
+
* Check that the parent directory for a monitor group is a "mon_groups"
3573
+
* directory.
3574
+
*/
3575
+
if (rtype == RDTMON_GROUP && !is_mon_groups(parent_kn, name)) {
3576
+
ret = -EPERM;
3584
3577
goto out_unlock;
3585
3578
}
3586
3579
···
3776
3751
return ret;
3777
3752
}
3778
3753
3779
-
/*
3780
-
* We allow creating mon groups only with in a directory called "mon_groups"
3781
-
* which is present in every ctrl_mon group. Check if this is a valid
3782
-
* "mon_groups" directory.
3783
-
*
3784
-
* 1. The directory should be named "mon_groups".
3785
-
* 2. The mon group itself should "not" be named "mon_groups".
3786
-
* This makes sure "mon_groups" directory always has a ctrl_mon group
3787
-
* as parent.
3788
-
*/
3789
-
static bool is_mon_groups(struct kernfs_node *kn, const char *name)
3790
-
{
3791
-
return (!strcmp(rdt_kn_name(kn), "mon_groups") &&
3792
-
strcmp(name, "mon_groups"));
3793
-
}
3794
-
3795
3754
static int rdtgroup_mkdir(struct kernfs_node *parent_kn, const char *name,
3796
3755
umode_t mode)
3797
3756
{
···
3791
3782
if (resctrl_arch_alloc_capable() && parent_kn == rdtgroup_default.kn)
3792
3783
return rdtgroup_mkdir_ctrl_mon(parent_kn, name, mode);
3793
3784
3794
-
/*
3795
-
* If RDT monitoring is supported and the parent directory is a valid
3796
-
* "mon_groups" directory, add a monitoring subdirectory.
3797
-
*/
3798
-
if (resctrl_arch_mon_capable() && is_mon_groups(parent_kn, name))
3785
+
/* Else, attempt to add a monitoring subdirectory. */
3786
+
if (resctrl_arch_mon_capable())
3799
3787
return rdtgroup_mkdir_mon(parent_kn, name, mode);
3800
3788
3801
3789
return -EPERM;
+8
-9
arch/x86/kernel/e820.c
+8
-9
arch/x86/kernel/e820.c
···
753
753
void __init e820__register_nosave_regions(unsigned long limit_pfn)
754
754
{
755
755
int i;
756
-
unsigned long pfn = 0;
756
+
u64 last_addr = 0;
757
757
758
758
for (i = 0; i < e820_table->nr_entries; i++) {
759
759
struct e820_entry *entry = &e820_table->entries[i];
760
760
761
-
if (pfn < PFN_UP(entry->addr))
762
-
register_nosave_region(pfn, PFN_UP(entry->addr));
763
-
764
-
pfn = PFN_DOWN(entry->addr + entry->size);
765
-
766
761
if (entry->type != E820_TYPE_RAM)
767
-
register_nosave_region(PFN_UP(entry->addr), pfn);
762
+
continue;
768
763
769
-
if (pfn >= limit_pfn)
770
-
break;
764
+
if (last_addr < entry->addr)
765
+
register_nosave_region(PFN_DOWN(last_addr), PFN_UP(entry->addr));
766
+
767
+
last_addr = entry->addr + entry->size;
771
768
}
769
+
770
+
register_nosave_region(PFN_DOWN(last_addr), limit_pfn);
772
771
}
773
772
774
773
#ifdef CONFIG_ACPI
+5
-5
arch/x86/kernel/early_printk.c
+5
-5
arch/x86/kernel/early_printk.c
···
389
389
keep = (strstr(buf, "keep") != NULL);
390
390
391
391
while (*buf != '\0') {
392
-
if (!strncmp(buf, "mmio", 4)) {
393
-
early_mmio_serial_init(buf + 4);
392
+
if (!strncmp(buf, "mmio32", 6)) {
393
+
buf += 6;
394
+
early_mmio_serial_init(buf);
394
395
early_console_register(&early_serial_console, keep);
395
-
buf += 4;
396
396
}
397
397
if (!strncmp(buf, "serial", 6)) {
398
398
buf += 6;
···
407
407
}
408
408
#ifdef CONFIG_PCI
409
409
if (!strncmp(buf, "pciserial", 9)) {
410
-
early_pci_serial_init(buf + 9);
410
+
buf += 9; /* Keep from match the above "pciserial" */
411
+
early_pci_serial_init(buf);
411
412
early_console_register(&early_serial_console, keep);
412
-
buf += 9; /* Keep from match the above "serial" */
413
413
}
414
414
#endif
415
415
if (!strncmp(buf, "vga", 3) &&
+37
-31
arch/x86/kvm/svm/avic.c
+37
-31
arch/x86/kvm/svm/avic.c
···
796
796
struct amd_svm_iommu_ir *ir;
797
797
u64 entry;
798
798
799
+
if (WARN_ON_ONCE(!pi->ir_data))
800
+
return -EINVAL;
801
+
799
802
/**
800
803
* In some cases, the existing irte is updated and re-set,
801
804
* so we need to check here if it's already been * added
802
805
* to the ir_list.
803
806
*/
804
-
if (pi->ir_data && (pi->prev_ga_tag != 0)) {
807
+
if (pi->prev_ga_tag) {
805
808
struct kvm *kvm = svm->vcpu.kvm;
806
809
u32 vcpu_id = AVIC_GATAG_TO_VCPUID(pi->prev_ga_tag);
807
810
struct kvm_vcpu *prev_vcpu = kvm_get_vcpu_by_id(kvm, vcpu_id);
···
823
820
* Allocating new amd_iommu_pi_data, which will get
824
821
* add to the per-vcpu ir_list.
825
822
*/
826
-
ir = kzalloc(sizeof(struct amd_svm_iommu_ir), GFP_KERNEL_ACCOUNT);
823
+
ir = kzalloc(sizeof(struct amd_svm_iommu_ir), GFP_ATOMIC | __GFP_ACCOUNT);
827
824
if (!ir) {
828
825
ret = -ENOMEM;
829
826
goto out;
···
899
896
{
900
897
struct kvm_kernel_irq_routing_entry *e;
901
898
struct kvm_irq_routing_table *irq_rt;
899
+
bool enable_remapped_mode = true;
902
900
int idx, ret = 0;
903
901
904
-
if (!kvm_arch_has_assigned_device(kvm) ||
905
-
!irq_remapping_cap(IRQ_POSTING_CAP))
902
+
if (!kvm_arch_has_assigned_device(kvm) || !kvm_arch_has_irq_bypass())
906
903
return 0;
907
904
908
905
pr_debug("SVM: %s: host_irq=%#x, guest_irq=%#x, set=%#x\n",
···
936
933
kvm_vcpu_apicv_active(&svm->vcpu)) {
937
934
struct amd_iommu_pi_data pi;
938
935
936
+
enable_remapped_mode = false;
937
+
939
938
/* Try to enable guest_mode in IRTE */
940
939
pi.base = __sme_set(page_to_phys(svm->avic_backing_page) &
941
940
AVIC_HPA_MASK);
···
956
951
*/
957
952
if (!ret && pi.is_guest_mode)
958
953
svm_ir_list_add(svm, &pi);
959
-
} else {
960
-
/* Use legacy mode in IRTE */
961
-
struct amd_iommu_pi_data pi;
962
-
963
-
/**
964
-
* Here, pi is used to:
965
-
* - Tell IOMMU to use legacy mode for this interrupt.
966
-
* - Retrieve ga_tag of prior interrupt remapping data.
967
-
*/
968
-
pi.prev_ga_tag = 0;
969
-
pi.is_guest_mode = false;
970
-
ret = irq_set_vcpu_affinity(host_irq, &pi);
971
-
972
-
/**
973
-
* Check if the posted interrupt was previously
974
-
* setup with the guest_mode by checking if the ga_tag
975
-
* was cached. If so, we need to clean up the per-vcpu
976
-
* ir_list.
977
-
*/
978
-
if (!ret && pi.prev_ga_tag) {
979
-
int id = AVIC_GATAG_TO_VCPUID(pi.prev_ga_tag);
980
-
struct kvm_vcpu *vcpu;
981
-
982
-
vcpu = kvm_get_vcpu_by_id(kvm, id);
983
-
if (vcpu)
984
-
svm_ir_list_del(to_svm(vcpu), &pi);
985
-
}
986
954
}
987
955
988
956
if (!ret && svm) {
···
971
993
}
972
994
973
995
ret = 0;
996
+
if (enable_remapped_mode) {
997
+
/* Use legacy mode in IRTE */
998
+
struct amd_iommu_pi_data pi;
999
+
1000
+
/**
1001
+
* Here, pi is used to:
1002
+
* - Tell IOMMU to use legacy mode for this interrupt.
1003
+
* - Retrieve ga_tag of prior interrupt remapping data.
1004
+
*/
1005
+
pi.prev_ga_tag = 0;
1006
+
pi.is_guest_mode = false;
1007
+
ret = irq_set_vcpu_affinity(host_irq, &pi);
1008
+
1009
+
/**
1010
+
* Check if the posted interrupt was previously
1011
+
* setup with the guest_mode by checking if the ga_tag
1012
+
* was cached. If so, we need to clean up the per-vcpu
1013
+
* ir_list.
1014
+
*/
1015
+
if (!ret && pi.prev_ga_tag) {
1016
+
int id = AVIC_GATAG_TO_VCPUID(pi.prev_ga_tag);
1017
+
struct kvm_vcpu *vcpu;
1018
+
1019
+
vcpu = kvm_get_vcpu_by_id(kvm, id);
1020
+
if (vcpu)
1021
+
svm_ir_list_del(to_svm(vcpu), &pi);
1022
+
}
1023
+
}
974
1024
out:
975
1025
srcu_read_unlock(&kvm->irq_srcu, idx);
976
1026
return ret;
+10
-3
arch/x86/kvm/trace.h
+10
-3
arch/x86/kvm/trace.h
···
11
11
#undef TRACE_SYSTEM
12
12
#define TRACE_SYSTEM kvm
13
13
14
+
#ifdef CREATE_TRACE_POINTS
15
+
#define tracing_kvm_rip_read(vcpu) ({ \
16
+
typeof(vcpu) __vcpu = vcpu; \
17
+
__vcpu->arch.guest_state_protected ? 0 : kvm_rip_read(__vcpu); \
18
+
})
19
+
#endif
20
+
14
21
/*
15
22
* Tracepoint for guest mode entry.
16
23
*/
···
35
28
36
29
TP_fast_assign(
37
30
__entry->vcpu_id = vcpu->vcpu_id;
38
-
__entry->rip = kvm_rip_read(vcpu);
31
+
__entry->rip = tracing_kvm_rip_read(vcpu);
39
32
__entry->immediate_exit = force_immediate_exit;
40
33
41
34
kvm_x86_call(get_entry_info)(vcpu, &__entry->intr_info,
···
326
319
), \
327
320
\
328
321
TP_fast_assign( \
329
-
__entry->guest_rip = kvm_rip_read(vcpu); \
322
+
__entry->guest_rip = tracing_kvm_rip_read(vcpu); \
330
323
__entry->isa = isa; \
331
324
__entry->vcpu_id = vcpu->vcpu_id; \
332
325
__entry->requests = READ_ONCE(vcpu->requests); \
···
430
423
431
424
TP_fast_assign(
432
425
__entry->vcpu_id = vcpu->vcpu_id;
433
-
__entry->guest_rip = kvm_rip_read(vcpu);
426
+
__entry->guest_rip = tracing_kvm_rip_read(vcpu);
434
427
__entry->fault_address = fault_address;
435
428
__entry->error_code = error_code;
436
429
),
+10
-18
arch/x86/kvm/vmx/posted_intr.c
+10
-18
arch/x86/kvm/vmx/posted_intr.c
···
301
301
{
302
302
struct kvm_kernel_irq_routing_entry *e;
303
303
struct kvm_irq_routing_table *irq_rt;
304
+
bool enable_remapped_mode = true;
304
305
struct kvm_lapic_irq irq;
305
306
struct kvm_vcpu *vcpu;
306
307
struct vcpu_data vcpu_info;
···
340
339
341
340
kvm_set_msi_irq(kvm, e, &irq);
342
341
if (!kvm_intr_is_single_vcpu(kvm, &irq, &vcpu) ||
343
-
!kvm_irq_is_postable(&irq)) {
344
-
/*
345
-
* Make sure the IRTE is in remapped mode if
346
-
* we don't handle it in posted mode.
347
-
*/
348
-
ret = irq_set_vcpu_affinity(host_irq, NULL);
349
-
if (ret < 0) {
350
-
printk(KERN_INFO
351
-
"failed to back to remapped mode, irq: %u\n",
352
-
host_irq);
353
-
goto out;
354
-
}
355
-
342
+
!kvm_irq_is_postable(&irq))
356
343
continue;
357
-
}
358
344
359
345
vcpu_info.pi_desc_addr = __pa(vcpu_to_pi_desc(vcpu));
360
346
vcpu_info.vector = irq.vector;
···
349
361
trace_kvm_pi_irte_update(host_irq, vcpu->vcpu_id, e->gsi,
350
362
vcpu_info.vector, vcpu_info.pi_desc_addr, set);
351
363
352
-
if (set)
353
-
ret = irq_set_vcpu_affinity(host_irq, &vcpu_info);
354
-
else
355
-
ret = irq_set_vcpu_affinity(host_irq, NULL);
364
+
if (!set)
365
+
continue;
356
366
367
+
enable_remapped_mode = false;
368
+
369
+
ret = irq_set_vcpu_affinity(host_irq, &vcpu_info);
357
370
if (ret < 0) {
358
371
printk(KERN_INFO "%s: failed to update PI IRTE\n",
359
372
__func__);
360
373
goto out;
361
374
}
362
375
}
376
+
377
+
if (enable_remapped_mode)
378
+
ret = irq_set_vcpu_affinity(host_irq, NULL);
363
379
364
380
ret = 0;
365
381
out:
+19
-9
arch/x86/kvm/x86.c
+19
-9
arch/x86/kvm/x86.c
···
11130
11130
/*
11131
11131
* Profile KVM exit RIPs:
11132
11132
*/
11133
-
if (unlikely(prof_on == KVM_PROFILING)) {
11133
+
if (unlikely(prof_on == KVM_PROFILING &&
11134
+
!vcpu->arch.guest_state_protected)) {
11134
11135
unsigned long rip = kvm_rip_read(vcpu);
11135
11136
profile_hit(KVM_PROFILING, (void *)rip);
11136
11137
}
···
13593
13592
}
13594
13593
EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
13595
13594
13596
-
bool kvm_arch_has_irq_bypass(void)
13597
-
{
13598
-
return enable_apicv && irq_remapping_cap(IRQ_POSTING_CAP);
13599
-
}
13600
-
13601
13595
int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
13602
13596
struct irq_bypass_producer *prod)
13603
13597
{
13604
13598
struct kvm_kernel_irqfd *irqfd =
13605
13599
container_of(cons, struct kvm_kernel_irqfd, consumer);
13600
+
struct kvm *kvm = irqfd->kvm;
13606
13601
int ret;
13607
13602
13608
-
irqfd->producer = prod;
13609
13603
kvm_arch_start_assignment(irqfd->kvm);
13604
+
13605
+
spin_lock_irq(&kvm->irqfds.lock);
13606
+
irqfd->producer = prod;
13607
+
13610
13608
ret = kvm_x86_call(pi_update_irte)(irqfd->kvm,
13611
13609
prod->irq, irqfd->gsi, 1);
13612
13610
if (ret)
13613
13611
kvm_arch_end_assignment(irqfd->kvm);
13612
+
13613
+
spin_unlock_irq(&kvm->irqfds.lock);
13614
+
13614
13615
13615
13616
return ret;
13616
13617
}
···
13623
13620
int ret;
13624
13621
struct kvm_kernel_irqfd *irqfd =
13625
13622
container_of(cons, struct kvm_kernel_irqfd, consumer);
13623
+
struct kvm *kvm = irqfd->kvm;
13626
13624
13627
13625
WARN_ON(irqfd->producer != prod);
13628
-
irqfd->producer = NULL;
13629
13626
13630
13627
/*
13631
13628
* When producer of consumer is unregistered, we change back to
···
13633
13630
* when the irq is masked/disabled or the consumer side (KVM
13634
13631
* int this case doesn't want to receive the interrupts.
13635
13632
*/
13633
+
spin_lock_irq(&kvm->irqfds.lock);
13634
+
irqfd->producer = NULL;
13635
+
13636
13636
ret = kvm_x86_call(pi_update_irte)(irqfd->kvm,
13637
13637
prod->irq, irqfd->gsi, 0);
13638
13638
if (ret)
13639
13639
printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
13640
13640
" fails: %d\n", irqfd->consumer.token, ret);
13641
+
13642
+
spin_unlock_irq(&kvm->irqfds.lock);
13643
+
13641
13644
13642
13645
kvm_arch_end_assignment(irqfd->kvm);
13643
13646
}
···
13657
13648
bool kvm_arch_irqfd_route_changed(struct kvm_kernel_irq_routing_entry *old,
13658
13649
struct kvm_kernel_irq_routing_entry *new)
13659
13650
{
13660
-
if (new->type != KVM_IRQ_ROUTING_MSI)
13651
+
if (old->type != KVM_IRQ_ROUTING_MSI ||
13652
+
new->type != KVM_IRQ_ROUTING_MSI)
13661
13653
return true;
13662
13654
13663
13655
return !!memcmp(&old->msi, &new->msi, sizeof(new->msi));
+3
-3
arch/x86/mm/tlb.c
+3
-3
arch/x86/mm/tlb.c
···
667
667
prev_mm = this_cpu_read(cpu_tlbstate.last_user_mm_spec);
668
668
669
669
/*
670
-
* Avoid user/user BTB poisoning by flushing the branch predictor
671
-
* when switching between processes. This stops one process from
672
-
* doing Spectre-v2 attacks on another.
670
+
* Avoid user->user BTB/RSB poisoning by flushing them when switching
671
+
* between processes. This stops one process from doing Spectre-v2
672
+
* attacks on another.
673
673
*
674
674
* Both, the conditional and the always IBPB mode use the mm
675
675
* pointer to avoid the IBPB when switching between tasks of the
+2
-2
arch/x86/power/hibernate_asm_64.S
+2
-2
arch/x86/power/hibernate_asm_64.S
···
26
26
/* code below belongs to the image kernel */
27
27
.align PAGE_SIZE
28
28
SYM_FUNC_START(restore_registers)
29
-
ANNOTATE_NOENDBR
29
+
ENDBR
30
30
/* go back to the original page tables */
31
31
movq %r9, %cr3
32
32
···
120
120
121
121
/* code below has been relocated to a safe page */
122
122
SYM_FUNC_START(core_restore_code)
123
-
ANNOTATE_NOENDBR
123
+
ENDBR
124
124
/* switch to temporary page tables */
125
125
movq %rax, %cr3
126
126
/* flush TLB */
+10
arch/x86/xen/enlighten.c
+10
arch/x86/xen/enlighten.c
···
70
70
*/
71
71
struct shared_info *HYPERVISOR_shared_info = &xen_dummy_shared_info;
72
72
73
+
/* Number of pages released from the initial allocation. */
74
+
unsigned long xen_released_pages;
75
+
73
76
static __ref void xen_get_vendor(void)
74
77
{
75
78
init_cpu_devs();
···
469
466
xen_free_unpopulated_pages(1, &pg);
470
467
}
471
468
469
+
/*
470
+
* Account for the region being in the physmap but unpopulated.
471
+
* The value in xen_released_pages is used by the balloon
472
+
* driver to know how much of the physmap is unpopulated and
473
+
* set an accurate initial memory target.
474
+
*/
475
+
xen_released_pages += xen_extra_mem[i].n_pfns;
472
476
/* Zero so region is not also added to the balloon driver. */
473
477
xen_extra_mem[i].n_pfns = 0;
474
478
}
+18
-1
arch/x86/xen/enlighten_pvh.c
+18
-1
arch/x86/xen/enlighten_pvh.c
···
1
1
// SPDX-License-Identifier: GPL-2.0
2
2
#include <linux/acpi.h>
3
+
#include <linux/cpufreq.h>
4
+
#include <linux/cpuidle.h>
3
5
#include <linux/export.h>
4
6
#include <linux/mm.h>
5
7
···
125
123
{
126
124
pvh_reserve_extra_memory();
127
125
128
-
if (xen_initial_domain())
126
+
if (xen_initial_domain()) {
129
127
xen_add_preferred_consoles();
128
+
129
+
/*
130
+
* Disable usage of CPU idle and frequency drivers: when
131
+
* running as hardware domain the exposed native ACPI tables
132
+
* causes idle and/or frequency drivers to attach and
133
+
* malfunction. It's Xen the entity that controls the idle and
134
+
* frequency states.
135
+
*
136
+
* For unprivileged domains the exposed ACPI tables are
137
+
* fabricated and don't contain such data.
138
+
*/
139
+
disable_cpuidle();
140
+
disable_cpufreq();
141
+
WARN_ON(xen_set_default_idle());
142
+
}
130
143
}
131
144
132
145
void __init xen_pvh_init(struct boot_params *boot_params)
-3
arch/x86/xen/setup.c
-3
arch/x86/xen/setup.c
+1
-3
arch/x86/xen/xen-asm.S
+1
-3
arch/x86/xen/xen-asm.S
+2
-2
drivers/accel/ivpu/ivpu_debugfs.c
+2
-2
drivers/accel/ivpu/ivpu_debugfs.c
···
332
332
return -EINVAL;
333
333
334
334
ret = ivpu_rpm_get(vdev);
335
-
if (ret)
335
+
if (ret < 0)
336
336
return ret;
337
337
338
338
ivpu_pm_trigger_recovery(vdev, "debugfs");
···
383
383
return -EINVAL;
384
384
385
385
ret = ivpu_rpm_get(vdev);
386
-
if (ret)
386
+
if (ret < 0)
387
387
return ret;
388
388
389
389
if (active_percent)
+2
-1
drivers/accel/ivpu/ivpu_ipc.c
+2
-1
drivers/accel/ivpu/ivpu_ipc.c
···
302
302
struct ivpu_ipc_consumer cons;
303
303
int ret;
304
304
305
-
drm_WARN_ON(&vdev->drm, pm_runtime_status_suspended(vdev->drm.dev));
305
+
drm_WARN_ON(&vdev->drm, pm_runtime_status_suspended(vdev->drm.dev) &&
306
+
pm_runtime_enabled(vdev->drm.dev));
306
307
307
308
ivpu_ipc_consumer_add(vdev, &cons, channel, NULL);
308
309
+24
drivers/accel/ivpu/ivpu_ms.c
+24
drivers/accel/ivpu/ivpu_ms.c
···
4
4
*/
5
5
6
6
#include <drm/drm_file.h>
7
+
#include <linux/pm_runtime.h>
7
8
8
9
#include "ivpu_drv.h"
9
10
#include "ivpu_gem.h"
···
44
43
if (!args->metric_group_mask || !args->read_period_samples ||
45
44
args->sampling_period_ns < MS_MIN_SAMPLE_PERIOD_NS)
46
45
return -EINVAL;
46
+
47
+
ret = ivpu_rpm_get(vdev);
48
+
if (ret < 0)
49
+
return ret;
47
50
48
51
mutex_lock(&file_priv->ms_lock);
49
52
···
101
96
kfree(ms);
102
97
unlock:
103
98
mutex_unlock(&file_priv->ms_lock);
99
+
100
+
ivpu_rpm_put(vdev);
104
101
return ret;
105
102
}
106
103
···
167
160
if (!args->metric_group_mask)
168
161
return -EINVAL;
169
162
163
+
ret = ivpu_rpm_get(vdev);
164
+
if (ret < 0)
165
+
return ret;
166
+
170
167
mutex_lock(&file_priv->ms_lock);
171
168
172
169
ms = get_instance_by_mask(file_priv, args->metric_group_mask);
···
198
187
unlock:
199
188
mutex_unlock(&file_priv->ms_lock);
200
189
190
+
ivpu_rpm_put(vdev);
201
191
return ret;
202
192
}
203
193
···
216
204
{
217
205
struct ivpu_file_priv *file_priv = file->driver_priv;
218
206
struct drm_ivpu_metric_streamer_stop *args = data;
207
+
struct ivpu_device *vdev = file_priv->vdev;
219
208
struct ivpu_ms_instance *ms;
209
+
int ret;
220
210
221
211
if (!args->metric_group_mask)
222
212
return -EINVAL;
213
+
214
+
ret = ivpu_rpm_get(vdev);
215
+
if (ret < 0)
216
+
return ret;
223
217
224
218
mutex_lock(&file_priv->ms_lock);
225
219
···
235
217
236
218
mutex_unlock(&file_priv->ms_lock);
237
219
220
+
ivpu_rpm_put(vdev);
238
221
return ms ? 0 : -EINVAL;
239
222
}
240
223
···
300
281
void ivpu_ms_cleanup(struct ivpu_file_priv *file_priv)
301
282
{
302
283
struct ivpu_ms_instance *ms, *tmp;
284
+
struct ivpu_device *vdev = file_priv->vdev;
285
+
286
+
pm_runtime_get_sync(vdev->drm.dev);
303
287
304
288
mutex_lock(&file_priv->ms_lock);
305
289
···
315
293
free_instance(file_priv, ms);
316
294
317
295
mutex_unlock(&file_priv->ms_lock);
296
+
297
+
pm_runtime_put_autosuspend(vdev->drm.dev);
318
298
}
319
299
320
300
void ivpu_ms_cleanup_all(struct ivpu_device *vdev)
+28
drivers/acpi/ec.c
+28
drivers/acpi/ec.c
···
2301
2301
DMI_MATCH(DMI_PRODUCT_FAMILY, "103C_5336AN HP ZHAN 66 Pro"),
2302
2302
},
2303
2303
},
2304
+
/*
2305
+
* Lenovo Legion Go S; touchscreen blocks HW sleep when woken up from EC
2306
+
* https://gitlab.freedesktop.org/drm/amd/-/issues/3929
2307
+
*/
2308
+
{
2309
+
.matches = {
2310
+
DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
2311
+
DMI_MATCH(DMI_PRODUCT_NAME, "83L3"),
2312
+
}
2313
+
},
2314
+
{
2315
+
.matches = {
2316
+
DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
2317
+
DMI_MATCH(DMI_PRODUCT_NAME, "83N6"),
2318
+
}
2319
+
},
2320
+
{
2321
+
.matches = {
2322
+
DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
2323
+
DMI_MATCH(DMI_PRODUCT_NAME, "83Q2"),
2324
+
}
2325
+
},
2326
+
{
2327
+
.matches = {
2328
+
DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
2329
+
DMI_MATCH(DMI_PRODUCT_NAME, "83Q3"),
2330
+
}
2331
+
},
2304
2332
{ },
2305
2333
};
2306
2334
+2
-2
drivers/acpi/pptt.c
+2
-2
drivers/acpi/pptt.c
···
229
229
node_entry = ACPI_PTR_DIFF(node, table_hdr);
230
230
entry = ACPI_ADD_PTR(struct acpi_subtable_header, table_hdr,
231
231
sizeof(struct acpi_table_pptt));
232
-
proc_sz = sizeof(struct acpi_pptt_processor *);
232
+
proc_sz = sizeof(struct acpi_pptt_processor);
233
233
234
234
while ((unsigned long)entry + proc_sz < table_end) {
235
235
cpu_node = (struct acpi_pptt_processor *)entry;
···
270
270
table_end = (unsigned long)table_hdr + table_hdr->length;
271
271
entry = ACPI_ADD_PTR(struct acpi_subtable_header, table_hdr,
272
272
sizeof(struct acpi_table_pptt));
273
-
proc_sz = sizeof(struct acpi_pptt_processor *);
273
+
proc_sz = sizeof(struct acpi_pptt_processor);
274
274
275
275
/* find the processor structure associated with this cpuid */
276
276
while ((unsigned long)entry + proc_sz < table_end) {
+6
drivers/ata/pata_pxa.c
+6
drivers/ata/pata_pxa.c
···
223
223
224
224
ap->ioaddr.cmd_addr = devm_ioremap(&pdev->dev, cmd_res->start,
225
225
resource_size(cmd_res));
226
+
if (!ap->ioaddr.cmd_addr)
227
+
return -ENOMEM;
226
228
ap->ioaddr.ctl_addr = devm_ioremap(&pdev->dev, ctl_res->start,
227
229
resource_size(ctl_res));
230
+
if (!ap->ioaddr.ctl_addr)
231
+
return -ENOMEM;
228
232
ap->ioaddr.bmdma_addr = devm_ioremap(&pdev->dev, dma_res->start,
229
233
resource_size(dma_res));
234
+
if (!ap->ioaddr.bmdma_addr)
235
+
return -ENOMEM;
230
236
231
237
/*
232
238
* Adjust register offsets
+10
-3
drivers/ata/sata_sx4.c
+10
-3
drivers/ata/sata_sx4.c
···
1117
1117
mmio += PDC_CHIP0_OFS;
1118
1118
1119
1119
for (i = 0; i < ARRAY_SIZE(pdc_i2c_read_data); i++)
1120
-
pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS,
1121
-
pdc_i2c_read_data[i].reg,
1122
-
&spd0[pdc_i2c_read_data[i].ofs]);
1120
+
if (!pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS,
1121
+
pdc_i2c_read_data[i].reg,
1122
+
&spd0[pdc_i2c_read_data[i].ofs])) {
1123
+
dev_err(host->dev,
1124
+
"Failed in i2c read at index %d: device=%#x, reg=%#x\n",
1125
+
i, PDC_DIMM0_SPD_DEV_ADDRESS, pdc_i2c_read_data[i].reg);
1126
+
return -EIO;
1127
+
}
1123
1128
1124
1129
data |= (spd0[4] - 8) | ((spd0[21] != 0) << 3) | ((spd0[3]-11) << 4);
1125
1130
data |= ((spd0[17] / 4) << 6) | ((spd0[5] / 2) << 7) |
···
1289
1284
1290
1285
/* Programming DIMM0 Module Control Register (index_CID0:80h) */
1291
1286
size = pdc20621_prog_dimm0(host);
1287
+
if (size < 0)
1288
+
return size;
1292
1289
dev_dbg(host->dev, "Local DIMM Size = %dMB\n", size);
1293
1290
1294
1291
/* Programming DIMM Module Global Control Register (index_CID0:88h) */
+1
-1
drivers/block/Kconfig
+1
-1
drivers/block/Kconfig
+1
-1
drivers/block/drbd/Kconfig
+1
-1
drivers/block/drbd/Kconfig
+1
-1
drivers/block/null_blk/main.c
+1
-1
drivers/block/null_blk/main.c
···
2031
2031
nullb->disk->minors = 1;
2032
2032
nullb->disk->fops = &null_ops;
2033
2033
nullb->disk->private_data = nullb;
2034
-
strscpy_pad(nullb->disk->disk_name, nullb->disk_name, DISK_NAME_LEN);
2034
+
strscpy(nullb->disk->disk_name, nullb->disk_name);
2035
2035
2036
2036
if (nullb->dev->zoned) {
2037
2037
rv = null_register_zoned_dev(nullb);
+50
-35
drivers/block/ublk_drv.c
+50
-35
drivers/block/ublk_drv.c
···
1140
1140
__ublk_complete_rq(req);
1141
1141
}
1142
1142
1143
+
static void ublk_do_fail_rq(struct request *req)
1144
+
{
1145
+
struct ublk_queue *ubq = req->mq_hctx->driver_data;
1146
+
1147
+
if (ublk_nosrv_should_reissue_outstanding(ubq->dev))
1148
+
blk_mq_requeue_request(req, false);
1149
+
else
1150
+
__ublk_complete_rq(req);
1151
+
}
1152
+
1153
+
static void ublk_fail_rq_fn(struct kref *ref)
1154
+
{
1155
+
struct ublk_rq_data *data = container_of(ref, struct ublk_rq_data,
1156
+
ref);
1157
+
struct request *req = blk_mq_rq_from_pdu(data);
1158
+
1159
+
ublk_do_fail_rq(req);
1160
+
}
1161
+
1143
1162
/*
1144
1163
* Since ublk_rq_task_work_cb always fails requests immediately during
1145
1164
* exiting, __ublk_fail_req() is only called from abort context during
···
1172
1153
{
1173
1154
WARN_ON_ONCE(io->flags & UBLK_IO_FLAG_ACTIVE);
1174
1155
1175
-
if (ublk_nosrv_should_reissue_outstanding(ubq->dev))
1176
-
blk_mq_requeue_request(req, false);
1177
-
else
1178
-
ublk_put_req_ref(ubq, req);
1156
+
if (ublk_need_req_ref(ubq)) {
1157
+
struct ublk_rq_data *data = blk_mq_rq_to_pdu(req);
1158
+
1159
+
kref_put(&data->ref, ublk_fail_rq_fn);
1160
+
} else {
1161
+
ublk_do_fail_rq(req);
1162
+
}
1179
1163
}
1180
1164
1181
1165
static void ubq_complete_io_cmd(struct ublk_io *io, int res,
···
1371
1349
return BLK_EH_RESET_TIMER;
1372
1350
}
1373
1351
1374
-
static blk_status_t ublk_prep_req(struct ublk_queue *ubq, struct request *rq)
1352
+
static blk_status_t ublk_prep_req(struct ublk_queue *ubq, struct request *rq,
1353
+
bool check_cancel)
1375
1354
{
1376
1355
blk_status_t res;
1377
1356
···
1391
1368
if (ublk_nosrv_should_queue_io(ubq) && unlikely(ubq->force_abort))
1392
1369
return BLK_STS_IOERR;
1393
1370
1394
-
if (unlikely(ubq->canceling))
1371
+
if (check_cancel && unlikely(ubq->canceling))
1395
1372
return BLK_STS_IOERR;
1396
1373
1397
1374
/* fill iod to slot in io cmd buffer */
···
1410
1387
struct request *rq = bd->rq;
1411
1388
blk_status_t res;
1412
1389
1413
-
res = ublk_prep_req(ubq, rq);
1390
+
res = ublk_prep_req(ubq, rq, false);
1414
1391
if (res != BLK_STS_OK)
1415
1392
return res;
1416
1393
···
1442
1419
ublk_queue_cmd_list(ubq, &submit_list);
1443
1420
ubq = this_q;
1444
1421
1445
-
if (ublk_prep_req(ubq, req) == BLK_STS_OK)
1422
+
if (ublk_prep_req(ubq, req, true) == BLK_STS_OK)
1446
1423
rq_list_add_tail(&submit_list, req);
1447
1424
else
1448
1425
rq_list_add_tail(&requeue_list, req);
···
2436
2413
return ub;
2437
2414
}
2438
2415
2439
-
static int ublk_ctrl_start_dev(struct ublk_device *ub, struct io_uring_cmd *cmd)
2416
+
static int ublk_ctrl_start_dev(struct ublk_device *ub,
2417
+
const struct ublksrv_ctrl_cmd *header)
2440
2418
{
2441
-
const struct ublksrv_ctrl_cmd *header = io_uring_sqe_cmd(cmd->sqe);
2442
2419
const struct ublk_param_basic *p = &ub->params.basic;
2443
2420
int ublksrv_pid = (int)header->data[0];
2444
2421
struct queue_limits lim = {
···
2557
2534
}
2558
2535
2559
2536
static int ublk_ctrl_get_queue_affinity(struct ublk_device *ub,
2560
-
struct io_uring_cmd *cmd)
2537
+
const struct ublksrv_ctrl_cmd *header)
2561
2538
{
2562
-
const struct ublksrv_ctrl_cmd *header = io_uring_sqe_cmd(cmd->sqe);
2563
2539
void __user *argp = (void __user *)(unsigned long)header->addr;
2564
2540
cpumask_var_t cpumask;
2565
2541
unsigned long queue;
···
2607
2585
info->nr_hw_queues, info->queue_depth);
2608
2586
}
2609
2587
2610
-
static int ublk_ctrl_add_dev(struct io_uring_cmd *cmd)
2588
+
static int ublk_ctrl_add_dev(const struct ublksrv_ctrl_cmd *header)
2611
2589
{
2612
-
const struct ublksrv_ctrl_cmd *header = io_uring_sqe_cmd(cmd->sqe);
2613
2590
void __user *argp = (void __user *)(unsigned long)header->addr;
2614
2591
struct ublksrv_ctrl_dev_info info;
2615
2592
struct ublk_device *ub;
···
2833
2812
}
2834
2813
2835
2814
static int ublk_ctrl_get_dev_info(struct ublk_device *ub,
2836
-
struct io_uring_cmd *cmd)
2815
+
const struct ublksrv_ctrl_cmd *header)
2837
2816
{
2838
-
const struct ublksrv_ctrl_cmd *header = io_uring_sqe_cmd(cmd->sqe);
2839
2817
void __user *argp = (void __user *)(unsigned long)header->addr;
2840
2818
2841
2819
if (header->len < sizeof(struct ublksrv_ctrl_dev_info) || !header->addr)
···
2863
2843
}
2864
2844
2865
2845
static int ublk_ctrl_get_params(struct ublk_device *ub,
2866
-
struct io_uring_cmd *cmd)
2846
+
const struct ublksrv_ctrl_cmd *header)
2867
2847
{
2868
-
const struct ublksrv_ctrl_cmd *header = io_uring_sqe_cmd(cmd->sqe);
2869
2848
void __user *argp = (void __user *)(unsigned long)header->addr;
2870
2849
struct ublk_params_header ph;
2871
2850
int ret;
···
2893
2874
}
2894
2875
2895
2876
static int ublk_ctrl_set_params(struct ublk_device *ub,
2896
-
struct io_uring_cmd *cmd)
2877
+
const struct ublksrv_ctrl_cmd *header)
2897
2878
{
2898
-
const struct ublksrv_ctrl_cmd *header = io_uring_sqe_cmd(cmd->sqe);
2899
2879
void __user *argp = (void __user *)(unsigned long)header->addr;
2900
2880
struct ublk_params_header ph;
2901
2881
int ret = -EFAULT;
···
2958
2940
}
2959
2941
2960
2942
static int ublk_ctrl_start_recovery(struct ublk_device *ub,
2961
-
struct io_uring_cmd *cmd)
2943
+
const struct ublksrv_ctrl_cmd *header)
2962
2944
{
2963
-
const struct ublksrv_ctrl_cmd *header = io_uring_sqe_cmd(cmd->sqe);
2964
2945
int ret = -EINVAL;
2965
2946
int i;
2966
2947
···
3005
2988
}
3006
2989
3007
2990
static int ublk_ctrl_end_recovery(struct ublk_device *ub,
3008
-
struct io_uring_cmd *cmd)
2991
+
const struct ublksrv_ctrl_cmd *header)
3009
2992
{
3010
-
const struct ublksrv_ctrl_cmd *header = io_uring_sqe_cmd(cmd->sqe);
3011
2993
int ublksrv_pid = (int)header->data[0];
3012
2994
int ret = -EINVAL;
3013
2995
int i;
···
3053
3037
return ret;
3054
3038
}
3055
3039
3056
-
static int ublk_ctrl_get_features(struct io_uring_cmd *cmd)
3040
+
static int ublk_ctrl_get_features(const struct ublksrv_ctrl_cmd *header)
3057
3041
{
3058
-
const struct ublksrv_ctrl_cmd *header = io_uring_sqe_cmd(cmd->sqe);
3059
3042
void __user *argp = (void __user *)(unsigned long)header->addr;
3060
3043
u64 features = UBLK_F_ALL;
3061
3044
···
3193
3178
goto out;
3194
3179
3195
3180
if (cmd_op == UBLK_U_CMD_GET_FEATURES) {
3196
-
ret = ublk_ctrl_get_features(cmd);
3181
+
ret = ublk_ctrl_get_features(header);
3197
3182
goto out;
3198
3183
}
3199
3184
···
3210
3195
3211
3196
switch (_IOC_NR(cmd_op)) {
3212
3197
case UBLK_CMD_START_DEV:
3213
-
ret = ublk_ctrl_start_dev(ub, cmd);
3198
+
ret = ublk_ctrl_start_dev(ub, header);
3214
3199
break;
3215
3200
case UBLK_CMD_STOP_DEV:
3216
3201
ret = ublk_ctrl_stop_dev(ub);
3217
3202
break;
3218
3203
case UBLK_CMD_GET_DEV_INFO:
3219
3204
case UBLK_CMD_GET_DEV_INFO2:
3220
-
ret = ublk_ctrl_get_dev_info(ub, cmd);
3205
+
ret = ublk_ctrl_get_dev_info(ub, header);
3221
3206
break;
3222
3207
case UBLK_CMD_ADD_DEV:
3223
-
ret = ublk_ctrl_add_dev(cmd);
3208
+
ret = ublk_ctrl_add_dev(header);
3224
3209
break;
3225
3210
case UBLK_CMD_DEL_DEV:
3226
3211
ret = ublk_ctrl_del_dev(&ub, true);
···
3229
3214
ret = ublk_ctrl_del_dev(&ub, false);
3230
3215
break;
3231
3216
case UBLK_CMD_GET_QUEUE_AFFINITY:
3232
-
ret = ublk_ctrl_get_queue_affinity(ub, cmd);
3217
+
ret = ublk_ctrl_get_queue_affinity(ub, header);
3233
3218
break;
3234
3219
case UBLK_CMD_GET_PARAMS:
3235
-
ret = ublk_ctrl_get_params(ub, cmd);
3220
+
ret = ublk_ctrl_get_params(ub, header);
3236
3221
break;
3237
3222
case UBLK_CMD_SET_PARAMS:
3238
-
ret = ublk_ctrl_set_params(ub, cmd);
3223
+
ret = ublk_ctrl_set_params(ub, header);
3239
3224
break;
3240
3225
case UBLK_CMD_START_USER_RECOVERY:
3241
-
ret = ublk_ctrl_start_recovery(ub, cmd);
3226
+
ret = ublk_ctrl_start_recovery(ub, header);
3242
3227
break;
3243
3228
case UBLK_CMD_END_USER_RECOVERY:
3244
-
ret = ublk_ctrl_end_recovery(ub, cmd);
3229
+
ret = ublk_ctrl_end_recovery(ub, header);
3245
3230
break;
3246
3231
default:
3247
3232
ret = -EOPNOTSUPP;
+1
-1
drivers/dma-buf/udmabuf.c
+1
-1
drivers/dma-buf/udmabuf.c
+2
-2
drivers/firmware/smccc/kvm_guest.c
+2
-2
drivers/firmware/smccc/kvm_guest.c
···
95
95
96
96
for (i = 0; i < max_cpus; i++) {
97
97
arm_smccc_1_1_invoke(ARM_SMCCC_VENDOR_HYP_KVM_DISCOVER_IMPL_CPUS_FUNC_ID,
98
-
i, &res);
98
+
i, 0, 0, &res);
99
99
if (res.a0 != SMCCC_RET_SUCCESS) {
100
100
pr_warn("Discovering target implementation CPUs failed\n");
101
101
goto mem_free;
···
103
103
target[i].midr = res.a1;
104
104
target[i].revidr = res.a2;
105
105
target[i].aidr = res.a3;
106
-
};
106
+
}
107
107
108
108
if (!cpu_errata_set_target_impl(max_cpus, target)) {
109
109
pr_warn("Failed to set target implementation CPUs\n");
+34
drivers/gpio/TODO
+34
drivers/gpio/TODO
···
186
186
187
187
Encourage users to switch to using them and eventually remove the existing
188
188
global export/unexport attribues.
189
+
190
+
-------------------------------------------------------------------------------
191
+
192
+
Remove GPIOD_FLAGS_BIT_NONEXCLUSIVE
193
+
194
+
GPIOs in the linux kernel are meant to be an exclusive resource. This means
195
+
that the GPIO descriptors (the software representation of the hardware concept)
196
+
are not reference counted and - in general - only one user at a time can
197
+
request a GPIO line and control its settings. The consumer API is designed
198
+
around full control of the line's state as evidenced by the fact that, for
199
+
instance, gpiod_set_value() does indeed drive the line as requested, instead
200
+
of bumping an enable counter of some sort.
201
+
202
+
A problematic use-case for GPIOs is when two consumers want to use the same
203
+
descriptor independently. An example of such a user is the regulator subsystem
204
+
which may instantiate several struct regulator_dev instances containing
205
+
a struct device but using the same enable GPIO line.
206
+
207
+
A workaround was introduced in the form of the GPIOD_FLAGS_BIT_NONEXCLUSIVE
208
+
flag but its implementation is problematic: it does not provide any
209
+
synchronization of usage nor did it introduce any enable count meaning the
210
+
non-exclusive users of the same descriptor will in fact "fight" for the
211
+
control over it. This flag should be removed and replaced with a better
212
+
solution, possibly based on the new power sequencing subsystem.
213
+
214
+
-------------------------------------------------------------------------------
215
+
216
+
Remove devm_gpiod_unhinge()
217
+
218
+
devm_gpiod_unhinge() is provided as a way to transfer the ownership of managed
219
+
enable GPIOs to the regulator core. Rather than doing that however, we should
220
+
make it possible for the regulator subsystem to deal with GPIO resources the
221
+
lifetime of which it doesn't control as logically, a GPIO obtained by a caller
222
+
should also be freed by it.
+3
-1
drivers/gpio/gpio-mpc8xxx.c
+3
-1
drivers/gpio/gpio-mpc8xxx.c
+13
-12
drivers/gpio/gpio-tegra186.c
+13
-12
drivers/gpio/gpio-tegra186.c
···
823
823
struct gpio_irq_chip *irq;
824
824
struct tegra_gpio *gpio;
825
825
struct device_node *np;
826
+
struct resource *res;
826
827
char **names;
827
828
int err;
828
829
···
843
842
gpio->num_banks++;
844
843
845
844
/* get register apertures */
846
-
gpio->secure = devm_platform_ioremap_resource_byname(pdev, "security");
847
-
if (IS_ERR(gpio->secure)) {
848
-
gpio->secure = devm_platform_ioremap_resource(pdev, 0);
849
-
if (IS_ERR(gpio->secure))
850
-
return PTR_ERR(gpio->secure);
851
-
}
845
+
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "security");
846
+
if (!res)
847
+
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
848
+
gpio->secure = devm_ioremap_resource(&pdev->dev, res);
849
+
if (IS_ERR(gpio->secure))
850
+
return PTR_ERR(gpio->secure);
852
851
853
-
gpio->base = devm_platform_ioremap_resource_byname(pdev, "gpio");
854
-
if (IS_ERR(gpio->base)) {
855
-
gpio->base = devm_platform_ioremap_resource(pdev, 1);
856
-
if (IS_ERR(gpio->base))
857
-
return PTR_ERR(gpio->base);
858
-
}
852
+
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "gpio");
853
+
if (!res)
854
+
res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
855
+
gpio->base = devm_ioremap_resource(&pdev->dev, res);
856
+
if (IS_ERR(gpio->base))
857
+
return PTR_ERR(gpio->base);
859
858
860
859
err = platform_irq_count(pdev);
861
860
if (err < 0)
+1
drivers/gpio/gpio-zynq.c
+1
drivers/gpio/gpio-zynq.c
···
1011
1011
ret = pm_runtime_get_sync(&pdev->dev);
1012
1012
if (ret < 0)
1013
1013
dev_warn(&pdev->dev, "pm_runtime_get_sync() Failed\n");
1014
+
device_init_wakeup(&pdev->dev, 0);
1014
1015
gpiochip_remove(&gpio->chip);
1015
1016
device_set_wakeup_capable(&pdev->dev, 0);
1016
1017
pm_runtime_disable(&pdev->dev);
+5
-1
drivers/gpio/gpiolib-devres.c
+5
-1
drivers/gpio/gpiolib-devres.c
···
317
317
* @dev: GPIO consumer
318
318
* @desc: GPIO descriptor to remove resource management from
319
319
*
320
+
* *DEPRECATED*
321
+
* This function should not be used. It's been provided as a workaround for
322
+
* resource ownership issues in the regulator framework and should be replaced
323
+
* with a better solution.
324
+
*
320
325
* Remove resource management from a GPIO descriptor. This is needed when
321
326
* you want to hand over lifecycle management of a descriptor to another
322
327
* mechanism.
323
328
*/
324
-
325
329
void devm_gpiod_unhinge(struct device *dev, struct gpio_desc *desc)
326
330
{
327
331
int ret;
+5
-3
drivers/gpio/gpiolib-of.c
+5
-3
drivers/gpio/gpiolib-of.c
···
193
193
*/
194
194
{ "himax,hx8357", "gpios-reset", false },
195
195
{ "himax,hx8369", "gpios-reset", false },
196
+
#endif
197
+
#if IS_ENABLED(CONFIG_MTD_NAND_JZ4780)
196
198
/*
197
199
* The rb-gpios semantics was undocumented and qi,lb60 (along with
198
200
* the ingenic driver) got it wrong. The active state encodes the
···
268
266
{ "fsl,imx8qm-fec", "phy-reset-gpios", "phy-reset-active-high" },
269
267
{ "fsl,s32v234-fec", "phy-reset-gpios", "phy-reset-active-high" },
270
268
#endif
269
+
#if IS_ENABLED(CONFIG_MMC_ATMELMCI)
270
+
{ "atmel,hsmci", "cd-gpios", "cd-inverted" },
271
+
#endif
271
272
#if IS_ENABLED(CONFIG_PCI_IMX6)
272
273
{ "fsl,imx6q-pcie", "reset-gpio", "reset-gpio-active-high" },
273
274
{ "fsl,imx6sx-pcie", "reset-gpio", "reset-gpio-active-high" },
···
296
291
#if IS_ENABLED(CONFIG_REGULATOR_GPIO)
297
292
{ "regulator-gpio", "enable-gpio", "enable-active-high" },
298
293
{ "regulator-gpio", "enable-gpios", "enable-active-high" },
299
-
#endif
300
-
#if IS_ENABLED(CONFIG_MMC_ATMELMCI)
301
-
{ "atmel,hsmci", "cd-gpios", "cd-inverted" },
302
294
#endif
303
295
};
304
296
unsigned int i;
-1
drivers/gpu/drm/amd/amdgpu/amdgpu.h
-1
drivers/gpu/drm/amd/amdgpu/amdgpu.h
···
353
353
AMDGPU_CP_KIQ_IRQ_DRIVER0 = 0,
354
354
AMDGPU_CP_KIQ_IRQ_LAST
355
355
};
356
-
#define SRIOV_USEC_TIMEOUT 1200000 /* wait 12 * 100ms for SRIOV */
357
356
#define MAX_KIQ_REG_WAIT 5000 /* in usecs, 5ms */
358
357
#define MAX_KIQ_REG_BAILOUT_INTERVAL 5 /* in msecs, 5ms */
359
358
#define MAX_KIQ_REG_TRY 1000
+7
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+7
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
···
3643
3643
adev, adev->ip_blocks[i].version->type))
3644
3644
continue;
3645
3645
3646
+
/* Since we skip suspend for S0i3, we need to cancel the delayed
3647
+
* idle work here as the suspend callback never gets called.
3648
+
*/
3649
+
if (adev->in_s0ix &&
3650
+
adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GFX &&
3651
+
amdgpu_ip_version(adev, GC_HWIP, 0) >= IP_VERSION(10, 0, 0))
3652
+
cancel_delayed_work_sync(&adev->gfx.idle_work);
3646
3653
/* skip suspend of gfx/mes and psp for S0ix
3647
3654
* gfx is in gfxoff state, so on resume it will exit gfxoff just
3648
3655
* like at runtime. PSP is also part of the always on hardware
+2
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+2
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
···
120
120
MODULE_FIRMWARE("amdgpu/raven_ip_discovery.bin");
121
121
MODULE_FIRMWARE("amdgpu/raven2_ip_discovery.bin");
122
122
MODULE_FIRMWARE("amdgpu/picasso_ip_discovery.bin");
123
+
MODULE_FIRMWARE("amdgpu/arcturus_ip_discovery.bin");
124
+
MODULE_FIRMWARE("amdgpu/aldebaran_ip_discovery.bin");
123
125
124
126
#define mmIP_DISCOVERY_VERSION 0x16A00
125
127
#define mmRCC_CONFIG_MEMSIZE 0xde3
+19
-8
drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
+19
-8
drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
···
75
75
*/
76
76
static int amdgpu_dma_buf_pin(struct dma_buf_attachment *attach)
77
77
{
78
-
struct drm_gem_object *obj = attach->dmabuf->priv;
79
-
struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
78
+
struct dma_buf *dmabuf = attach->dmabuf;
79
+
struct amdgpu_bo *bo = gem_to_amdgpu_bo(dmabuf->priv);
80
+
u32 domains = bo->preferred_domains;
80
81
81
-
/* pin buffer into GTT */
82
-
return amdgpu_bo_pin(bo, AMDGPU_GEM_DOMAIN_GTT);
82
+
dma_resv_assert_held(dmabuf->resv);
83
+
84
+
/*
85
+
* Try pinning into VRAM to allow P2P with RDMA NICs without ODP
86
+
* support if all attachments can do P2P. If any attachment can't do
87
+
* P2P just pin into GTT instead.
88
+
*/
89
+
list_for_each_entry(attach, &dmabuf->attachments, node)
90
+
if (!attach->peer2peer)
91
+
domains &= ~AMDGPU_GEM_DOMAIN_VRAM;
92
+
93
+
if (domains & AMDGPU_GEM_DOMAIN_VRAM)
94
+
bo->flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
95
+
96
+
return amdgpu_bo_pin(bo, domains);
83
97
}
84
98
85
99
/**
···
148
134
r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
149
135
if (r)
150
136
return ERR_PTR(r);
151
-
152
-
} else if (bo->tbo.resource->mem_type != TTM_PL_TT) {
153
-
return ERR_PTR(-EBUSY);
154
137
}
155
138
156
139
switch (bo->tbo.resource->mem_type) {
···
195
184
struct sg_table *sgt,
196
185
enum dma_data_direction dir)
197
186
{
198
-
if (sgt->sgl->page_link) {
187
+
if (sg_page(sgt->sgl)) {
199
188
dma_unmap_sgtable(attach->dev, sgt, dir, 0);
200
189
sg_free_table(sgt);
201
190
kfree(sgt);
+14
-5
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+14
-5
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
···
699
699
uint32_t flush_type, bool all_hub,
700
700
uint32_t inst)
701
701
{
702
-
u32 usec_timeout = amdgpu_sriov_vf(adev) ? SRIOV_USEC_TIMEOUT :
703
-
adev->usec_timeout;
704
702
struct amdgpu_ring *ring = &adev->gfx.kiq[inst].ring;
705
703
struct amdgpu_kiq *kiq = &adev->gfx.kiq[inst];
706
704
unsigned int ndw;
707
-
int r;
705
+
int r, cnt = 0;
708
706
uint32_t seq;
709
707
710
708
/*
···
759
761
760
762
amdgpu_ring_commit(ring);
761
763
spin_unlock(&adev->gfx.kiq[inst].ring_lock);
762
-
if (amdgpu_fence_wait_polling(ring, seq, usec_timeout) < 1) {
764
+
765
+
r = amdgpu_fence_wait_polling(ring, seq, MAX_KIQ_REG_WAIT);
766
+
767
+
might_sleep();
768
+
while (r < 1 && cnt++ < MAX_KIQ_REG_TRY &&
769
+
!amdgpu_reset_pending(adev->reset_domain)) {
770
+
msleep(MAX_KIQ_REG_BAILOUT_INTERVAL);
771
+
r = amdgpu_fence_wait_polling(ring, seq, MAX_KIQ_REG_WAIT);
772
+
}
773
+
774
+
if (cnt > MAX_KIQ_REG_TRY) {
763
775
dev_err(adev->dev, "timeout waiting for kiq fence\n");
764
776
r = -ETIME;
765
-
}
777
+
} else
778
+
r = 0;
766
779
}
767
780
768
781
error_unlock_reset:
+2
-2
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+2
-2
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
···
163
163
* When GTT is just an alternative to VRAM make sure that we
164
164
* only use it as fallback and still try to fill up VRAM first.
165
165
*/
166
-
if (domain & abo->preferred_domains & AMDGPU_GEM_DOMAIN_VRAM &&
167
-
!(adev->flags & AMD_IS_APU))
166
+
if (abo->tbo.resource && !(adev->flags & AMD_IS_APU) &&
167
+
domain & abo->preferred_domains & AMDGPU_GEM_DOMAIN_VRAM)
168
168
places[c].flags |= TTM_PL_FLAG_FALLBACK;
169
169
c++;
170
170
}
+4
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
+4
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
···
24
24
25
25
#include <linux/dma-mapping.h>
26
26
#include <drm/ttm/ttm_range_manager.h>
27
+
#include <drm/drm_drv.h>
27
28
28
29
#include "amdgpu.h"
29
30
#include "amdgpu_vm.h"
···
908
907
struct ttm_resource_manager *man = &mgr->manager;
909
908
int err;
910
909
910
+
man->cg = drmm_cgroup_register_region(adev_to_drm(adev), "vram", adev->gmc.real_vram_size);
911
+
if (IS_ERR(man->cg))
912
+
return PTR_ERR(man->cg);
911
913
ttm_resource_manager_init(man, &adev->mman.bdev,
912
914
adev->gmc.real_vram_size);
913
915
+4
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
+4
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
+12
-9
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
+12
-9
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
···
1392
1392
mes_v12_0_queue_init_register(ring);
1393
1393
}
1394
1394
1395
-
/* get MES scheduler/KIQ versions */
1396
-
mutex_lock(&adev->srbm_mutex);
1397
-
soc21_grbm_select(adev, 3, pipe, 0, 0);
1395
+
if (((pipe == AMDGPU_MES_SCHED_PIPE) && !adev->mes.sched_version) ||
1396
+
((pipe == AMDGPU_MES_KIQ_PIPE) && !adev->mes.kiq_version)) {
1397
+
/* get MES scheduler/KIQ versions */
1398
+
mutex_lock(&adev->srbm_mutex);
1399
+
soc21_grbm_select(adev, 3, pipe, 0, 0);
1398
1400
1399
-
if (pipe == AMDGPU_MES_SCHED_PIPE)
1400
-
adev->mes.sched_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);
1401
-
else if (pipe == AMDGPU_MES_KIQ_PIPE && adev->enable_mes_kiq)
1402
-
adev->mes.kiq_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);
1401
+
if (pipe == AMDGPU_MES_SCHED_PIPE)
1402
+
adev->mes.sched_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);
1403
+
else if (pipe == AMDGPU_MES_KIQ_PIPE && adev->enable_mes_kiq)
1404
+
adev->mes.kiq_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);
1403
1405
1404
-
soc21_grbm_select(adev, 0, 0, 0, 0);
1405
-
mutex_unlock(&adev->srbm_mutex);
1406
+
soc21_grbm_select(adev, 0, 0, 0, 0);
1407
+
mutex_unlock(&adev->srbm_mutex);
1408
+
}
1406
1409
1407
1410
return 0;
1408
1411
}
+5
-4
drivers/gpu/drm/amd/amdkfd/kfd_topology.c
+5
-4
drivers/gpu/drm/amd/amdkfd/kfd_topology.c
···
1983
1983
if (kfd_dbg_has_ttmps_always_setup(dev->gpu))
1984
1984
dev->node_props.debug_prop |= HSA_DBG_DISPATCH_INFO_ALWAYS_VALID;
1985
1985
1986
-
if (dev->gpu->adev->sdma.supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE)
1987
-
dev->node_props.capability2 |= HSA_CAP2_PER_SDMA_QUEUE_RESET_SUPPORTED;
1988
-
1989
1986
if (KFD_GC_VERSION(dev->gpu) < IP_VERSION(10, 0, 0)) {
1990
1987
if (KFD_GC_VERSION(dev->gpu) == IP_VERSION(9, 4, 3) ||
1991
1988
KFD_GC_VERSION(dev->gpu) == IP_VERSION(9, 4, 4))
···
1998
2001
dev->node_props.capability |=
1999
2002
HSA_CAP_TRAP_DEBUG_PRECISE_MEMORY_OPERATIONS_SUPPORTED;
2000
2003
2001
-
dev->node_props.capability |= HSA_CAP_PER_QUEUE_RESET_SUPPORTED;
2004
+
if (!amdgpu_sriov_vf(dev->gpu->adev))
2005
+
dev->node_props.capability |= HSA_CAP_PER_QUEUE_RESET_SUPPORTED;
2006
+
2007
+
if (dev->gpu->adev->sdma.supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE)
2008
+
dev->node_props.capability2 |= HSA_CAP2_PER_SDMA_QUEUE_RESET_SUPPORTED;
2002
2009
} else {
2003
2010
dev->node_props.debug_prop |= HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX10 |
2004
2011
HSA_DBG_WATCH_ADDR_MASK_HI_BIT;
+21
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+21
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
···
1726
1726
.callback = edp0_on_dp1_callback,
1727
1727
.matches = {
1728
1728
DMI_MATCH(DMI_SYS_VENDOR, "HP"),
1729
+
DMI_MATCH(DMI_PRODUCT_NAME, "HP EliteBook 645 14 inch G11 Notebook PC"),
1730
+
},
1731
+
},
1732
+
{
1733
+
.callback = edp0_on_dp1_callback,
1734
+
.matches = {
1735
+
DMI_MATCH(DMI_SYS_VENDOR, "HP"),
1729
1736
DMI_MATCH(DMI_PRODUCT_NAME, "HP EliteBook 665 16 inch G11 Notebook PC"),
1737
+
},
1738
+
},
1739
+
{
1740
+
.callback = edp0_on_dp1_callback,
1741
+
.matches = {
1742
+
DMI_MATCH(DMI_SYS_VENDOR, "HP"),
1743
+
DMI_MATCH(DMI_PRODUCT_NAME, "HP ProBook 445 14 inch G11 Notebook PC"),
1744
+
},
1745
+
},
1746
+
{
1747
+
.callback = edp0_on_dp1_callback,
1748
+
.matches = {
1749
+
DMI_MATCH(DMI_SYS_VENDOR, "HP"),
1750
+
DMI_MATCH(DMI_PRODUCT_NAME, "HP ProBook 465 16 inch G11 Notebook PC"),
1730
1751
},
1731
1752
},
1732
1753
{}
+14
-3
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
+14
-3
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
···
113
113
*
114
114
* Panel Replay and PSR SU
115
115
* - Enable when:
116
+
* - VRR is disabled
116
117
* - vblank counter is disabled
117
118
* - entry is allowed: usermode demonstrates an adequate number of fast
118
119
* commits)
···
132
131
bool is_sr_active = (link->replay_settings.replay_allow_active ||
133
132
link->psr_settings.psr_allow_active);
134
133
bool is_crc_window_active = false;
134
+
bool vrr_active = amdgpu_dm_crtc_vrr_active_irq(vblank_work->acrtc);
135
135
136
136
#ifdef CONFIG_DRM_AMD_SECURE_DISPLAY
137
137
is_crc_window_active =
138
138
amdgpu_dm_crc_window_is_activated(&vblank_work->acrtc->base);
139
139
#endif
140
140
141
-
if (link->replay_settings.replay_feature_enabled &&
141
+
if (link->replay_settings.replay_feature_enabled && !vrr_active &&
142
142
allow_sr_entry && !is_sr_active && !is_crc_window_active) {
143
143
amdgpu_dm_replay_enable(vblank_work->stream, true);
144
144
} else if (vblank_enabled) {
145
145
if (link->psr_settings.psr_version < DC_PSR_VERSION_SU_1 && is_sr_active)
146
146
amdgpu_dm_psr_disable(vblank_work->stream, false);
147
-
} else if (link->psr_settings.psr_feature_enabled &&
147
+
} else if (link->psr_settings.psr_feature_enabled && !vrr_active &&
148
148
allow_sr_entry && !is_sr_active && !is_crc_window_active) {
149
149
150
150
struct amdgpu_dm_connector *aconn =
···
246
244
struct vblank_control_work *vblank_work =
247
245
container_of(work, struct vblank_control_work, work);
248
246
struct amdgpu_display_manager *dm = vblank_work->dm;
247
+
struct amdgpu_device *adev = drm_to_adev(dm->ddev);
248
+
int r;
249
249
250
250
mutex_lock(&dm->dc_lock);
251
251
···
275
271
vblank_work->acrtc->dm_irq_params.allow_sr_entry);
276
272
}
277
273
278
-
if (dm->active_vblank_irq_count == 0)
274
+
if (dm->active_vblank_irq_count == 0) {
275
+
r = amdgpu_dpm_pause_power_profile(adev, true);
276
+
if (r)
277
+
dev_warn(adev->dev, "failed to set default power profile mode\n");
279
278
dc_allow_idle_optimizations(dm->dc, true);
279
+
r = amdgpu_dpm_pause_power_profile(adev, false);
280
+
if (r)
281
+
dev_warn(adev->dev, "failed to restore the power profile mode\n");
282
+
}
280
283
281
284
mutex_unlock(&dm->dc_lock);
282
285
+15
-2
drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c
+15
-2
drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c
···
86
86
/* Store configuration options */
87
87
(*dml_ctx)->config = *config;
88
88
89
+
DC_FP_START();
90
+
89
91
/*Initialize SOCBB and DCNIP params */
90
92
dml21_initialize_soc_bb_params(&(*dml_ctx)->v21.dml_init, config, in_dc);
91
93
dml21_initialize_ip_params(&(*dml_ctx)->v21.dml_init, config, in_dc);
···
98
96
99
97
/*Initialize DML21 instance */
100
98
dml2_initialize_instance(&(*dml_ctx)->v21.dml_init);
99
+
100
+
DC_FP_END();
101
101
}
102
102
103
103
bool dml21_create(const struct dc *in_dc, struct dml2_context **dml_ctx, const struct dml2_configuration_options *config)
···
287
283
{
288
284
bool out = false;
289
285
286
+
DC_FP_START();
287
+
290
288
/* Use dml_validate_only for fast_validate path */
291
-
if (fast_validate) {
289
+
if (fast_validate)
292
290
out = dml21_check_mode_support(in_dc, context, dml_ctx);
293
-
} else
291
+
else
294
292
out = dml21_mode_check_and_programming(in_dc, context, dml_ctx);
293
+
294
+
DC_FP_END();
295
+
295
296
return out;
296
297
}
297
298
···
435
426
436
427
dst_dml_ctx->v21.mode_programming.programming = dst_dml2_programming;
437
428
429
+
DC_FP_START();
430
+
438
431
/* need to initialize copied instance for internal references to be correct */
439
432
dml2_initialize_instance(&dst_dml_ctx->v21.dml_init);
433
+
434
+
DC_FP_END();
440
435
}
441
436
442
437
bool dml21_create_copy(struct dml2_context **dst_dml_ctx,
+9
drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c
+9
drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c
···
732
732
return out;
733
733
}
734
734
735
+
DC_FP_START();
736
+
735
737
/* Use dml_validate_only for fast_validate path */
736
738
if (fast_validate)
737
739
out = dml2_validate_only(context);
738
740
else
739
741
out = dml2_validate_and_build_resource(in_dc, context);
742
+
743
+
DC_FP_END();
744
+
740
745
return out;
741
746
}
742
747
···
784
779
break;
785
780
}
786
781
782
+
DC_FP_START();
783
+
787
784
initialize_dml2_ip_params(*dml2, in_dc, &(*dml2)->v20.dml_core_ctx.ip);
788
785
789
786
initialize_dml2_soc_bbox(*dml2, in_dc, &(*dml2)->v20.dml_core_ctx.soc);
790
787
791
788
initialize_dml2_soc_states(*dml2, in_dc, &(*dml2)->v20.dml_core_ctx.soc, &(*dml2)->v20.dml_core_ctx.states);
789
+
790
+
DC_FP_END();
792
791
}
793
792
794
793
bool dml2_create(const struct dc *in_dc, const struct dml2_configuration_options *config, struct dml2_context **dml2)
+1
drivers/gpu/drm/amd/include/kgd_pp_interface.h
+1
drivers/gpu/drm/amd/include/kgd_pp_interface.h
···
429
429
int (*set_pp_table)(void *handle, const char *buf, size_t size);
430
430
void (*debugfs_print_current_performance_level)(void *handle, struct seq_file *m);
431
431
int (*switch_power_profile)(void *handle, enum PP_SMC_POWER_PROFILE type, bool en);
432
+
int (*pause_power_profile)(void *handle, bool pause);
432
433
/* export to amdgpu */
433
434
struct amd_vce_state *(*get_vce_clock_state)(void *handle, u32 idx);
434
435
int (*dispatch_tasks)(void *handle, enum amd_pp_task task_id,
+19
drivers/gpu/drm/amd/pm/amdgpu_dpm.c
+19
drivers/gpu/drm/amd/pm/amdgpu_dpm.c
···
349
349
return ret;
350
350
}
351
351
352
+
int amdgpu_dpm_pause_power_profile(struct amdgpu_device *adev,
353
+
bool pause)
354
+
{
355
+
const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
356
+
int ret = 0;
357
+
358
+
if (amdgpu_sriov_vf(adev))
359
+
return 0;
360
+
361
+
if (pp_funcs && pp_funcs->pause_power_profile) {
362
+
mutex_lock(&adev->pm.mutex);
363
+
ret = pp_funcs->pause_power_profile(
364
+
adev->powerplay.pp_handle, pause);
365
+
mutex_unlock(&adev->pm.mutex);
366
+
}
367
+
368
+
return ret;
369
+
}
370
+
352
371
int amdgpu_dpm_set_xgmi_pstate(struct amdgpu_device *adev,
353
372
uint32_t pstate)
354
373
{
+2
drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
+2
drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
···
410
410
int amdgpu_dpm_switch_power_profile(struct amdgpu_device *adev,
411
411
enum PP_SMC_POWER_PROFILE type,
412
412
bool en);
413
+
int amdgpu_dpm_pause_power_profile(struct amdgpu_device *adev,
414
+
bool pause);
413
415
414
416
int amdgpu_dpm_baco_reset(struct amdgpu_device *adev);
415
417
+35
-1
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+35
-1
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
···
2398
2398
smu_power_profile_mode_get(smu, type);
2399
2399
else
2400
2400
smu_power_profile_mode_put(smu, type);
2401
-
ret = smu_bump_power_profile_mode(smu, NULL, 0);
2401
+
/* don't switch the active workload when paused */
2402
+
if (smu->pause_workload)
2403
+
ret = 0;
2404
+
else
2405
+
ret = smu_bump_power_profile_mode(smu, NULL, 0);
2402
2406
if (ret) {
2403
2407
if (enable)
2404
2408
smu_power_profile_mode_put(smu, type);
···
2410
2406
smu_power_profile_mode_get(smu, type);
2411
2407
return ret;
2412
2408
}
2409
+
}
2410
+
2411
+
return 0;
2412
+
}
2413
+
2414
+
static int smu_pause_power_profile(void *handle,
2415
+
bool pause)
2416
+
{
2417
+
struct smu_context *smu = handle;
2418
+
struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm);
2419
+
u32 workload_mask = 1 << PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT;
2420
+
int ret;
2421
+
2422
+
if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
2423
+
return -EOPNOTSUPP;
2424
+
2425
+
if (smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL &&
2426
+
smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM) {
2427
+
smu->pause_workload = pause;
2428
+
2429
+
/* force to bootup default profile */
2430
+
if (smu->pause_workload && smu->ppt_funcs->set_power_profile_mode)
2431
+
ret = smu->ppt_funcs->set_power_profile_mode(smu,
2432
+
workload_mask,
2433
+
NULL,
2434
+
0);
2435
+
else
2436
+
ret = smu_bump_power_profile_mode(smu, NULL, 0);
2437
+
return ret;
2413
2438
}
2414
2439
2415
2440
return 0;
···
3766
3733
.get_pp_table = smu_sys_get_pp_table,
3767
3734
.set_pp_table = smu_sys_set_pp_table,
3768
3735
.switch_power_profile = smu_switch_power_profile,
3736
+
.pause_power_profile = smu_pause_power_profile,
3769
3737
/* export to amdgpu */
3770
3738
.dispatch_tasks = smu_handle_dpm_task,
3771
3739
.load_firmware = smu_load_microcode,
+1
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+1
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+1
-1
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
+1
-1
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
+13
-1
drivers/gpu/drm/i915/display/intel_bw.c
+13
-1
drivers/gpu/drm/i915/display/intel_bw.c
···
244
244
qi->deinterleave = 4;
245
245
break;
246
246
case INTEL_DRAM_GDDR:
247
+
case INTEL_DRAM_GDDR_ECC:
247
248
qi->channel_width = 32;
248
249
break;
249
250
default:
···
395
394
396
395
static const struct intel_sa_info xe2_hpd_sa_info = {
397
396
.derating = 30,
397
+
.deprogbwlimit = 53,
398
+
/* Other values not used by simplified algorithm */
399
+
};
400
+
401
+
static const struct intel_sa_info xe2_hpd_ecc_sa_info = {
402
+
.derating = 45,
398
403
.deprogbwlimit = 53,
399
404
/* Other values not used by simplified algorithm */
400
405
};
···
747
740
748
741
void intel_bw_init_hw(struct drm_i915_private *dev_priv)
749
742
{
743
+
const struct dram_info *dram_info = &dev_priv->dram_info;
744
+
750
745
if (!HAS_DISPLAY(dev_priv))
751
746
return;
752
747
753
-
if (DISPLAY_VERx100(dev_priv) >= 1401 && IS_DGFX(dev_priv))
748
+
if (DISPLAY_VERx100(dev_priv) >= 1401 && IS_DGFX(dev_priv) &&
749
+
dram_info->type == INTEL_DRAM_GDDR_ECC)
750
+
xe2_hpd_get_bw_info(dev_priv, &xe2_hpd_ecc_sa_info);
751
+
else if (DISPLAY_VERx100(dev_priv) >= 1401 && IS_DGFX(dev_priv))
754
752
xe2_hpd_get_bw_info(dev_priv, &xe2_hpd_sa_info);
755
753
else if (DISPLAY_VER(dev_priv) >= 14)
756
754
tgl_get_bw_info(dev_priv, &mtl_sa_info);
+3
-1
drivers/gpu/drm/i915/display/intel_display.c
+3
-1
drivers/gpu/drm/i915/display/intel_display.c
···
968
968
old_crtc_state->vrr.vmin != new_crtc_state->vrr.vmin ||
969
969
old_crtc_state->vrr.vmax != new_crtc_state->vrr.vmax ||
970
970
old_crtc_state->vrr.guardband != new_crtc_state->vrr.guardband ||
971
-
old_crtc_state->vrr.pipeline_full != new_crtc_state->vrr.pipeline_full;
971
+
old_crtc_state->vrr.pipeline_full != new_crtc_state->vrr.pipeline_full ||
972
+
old_crtc_state->vrr.vsync_start != new_crtc_state->vrr.vsync_start ||
973
+
old_crtc_state->vrr.vsync_end != new_crtc_state->vrr.vsync_end;
972
974
}
973
975
974
976
static bool cmrr_params_changed(const struct intel_crtc_state *old_crtc_state,
+43
-8
drivers/gpu/drm/i915/display/intel_dp.c
+43
-8
drivers/gpu/drm/i915/display/intel_dp.c
···
172
172
173
173
static int max_dprx_rate(struct intel_dp *intel_dp)
174
174
{
175
-
if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
176
-
return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
175
+
struct intel_display *display = to_intel_display(intel_dp);
176
+
struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
177
+
int max_rate;
177
178
178
-
return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
179
+
if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp))
180
+
max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel);
181
+
else
182
+
max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);
183
+
184
+
/*
185
+
* Some broken eDP sinks illegally declare support for
186
+
* HBR3 without TPS4, and are unable to produce a stable
187
+
* output. Reject HBR3 when TPS4 is not available.
188
+
*/
189
+
if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
190
+
drm_dbg_kms(display->drm,
191
+
"[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
192
+
encoder->base.base.id, encoder->base.name);
193
+
max_rate = 540000;
194
+
}
195
+
196
+
return max_rate;
179
197
}
180
198
181
199
static int max_dprx_lane_count(struct intel_dp *intel_dp)
···
4188
4170
static void
4189
4171
intel_edp_set_sink_rates(struct intel_dp *intel_dp)
4190
4172
{
4173
+
struct intel_display *display = to_intel_display(intel_dp);
4174
+
struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
4175
+
4191
4176
intel_dp->num_sink_rates = 0;
4192
4177
4193
4178
if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
···
4201
4180
sink_rates, sizeof(sink_rates));
4202
4181
4203
4182
for (i = 0; i < ARRAY_SIZE(sink_rates); i++) {
4204
-
int val = le16_to_cpu(sink_rates[i]);
4205
-
4206
-
if (val == 0)
4207
-
break;
4183
+
int rate;
4208
4184
4209
4185
/* Value read multiplied by 200kHz gives the per-lane
4210
4186
* link rate in kHz. The source rates are, however,
···
4209
4191
* back to symbols is
4210
4192
* (val * 200kHz)*(8/10 ch. encoding)*(1/8 bit to Byte)
4211
4193
*/
4212
-
intel_dp->sink_rates[i] = (val * 200) / 10;
4194
+
rate = le16_to_cpu(sink_rates[i]) * 200 / 10;
4195
+
4196
+
if (rate == 0)
4197
+
break;
4198
+
4199
+
/*
4200
+
* Some broken eDP sinks illegally declare support for
4201
+
* HBR3 without TPS4, and are unable to produce a stable
4202
+
* output. Reject HBR3 when TPS4 is not available.
4203
+
*/
4204
+
if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) {
4205
+
drm_dbg_kms(display->drm,
4206
+
"[ENCODER:%d:%s] Rejecting HBR3 due to missing TPS4 support\n",
4207
+
encoder->base.base.id, encoder->base.name);
4208
+
break;
4209
+
}
4210
+
4211
+
intel_dp->sink_rates[i] = rate;
4213
4212
}
4214
4213
intel_dp->num_sink_rates = i;
4215
4214
}
+3
-1
drivers/gpu/drm/i915/display/intel_vblank.c
+3
-1
drivers/gpu/drm/i915/display/intel_vblank.c
···
222
222
* However if queried just before the start of vblank we'll get an
223
223
* answer that's slightly in the future.
224
224
*/
225
-
if (DISPLAY_VER(display) == 2)
225
+
if (DISPLAY_VER(display) >= 20 || display->platform.battlemage)
226
+
return 1;
227
+
else if (DISPLAY_VER(display) == 2)
226
228
return -1;
227
229
else if (HAS_DDI(display) && intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
228
230
return 2;
+4
-15
drivers/gpu/drm/i915/gt/intel_rc6.c
+4
-15
drivers/gpu/drm/i915/gt/intel_rc6.c
···
117
117
GEN6_RC_CTL_RC6_ENABLE |
118
118
GEN6_RC_CTL_EI_MODE(1);
119
119
120
-
/*
121
-
* BSpec 52698 - Render powergating must be off.
122
-
* FIXME BSpec is outdated, disabling powergating for MTL is just
123
-
* temporary wa and should be removed after fixing real cause
124
-
* of forcewake timeouts.
125
-
*/
126
-
if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74)))
127
-
pg_enable =
128
-
GEN9_MEDIA_PG_ENABLE |
129
-
GEN11_MEDIA_SAMPLER_PG_ENABLE;
130
-
else
131
-
pg_enable =
132
-
GEN9_RENDER_PG_ENABLE |
133
-
GEN9_MEDIA_PG_ENABLE |
134
-
GEN11_MEDIA_SAMPLER_PG_ENABLE;
120
+
pg_enable =
121
+
GEN9_RENDER_PG_ENABLE |
122
+
GEN9_MEDIA_PG_ENABLE |
123
+
GEN11_MEDIA_SAMPLER_PG_ENABLE;
135
124
136
125
if (GRAPHICS_VER(gt->i915) >= 12 && !IS_DG1(gt->i915)) {
137
126
for (i = 0; i < I915_MAX_VCS; i++)
+5
-6
drivers/gpu/drm/i915/gt/uc/intel_huc.c
+5
-6
drivers/gpu/drm/i915/gt/uc/intel_huc.c
···
317
317
}
318
318
}
319
319
320
+
void intel_huc_fini_late(struct intel_huc *huc)
321
+
{
322
+
delayed_huc_load_fini(huc);
323
+
}
324
+
320
325
#define HUC_LOAD_MODE_STRING(x) (x ? "GSC" : "legacy")
321
326
static int check_huc_loading_mode(struct intel_huc *huc)
322
327
{
···
419
414
420
415
void intel_huc_fini(struct intel_huc *huc)
421
416
{
422
-
/*
423
-
* the fence is initialized in init_early, so we need to clean it up
424
-
* even if HuC loading is off.
425
-
*/
426
-
delayed_huc_load_fini(huc);
427
-
428
417
if (huc->heci_pkt)
429
418
i915_vma_unpin_and_release(&huc->heci_pkt, 0);
430
419
+1
drivers/gpu/drm/i915/gt/uc/intel_huc.h
+1
drivers/gpu/drm/i915/gt/uc/intel_huc.h
···
55
55
56
56
int intel_huc_sanitize(struct intel_huc *huc);
57
57
void intel_huc_init_early(struct intel_huc *huc);
58
+
void intel_huc_fini_late(struct intel_huc *huc);
58
59
int intel_huc_init(struct intel_huc *huc);
59
60
void intel_huc_fini(struct intel_huc *huc);
60
61
int intel_huc_auth(struct intel_huc *huc, enum intel_huc_authentication_type type);
+1
drivers/gpu/drm/i915/gt/uc/intel_uc.c
+1
drivers/gpu/drm/i915/gt/uc/intel_uc.c
+4
-3
drivers/gpu/drm/i915/gvt/opregion.c
+4
-3
drivers/gpu/drm/i915/gvt/opregion.c
···
222
222
u8 *buf;
223
223
struct opregion_header *header;
224
224
struct vbt v;
225
-
const char opregion_signature[16] = OPREGION_SIGNATURE;
226
225
227
226
gvt_dbg_core("init vgpu%d opregion\n", vgpu->id);
228
227
vgpu_opregion(vgpu)->va = (void *)__get_free_pages(GFP_KERNEL |
···
235
236
/* emulated opregion with VBT mailbox only */
236
237
buf = (u8 *)vgpu_opregion(vgpu)->va;
237
238
header = (struct opregion_header *)buf;
238
-
memcpy(header->signature, opregion_signature,
239
-
sizeof(opregion_signature));
239
+
240
+
static_assert(sizeof(header->signature) == sizeof(OPREGION_SIGNATURE) - 1);
241
+
memcpy(header->signature, OPREGION_SIGNATURE, sizeof(header->signature));
242
+
240
243
header->size = 0x8;
241
244
header->opregion_ver = 0x02000000;
242
245
header->mboxes = MBOX_VBT;
+1
drivers/gpu/drm/i915/i915_drv.h
+1
drivers/gpu/drm/i915/i915_drv.h
+18
drivers/gpu/drm/i915/selftests/i915_selftest.c
+18
drivers/gpu/drm/i915/selftests/i915_selftest.c
···
23
23
24
24
#include <linux/random.h>
25
25
26
+
#include "gt/intel_gt.h"
26
27
#include "gt/intel_gt_pm.h"
28
+
#include "gt/intel_gt_regs.h"
27
29
#include "gt/uc/intel_gsc_fw.h"
28
30
29
31
#include "i915_driver.h"
···
255
253
int i915_live_selftests(struct pci_dev *pdev)
256
254
{
257
255
struct drm_i915_private *i915 = pdev_to_i915(pdev);
256
+
struct intel_uncore *uncore = &i915->uncore;
258
257
int err;
258
+
u32 pg_enable;
259
+
intel_wakeref_t wakeref;
259
260
260
261
if (!i915_selftest.live)
261
262
return 0;
263
+
264
+
/*
265
+
* FIXME Disable render powergating, this is temporary wa and should be removed
266
+
* after fixing real cause of forcewake timeouts.
267
+
*/
268
+
with_intel_runtime_pm(uncore->rpm, wakeref) {
269
+
if (IS_GFX_GT_IP_RANGE(to_gt(i915), IP_VER(12, 00), IP_VER(12, 74))) {
270
+
pg_enable = intel_uncore_read(uncore, GEN9_PG_ENABLE);
271
+
if (pg_enable & GEN9_RENDER_PG_ENABLE)
272
+
intel_uncore_write_fw(uncore, GEN9_PG_ENABLE,
273
+
pg_enable & ~GEN9_RENDER_PG_ENABLE);
274
+
}
275
+
}
262
276
263
277
__wait_gsc_proxy_completed(i915);
264
278
__wait_gsc_huc_load_completed(i915);
+4
drivers/gpu/drm/i915/soc/intel_dram.c
+4
drivers/gpu/drm/i915/soc/intel_dram.c
+20
-7
drivers/gpu/drm/imagination/pvr_fw.c
+20
-7
drivers/gpu/drm/imagination/pvr_fw.c
···
732
732
fw_mem->core_data, fw_mem->core_code_alloc_size);
733
733
734
734
if (err)
735
-
goto err_free_fw_core_data_obj;
735
+
goto err_free_kdata;
736
736
737
737
memcpy(fw_code_ptr, fw_mem->code, fw_mem->code_alloc_size);
738
738
memcpy(fw_data_ptr, fw_mem->data, fw_mem->data_alloc_size);
···
742
742
memcpy(fw_core_data_ptr, fw_mem->core_data, fw_mem->core_data_alloc_size);
743
743
744
744
/* We're finished with the firmware section memory on the CPU, unmap. */
745
-
if (fw_core_data_ptr)
745
+
if (fw_core_data_ptr) {
746
746
pvr_fw_object_vunmap(fw_mem->core_data_obj);
747
-
if (fw_core_code_ptr)
747
+
fw_core_data_ptr = NULL;
748
+
}
749
+
if (fw_core_code_ptr) {
748
750
pvr_fw_object_vunmap(fw_mem->core_code_obj);
751
+
fw_core_code_ptr = NULL;
752
+
}
749
753
pvr_fw_object_vunmap(fw_mem->data_obj);
750
754
fw_data_ptr = NULL;
751
755
pvr_fw_object_vunmap(fw_mem->code_obj);
···
757
753
758
754
err = pvr_fw_create_fwif_connection_ctl(pvr_dev);
759
755
if (err)
760
-
goto err_free_fw_core_data_obj;
756
+
goto err_free_kdata;
761
757
762
758
return 0;
763
759
···
767
763
kfree(fw_mem->data);
768
764
kfree(fw_mem->code);
769
765
770
-
err_free_fw_core_data_obj:
771
766
if (fw_core_data_ptr)
772
-
pvr_fw_object_unmap_and_destroy(fw_mem->core_data_obj);
767
+
pvr_fw_object_vunmap(fw_mem->core_data_obj);
768
+
if (fw_mem->core_data_obj)
769
+
pvr_fw_object_destroy(fw_mem->core_data_obj);
773
770
774
771
err_free_fw_core_code_obj:
775
772
if (fw_core_code_ptr)
776
-
pvr_fw_object_unmap_and_destroy(fw_mem->core_code_obj);
773
+
pvr_fw_object_vunmap(fw_mem->core_code_obj);
774
+
if (fw_mem->core_code_obj)
775
+
pvr_fw_object_destroy(fw_mem->core_code_obj);
777
776
778
777
err_free_fw_data_obj:
779
778
if (fw_data_ptr)
···
843
836
struct pvr_fw_mem *fw_mem = &pvr_dev->fw_dev.mem;
844
837
845
838
pvr_fw_fini_fwif_connection_ctl(pvr_dev);
839
+
840
+
kfree(fw_mem->core_data);
841
+
kfree(fw_mem->core_code);
842
+
kfree(fw_mem->data);
843
+
kfree(fw_mem->code);
844
+
846
845
if (fw_mem->core_code_obj)
847
846
pvr_fw_object_destroy(fw_mem->core_code_obj);
848
847
if (fw_mem->core_data_obj)
+7
drivers/gpu/drm/imagination/pvr_job.c
+7
drivers/gpu/drm/imagination/pvr_job.c
···
671
671
geom_job->paired_job = frag_job;
672
672
frag_job->paired_job = geom_job;
673
673
674
+
/* The geometry job pvr_job structure is used when the fragment
675
+
* job is being prepared by the GPU scheduler. Have the fragment
676
+
* job hold a reference on the geometry job to prevent it being
677
+
* freed until the fragment job has finished with it.
678
+
*/
679
+
pvr_job_get(geom_job);
680
+
674
681
/* Skip the fragment job we just paired to the geometry job. */
675
682
i++;
676
683
}
+4
drivers/gpu/drm/imagination/pvr_queue.c
+4
drivers/gpu/drm/imagination/pvr_queue.c
···
866
866
struct pvr_job *job = container_of(sched_job, struct pvr_job, base);
867
867
868
868
drm_sched_job_cleanup(sched_job);
869
+
870
+
if (job->type == DRM_PVR_JOB_TYPE_FRAGMENT && job->paired_job)
871
+
pvr_job_put(job->paired_job);
872
+
869
873
job->paired_job = NULL;
870
874
pvr_job_put(job);
871
875
}
+3
drivers/gpu/drm/nouveau/nouveau_bo.c
+3
drivers/gpu/drm/nouveau/nouveau_bo.c
···
144
144
nouveau_bo_del_io_reserve_lru(bo);
145
145
nv10_bo_put_tile_region(dev, nvbo->tile, NULL);
146
146
147
+
if (bo->base.import_attach)
148
+
drm_prime_gem_destroy(&bo->base, bo->sg);
149
+
147
150
/*
148
151
* If nouveau_bo_new() allocated this buffer, the GEM object was never
149
152
* initialized, so don't attempt to release it.
-3
drivers/gpu/drm/nouveau/nouveau_gem.c
-3
drivers/gpu/drm/nouveau/nouveau_gem.c
+3
-20
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
+3
-20
drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
···
94
94
struct gpio_desc *enable_gpio;
95
95
struct delayed_work hpd_work;
96
96
int port_id;
97
+
const struct rockchip_hdmi_qp_ctrl_ops *ctrl_ops;
97
98
};
98
99
99
100
struct rockchip_hdmi_qp_ctrl_ops {
···
462
461
return -ENODEV;
463
462
}
464
463
464
+
hdmi->ctrl_ops = cfg->ctrl_ops;
465
465
hdmi->dev = &pdev->dev;
466
466
hdmi->port_id = -ENODEV;
467
467
···
602
600
static int __maybe_unused dw_hdmi_qp_rockchip_resume(struct device *dev)
603
601
{
604
602
struct rockchip_hdmi_qp *hdmi = dev_get_drvdata(dev);
605
-
u32 val;
606
603
607
-
val = HIWORD_UPDATE(RK3588_SCLIN_MASK, RK3588_SCLIN_MASK) |
608
-
HIWORD_UPDATE(RK3588_SDAIN_MASK, RK3588_SDAIN_MASK) |
609
-
HIWORD_UPDATE(RK3588_MODE_MASK, RK3588_MODE_MASK) |
610
-
HIWORD_UPDATE(RK3588_I2S_SEL_MASK, RK3588_I2S_SEL_MASK);
611
-
regmap_write(hdmi->vo_regmap,
612
-
hdmi->port_id ? RK3588_GRF_VO1_CON6 : RK3588_GRF_VO1_CON3,
613
-
val);
614
-
615
-
val = HIWORD_UPDATE(RK3588_SET_HPD_PATH_MASK,
616
-
RK3588_SET_HPD_PATH_MASK);
617
-
regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON7, val);
618
-
619
-
if (hdmi->port_id)
620
-
val = HIWORD_UPDATE(RK3588_HDMI1_GRANT_SEL,
621
-
RK3588_HDMI1_GRANT_SEL);
622
-
else
623
-
val = HIWORD_UPDATE(RK3588_HDMI0_GRANT_SEL,
624
-
RK3588_HDMI0_GRANT_SEL);
625
-
regmap_write(hdmi->vo_regmap, RK3588_GRF_VO1_CON9, val);
604
+
hdmi->ctrl_ops->io_init(hdmi);
626
605
627
606
dw_hdmi_qp_resume(dev, hdmi->hdmi);
628
607
+3
-3
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
+3
-3
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
···
1754
1754
dip |= FIELD_PREP(RK3588_DSP_IF_POL__DP0_PIN_POL, polflags);
1755
1755
break;
1756
1756
case ROCKCHIP_VOP2_EP_DP1:
1757
-
die &= ~RK3588_SYS_DSP_INFACE_EN_MIPI1_MUX;
1758
-
die |= RK3588_SYS_DSP_INFACE_EN_MIPI1 |
1759
-
FIELD_PREP(RK3588_SYS_DSP_INFACE_EN_MIPI1_MUX, vp->id);
1757
+
die &= ~RK3588_SYS_DSP_INFACE_EN_DP1_MUX;
1758
+
die |= RK3588_SYS_DSP_INFACE_EN_DP1 |
1759
+
FIELD_PREP(RK3588_SYS_DSP_INFACE_EN_DP1_MUX, vp->id);
1760
1760
dip &= ~RK3588_DSP_IF_POL__DP1_PIN_POL;
1761
1761
dip |= FIELD_PREP(RK3588_DSP_IF_POL__DP1_PIN_POL, polflags);
1762
1762
break;
-2
drivers/gpu/drm/sti/Makefile
-2
drivers/gpu/drm/sti/Makefile
+8
-1
drivers/gpu/drm/tests/drm_client_modeset_test.c
+8
-1
drivers/gpu/drm/tests/drm_client_modeset_test.c
···
95
95
expected_mode = drm_mode_find_dmt(priv->drm, 1920, 1080, 60, false);
96
96
KUNIT_ASSERT_NOT_NULL(test, expected_mode);
97
97
98
+
ret = drm_kunit_add_mode_destroy_action(test, expected_mode);
99
+
KUNIT_ASSERT_EQ(test, ret, 0);
100
+
98
101
KUNIT_ASSERT_TRUE(test,
99
102
drm_mode_parse_command_line_for_connector(cmdline,
100
103
connector,
···
132
129
struct drm_device *drm = priv->drm;
133
130
struct drm_connector *connector = &priv->connector;
134
131
struct drm_cmdline_mode *cmdline_mode = &connector->cmdline_mode;
135
-
const struct drm_display_mode *expected_mode, *mode;
132
+
const struct drm_display_mode *mode;
133
+
struct drm_display_mode *expected_mode;
136
134
const char *cmdline = params->cmdline;
137
135
int ret;
138
136
···
152
148
153
149
expected_mode = params->func(drm);
154
150
KUNIT_ASSERT_NOT_NULL(test, expected_mode);
151
+
152
+
ret = drm_kunit_add_mode_destroy_action(test, expected_mode);
153
+
KUNIT_ASSERT_EQ(test, ret, 0);
155
154
156
155
KUNIT_EXPECT_TRUE(test, drm_mode_equal(expected_mode, mode));
157
156
}
+9
-1
drivers/gpu/drm/tests/drm_cmdline_parser_test.c
+9
-1
drivers/gpu/drm/tests/drm_cmdline_parser_test.c
···
7
7
#include <kunit/test.h>
8
8
9
9
#include <drm/drm_connector.h>
10
+
#include <drm/drm_kunit_helpers.h>
10
11
#include <drm/drm_modes.h>
11
12
12
13
static const struct drm_connector no_connector = {};
···
956
955
static void drm_test_cmdline_tv_options(struct kunit *test)
957
956
{
958
957
const struct drm_cmdline_tv_option_test *params = test->param_value;
959
-
const struct drm_display_mode *expected_mode = params->mode_fn(NULL);
958
+
struct drm_display_mode *expected_mode;
960
959
struct drm_cmdline_mode mode = { };
960
+
int ret;
961
+
962
+
expected_mode = params->mode_fn(NULL);
963
+
KUNIT_ASSERT_NOT_NULL(test, expected_mode);
964
+
965
+
ret = drm_kunit_add_mode_destroy_action(test, expected_mode);
966
+
KUNIT_ASSERT_EQ(test, ret, 0);
961
967
962
968
KUNIT_EXPECT_TRUE(test, drm_mode_parse_command_line_for_connector(params->cmdline,
963
969
&no_connector, &mode));
+22
drivers/gpu/drm/tests/drm_kunit_helpers.c
+22
drivers/gpu/drm/tests/drm_kunit_helpers.c
···
279
279
}
280
280
281
281
/**
282
+
* drm_kunit_add_mode_destroy_action() - Add a drm_destroy_mode kunit action
283
+
* @test: The test context object
284
+
* @mode: The drm_display_mode to destroy eventually
285
+
*
286
+
* Registers a kunit action that will destroy the drm_display_mode at
287
+
* the end of the test.
288
+
*
289
+
* If an error occurs, the drm_display_mode will be destroyed.
290
+
*
291
+
* Returns:
292
+
* 0 on success, an error code otherwise.
293
+
*/
294
+
int drm_kunit_add_mode_destroy_action(struct kunit *test,
295
+
struct drm_display_mode *mode)
296
+
{
297
+
return kunit_add_action_or_reset(test,
298
+
kunit_action_drm_mode_destroy,
299
+
mode);
300
+
}
301
+
EXPORT_SYMBOL_GPL(drm_kunit_add_mode_destroy_action);
302
+
303
+
/**
282
304
* drm_kunit_display_mode_from_cea_vic() - return a mode for CEA VIC for a KUnit test
283
305
* @test: The test context object
284
306
* @dev: DRM device
+26
drivers/gpu/drm/tests/drm_modes_test.c
+26
drivers/gpu/drm/tests/drm_modes_test.c
···
40
40
{
41
41
struct drm_test_modes_priv *priv = test->priv;
42
42
struct drm_display_mode *mode;
43
+
int ret;
43
44
44
45
mode = drm_analog_tv_mode(priv->drm,
45
46
DRM_MODE_TV_MODE_NTSC,
46
47
13500 * HZ_PER_KHZ, 720, 480,
47
48
true);
48
49
KUNIT_ASSERT_NOT_NULL(test, mode);
50
+
51
+
ret = drm_kunit_add_mode_destroy_action(test, mode);
52
+
KUNIT_ASSERT_EQ(test, ret, 0);
49
53
50
54
KUNIT_EXPECT_EQ(test, drm_mode_vrefresh(mode), 60);
51
55
KUNIT_EXPECT_EQ(test, mode->hdisplay, 720);
···
74
70
{
75
71
struct drm_test_modes_priv *priv = test->priv;
76
72
struct drm_display_mode *expected, *mode;
73
+
int ret;
77
74
78
75
expected = drm_analog_tv_mode(priv->drm,
79
76
DRM_MODE_TV_MODE_NTSC,
···
82
77
true);
83
78
KUNIT_ASSERT_NOT_NULL(test, expected);
84
79
80
+
ret = drm_kunit_add_mode_destroy_action(test, expected);
81
+
KUNIT_ASSERT_EQ(test, ret, 0);
82
+
85
83
mode = drm_mode_analog_ntsc_480i(priv->drm);
86
84
KUNIT_ASSERT_NOT_NULL(test, mode);
85
+
86
+
ret = drm_kunit_add_mode_destroy_action(test, mode);
87
+
KUNIT_ASSERT_EQ(test, ret, 0);
87
88
88
89
KUNIT_EXPECT_TRUE(test, drm_mode_equal(expected, mode));
89
90
}
···
98
87
{
99
88
struct drm_test_modes_priv *priv = test->priv;
100
89
struct drm_display_mode *mode;
90
+
int ret;
101
91
102
92
mode = drm_analog_tv_mode(priv->drm,
103
93
DRM_MODE_TV_MODE_PAL,
104
94
13500 * HZ_PER_KHZ, 720, 576,
105
95
true);
106
96
KUNIT_ASSERT_NOT_NULL(test, mode);
97
+
98
+
ret = drm_kunit_add_mode_destroy_action(test, mode);
99
+
KUNIT_ASSERT_EQ(test, ret, 0);
107
100
108
101
KUNIT_EXPECT_EQ(test, drm_mode_vrefresh(mode), 50);
109
102
KUNIT_EXPECT_EQ(test, mode->hdisplay, 720);
···
132
117
{
133
118
struct drm_test_modes_priv *priv = test->priv;
134
119
struct drm_display_mode *expected, *mode;
120
+
int ret;
135
121
136
122
expected = drm_analog_tv_mode(priv->drm,
137
123
DRM_MODE_TV_MODE_PAL,
···
140
124
true);
141
125
KUNIT_ASSERT_NOT_NULL(test, expected);
142
126
127
+
ret = drm_kunit_add_mode_destroy_action(test, expected);
128
+
KUNIT_ASSERT_EQ(test, ret, 0);
129
+
143
130
mode = drm_mode_analog_pal_576i(priv->drm);
144
131
KUNIT_ASSERT_NOT_NULL(test, mode);
132
+
133
+
ret = drm_kunit_add_mode_destroy_action(test, mode);
134
+
KUNIT_ASSERT_EQ(test, ret, 0);
145
135
146
136
KUNIT_EXPECT_TRUE(test, drm_mode_equal(expected, mode));
147
137
}
···
156
134
{
157
135
struct drm_test_modes_priv *priv = test->priv;
158
136
struct drm_display_mode *mode;
137
+
int ret;
159
138
160
139
mode = drm_analog_tv_mode(priv->drm,
161
140
DRM_MODE_TV_MODE_MONOCHROME,
162
141
13500 * HZ_PER_KHZ, 720, 576,
163
142
true);
164
143
KUNIT_ASSERT_NOT_NULL(test, mode);
144
+
145
+
ret = drm_kunit_add_mode_destroy_action(test, mode);
146
+
KUNIT_ASSERT_EQ(test, ret, 0);
165
147
166
148
KUNIT_EXPECT_EQ(test, drm_mode_vrefresh(mode), 50);
167
149
KUNIT_EXPECT_EQ(test, mode->hdisplay, 720);
+7
-1
drivers/gpu/drm/tests/drm_probe_helper_test.c
+7
-1
drivers/gpu/drm/tests/drm_probe_helper_test.c
···
98
98
struct drm_connector *connector = &priv->connector;
99
99
struct drm_cmdline_mode *cmdline = &connector->cmdline_mode;
100
100
struct drm_display_mode *mode;
101
-
const struct drm_display_mode *expected;
101
+
struct drm_display_mode *expected;
102
102
size_t len;
103
103
int ret;
104
104
···
134
134
135
135
KUNIT_EXPECT_TRUE(test, drm_mode_equal(mode, expected));
136
136
KUNIT_EXPECT_TRUE(test, mode->type & DRM_MODE_TYPE_PREFERRED);
137
+
138
+
ret = drm_kunit_add_mode_destroy_action(test, expected);
139
+
KUNIT_ASSERT_EQ(test, ret, 0);
137
140
}
138
141
139
142
if (params->num_expected_modes >= 2) {
···
148
145
149
146
KUNIT_EXPECT_TRUE(test, drm_mode_equal(mode, expected));
150
147
KUNIT_EXPECT_FALSE(test, mode->type & DRM_MODE_TYPE_PREFERRED);
148
+
149
+
ret = drm_kunit_add_mode_destroy_action(test, expected);
150
+
KUNIT_ASSERT_EQ(test, ret, 0);
151
151
}
152
152
153
153
mutex_unlock(&priv->drm->mode_config.mutex);
+6
-5
drivers/gpu/drm/virtio/virtgpu_gem.c
+6
-5
drivers/gpu/drm/virtio/virtgpu_gem.c
···
115
115
if (!vgdev->has_context_init)
116
116
virtio_gpu_create_context(obj->dev, file);
117
117
118
-
objs = virtio_gpu_array_alloc(1);
119
-
if (!objs)
120
-
return -ENOMEM;
121
-
virtio_gpu_array_add_obj(objs, obj);
118
+
if (vfpriv->context_created) {
119
+
objs = virtio_gpu_array_alloc(1);
120
+
if (!objs)
121
+
return -ENOMEM;
122
+
virtio_gpu_array_add_obj(objs, obj);
122
123
123
-
if (vfpriv->ctx_id)
124
124
virtio_gpu_cmd_context_attach_resource(vgdev, vfpriv->ctx_id, objs);
125
+
}
125
126
126
127
out_notify:
127
128
virtio_gpu_notify(vgdev);
+14
-6
drivers/gpu/drm/virtio/virtgpu_plane.c
+14
-6
drivers/gpu/drm/virtio/virtgpu_plane.c
···
366
366
return 0;
367
367
368
368
obj = new_state->fb->obj[0];
369
-
if (obj->import_attach) {
370
-
ret = virtio_gpu_prepare_imported_obj(plane, new_state, obj);
371
-
if (ret)
372
-
return ret;
373
-
}
374
-
375
369
if (bo->dumb || obj->import_attach) {
376
370
vgplane_st->fence = virtio_gpu_fence_alloc(vgdev,
377
371
vgdev->fence_drv.context,
···
374
380
return -ENOMEM;
375
381
}
376
382
383
+
if (obj->import_attach) {
384
+
ret = virtio_gpu_prepare_imported_obj(plane, new_state, obj);
385
+
if (ret)
386
+
goto err_fence;
387
+
}
388
+
377
389
return 0;
390
+
391
+
err_fence:
392
+
if (vgplane_st->fence) {
393
+
dma_fence_put(&vgplane_st->fence->f);
394
+
vgplane_st->fence = NULL;
395
+
}
396
+
397
+
return ret;
378
398
}
379
399
380
400
static void virtio_gpu_cleanup_imported_obj(struct drm_gem_object *obj)
+1
drivers/gpu/drm/virtio/virtgpu_prime.c
+1
drivers/gpu/drm/virtio/virtgpu_prime.c
+1
drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
+1
drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
···
41
41
42
42
#define GFX_OP_PIPE_CONTROL(len) ((0x3<<29)|(0x3<<27)|(0x2<<24)|((len)-2))
43
43
44
+
#define PIPE_CONTROL0_L3_READ_ONLY_CACHE_INVALIDATE BIT(10) /* gen12 */
44
45
#define PIPE_CONTROL0_HDC_PIPELINE_FLUSH BIT(9) /* gen12 */
45
46
46
47
#define PIPE_CONTROL_COMMAND_CACHE_INVALIDATE (1<<29)
+1
drivers/gpu/drm/xe/xe_device_types.h
+1
drivers/gpu/drm/xe/xe_device_types.h
+10
-2
drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
+10
-2
drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
···
322
322
return 0;
323
323
}
324
324
325
+
/*
326
+
* Ensure that roundup_pow_of_two(length) doesn't overflow.
327
+
* Note that roundup_pow_of_two() operates on unsigned long,
328
+
* not on u64.
329
+
*/
330
+
#define MAX_RANGE_TLB_INVALIDATION_LENGTH (rounddown_pow_of_two(ULONG_MAX))
331
+
325
332
/**
326
333
* xe_gt_tlb_invalidation_range - Issue a TLB invalidation on this GT for an
327
334
* address range
···
353
346
struct xe_device *xe = gt_to_xe(gt);
354
347
#define MAX_TLB_INVALIDATION_LEN 7
355
348
u32 action[MAX_TLB_INVALIDATION_LEN];
349
+
u64 length = end - start;
356
350
int len = 0;
357
351
358
352
xe_gt_assert(gt, fence);
···
366
358
367
359
action[len++] = XE_GUC_ACTION_TLB_INVALIDATION;
368
360
action[len++] = 0; /* seqno, replaced in send_tlb_invalidation */
369
-
if (!xe->info.has_range_tlb_invalidation) {
361
+
if (!xe->info.has_range_tlb_invalidation ||
362
+
length > MAX_RANGE_TLB_INVALIDATION_LENGTH) {
370
363
action[len++] = MAKE_INVAL_OP(XE_GUC_TLB_INVAL_FULL);
371
364
} else {
372
365
u64 orig_start = start;
373
-
u64 length = end - start;
374
366
u64 align;
375
367
376
368
if (length < SZ_4K)
+1
drivers/gpu/drm/xe/xe_guc_pc.c
+1
drivers/gpu/drm/xe/xe_guc_pc.c
+6
-6
drivers/gpu/drm/xe/xe_hw_engine.c
+6
-6
drivers/gpu/drm/xe/xe_hw_engine.c
···
389
389
blit_cctl_val,
390
390
XE_RTP_ACTION_FLAG(ENGINE_BASE)))
391
391
},
392
-
/* Use Fixed slice CCS mode */
393
-
{ XE_RTP_NAME("RCU_MODE_FIXED_SLICE_CCS_MODE"),
394
-
XE_RTP_RULES(FUNC(xe_hw_engine_match_fixed_cslice_mode)),
395
-
XE_RTP_ACTIONS(FIELD_SET(RCU_MODE, RCU_MODE_FIXED_SLICE_CCS_MODE,
396
-
RCU_MODE_FIXED_SLICE_CCS_MODE))
397
-
},
398
392
/* Disable WMTP if HW doesn't support it */
399
393
{ XE_RTP_NAME("DISABLE_WMTP_ON_UNSUPPORTED_HW"),
400
394
XE_RTP_RULES(FUNC(xe_rtp_cfeg_wmtp_disabled)),
···
454
460
XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, XE_RTP_END_VERSION_UNDEFINED)),
455
461
XE_RTP_ACTIONS(SET(CSFE_CHICKEN1(0), CS_PRIORITY_MEM_READ,
456
462
XE_RTP_ACTION_FLAG(ENGINE_BASE)))
463
+
},
464
+
/* Use Fixed slice CCS mode */
465
+
{ XE_RTP_NAME("RCU_MODE_FIXED_SLICE_CCS_MODE"),
466
+
XE_RTP_RULES(FUNC(xe_hw_engine_match_fixed_cslice_mode)),
467
+
XE_RTP_ACTIONS(FIELD_SET(RCU_MODE, RCU_MODE_FIXED_SLICE_CCS_MODE,
468
+
RCU_MODE_FIXED_SLICE_CCS_MODE))
457
469
},
458
470
};
459
471
+52
-56
drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.c
+52
-56
drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.c
···
32
32
return timeout >= min && timeout <= max;
33
33
}
34
34
35
-
static void kobj_xe_hw_engine_release(struct kobject *kobj)
35
+
static void xe_hw_engine_sysfs_kobj_release(struct kobject *kobj)
36
36
{
37
37
kfree(kobj);
38
38
}
39
39
40
+
static ssize_t xe_hw_engine_class_sysfs_attr_show(struct kobject *kobj,
41
+
struct attribute *attr,
42
+
char *buf)
43
+
{
44
+
struct xe_device *xe = kobj_to_xe(kobj);
45
+
struct kobj_attribute *kattr;
46
+
ssize_t ret = -EIO;
47
+
48
+
kattr = container_of(attr, struct kobj_attribute, attr);
49
+
if (kattr->show) {
50
+
xe_pm_runtime_get(xe);
51
+
ret = kattr->show(kobj, kattr, buf);
52
+
xe_pm_runtime_put(xe);
53
+
}
54
+
55
+
return ret;
56
+
}
57
+
58
+
static ssize_t xe_hw_engine_class_sysfs_attr_store(struct kobject *kobj,
59
+
struct attribute *attr,
60
+
const char *buf,
61
+
size_t count)
62
+
{
63
+
struct xe_device *xe = kobj_to_xe(kobj);
64
+
struct kobj_attribute *kattr;
65
+
ssize_t ret = -EIO;
66
+
67
+
kattr = container_of(attr, struct kobj_attribute, attr);
68
+
if (kattr->store) {
69
+
xe_pm_runtime_get(xe);
70
+
ret = kattr->store(kobj, kattr, buf, count);
71
+
xe_pm_runtime_put(xe);
72
+
}
73
+
74
+
return ret;
75
+
}
76
+
77
+
static const struct sysfs_ops xe_hw_engine_class_sysfs_ops = {
78
+
.show = xe_hw_engine_class_sysfs_attr_show,
79
+
.store = xe_hw_engine_class_sysfs_attr_store,
80
+
};
81
+
40
82
static const struct kobj_type kobj_xe_hw_engine_type = {
41
-
.release = kobj_xe_hw_engine_release,
42
-
.sysfs_ops = &kobj_sysfs_ops
83
+
.release = xe_hw_engine_sysfs_kobj_release,
84
+
.sysfs_ops = &xe_hw_engine_class_sysfs_ops,
85
+
};
86
+
87
+
static const struct kobj_type kobj_xe_hw_engine_type_def = {
88
+
.release = xe_hw_engine_sysfs_kobj_release,
89
+
.sysfs_ops = &kobj_sysfs_ops,
43
90
};
44
91
45
92
static ssize_t job_timeout_max_store(struct kobject *kobj,
···
590
543
if (!kobj)
591
544
return -ENOMEM;
592
545
593
-
kobject_init(kobj, &kobj_xe_hw_engine_type);
546
+
kobject_init(kobj, &kobj_xe_hw_engine_type_def);
594
547
err = kobject_add(kobj, parent, "%s", ".defaults");
595
548
if (err)
596
549
goto err_object;
···
606
559
return err;
607
560
}
608
561
609
-
static void xe_hw_engine_sysfs_kobj_release(struct kobject *kobj)
610
-
{
611
-
kfree(kobj);
612
-
}
613
-
614
-
static ssize_t xe_hw_engine_class_sysfs_attr_show(struct kobject *kobj,
615
-
struct attribute *attr,
616
-
char *buf)
617
-
{
618
-
struct xe_device *xe = kobj_to_xe(kobj);
619
-
struct kobj_attribute *kattr;
620
-
ssize_t ret = -EIO;
621
-
622
-
kattr = container_of(attr, struct kobj_attribute, attr);
623
-
if (kattr->show) {
624
-
xe_pm_runtime_get(xe);
625
-
ret = kattr->show(kobj, kattr, buf);
626
-
xe_pm_runtime_put(xe);
627
-
}
628
-
629
-
return ret;
630
-
}
631
-
632
-
static ssize_t xe_hw_engine_class_sysfs_attr_store(struct kobject *kobj,
633
-
struct attribute *attr,
634
-
const char *buf,
635
-
size_t count)
636
-
{
637
-
struct xe_device *xe = kobj_to_xe(kobj);
638
-
struct kobj_attribute *kattr;
639
-
ssize_t ret = -EIO;
640
-
641
-
kattr = container_of(attr, struct kobj_attribute, attr);
642
-
if (kattr->store) {
643
-
xe_pm_runtime_get(xe);
644
-
ret = kattr->store(kobj, kattr, buf, count);
645
-
xe_pm_runtime_put(xe);
646
-
}
647
-
648
-
return ret;
649
-
}
650
-
651
-
static const struct sysfs_ops xe_hw_engine_class_sysfs_ops = {
652
-
.show = xe_hw_engine_class_sysfs_attr_show,
653
-
.store = xe_hw_engine_class_sysfs_attr_store,
654
-
};
655
-
656
-
static const struct kobj_type xe_hw_engine_sysfs_kobj_type = {
657
-
.release = xe_hw_engine_sysfs_kobj_release,
658
-
.sysfs_ops = &xe_hw_engine_class_sysfs_ops,
659
-
};
660
562
661
563
static void hw_engine_class_sysfs_fini(void *arg)
662
564
{
···
636
640
if (!kobj)
637
641
return -ENOMEM;
638
642
639
-
kobject_init(kobj, &xe_hw_engine_sysfs_kobj_type);
643
+
kobject_init(kobj, &kobj_xe_hw_engine_type);
640
644
641
645
err = kobject_add(kobj, gt->sysfs, "engines");
642
646
if (err)
+3
-3
drivers/gpu/drm/xe/xe_migrate.c
+3
-3
drivers/gpu/drm/xe/xe_migrate.c
···
1177
1177
err_sync:
1178
1178
/* Sync partial copies if any. FIXME: job_mutex? */
1179
1179
if (fence) {
1180
-
dma_fence_wait(m->fence, false);
1180
+
dma_fence_wait(fence, false);
1181
1181
dma_fence_put(fence);
1182
1182
}
1183
1183
···
1547
1547
static u32 pte_update_cmd_size(u64 size)
1548
1548
{
1549
1549
u32 num_dword;
1550
-
u64 entries = DIV_ROUND_UP(size, XE_PAGE_SIZE);
1550
+
u64 entries = DIV_U64_ROUND_UP(size, XE_PAGE_SIZE);
1551
1551
1552
1552
XE_WARN_ON(size > MAX_PREEMPTDISABLE_TRANSFER);
1553
1553
/*
···
1558
1558
* 2 dword for the page table's physical location
1559
1559
* 2*n dword for value of pte to fill (each pte entry is 2 dwords)
1560
1560
*/
1561
-
num_dword = (1 + 2) * DIV_ROUND_UP(entries, 0x1ff);
1561
+
num_dword = (1 + 2) * DIV_U64_ROUND_UP(entries, 0x1ff);
1562
1562
num_dword += entries * 2;
1563
1563
1564
1564
return num_dword;
+9
-4
drivers/gpu/drm/xe/xe_ring_ops.c
+9
-4
drivers/gpu/drm/xe/xe_ring_ops.c
···
137
137
static int emit_pipe_invalidate(u32 mask_flags, bool invalidate_tlb, u32 *dw,
138
138
int i)
139
139
{
140
-
u32 flags = PIPE_CONTROL_CS_STALL |
140
+
u32 flags0 = 0;
141
+
u32 flags1 = PIPE_CONTROL_CS_STALL |
141
142
PIPE_CONTROL_COMMAND_CACHE_INVALIDATE |
142
143
PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE |
143
144
PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
···
149
148
PIPE_CONTROL_STORE_DATA_INDEX;
150
149
151
150
if (invalidate_tlb)
152
-
flags |= PIPE_CONTROL_TLB_INVALIDATE;
151
+
flags1 |= PIPE_CONTROL_TLB_INVALIDATE;
153
152
154
-
flags &= ~mask_flags;
153
+
flags1 &= ~mask_flags;
155
154
156
-
return emit_pipe_control(dw, i, 0, flags, LRC_PPHWSP_FLUSH_INVAL_SCRATCH_ADDR, 0);
155
+
if (flags1 & PIPE_CONTROL_VF_CACHE_INVALIDATE)
156
+
flags0 |= PIPE_CONTROL0_L3_READ_ONLY_CACHE_INVALIDATE;
157
+
158
+
return emit_pipe_control(dw, i, flags0, flags1,
159
+
LRC_PPHWSP_FLUSH_INVAL_SCRATCH_ADDR, 0);
157
160
}
158
161
159
162
static int emit_store_imm_ppgtt_posted(u64 addr, u64 value,
+5
-2
drivers/gpu/drm/xe/xe_svm.c
+5
-2
drivers/gpu/drm/xe/xe_svm.c
···
696
696
list_for_each_entry(block, blocks, link)
697
697
block->private = vr;
698
698
699
+
xe_bo_get(bo);
699
700
err = drm_gpusvm_migrate_to_devmem(&vm->svm.gpusvm, &range->base,
700
701
&bo->devmem_allocation, ctx);
701
-
xe_bo_unlock(bo);
702
702
if (err)
703
-
xe_bo_put(bo); /* Creation ref */
703
+
xe_svm_devmem_release(&bo->devmem_allocation);
704
+
705
+
xe_bo_unlock(bo);
706
+
xe_bo_put(bo);
704
707
705
708
unlock:
706
709
mmap_read_unlock(mm);
+2
drivers/gpu/drm/xe/xe_wa_oob.rules
+2
drivers/gpu/drm/xe/xe_wa_oob.rules
···
32
32
GRAPHICS_VERSION(3001)
33
33
14022293748 GRAPHICS_VERSION(2001)
34
34
GRAPHICS_VERSION(2004)
35
+
GRAPHICS_VERSION_RANGE(3000, 3001)
35
36
22019794406 GRAPHICS_VERSION(2001)
36
37
GRAPHICS_VERSION(2004)
38
+
GRAPHICS_VERSION_RANGE(3000, 3001)
37
39
22019338487 MEDIA_VERSION(2000)
38
40
GRAPHICS_VERSION(2001)
39
41
MEDIA_VERSION(3000), MEDIA_STEP(A0, B0), FUNC(xe_rtp_match_not_sriov_vf)
+4
-11
drivers/iommu/amd/iommu.c
+4
-11
drivers/iommu/amd/iommu.c
···
3869
3869
struct irq_2_irte *irte_info = &ir_data->irq_2_irte;
3870
3870
struct iommu_dev_data *dev_data;
3871
3871
3872
+
if (WARN_ON_ONCE(!AMD_IOMMU_GUEST_IR_VAPIC(amd_iommu_guest_ir)))
3873
+
return -EINVAL;
3874
+
3872
3875
if (ir_data->iommu == NULL)
3873
3876
return -EINVAL;
3874
3877
···
3882
3879
* we should not modify the IRTE
3883
3880
*/
3884
3881
if (!dev_data || !dev_data->use_vapic)
3885
-
return 0;
3882
+
return -EINVAL;
3886
3883
3887
3884
ir_data->cfg = irqd_cfg(data);
3888
3885
pi_data->ir_data = ir_data;
3889
-
3890
-
/* Note:
3891
-
* SVM tries to set up for VAPIC mode, but we are in
3892
-
* legacy mode. So, we force legacy mode instead.
3893
-
*/
3894
-
if (!AMD_IOMMU_GUEST_IR_VAPIC(amd_iommu_guest_ir)) {
3895
-
pr_debug("%s: Fall back to using intr legacy remap\n",
3896
-
__func__);
3897
-
pi_data->is_guest_mode = false;
3898
-
}
3899
3886
3900
3887
pi_data->prev_ga_tag = ir_data->cached_ga_tag;
3901
3888
if (pi_data->is_guest_mode) {
+5
-27
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
+5
-27
drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
···
487
487
488
488
/* VCMDQ Resource Helpers */
489
489
490
-
static void tegra241_vcmdq_free_smmu_cmdq(struct tegra241_vcmdq *vcmdq)
491
-
{
492
-
struct arm_smmu_queue *q = &vcmdq->cmdq.q;
493
-
size_t nents = 1 << q->llq.max_n_shift;
494
-
size_t qsz = nents << CMDQ_ENT_SZ_SHIFT;
495
-
496
-
if (!q->base)
497
-
return;
498
-
dmam_free_coherent(vcmdq->cmdqv->smmu.dev, qsz, q->base, q->base_dma);
499
-
}
500
-
501
490
static int tegra241_vcmdq_alloc_smmu_cmdq(struct tegra241_vcmdq *vcmdq)
502
491
{
503
492
struct arm_smmu_device *smmu = &vcmdq->cmdqv->smmu;
···
549
560
struct tegra241_vcmdq *vcmdq = vintf->lvcmdqs[lidx];
550
561
char header[64];
551
562
552
-
tegra241_vcmdq_free_smmu_cmdq(vcmdq);
563
+
/* Note that the lvcmdq queue memory space is managed by devres */
564
+
553
565
tegra241_vintf_deinit_lvcmdq(vintf, lidx);
554
566
555
567
dev_dbg(vintf->cmdqv->dev,
···
758
768
759
769
vintf = kzalloc(sizeof(*vintf), GFP_KERNEL);
760
770
if (!vintf)
761
-
goto out_fallback;
771
+
return -ENOMEM;
762
772
763
773
/* Init VINTF0 for in-kernel use */
764
774
ret = tegra241_cmdqv_init_vintf(cmdqv, 0, vintf);
765
775
if (ret) {
766
776
dev_err(cmdqv->dev, "failed to init vintf0: %d\n", ret);
767
-
goto free_vintf;
777
+
return ret;
768
778
}
769
779
770
780
/* Preallocate logical VCMDQs to VINTF0 */
···
773
783
774
784
vcmdq = tegra241_vintf_alloc_lvcmdq(vintf, lidx);
775
785
if (IS_ERR(vcmdq))
776
-
goto free_lvcmdq;
786
+
return PTR_ERR(vcmdq);
777
787
}
778
788
779
789
/* Now, we are ready to run all the impl ops */
780
790
smmu->impl_ops = &tegra241_cmdqv_impl_ops;
781
-
return 0;
782
-
783
-
free_lvcmdq:
784
-
for (lidx--; lidx >= 0; lidx--)
785
-
tegra241_vintf_free_lvcmdq(vintf, lidx);
786
-
tegra241_cmdqv_deinit_vintf(cmdqv, vintf->idx);
787
-
free_vintf:
788
-
kfree(vintf);
789
-
out_fallback:
790
-
dev_info(smmu->impl_dev, "Falling back to standard SMMU CMDQ\n");
791
-
smmu->options &= ~ARM_SMMU_OPT_TEGRA241_CMDQV;
792
-
tegra241_cmdqv_remove(smmu);
793
791
return 0;
794
792
}
795
793
+2
-2
drivers/iommu/dma-iommu.c
+2
-2
drivers/iommu/dma-iommu.c
···
1754
1754
return PAGE_SIZE;
1755
1755
default:
1756
1756
BUG();
1757
-
};
1757
+
}
1758
1758
}
1759
1759
1760
1760
static struct list_head *cookie_msi_pages(const struct iommu_domain *domain)
···
1766
1766
return &domain->msi_cookie->msi_page_list;
1767
1767
default:
1768
1768
BUG();
1769
-
};
1769
+
}
1770
1770
}
1771
1771
1772
1772
static struct iommu_dma_msi_page *iommu_dma_get_msi_page(struct device *dev,
+2
-2
drivers/iommu/exynos-iommu.c
+2
-2
drivers/iommu/exynos-iommu.c
···
832
832
struct exynos_iommu_owner *owner = dev_iommu_priv_get(master);
833
833
834
834
mutex_lock(&owner->rpm_lock);
835
-
if (&data->domain->domain != &exynos_identity_domain) {
835
+
if (data->domain) {
836
836
dev_dbg(data->sysmmu, "saving state\n");
837
837
__sysmmu_disable(data);
838
838
}
···
850
850
struct exynos_iommu_owner *owner = dev_iommu_priv_get(master);
851
851
852
852
mutex_lock(&owner->rpm_lock);
853
-
if (&data->domain->domain != &exynos_identity_domain) {
853
+
if (data->domain) {
854
854
dev_dbg(data->sysmmu, "restoring state\n");
855
855
__sysmmu_enable(data);
856
856
}
-1
drivers/iommu/intel/iommu.c
-1
drivers/iommu/intel/iommu.c
+15
-14
drivers/iommu/intel/irq_remapping.c
+15
-14
drivers/iommu/intel/irq_remapping.c
···
1287
1287
};
1288
1288
1289
1289
/*
1290
-
* With posted MSIs, all vectors are multiplexed into a single notification
1291
-
* vector. Devices MSIs are then dispatched in a demux loop where
1292
-
* EOIs can be coalesced as well.
1290
+
* With posted MSIs, the MSI vectors are multiplexed into a single notification
1291
+
* vector, and only the notification vector is sent to the APIC IRR. Device
1292
+
* MSIs are then dispatched in a demux loop that harvests the MSIs from the
1293
+
* CPU's Posted Interrupt Request bitmap. I.e. Posted MSIs never get sent to
1294
+
* the APIC IRR, and thus do not need an EOI. The notification handler instead
1295
+
* performs a single EOI after processing the PIR.
1293
1296
*
1294
-
* "INTEL-IR-POST" IRQ chip does not do EOI on ACK, thus the dummy irq_ack()
1295
-
* function. Instead EOI is performed by the posted interrupt notification
1296
-
* handler.
1297
+
* Note! Pending SMP/CPU affinity changes, which are per MSI, must still be
1298
+
* honored, only the APIC EOI is omitted.
1297
1299
*
1298
1300
* For the example below, 3 MSIs are coalesced into one CPU notification. Only
1299
-
* one apic_eoi() is needed.
1301
+
* one apic_eoi() is needed, but each MSI needs to process pending changes to
1302
+
* its CPU affinity.
1300
1303
*
1301
1304
* __sysvec_posted_msi_notification()
1302
1305
* irq_enter();
1303
1306
* handle_edge_irq()
1304
1307
* irq_chip_ack_parent()
1305
-
* dummy(); // No EOI
1308
+
* irq_move_irq(); // No EOI
1306
1309
* handle_irq_event()
1307
1310
* driver_handler()
1308
1311
* handle_edge_irq()
1309
1312
* irq_chip_ack_parent()
1310
-
* dummy(); // No EOI
1313
+
* irq_move_irq(); // No EOI
1311
1314
* handle_irq_event()
1312
1315
* driver_handler()
1313
1316
* handle_edge_irq()
1314
1317
* irq_chip_ack_parent()
1315
-
* dummy(); // No EOI
1318
+
* irq_move_irq(); // No EOI
1316
1319
* handle_irq_event()
1317
1320
* driver_handler()
1318
1321
* apic_eoi()
1319
1322
* irq_exit()
1323
+
*
1320
1324
*/
1321
-
1322
-
static void dummy_ack(struct irq_data *d) { }
1323
-
1324
1325
static struct irq_chip intel_ir_chip_post_msi = {
1325
1326
.name = "INTEL-IR-POST",
1326
-
.irq_ack = dummy_ack,
1327
+
.irq_ack = irq_move_irq,
1327
1328
.irq_set_affinity = intel_ir_set_affinity,
1328
1329
.irq_compose_msi_msg = intel_ir_compose_msi_msg,
1329
1330
.irq_set_vcpu_affinity = intel_ir_set_vcpu_affinity,
+5
-1
drivers/iommu/iommu.c
+5
-1
drivers/iommu/iommu.c
···
538
538
dev->iommu_group = NULL;
539
539
module_put(ops->owner);
540
540
dev_iommu_free(dev);
541
+
#ifdef CONFIG_IOMMU_DMA
542
+
dev->dma_iommu = false;
543
+
#endif
541
544
}
542
545
543
546
static struct iommu_domain *pasid_array_entry_to_domain(void *entry)
···
2720
2717
* if upper layers showed interest and installed a fault handler,
2721
2718
* invoke it.
2722
2719
*/
2723
-
if (domain->handler)
2720
+
if (domain->cookie_type == IOMMU_COOKIE_FAULT_HANDLER &&
2721
+
domain->handler)
2724
2722
ret = domain->handler(domain, dev, iova, flags,
2725
2723
domain->handler_token);
2726
2724
+10
-17
drivers/iommu/ipmmu-vmsa.c
+10
-17
drivers/iommu/ipmmu-vmsa.c
···
1081
1081
}
1082
1082
}
1083
1083
1084
+
platform_set_drvdata(pdev, mmu);
1084
1085
/*
1085
1086
* Register the IPMMU to the IOMMU subsystem in the following cases:
1086
1087
* - R-Car Gen2 IPMMU (all devices registered)
1087
1088
* - R-Car Gen3 IPMMU (leaf devices only - skip root IPMMU-MM device)
1088
1089
*/
1089
-
if (!mmu->features->has_cache_leaf_nodes || !ipmmu_is_root(mmu)) {
1090
-
ret = iommu_device_sysfs_add(&mmu->iommu, &pdev->dev, NULL,
1091
-
dev_name(&pdev->dev));
1092
-
if (ret)
1093
-
return ret;
1090
+
if (mmu->features->has_cache_leaf_nodes && ipmmu_is_root(mmu))
1091
+
return 0;
1094
1092
1095
-
ret = iommu_device_register(&mmu->iommu, &ipmmu_ops, &pdev->dev);
1096
-
if (ret)
1097
-
return ret;
1098
-
}
1093
+
ret = iommu_device_sysfs_add(&mmu->iommu, &pdev->dev, NULL, dev_name(&pdev->dev));
1094
+
if (ret)
1095
+
return ret;
1099
1096
1100
-
/*
1101
-
* We can't create the ARM mapping here as it requires the bus to have
1102
-
* an IOMMU, which only happens when bus_set_iommu() is called in
1103
-
* ipmmu_init() after the probe function returns.
1104
-
*/
1097
+
ret = iommu_device_register(&mmu->iommu, &ipmmu_ops, &pdev->dev);
1098
+
if (ret)
1099
+
iommu_device_sysfs_remove(&mmu->iommu);
1105
1100
1106
-
platform_set_drvdata(pdev, mmu);
1107
-
1108
-
return 0;
1101
+
return ret;
1109
1102
}
1110
1103
1111
1104
static void ipmmu_remove(struct platform_device *pdev)
+13
-13
drivers/iommu/mtk_iommu.c
+13
-13
drivers/iommu/mtk_iommu.c
···
1372
1372
platform_set_drvdata(pdev, data);
1373
1373
mutex_init(&data->mutex);
1374
1374
1375
-
ret = iommu_device_sysfs_add(&data->iommu, dev, NULL,
1376
-
"mtk-iommu.%pa", &ioaddr);
1377
-
if (ret)
1378
-
goto out_link_remove;
1379
-
1380
-
ret = iommu_device_register(&data->iommu, &mtk_iommu_ops, dev);
1381
-
if (ret)
1382
-
goto out_sysfs_remove;
1383
-
1384
1375
if (MTK_IOMMU_HAS_FLAG(data->plat_data, SHARE_PGTABLE)) {
1385
1376
list_add_tail(&data->list, data->plat_data->hw_list);
1386
1377
data->hw_list = data->plat_data->hw_list;
···
1381
1390
data->hw_list = &data->hw_list_head;
1382
1391
}
1383
1392
1393
+
ret = iommu_device_sysfs_add(&data->iommu, dev, NULL,
1394
+
"mtk-iommu.%pa", &ioaddr);
1395
+
if (ret)
1396
+
goto out_list_del;
1397
+
1398
+
ret = iommu_device_register(&data->iommu, &mtk_iommu_ops, dev);
1399
+
if (ret)
1400
+
goto out_sysfs_remove;
1401
+
1384
1402
if (MTK_IOMMU_IS_TYPE(data->plat_data, MTK_IOMMU_TYPE_MM)) {
1385
1403
ret = component_master_add_with_match(dev, &mtk_iommu_com_ops, match);
1386
1404
if (ret)
1387
-
goto out_list_del;
1405
+
goto out_device_unregister;
1388
1406
}
1389
1407
return ret;
1390
1408
1391
-
out_list_del:
1392
-
list_del(&data->list);
1409
+
out_device_unregister:
1393
1410
iommu_device_unregister(&data->iommu);
1394
1411
out_sysfs_remove:
1395
1412
iommu_device_sysfs_remove(&data->iommu);
1396
-
out_link_remove:
1413
+
out_list_del:
1414
+
list_del(&data->list);
1397
1415
if (MTK_IOMMU_IS_TYPE(data->plat_data, MTK_IOMMU_TYPE_MM))
1398
1416
device_link_remove(data->smicomm_dev, dev);
1399
1417
out_runtime_disable:
+1
drivers/irqchip/irq-bcm2712-mip.c
+1
drivers/irqchip/irq-bcm2712-mip.c
···
163
163
static const struct msi_parent_ops mip_msi_parent_ops = {
164
164
.supported_flags = MIP_MSI_FLAGS_SUPPORTED,
165
165
.required_flags = MIP_MSI_FLAGS_REQUIRED,
166
+
.chip_flags = MSI_CHIP_FLAG_SET_EOI | MSI_CHIP_FLAG_SET_ACK,
166
167
.bus_select_token = DOMAIN_BUS_GENERIC_MSI,
167
168
.bus_select_mask = MATCH_PCI_MSI,
168
169
.prefix = "MIP-MSI-",
+1
drivers/irqchip/irq-sg2042-msi.c
+1
drivers/irqchip/irq-sg2042-msi.c
···
151
151
static const struct msi_parent_ops sg2042_msi_parent_ops = {
152
152
.required_flags = SG2042_MSI_FLAGS_REQUIRED,
153
153
.supported_flags = SG2042_MSI_FLAGS_SUPPORTED,
154
+
.chip_flags = MSI_CHIP_FLAG_SET_ACK,
154
155
.bus_select_mask = MATCH_PCI_MSI,
155
156
.bus_select_token = DOMAIN_BUS_NEXUS,
156
157
.prefix = "SG2042-",
+1
-1
drivers/md/Kconfig
+1
-1
drivers/md/Kconfig
+1
-1
drivers/md/persistent-data/Kconfig
+1
-1
drivers/md/persistent-data/Kconfig
+5
-4
drivers/mtd/inftlcore.c
+5
-4
drivers/mtd/inftlcore.c
···
482
482
silly = MAX_LOOPS;
483
483
484
484
while (thisEUN <= inftl->lastEUN) {
485
-
inftl_read_oob(mtd, (thisEUN * inftl->EraseSize) +
486
-
blockofs, 8, &retlen, (char *)&bci);
487
-
488
-
status = bci.Status | bci.Status1;
485
+
if (inftl_read_oob(mtd, (thisEUN * inftl->EraseSize) +
486
+
blockofs, 8, &retlen, (char *)&bci) < 0)
487
+
status = SECTOR_IGNORE;
488
+
else
489
+
status = bci.Status | bci.Status1;
489
490
pr_debug("INFTL: status of block %d in EUN %d is %x\n",
490
491
block , writeEUN, status);
491
492
-3
drivers/mtd/nand/Makefile
-3
drivers/mtd/nand/Makefile
···
3
3
nandcore-objs := core.o bbt.o
4
4
obj-$(CONFIG_MTD_NAND_CORE) += nandcore.o
5
5
obj-$(CONFIG_MTD_NAND_ECC_MEDIATEK) += ecc-mtk.o
6
-
ifeq ($(CONFIG_SPI_QPIC_SNAND),y)
7
6
obj-$(CONFIG_SPI_QPIC_SNAND) += qpic_common.o
8
-
else
9
7
obj-$(CONFIG_MTD_NAND_QCOM) += qpic_common.o
10
-
endif
11
8
obj-y += onenand/
12
9
obj-y += raw/
13
10
obj-y += spi/
+3
drivers/mtd/nand/raw/r852.c
+3
drivers/mtd/nand/raw/r852.c
+2
-2
drivers/net/ethernet/broadcom/Kconfig
+2
-2
drivers/net/ethernet/broadcom/Kconfig
···
143
143
depends on PTP_1588_CLOCK_OPTIONAL
144
144
select FW_LOADER
145
145
select ZLIB_INFLATE
146
-
select LIBCRC32C
146
+
select CRC32
147
147
select MDIO
148
148
help
149
149
This driver supports Broadcom NetXtremeII 10 gigabit Ethernet cards.
···
207
207
depends on PCI
208
208
depends on PTP_1588_CLOCK_OPTIONAL
209
209
select FW_LOADER
210
-
select LIBCRC32C
210
+
select CRC32
211
211
select NET_DEVLINK
212
212
select PAGE_POOL
213
213
select DIMLIB
+1
-1
drivers/net/ethernet/cavium/Kconfig
+1
-1
drivers/net/ethernet/cavium/Kconfig
+5
drivers/net/ethernet/marvell/octeontx2/nic/qos.c
+5
drivers/net/ethernet/marvell/octeontx2/nic/qos.c
···
165
165
166
166
otx2_config_sched_shaping(pfvf, node, cfg, &num_regs);
167
167
} else if (level == NIX_TXSCH_LVL_TL2) {
168
+
/* configure parent txschq */
169
+
cfg->reg[num_regs] = NIX_AF_TL2X_PARENT(node->schq);
170
+
cfg->regval[num_regs] = (u64)hw->tx_link << 16;
171
+
num_regs++;
172
+
168
173
/* configure link cfg */
169
174
if (level == pfvf->qos.link_cfg_lvl) {
170
175
cfg->reg[num_regs] = NIX_AF_TL3_TL2X_LINKX_CFG(node->schq, hw->tx_link);
+4
-2
drivers/net/ethernet/wangxun/libwx/wx_lib.c
+4
-2
drivers/net/ethernet/wangxun/libwx/wx_lib.c
···
310
310
return true;
311
311
312
312
page = page_pool_dev_alloc_pages(rx_ring->page_pool);
313
-
WARN_ON(!page);
313
+
if (unlikely(!page))
314
+
return false;
314
315
dma = page_pool_get_dma_addr(page);
315
316
316
317
bi->page_dma = dma;
···
547
546
return;
548
547
549
548
/* Hardware can't guarantee csum if IPv6 Dest Header found */
550
-
if (dptype.prot != WX_DEC_PTYPE_PROT_SCTP && WX_RXD_IPV6EX(rx_desc))
549
+
if (dptype.prot != WX_DEC_PTYPE_PROT_SCTP &&
550
+
wx_test_staterr(rx_desc, WX_RXD_STAT_IPV6EX))
551
551
return;
552
552
553
553
/* if L4 checksum error */
+1
-2
drivers/net/ethernet/wangxun/libwx/wx_type.h
+1
-2
drivers/net/ethernet/wangxun/libwx/wx_type.h
···
513
513
#define WX_RXD_STAT_L4CS BIT(7) /* L4 xsum calculated */
514
514
#define WX_RXD_STAT_IPCS BIT(8) /* IP xsum calculated */
515
515
#define WX_RXD_STAT_OUTERIPCS BIT(10) /* Cloud IP xsum calculated*/
516
+
#define WX_RXD_STAT_IPV6EX BIT(12) /* IPv6 Dest Header */
516
517
#define WX_RXD_STAT_TS BIT(14) /* IEEE1588 Time Stamp */
517
518
518
519
#define WX_RXD_ERR_OUTERIPER BIT(26) /* CRC IP Header error */
···
590
589
591
590
#define WX_RXD_PKTTYPE(_rxd) \
592
591
((le32_to_cpu((_rxd)->wb.lower.lo_dword.data) >> 9) & 0xFF)
593
-
#define WX_RXD_IPV6EX(_rxd) \
594
-
((le32_to_cpu((_rxd)->wb.lower.lo_dword.data) >> 6) & 0x1)
595
592
/*********************** Transmit Descriptor Config Masks ****************/
596
593
#define WX_TXD_STAT_DD BIT(0) /* Descriptor Done */
597
594
#define WX_TXD_DTYP_DATA 0 /* Adv Data Descriptor */
+42
-15
drivers/net/phy/phy_device.c
+42
-15
drivers/net/phy/phy_device.c
···
244
244
return wol.wolopts != 0;
245
245
}
246
246
247
+
static void phy_link_change(struct phy_device *phydev, bool up)
248
+
{
249
+
struct net_device *netdev = phydev->attached_dev;
250
+
251
+
if (up)
252
+
netif_carrier_on(netdev);
253
+
else
254
+
netif_carrier_off(netdev);
255
+
phydev->adjust_link(netdev);
256
+
if (phydev->mii_ts && phydev->mii_ts->link_state)
257
+
phydev->mii_ts->link_state(phydev->mii_ts, phydev);
258
+
}
259
+
260
+
/**
261
+
* phy_uses_state_machine - test whether consumer driver uses PAL state machine
262
+
* @phydev: the target PHY device structure
263
+
*
264
+
* Ultimately, this aims to indirectly determine whether the PHY is attached
265
+
* to a consumer which uses the state machine by calling phy_start() and
266
+
* phy_stop().
267
+
*
268
+
* When the PHY driver consumer uses phylib, it must have previously called
269
+
* phy_connect_direct() or one of its derivatives, so that phy_prepare_link()
270
+
* has set up a hook for monitoring state changes.
271
+
*
272
+
* When the PHY driver is used by the MAC driver consumer through phylink (the
273
+
* only other provider of a phy_link_change() method), using the PHY state
274
+
* machine is not optional.
275
+
*
276
+
* Return: true if consumer calls phy_start() and phy_stop(), false otherwise.
277
+
*/
278
+
static bool phy_uses_state_machine(struct phy_device *phydev)
279
+
{
280
+
if (phydev->phy_link_change == phy_link_change)
281
+
return phydev->attached_dev && phydev->adjust_link;
282
+
283
+
/* phydev->phy_link_change is implicitly phylink_phy_change() */
284
+
return true;
285
+
}
286
+
247
287
static bool mdio_bus_phy_may_suspend(struct phy_device *phydev)
248
288
{
249
289
struct device_driver *drv = phydev->mdio.dev.driver;
···
350
310
* may call phy routines that try to grab the same lock, and that may
351
311
* lead to a deadlock.
352
312
*/
353
-
if (phydev->attached_dev && phydev->adjust_link)
313
+
if (phy_uses_state_machine(phydev))
354
314
phy_stop_machine(phydev);
355
315
356
316
if (!mdio_bus_phy_may_suspend(phydev))
···
404
364
}
405
365
}
406
366
407
-
if (phydev->attached_dev && phydev->adjust_link)
367
+
if (phy_uses_state_machine(phydev))
408
368
phy_start_machine(phydev);
409
369
410
370
return 0;
···
1094
1054
return NULL;
1095
1055
}
1096
1056
EXPORT_SYMBOL(phy_find_first);
1097
-
1098
-
static void phy_link_change(struct phy_device *phydev, bool up)
1099
-
{
1100
-
struct net_device *netdev = phydev->attached_dev;
1101
-
1102
-
if (up)
1103
-
netif_carrier_on(netdev);
1104
-
else
1105
-
netif_carrier_off(netdev);
1106
-
phydev->adjust_link(netdev);
1107
-
if (phydev->mii_ts && phydev->mii_ts->link_state)
1108
-
phydev->mii_ts->link_state(phydev->mii_ts, phydev);
1109
-
}
1110
1057
1111
1058
/**
1112
1059
* phy_prepare_link - prepares the PHY layer to monitor link status
+5
drivers/net/ppp/ppp_synctty.c
+5
drivers/net/ppp/ppp_synctty.c
+9
drivers/nvme/host/core.c
+9
drivers/nvme/host/core.c
···
4295
4295
nvme_scan_ns_sequential(ctrl);
4296
4296
}
4297
4297
mutex_unlock(&ctrl->scan_lock);
4298
+
4299
+
/* Requeue if we have missed AENs */
4300
+
if (test_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events))
4301
+
nvme_queue_scan(ctrl);
4302
+
#ifdef CONFIG_NVME_MULTIPATH
4303
+
else
4304
+
/* Re-read the ANA log page to not miss updates */
4305
+
queue_work(nvme_wq, &ctrl->ana_work);
4306
+
#endif
4298
4307
}
4299
4308
4300
4309
/*
+1
-1
drivers/nvme/host/multipath.c
+1
-1
drivers/nvme/host/multipath.c
+2
drivers/nvme/host/tcp.c
+2
drivers/nvme/host/tcp.c
+20
-40
drivers/nvme/target/fc.c
+20
-40
drivers/nvme/target/fc.c
···
995
995
return kref_get_unless_zero(&hostport->ref);
996
996
}
997
997
998
-
static void
999
-
nvmet_fc_free_hostport(struct nvmet_fc_hostport *hostport)
1000
-
{
1001
-
/* if LLDD not implemented, leave as NULL */
1002
-
if (!hostport || !hostport->hosthandle)
1003
-
return;
1004
-
1005
-
nvmet_fc_hostport_put(hostport);
1006
-
}
1007
-
1008
998
static struct nvmet_fc_hostport *
1009
999
nvmet_fc_match_hostport(struct nvmet_fc_tgtport *tgtport, void *hosthandle)
1010
1000
{
···
1018
1028
struct nvmet_fc_hostport *newhost, *match = NULL;
1019
1029
unsigned long flags;
1020
1030
1031
+
/*
1032
+
* Caller holds a reference on tgtport.
1033
+
*/
1034
+
1021
1035
/* if LLDD not implemented, leave as NULL */
1022
1036
if (!hosthandle)
1023
1037
return NULL;
1024
-
1025
-
/*
1026
-
* take reference for what will be the newly allocated hostport if
1027
-
* we end up using a new allocation
1028
-
*/
1029
-
if (!nvmet_fc_tgtport_get(tgtport))
1030
-
return ERR_PTR(-EINVAL);
1031
1038
1032
1039
spin_lock_irqsave(&tgtport->lock, flags);
1033
1040
match = nvmet_fc_match_hostport(tgtport, hosthandle);
1034
1041
spin_unlock_irqrestore(&tgtport->lock, flags);
1035
1042
1036
-
if (match) {
1037
-
/* no new allocation - release reference */
1038
-
nvmet_fc_tgtport_put(tgtport);
1043
+
if (match)
1039
1044
return match;
1040
-
}
1041
1045
1042
1046
newhost = kzalloc(sizeof(*newhost), GFP_KERNEL);
1043
-
if (!newhost) {
1044
-
/* no new allocation - release reference */
1045
-
nvmet_fc_tgtport_put(tgtport);
1047
+
if (!newhost)
1046
1048
return ERR_PTR(-ENOMEM);
1047
-
}
1048
1049
1049
1050
spin_lock_irqsave(&tgtport->lock, flags);
1050
1051
match = nvmet_fc_match_hostport(tgtport, hosthandle);
···
1044
1063
kfree(newhost);
1045
1064
newhost = match;
1046
1065
} else {
1066
+
nvmet_fc_tgtport_get(tgtport);
1047
1067
newhost->tgtport = tgtport;
1048
1068
newhost->hosthandle = hosthandle;
1049
1069
INIT_LIST_HEAD(&newhost->host_list);
···
1058
1076
}
1059
1077
1060
1078
static void
1061
-
nvmet_fc_delete_assoc(struct nvmet_fc_tgt_assoc *assoc)
1062
-
{
1063
-
nvmet_fc_delete_target_assoc(assoc);
1064
-
nvmet_fc_tgt_a_put(assoc);
1065
-
}
1066
-
1067
-
static void
1068
1079
nvmet_fc_delete_assoc_work(struct work_struct *work)
1069
1080
{
1070
1081
struct nvmet_fc_tgt_assoc *assoc =
1071
1082
container_of(work, struct nvmet_fc_tgt_assoc, del_work);
1072
1083
struct nvmet_fc_tgtport *tgtport = assoc->tgtport;
1073
1084
1074
-
nvmet_fc_delete_assoc(assoc);
1085
+
nvmet_fc_delete_target_assoc(assoc);
1086
+
nvmet_fc_tgt_a_put(assoc);
1075
1087
nvmet_fc_tgtport_put(tgtport);
1076
1088
}
1077
1089
···
1073
1097
nvmet_fc_schedule_delete_assoc(struct nvmet_fc_tgt_assoc *assoc)
1074
1098
{
1075
1099
nvmet_fc_tgtport_get(assoc->tgtport);
1076
-
queue_work(nvmet_wq, &assoc->del_work);
1100
+
if (!queue_work(nvmet_wq, &assoc->del_work))
1101
+
nvmet_fc_tgtport_put(assoc->tgtport);
1077
1102
}
1078
1103
1079
1104
static bool
···
1120
1143
goto out_ida;
1121
1144
1122
1145
assoc->tgtport = tgtport;
1146
+
nvmet_fc_tgtport_get(tgtport);
1123
1147
assoc->a_id = idx;
1124
1148
INIT_LIST_HEAD(&assoc->a_list);
1125
1149
kref_init(&assoc->ref);
···
1168
1190
/* Send Disconnect now that all i/o has completed */
1169
1191
nvmet_fc_xmt_disconnect_assoc(assoc);
1170
1192
1171
-
nvmet_fc_free_hostport(assoc->hostport);
1193
+
nvmet_fc_hostport_put(assoc->hostport);
1172
1194
spin_lock_irqsave(&tgtport->lock, flags);
1173
1195
oldls = assoc->rcv_disconn;
1174
1196
spin_unlock_irqrestore(&tgtport->lock, flags);
···
1222
1244
dev_info(tgtport->dev,
1223
1245
"{%d:%d} Association deleted\n",
1224
1246
tgtport->fc_target_port.port_num, assoc->a_id);
1247
+
1248
+
nvmet_fc_tgtport_put(tgtport);
1225
1249
}
1226
1250
1227
1251
static struct nvmet_fc_tgt_assoc *
···
1435
1455
struct nvmet_fc_tgtport *tgtport =
1436
1456
container_of(ref, struct nvmet_fc_tgtport, ref);
1437
1457
struct device *dev = tgtport->dev;
1438
-
unsigned long flags;
1439
-
1440
-
spin_lock_irqsave(&nvmet_fc_tgtlock, flags);
1441
-
list_del(&tgtport->tgt_list);
1442
-
spin_unlock_irqrestore(&nvmet_fc_tgtlock, flags);
1443
1458
1444
1459
nvmet_fc_free_ls_iodlist(tgtport);
1445
1460
···
1595
1620
nvmet_fc_unregister_targetport(struct nvmet_fc_target_port *target_port)
1596
1621
{
1597
1622
struct nvmet_fc_tgtport *tgtport = targetport_to_tgtport(target_port);
1623
+
unsigned long flags;
1624
+
1625
+
spin_lock_irqsave(&nvmet_fc_tgtlock, flags);
1626
+
list_del(&tgtport->tgt_list);
1627
+
spin_unlock_irqrestore(&nvmet_fc_tgtlock, flags);
1598
1628
1599
1629
nvmet_fc_portentry_unbind_tgt(tgtport);
1600
1630
+41
-35
drivers/nvme/target/fcloop.c
+41
-35
drivers/nvme/target/fcloop.c
···
208
208
struct nvme_fc_local_port *localport;
209
209
struct list_head lport_list;
210
210
struct completion unreg_done;
211
+
refcount_t ref;
211
212
};
212
213
213
214
struct fcloop_lport_priv {
···
240
239
struct fcloop_tport *tport;
241
240
struct fcloop_lport *lport;
242
241
struct list_head nport_list;
243
-
struct kref ref;
242
+
refcount_t ref;
244
243
u64 node_name;
245
244
u64 port_name;
246
245
u32 port_role;
···
275
274
u32 inistate;
276
275
bool active;
277
276
bool aborted;
278
-
struct kref ref;
277
+
refcount_t ref;
279
278
struct work_struct fcp_rcv_work;
280
279
struct work_struct abort_rcv_work;
281
280
struct work_struct tio_done_work;
···
479
478
if (targetport) {
480
479
tport = targetport->private;
481
480
spin_lock(&tport->lock);
482
-
list_add_tail(&tport->ls_list, &tls_req->ls_list);
481
+
list_add_tail(&tls_req->ls_list, &tport->ls_list);
483
482
spin_unlock(&tport->lock);
484
483
queue_work(nvmet_wq, &tport->ls_work);
485
484
}
···
535
534
}
536
535
537
536
static void
538
-
fcloop_tfcp_req_free(struct kref *ref)
539
-
{
540
-
struct fcloop_fcpreq *tfcp_req =
541
-
container_of(ref, struct fcloop_fcpreq, ref);
542
-
543
-
kfree(tfcp_req);
544
-
}
545
-
546
-
static void
547
537
fcloop_tfcp_req_put(struct fcloop_fcpreq *tfcp_req)
548
538
{
549
-
kref_put(&tfcp_req->ref, fcloop_tfcp_req_free);
539
+
if (!refcount_dec_and_test(&tfcp_req->ref))
540
+
return;
541
+
542
+
kfree(tfcp_req);
550
543
}
551
544
552
545
static int
553
546
fcloop_tfcp_req_get(struct fcloop_fcpreq *tfcp_req)
554
547
{
555
-
return kref_get_unless_zero(&tfcp_req->ref);
548
+
return refcount_inc_not_zero(&tfcp_req->ref);
556
549
}
557
550
558
551
static void
···
743
748
INIT_WORK(&tfcp_req->fcp_rcv_work, fcloop_fcp_recv_work);
744
749
INIT_WORK(&tfcp_req->abort_rcv_work, fcloop_fcp_abort_recv_work);
745
750
INIT_WORK(&tfcp_req->tio_done_work, fcloop_tgt_fcprqst_done_work);
746
-
kref_init(&tfcp_req->ref);
751
+
refcount_set(&tfcp_req->ref, 1);
747
752
748
753
queue_work(nvmet_wq, &tfcp_req->fcp_rcv_work);
749
754
···
996
1001
}
997
1002
998
1003
static void
999
-
fcloop_nport_free(struct kref *ref)
1004
+
fcloop_lport_put(struct fcloop_lport *lport)
1000
1005
{
1001
-
struct fcloop_nport *nport =
1002
-
container_of(ref, struct fcloop_nport, ref);
1006
+
unsigned long flags;
1003
1007
1004
-
kfree(nport);
1008
+
if (!refcount_dec_and_test(&lport->ref))
1009
+
return;
1010
+
1011
+
spin_lock_irqsave(&fcloop_lock, flags);
1012
+
list_del(&lport->lport_list);
1013
+
spin_unlock_irqrestore(&fcloop_lock, flags);
1014
+
1015
+
kfree(lport);
1016
+
}
1017
+
1018
+
static int
1019
+
fcloop_lport_get(struct fcloop_lport *lport)
1020
+
{
1021
+
return refcount_inc_not_zero(&lport->ref);
1005
1022
}
1006
1023
1007
1024
static void
1008
1025
fcloop_nport_put(struct fcloop_nport *nport)
1009
1026
{
1010
-
kref_put(&nport->ref, fcloop_nport_free);
1027
+
if (!refcount_dec_and_test(&nport->ref))
1028
+
return;
1029
+
1030
+
kfree(nport);
1011
1031
}
1012
1032
1013
1033
static int
1014
1034
fcloop_nport_get(struct fcloop_nport *nport)
1015
1035
{
1016
-
return kref_get_unless_zero(&nport->ref);
1036
+
return refcount_inc_not_zero(&nport->ref);
1017
1037
}
1018
1038
1019
1039
static void
···
1039
1029
1040
1030
/* release any threads waiting for the unreg to complete */
1041
1031
complete(&lport->unreg_done);
1032
+
1033
+
fcloop_lport_put(lport);
1042
1034
}
1043
1035
1044
1036
static void
···
1152
1140
1153
1141
lport->localport = localport;
1154
1142
INIT_LIST_HEAD(&lport->lport_list);
1143
+
refcount_set(&lport->ref, 1);
1155
1144
1156
1145
spin_lock_irqsave(&fcloop_lock, flags);
1157
1146
list_add_tail(&lport->lport_list, &fcloop_lports);
···
1169
1156
return ret ? ret : count;
1170
1157
}
1171
1158
1172
-
1173
-
static void
1174
-
__unlink_local_port(struct fcloop_lport *lport)
1175
-
{
1176
-
list_del(&lport->lport_list);
1177
-
}
1178
-
1179
1159
static int
1180
1160
__wait_localport_unreg(struct fcloop_lport *lport)
1181
1161
{
···
1180
1174
1181
1175
if (!ret)
1182
1176
wait_for_completion(&lport->unreg_done);
1183
-
1184
-
kfree(lport);
1185
1177
1186
1178
return ret;
1187
1179
}
···
1203
1199
list_for_each_entry(tlport, &fcloop_lports, lport_list) {
1204
1200
if (tlport->localport->node_name == nodename &&
1205
1201
tlport->localport->port_name == portname) {
1202
+
if (!fcloop_lport_get(tlport))
1203
+
break;
1206
1204
lport = tlport;
1207
-
__unlink_local_port(lport);
1208
1205
break;
1209
1206
}
1210
1207
}
···
1215
1210
return -ENOENT;
1216
1211
1217
1212
ret = __wait_localport_unreg(lport);
1213
+
fcloop_lport_put(lport);
1218
1214
1219
1215
return ret ? ret : count;
1220
1216
}
···
1255
1249
newnport->port_role = opts->roles;
1256
1250
if (opts->mask & NVMF_OPT_FCADDR)
1257
1251
newnport->port_id = opts->fcaddr;
1258
-
kref_init(&newnport->ref);
1252
+
refcount_set(&newnport->ref, 1);
1259
1253
1260
1254
spin_lock_irqsave(&fcloop_lock, flags);
1261
1255
···
1643
1637
for (;;) {
1644
1638
lport = list_first_entry_or_null(&fcloop_lports,
1645
1639
typeof(*lport), lport_list);
1646
-
if (!lport)
1640
+
if (!lport || !fcloop_lport_get(lport))
1647
1641
break;
1648
-
1649
-
__unlink_local_port(lport);
1650
1642
1651
1643
spin_unlock_irqrestore(&fcloop_lock, flags);
1652
1644
1653
1645
ret = __wait_localport_unreg(lport);
1654
1646
if (ret)
1655
1647
pr_warn("%s: Failed deleting local port\n", __func__);
1648
+
1649
+
fcloop_lport_put(lport);
1656
1650
1657
1651
spin_lock_irqsave(&fcloop_lock, flags);
1658
1652
}
+6
-6
drivers/pci/quirks.c
+6
-6
drivers/pci/quirks.c
···
1990
1990
device_create_managed_software_node(&pdev->dev, properties, NULL))
1991
1991
pci_warn(pdev, "could not add stall property");
1992
1992
}
1993
-
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa250, quirk_huawei_pcie_sva);
1994
-
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa251, quirk_huawei_pcie_sva);
1995
-
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa255, quirk_huawei_pcie_sva);
1996
-
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa256, quirk_huawei_pcie_sva);
1997
-
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa258, quirk_huawei_pcie_sva);
1998
-
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa259, quirk_huawei_pcie_sva);
1993
+
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HUAWEI, 0xa250, quirk_huawei_pcie_sva);
1994
+
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HUAWEI, 0xa251, quirk_huawei_pcie_sva);
1995
+
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HUAWEI, 0xa255, quirk_huawei_pcie_sva);
1996
+
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HUAWEI, 0xa256, quirk_huawei_pcie_sva);
1997
+
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HUAWEI, 0xa258, quirk_huawei_pcie_sva);
1998
+
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HUAWEI, 0xa259, quirk_huawei_pcie_sva);
1999
1999
2000
2000
/*
2001
2001
* It's possible for the MSI to get corrupted if SHPC and ACPI are used
+7
-6
drivers/pwm/core.c
+7
-6
drivers/pwm/core.c
···
322
322
const struct pwm_ops *ops = chip->ops;
323
323
char wfhw[WFHWSIZE];
324
324
struct pwm_waveform wf_rounded;
325
-
int err;
325
+
int err, ret_tohw;
326
326
327
327
BUG_ON(WFHWSIZE < ops->sizeof_wfhw);
328
328
···
332
332
if (!pwm_wf_valid(wf))
333
333
return -EINVAL;
334
334
335
-
err = __pwm_round_waveform_tohw(chip, pwm, wf, &wfhw);
336
-
if (err)
337
-
return err;
335
+
ret_tohw = __pwm_round_waveform_tohw(chip, pwm, wf, &wfhw);
336
+
if (ret_tohw < 0)
337
+
return ret_tohw;
338
338
339
339
if ((IS_ENABLED(CONFIG_PWM_DEBUG) || exact) && wf->period_length_ns) {
340
340
err = __pwm_round_waveform_fromhw(chip, pwm, &wfhw, &wf_rounded);
341
341
if (err)
342
342
return err;
343
343
344
-
if (IS_ENABLED(CONFIG_PWM_DEBUG) && !pwm_check_rounding(wf, &wf_rounded))
344
+
if (IS_ENABLED(CONFIG_PWM_DEBUG) && ret_tohw == 0 && !pwm_check_rounding(wf, &wf_rounded))
345
345
dev_err(&chip->dev, "Wrong rounding: requested %llu/%llu [+%llu], result %llu/%llu [+%llu]\n",
346
346
wf->duty_length_ns, wf->period_length_ns, wf->duty_offset_ns,
347
347
wf_rounded.duty_length_ns, wf_rounded.period_length_ns, wf_rounded.duty_offset_ns);
···
382
382
wf_rounded.duty_length_ns, wf_rounded.period_length_ns, wf_rounded.duty_offset_ns,
383
383
wf_set.duty_length_ns, wf_set.period_length_ns, wf_set.duty_offset_ns);
384
384
}
385
-
return 0;
385
+
386
+
return ret_tohw;
386
387
}
387
388
388
389
/**
+7
-3
drivers/pwm/pwm-axi-pwmgen.c
+7
-3
drivers/pwm/pwm-axi-pwmgen.c
···
75
75
{
76
76
struct axi_pwmgen_waveform *wfhw = _wfhw;
77
77
struct axi_pwmgen_ddata *ddata = axi_pwmgen_ddata_from_chip(chip);
78
+
int ret = 0;
78
79
79
80
if (wf->period_length_ns == 0) {
80
81
*wfhw = (struct axi_pwmgen_waveform){
···
92
91
if (wfhw->period_cnt == 0) {
93
92
/*
94
93
* The specified period is too short for the hardware.
95
-
* Let's round .duty_cycle down to 0 to get a (somewhat)
96
-
* valid result.
94
+
* So round up .period_cnt to 1 (i.e. the smallest
95
+
* possible period). With .duty_cycle and .duty_offset
96
+
* being less than or equal to .period, their rounded
97
+
* value must be 0.
97
98
*/
98
99
wfhw->period_cnt = 1;
99
100
wfhw->duty_cycle_cnt = 0;
100
101
wfhw->duty_offset_cnt = 0;
102
+
ret = 1;
101
103
} else {
102
104
wfhw->duty_cycle_cnt = min_t(u64,
103
105
mul_u64_u32_div(wf->duty_length_ns, ddata->clk_rate_hz, NSEC_PER_SEC),
···
115
111
pwm->hwpwm, wf->duty_length_ns, wf->period_length_ns, wf->duty_offset_ns,
116
112
ddata->clk_rate_hz, wfhw->period_cnt, wfhw->duty_cycle_cnt, wfhw->duty_offset_cnt);
117
113
118
-
return 0;
114
+
return ret;
119
115
}
120
116
121
117
static int axi_pwmgen_round_waveform_fromhw(struct pwm_chip *chip, struct pwm_device *pwm,
+6
drivers/pwm/pwm-fsl-ftm.c
+6
drivers/pwm/pwm-fsl-ftm.c
···
118
118
unsigned long long exval;
119
119
120
120
rate = clk_get_rate(fpc->clk[fpc->period.clk_select]);
121
+
if (rate >> fpc->period.clk_ps == 0)
122
+
return 0;
123
+
121
124
exval = ticks;
122
125
exval *= 1000000000UL;
123
126
do_div(exval, rate >> fpc->period.clk_ps);
···
192
189
193
190
unsigned int period = fpc->period.mod_period + 1;
194
191
unsigned int period_ns = fsl_pwm_ticks_to_ns(fpc, period);
192
+
193
+
if (!period_ns)
194
+
return 0;
195
195
196
196
duty = (unsigned long long)duty_ns * period;
197
197
do_div(duty, period_ns);
+6
-2
drivers/pwm/pwm-mediatek.c
+6
-2
drivers/pwm/pwm-mediatek.c
···
121
121
struct pwm_mediatek_chip *pc = to_pwm_mediatek_chip(chip);
122
122
u32 clkdiv = 0, cnt_period, cnt_duty, reg_width = PWMDWIDTH,
123
123
reg_thres = PWMTHRES;
124
+
unsigned long clk_rate;
124
125
u64 resolution;
125
126
int ret;
126
127
127
128
ret = pwm_mediatek_clk_enable(chip, pwm);
128
-
129
129
if (ret < 0)
130
130
return ret;
131
+
132
+
clk_rate = clk_get_rate(pc->clk_pwms[pwm->hwpwm]);
133
+
if (!clk_rate)
134
+
return -EINVAL;
131
135
132
136
/* Make sure we use the bus clock and not the 26MHz clock */
133
137
if (pc->soc->has_ck_26m_sel)
···
139
135
140
136
/* Using resolution in picosecond gets accuracy higher */
141
137
resolution = (u64)NSEC_PER_SEC * 1000;
142
-
do_div(resolution, clk_get_rate(pc->clk_pwms[pwm->hwpwm]));
138
+
do_div(resolution, clk_rate);
143
139
144
140
cnt_period = DIV_ROUND_CLOSEST_ULL((u64)period_ns * 1000, resolution);
145
141
while (cnt_period > 8191) {
+13
-11
drivers/pwm/pwm-rcar.c
+13
-11
drivers/pwm/pwm-rcar.c
···
8
8
* - The hardware cannot generate a 0% duty cycle.
9
9
*/
10
10
11
+
#include <linux/bitfield.h>
11
12
#include <linux/clk.h>
12
13
#include <linux/err.h>
13
14
#include <linux/io.h>
···
103
102
rcar_pwm_write(rp, value, RCAR_PWMCR);
104
103
}
105
104
106
-
static int rcar_pwm_set_counter(struct rcar_pwm_chip *rp, int div, int duty_ns,
107
-
int period_ns)
105
+
static int rcar_pwm_set_counter(struct rcar_pwm_chip *rp, int div, u64 duty_ns,
106
+
u64 period_ns)
108
107
{
109
-
unsigned long long one_cycle, tmp; /* 0.01 nanoseconds */
108
+
unsigned long long tmp;
110
109
unsigned long clk_rate = clk_get_rate(rp->clk);
111
110
u32 cyc, ph;
112
111
113
-
one_cycle = NSEC_PER_SEC * 100ULL << div;
114
-
do_div(one_cycle, clk_rate);
112
+
/* div <= 24 == RCAR_PWM_MAX_DIVISION, so the shift doesn't overflow. */
113
+
tmp = mul_u64_u64_div_u64(period_ns, clk_rate, (u64)NSEC_PER_SEC << div);
114
+
if (tmp > FIELD_MAX(RCAR_PWMCNT_CYC0_MASK))
115
+
tmp = FIELD_MAX(RCAR_PWMCNT_CYC0_MASK);
115
116
116
-
tmp = period_ns * 100ULL;
117
-
do_div(tmp, one_cycle);
118
-
cyc = (tmp << RCAR_PWMCNT_CYC0_SHIFT) & RCAR_PWMCNT_CYC0_MASK;
117
+
cyc = FIELD_PREP(RCAR_PWMCNT_CYC0_MASK, tmp);
119
118
120
-
tmp = duty_ns * 100ULL;
121
-
do_div(tmp, one_cycle);
122
-
ph = tmp & RCAR_PWMCNT_PH0_MASK;
119
+
tmp = mul_u64_u64_div_u64(duty_ns, clk_rate, (u64)NSEC_PER_SEC << div);
120
+
if (tmp > FIELD_MAX(RCAR_PWMCNT_PH0_MASK))
121
+
tmp = FIELD_MAX(RCAR_PWMCNT_PH0_MASK);
122
+
ph = FIELD_PREP(RCAR_PWMCNT_PH0_MASK, tmp);
123
123
124
124
/* Avoid prohibited setting */
125
125
if (cyc == 0 || ph == 0)
+3
-9
drivers/pwm/pwm-stm32.c
+3
-9
drivers/pwm/pwm-stm32.c
···
103
103
if (ret)
104
104
goto out;
105
105
106
-
/*
107
-
* calculate the best value for ARR for the given PSC, refuse if
108
-
* the resulting period gets bigger than the requested one.
109
-
*/
110
106
arr = mul_u64_u64_div_u64(wf->period_length_ns, rate,
111
107
(u64)NSEC_PER_SEC * (wfhw->psc + 1));
112
108
if (arr <= wfhw->arr) {
113
109
/*
114
-
* requested period is small than the currently
110
+
* requested period is smaller than the currently
115
111
* configured and unchangable period, report back the smallest
116
-
* possible period, i.e. the current state; Initialize
117
-
* ccr to anything valid.
112
+
* possible period, i.e. the current state and return 1
113
+
* to indicate the wrong rounding direction.
118
114
*/
119
-
wfhw->ccr = 0;
120
115
ret = 1;
121
-
goto out;
122
116
}
123
117
124
118
} else {
+12
-4
drivers/s390/virtio/virtio_ccw.c
+12
-4
drivers/s390/virtio/virtio_ccw.c
···
302
302
static unsigned long *get_airq_indicator(struct virtqueue *vqs[], int nvqs,
303
303
u64 *first, void **airq_info)
304
304
{
305
-
int i, j;
305
+
int i, j, queue_idx, highest_queue_idx = -1;
306
306
struct airq_info *info;
307
307
unsigned long *indicator_addr = NULL;
308
308
unsigned long bit, flags;
309
+
310
+
/* Array entries without an actual queue pointer must be ignored. */
311
+
for (i = 0; i < nvqs; i++) {
312
+
if (vqs[i])
313
+
highest_queue_idx++;
314
+
}
309
315
310
316
for (i = 0; i < MAX_AIRQ_AREAS && !indicator_addr; i++) {
311
317
mutex_lock(&airq_areas_lock);
···
322
316
if (!info)
323
317
return NULL;
324
318
write_lock_irqsave(&info->lock, flags);
325
-
bit = airq_iv_alloc(info->aiv, nvqs);
319
+
bit = airq_iv_alloc(info->aiv, highest_queue_idx + 1);
326
320
if (bit == -1UL) {
327
321
/* Not enough vacancies. */
328
322
write_unlock_irqrestore(&info->lock, flags);
···
331
325
*first = bit;
332
326
*airq_info = info;
333
327
indicator_addr = info->aiv->vector;
334
-
for (j = 0; j < nvqs; j++) {
335
-
airq_iv_set_ptr(info->aiv, bit + j,
328
+
for (j = 0, queue_idx = 0; j < nvqs; j++) {
329
+
if (!vqs[j])
330
+
continue;
331
+
airq_iv_set_ptr(info->aiv, bit + queue_idx++,
336
332
(unsigned long)vqs[j]);
337
333
}
338
334
write_unlock_irqrestore(&info->lock, flags);
+2
-6
drivers/spi/spi-fsl-qspi.c
+2
-6
drivers/spi/spi-fsl-qspi.c
···
949
949
950
950
ret = devm_add_action_or_reset(dev, fsl_qspi_cleanup, q);
951
951
if (ret)
952
-
goto err_destroy_mutex;
952
+
goto err_put_ctrl;
953
953
954
954
ret = devm_spi_register_controller(dev, ctlr);
955
955
if (ret)
956
-
goto err_destroy_mutex;
956
+
goto err_put_ctrl;
957
957
958
958
return 0;
959
-
960
-
err_destroy_mutex:
961
-
mutex_destroy(&q->lock);
962
959
963
960
err_disable_clk:
964
961
fsl_qspi_clk_disable_unprep(q);
···
963
966
err_put_ctrl:
964
967
spi_controller_put(ctlr);
965
968
966
-
dev_err(dev, "Freescale QuadSPI probe failed\n");
967
969
return ret;
968
970
}
969
971
+1
-1
drivers/xen/Kconfig
+1
-1
drivers/xen/Kconfig
···
278
278
279
279
config XEN_ACPI_PROCESSOR
280
280
tristate "Xen ACPI processor"
281
-
depends on XEN && XEN_PV_DOM0 && X86 && ACPI_PROCESSOR && CPU_FREQ
281
+
depends on XEN && XEN_DOM0 && X86 && ACPI_PROCESSOR && CPU_FREQ
282
282
default m
283
283
help
284
284
This ACPI processor uploads Power Management information to the Xen
+24
-10
drivers/xen/balloon.c
+24
-10
drivers/xen/balloon.c
···
679
679
}
680
680
EXPORT_SYMBOL(xen_free_ballooned_pages);
681
681
682
-
static void __init balloon_add_regions(void)
682
+
static int __init balloon_add_regions(void)
683
683
{
684
684
unsigned long start_pfn, pages;
685
685
unsigned long pfn, extra_pfn_end;
···
702
702
for (pfn = start_pfn; pfn < extra_pfn_end; pfn++)
703
703
balloon_append(pfn_to_page(pfn));
704
704
705
-
balloon_stats.total_pages += extra_pfn_end - start_pfn;
705
+
/*
706
+
* Extra regions are accounted for in the physmap, but need
707
+
* decreasing from current_pages to balloon down the initial
708
+
* allocation, because they are already accounted for in
709
+
* total_pages.
710
+
*/
711
+
if (extra_pfn_end - start_pfn >= balloon_stats.current_pages) {
712
+
WARN(1, "Extra pages underflow current target");
713
+
return -ERANGE;
714
+
}
715
+
balloon_stats.current_pages -= extra_pfn_end - start_pfn;
706
716
}
717
+
718
+
return 0;
707
719
}
708
720
709
721
static int __init balloon_init(void)
710
722
{
711
723
struct task_struct *task;
724
+
int rc;
712
725
713
726
if (!xen_domain())
714
727
return -ENODEV;
715
728
716
729
pr_info("Initialising balloon driver\n");
717
730
718
-
#ifdef CONFIG_XEN_PV
719
-
balloon_stats.current_pages = xen_pv_domain()
720
-
? min(xen_start_info->nr_pages - xen_released_pages, max_pfn)
721
-
: get_num_physpages();
722
-
#else
723
-
balloon_stats.current_pages = get_num_physpages();
724
-
#endif
731
+
if (xen_released_pages >= get_num_physpages()) {
732
+
WARN(1, "Released pages underflow current target");
733
+
return -ERANGE;
734
+
}
735
+
736
+
balloon_stats.current_pages = get_num_physpages() - xen_released_pages;
725
737
balloon_stats.target_pages = balloon_stats.current_pages;
726
738
balloon_stats.balloon_low = 0;
727
739
balloon_stats.balloon_high = 0;
···
750
738
register_sysctl_init("xen/balloon", balloon_table);
751
739
#endif
752
740
753
-
balloon_add_regions();
741
+
rc = balloon_add_regions();
742
+
if (rc)
743
+
return rc;
754
744
755
745
task = kthread_run(balloon_thread, NULL, "xen-balloon");
756
746
if (IS_ERR(task)) {
+1
drivers/xen/xenbus/xenbus_probe_frontend.c
+1
drivers/xen/xenbus/xenbus_probe_frontend.c
+3
-4
fs/bcachefs/Kconfig
+3
-4
fs/bcachefs/Kconfig
···
4
4
depends on BLOCK
5
5
select EXPORTFS
6
6
select CLOSURES
7
-
select LIBCRC32C
7
+
select CRC32
8
8
select CRC64
9
9
select FS_POSIX_ACL
10
10
select LZ4_COMPRESS
···
15
15
select ZLIB_INFLATE
16
16
select ZSTD_COMPRESS
17
17
select ZSTD_DECOMPRESS
18
-
select CRYPTO
19
18
select CRYPTO_LIB_SHA256
20
-
select CRYPTO_CHACHA20
21
-
select CRYPTO_POLY1305
19
+
select CRYPTO_LIB_CHACHA
20
+
select CRYPTO_LIB_POLY1305
22
21
select KEYS
23
22
select RAID6_PQ
24
23
select XOR_BLOCKS
+2
-2
fs/bcachefs/bcachefs.h
+2
-2
fs/bcachefs/bcachefs.h
···
981
981
mempool_t compress_workspace[BCH_COMPRESSION_OPT_NR];
982
982
size_t zstd_workspace_size;
983
983
984
-
struct crypto_sync_skcipher *chacha20;
985
-
struct crypto_shash *poly1305;
984
+
struct bch_key chacha20_key;
985
+
bool chacha20_key_set;
986
986
987
987
atomic64_t key_version;
988
988
+2
-3
fs/bcachefs/btree_journal_iter.c
+2
-3
fs/bcachefs/btree_journal_iter.c
···
644
644
*/
645
645
static int journal_sort_key_cmp(const void *_l, const void *_r)
646
646
{
647
-
cond_resched();
648
-
649
647
const struct journal_key *l = _l;
650
648
const struct journal_key *r = _r;
651
649
···
687
689
688
690
static void __journal_keys_sort(struct journal_keys *keys)
689
691
{
690
-
sort(keys->data, keys->nr, sizeof(keys->data[0]), journal_sort_key_cmp, NULL);
692
+
sort_nonatomic(keys->data, keys->nr, sizeof(keys->data[0]),
693
+
journal_sort_key_cmp, NULL);
691
694
692
695
cond_resched();
693
696
+3
-3
fs/bcachefs/btree_node_scan.c
+3
-3
fs/bcachefs/btree_node_scan.c
···
183
183
return;
184
184
185
185
if (bch2_csum_type_is_encryption(BSET_CSUM_TYPE(&bn->keys))) {
186
-
if (!c->chacha20)
186
+
if (!c->chacha20_key_set)
187
187
return;
188
188
189
189
struct nonce nonce = btree_nonce(&bn->keys, 0);
···
398
398
bch2_print_string_as_lines(KERN_INFO, buf.buf);
399
399
}
400
400
401
-
sort(f->nodes.data, f->nodes.nr, sizeof(f->nodes.data[0]), found_btree_node_cmp_cookie, NULL);
401
+
sort_nonatomic(f->nodes.data, f->nodes.nr, sizeof(f->nodes.data[0]), found_btree_node_cmp_cookie, NULL);
402
402
403
403
dst = 0;
404
404
darray_for_each(f->nodes, i) {
···
418
418
}
419
419
f->nodes.nr = dst;
420
420
421
-
sort(f->nodes.data, f->nodes.nr, sizeof(f->nodes.data[0]), found_btree_node_cmp_pos, NULL);
421
+
sort_nonatomic(f->nodes.data, f->nodes.nr, sizeof(f->nodes.data[0]), found_btree_node_cmp_pos, NULL);
422
422
423
423
if (0 && c->opts.verbose) {
424
424
printbuf_reset(&buf);
+4
-4
fs/bcachefs/btree_write_buffer.c
+4
-4
fs/bcachefs/btree_write_buffer.c
···
428
428
*/
429
429
trace_and_count(c, write_buffer_flush_slowpath, trans, slowpath, wb->flushing.keys.nr);
430
430
431
-
sort(wb->flushing.keys.data,
432
-
wb->flushing.keys.nr,
433
-
sizeof(wb->flushing.keys.data[0]),
434
-
wb_key_seq_cmp, NULL);
431
+
sort_nonatomic(wb->flushing.keys.data,
432
+
wb->flushing.keys.nr,
433
+
sizeof(wb->flushing.keys.data[0]),
434
+
wb_key_seq_cmp, NULL);
435
435
436
436
darray_for_each(wb->flushing.keys, i) {
437
437
if (!i->journal_seq)
+56
-189
fs/bcachefs/checksum.c
+56
-189
fs/bcachefs/checksum.c
···
7
7
#include "super-io.h"
8
8
9
9
#include <linux/crc32c.h>
10
-
#include <linux/crypto.h>
11
10
#include <linux/xxhash.h>
12
11
#include <linux/key.h>
13
12
#include <linux/random.h>
14
13
#include <linux/ratelimit.h>
15
-
#include <linux/scatterlist.h>
16
-
#include <crypto/algapi.h>
17
14
#include <crypto/chacha.h>
18
-
#include <crypto/hash.h>
19
15
#include <crypto/poly1305.h>
20
-
#include <crypto/skcipher.h>
21
16
#include <keys/user-type.h>
22
17
23
18
/*
···
91
96
}
92
97
}
93
98
94
-
static inline int do_encrypt_sg(struct crypto_sync_skcipher *tfm,
95
-
struct nonce nonce,
96
-
struct scatterlist *sg, size_t len)
99
+
static void bch2_chacha20_init(u32 state[CHACHA_STATE_WORDS],
100
+
const struct bch_key *key, struct nonce nonce)
97
101
{
98
-
SYNC_SKCIPHER_REQUEST_ON_STACK(req, tfm);
102
+
u32 key_words[CHACHA_KEY_SIZE / sizeof(u32)];
99
103
100
-
skcipher_request_set_sync_tfm(req, tfm);
101
-
skcipher_request_set_callback(req, 0, NULL, NULL);
102
-
skcipher_request_set_crypt(req, sg, sg, len, nonce.d);
104
+
BUILD_BUG_ON(sizeof(key_words) != sizeof(*key));
105
+
memcpy(key_words, key, sizeof(key_words));
106
+
le32_to_cpu_array(key_words, ARRAY_SIZE(key_words));
103
107
104
-
int ret = crypto_skcipher_encrypt(req);
105
-
if (ret)
106
-
pr_err("got error %i from crypto_skcipher_encrypt()", ret);
108
+
BUILD_BUG_ON(sizeof(nonce) != CHACHA_IV_SIZE);
109
+
chacha_init(state, key_words, (const u8 *)nonce.d);
107
110
108
-
return ret;
111
+
memzero_explicit(key_words, sizeof(key_words));
109
112
}
110
113
111
-
static inline int do_encrypt(struct crypto_sync_skcipher *tfm,
112
-
struct nonce nonce,
113
-
void *buf, size_t len)
114
+
static void bch2_chacha20(const struct bch_key *key, struct nonce nonce,
115
+
void *data, size_t len)
114
116
{
115
-
if (!is_vmalloc_addr(buf)) {
116
-
struct scatterlist sg = {};
117
+
u32 state[CHACHA_STATE_WORDS];
117
118
118
-
sg_mark_end(&sg);
119
-
sg_set_page(&sg, virt_to_page(buf), len, offset_in_page(buf));
120
-
return do_encrypt_sg(tfm, nonce, &sg, len);
121
-
} else {
122
-
DARRAY_PREALLOCATED(struct scatterlist, 4) sgl;
123
-
size_t sgl_len = 0;
124
-
int ret;
125
-
126
-
darray_init(&sgl);
127
-
128
-
while (len) {
129
-
unsigned offset = offset_in_page(buf);
130
-
struct scatterlist sg = {
131
-
.page_link = (unsigned long) vmalloc_to_page(buf),
132
-
.offset = offset,
133
-
.length = min(len, PAGE_SIZE - offset),
134
-
};
135
-
136
-
if (darray_push(&sgl, sg)) {
137
-
sg_mark_end(&darray_last(sgl));
138
-
ret = do_encrypt_sg(tfm, nonce, sgl.data, sgl_len);
139
-
if (ret)
140
-
goto err;
141
-
142
-
nonce = nonce_add(nonce, sgl_len);
143
-
sgl_len = 0;
144
-
sgl.nr = 0;
145
-
BUG_ON(darray_push(&sgl, sg));
146
-
}
147
-
148
-
buf += sg.length;
149
-
len -= sg.length;
150
-
sgl_len += sg.length;
151
-
}
152
-
153
-
sg_mark_end(&darray_last(sgl));
154
-
ret = do_encrypt_sg(tfm, nonce, sgl.data, sgl_len);
155
-
err:
156
-
darray_exit(&sgl);
157
-
return ret;
158
-
}
119
+
bch2_chacha20_init(state, key, nonce);
120
+
chacha20_crypt(state, data, data, len);
121
+
memzero_explicit(state, sizeof(state));
159
122
}
160
123
161
-
int bch2_chacha_encrypt_key(struct bch_key *key, struct nonce nonce,
162
-
void *buf, size_t len)
124
+
static void bch2_poly1305_init(struct poly1305_desc_ctx *desc,
125
+
struct bch_fs *c, struct nonce nonce)
163
126
{
164
-
struct crypto_sync_skcipher *chacha20 =
165
-
crypto_alloc_sync_skcipher("chacha20", 0, 0);
166
-
int ret;
167
-
168
-
ret = PTR_ERR_OR_ZERO(chacha20);
169
-
if (ret) {
170
-
pr_err("error requesting chacha20 cipher: %s", bch2_err_str(ret));
171
-
return ret;
172
-
}
173
-
174
-
ret = crypto_skcipher_setkey(&chacha20->base,
175
-
(void *) key, sizeof(*key));
176
-
if (ret) {
177
-
pr_err("error from crypto_skcipher_setkey(): %s", bch2_err_str(ret));
178
-
goto err;
179
-
}
180
-
181
-
ret = do_encrypt(chacha20, nonce, buf, len);
182
-
err:
183
-
crypto_free_sync_skcipher(chacha20);
184
-
return ret;
185
-
}
186
-
187
-
static int gen_poly_key(struct bch_fs *c, struct shash_desc *desc,
188
-
struct nonce nonce)
189
-
{
190
-
u8 key[POLY1305_KEY_SIZE];
191
-
int ret;
127
+
u8 key[POLY1305_KEY_SIZE] = { 0 };
192
128
193
129
nonce.d[3] ^= BCH_NONCE_POLY;
194
130
195
-
memset(key, 0, sizeof(key));
196
-
ret = do_encrypt(c->chacha20, nonce, key, sizeof(key));
197
-
if (ret)
198
-
return ret;
199
-
200
-
desc->tfm = c->poly1305;
201
-
crypto_shash_init(desc);
202
-
crypto_shash_update(desc, key, sizeof(key));
203
-
return 0;
131
+
bch2_chacha20(&c->chacha20_key, nonce, key, sizeof(key));
132
+
poly1305_init(desc, key);
204
133
}
205
134
206
135
struct bch_csum bch2_checksum(struct bch_fs *c, unsigned type,
···
149
230
150
231
case BCH_CSUM_chacha20_poly1305_80:
151
232
case BCH_CSUM_chacha20_poly1305_128: {
152
-
SHASH_DESC_ON_STACK(desc, c->poly1305);
233
+
struct poly1305_desc_ctx dctx;
153
234
u8 digest[POLY1305_DIGEST_SIZE];
154
235
struct bch_csum ret = { 0 };
155
236
156
-
gen_poly_key(c, desc, nonce);
157
-
158
-
crypto_shash_update(desc, data, len);
159
-
crypto_shash_final(desc, digest);
237
+
bch2_poly1305_init(&dctx, c, nonce);
238
+
poly1305_update(&dctx, data, len);
239
+
poly1305_final(&dctx, digest);
160
240
161
241
memcpy(&ret, digest, bch_crc_bytes[type]);
162
242
return ret;
···
171
253
if (!bch2_csum_type_is_encryption(type))
172
254
return 0;
173
255
174
-
if (bch2_fs_inconsistent_on(!c->chacha20,
256
+
if (bch2_fs_inconsistent_on(!c->chacha20_key_set,
175
257
c, "attempting to encrypt without encryption key"))
176
258
return -BCH_ERR_no_encryption_key;
177
259
178
-
return do_encrypt(c->chacha20, nonce, data, len);
260
+
bch2_chacha20(&c->chacha20_key, nonce, data, len);
261
+
return 0;
179
262
}
180
263
181
264
static struct bch_csum __bch2_checksum_bio(struct bch_fs *c, unsigned type,
···
215
296
216
297
case BCH_CSUM_chacha20_poly1305_80:
217
298
case BCH_CSUM_chacha20_poly1305_128: {
218
-
SHASH_DESC_ON_STACK(desc, c->poly1305);
299
+
struct poly1305_desc_ctx dctx;
219
300
u8 digest[POLY1305_DIGEST_SIZE];
220
301
struct bch_csum ret = { 0 };
221
302
222
-
gen_poly_key(c, desc, nonce);
303
+
bch2_poly1305_init(&dctx, c, nonce);
223
304
224
305
#ifdef CONFIG_HIGHMEM
225
306
__bio_for_each_segment(bv, bio, *iter, *iter) {
226
307
void *p = kmap_local_page(bv.bv_page) + bv.bv_offset;
227
308
228
-
crypto_shash_update(desc, p, bv.bv_len);
309
+
poly1305_update(&dctx, p, bv.bv_len);
229
310
kunmap_local(p);
230
311
}
231
312
#else
232
313
__bio_for_each_bvec(bv, bio, *iter, *iter)
233
-
crypto_shash_update(desc,
314
+
poly1305_update(&dctx,
234
315
page_address(bv.bv_page) + bv.bv_offset,
235
316
bv.bv_len);
236
317
#endif
237
-
crypto_shash_final(desc, digest);
318
+
poly1305_final(&dctx, digest);
238
319
239
320
memcpy(&ret, digest, bch_crc_bytes[type]);
240
321
return ret;
···
257
338
{
258
339
struct bio_vec bv;
259
340
struct bvec_iter iter;
260
-
DARRAY_PREALLOCATED(struct scatterlist, 4) sgl;
261
-
size_t sgl_len = 0;
341
+
u32 chacha_state[CHACHA_STATE_WORDS];
262
342
int ret = 0;
263
343
264
-
if (bch2_fs_inconsistent_on(!c->chacha20,
344
+
if (bch2_fs_inconsistent_on(!c->chacha20_key_set,
265
345
c, "attempting to encrypt without encryption key"))
266
346
return -BCH_ERR_no_encryption_key;
267
347
268
-
darray_init(&sgl);
348
+
bch2_chacha20_init(chacha_state, &c->chacha20_key, nonce);
269
349
270
350
bio_for_each_segment(bv, bio, iter) {
271
-
struct scatterlist sg = {
272
-
.page_link = (unsigned long) bv.bv_page,
273
-
.offset = bv.bv_offset,
274
-
.length = bv.bv_len,
275
-
};
351
+
void *p;
276
352
277
-
if (darray_push(&sgl, sg)) {
278
-
sg_mark_end(&darray_last(sgl));
279
-
ret = do_encrypt_sg(c->chacha20, nonce, sgl.data, sgl_len);
280
-
if (ret)
281
-
goto err;
282
-
283
-
nonce = nonce_add(nonce, sgl_len);
284
-
sgl_len = 0;
285
-
sgl.nr = 0;
286
-
287
-
BUG_ON(darray_push(&sgl, sg));
353
+
/*
354
+
* chacha_crypt() assumes that the length is a multiple of
355
+
* CHACHA_BLOCK_SIZE on any non-final call.
356
+
*/
357
+
if (!IS_ALIGNED(bv.bv_len, CHACHA_BLOCK_SIZE)) {
358
+
bch_err_ratelimited(c, "bio not aligned for encryption");
359
+
ret = -EIO;
360
+
break;
288
361
}
289
362
290
-
sgl_len += sg.length;
363
+
p = bvec_kmap_local(&bv);
364
+
chacha20_crypt(chacha_state, p, p, bv.bv_len);
365
+
kunmap_local(p);
291
366
}
292
-
293
-
sg_mark_end(&darray_last(sgl));
294
-
ret = do_encrypt_sg(c->chacha20, nonce, sgl.data, sgl_len);
295
-
err:
296
-
darray_exit(&sgl);
367
+
memzero_explicit(chacha_state, sizeof(chacha_state));
297
368
return ret;
298
369
}
299
370
···
559
650
}
560
651
561
652
/* decrypt real key: */
562
-
ret = bch2_chacha_encrypt_key(&user_key, bch2_sb_key_nonce(c),
563
-
&sb_key, sizeof(sb_key));
564
-
if (ret)
565
-
goto err;
653
+
bch2_chacha20(&user_key, bch2_sb_key_nonce(c), &sb_key, sizeof(sb_key));
566
654
567
655
if (bch2_key_is_encrypted(&sb_key)) {
568
656
bch_err(c, "incorrect encryption key");
···
572
666
memzero_explicit(&sb_key, sizeof(sb_key));
573
667
memzero_explicit(&user_key, sizeof(user_key));
574
668
return ret;
575
-
}
576
-
577
-
static int bch2_alloc_ciphers(struct bch_fs *c)
578
-
{
579
-
if (c->chacha20)
580
-
return 0;
581
-
582
-
struct crypto_sync_skcipher *chacha20 = crypto_alloc_sync_skcipher("chacha20", 0, 0);
583
-
int ret = PTR_ERR_OR_ZERO(chacha20);
584
-
if (ret) {
585
-
bch_err(c, "error requesting chacha20 module: %s", bch2_err_str(ret));
586
-
return ret;
587
-
}
588
-
589
-
struct crypto_shash *poly1305 = crypto_alloc_shash("poly1305", 0, 0);
590
-
ret = PTR_ERR_OR_ZERO(poly1305);
591
-
if (ret) {
592
-
bch_err(c, "error requesting poly1305 module: %s", bch2_err_str(ret));
593
-
crypto_free_sync_skcipher(chacha20);
594
-
return ret;
595
-
}
596
-
597
-
c->chacha20 = chacha20;
598
-
c->poly1305 = poly1305;
599
-
return 0;
600
669
}
601
670
602
671
#if 0
···
678
797
679
798
void bch2_fs_encryption_exit(struct bch_fs *c)
680
799
{
681
-
if (c->poly1305)
682
-
crypto_free_shash(c->poly1305);
683
-
if (c->chacha20)
684
-
crypto_free_sync_skcipher(c->chacha20);
800
+
memzero_explicit(&c->chacha20_key, sizeof(c->chacha20_key));
685
801
}
686
802
687
803
int bch2_fs_encryption_init(struct bch_fs *c)
688
804
{
689
805
struct bch_sb_field_crypt *crypt;
690
-
struct bch_key key;
691
-
int ret = 0;
806
+
int ret;
692
807
693
808
crypt = bch2_sb_field_get(c->disk_sb.sb, crypt);
694
809
if (!crypt)
695
-
goto out;
810
+
return 0;
696
811
697
-
ret = bch2_alloc_ciphers(c);
812
+
ret = bch2_decrypt_sb_key(c, crypt, &c->chacha20_key);
698
813
if (ret)
699
-
goto out;
700
-
701
-
ret = bch2_decrypt_sb_key(c, crypt, &key);
702
-
if (ret)
703
-
goto out;
704
-
705
-
ret = crypto_skcipher_setkey(&c->chacha20->base,
706
-
(void *) &key.key, sizeof(key.key));
707
-
if (ret)
708
-
goto out;
709
-
out:
710
-
memzero_explicit(&key, sizeof(key));
711
-
return ret;
814
+
return ret;
815
+
c->chacha20_key_set = true;
816
+
return 0;
712
817
}
+1
-2
fs/bcachefs/checksum.h
+1
-2
fs/bcachefs/checksum.h
···
69
69
bch2_csum_to_text(out, type, expected);
70
70
}
71
71
72
-
int bch2_chacha_encrypt_key(struct bch_key *, struct nonce, void *, size_t);
73
72
int bch2_request_key(struct bch_sb *, struct bch_key *);
74
73
#ifndef __KERNEL__
75
74
int bch2_revoke_key(struct bch_sb *);
···
155
156
if (type >= BCH_CSUM_NR)
156
157
return false;
157
158
158
-
if (bch2_csum_type_is_encryption(type) && !c->chacha20)
159
+
if (bch2_csum_type_is_encryption(type) && !c->chacha20_key_set)
159
160
return false;
160
161
161
162
return true;
+1
-1
fs/bcachefs/data_update.c
+1
-1
fs/bcachefs/data_update.c
···
607
607
prt_newline(out);
608
608
printbuf_indent_add(out, 2);
609
609
bch2_data_update_opts_to_text(out, m->op.c, &m->op.opts, &m->data_opts);
610
-
prt_printf(out, "read_done:\t\%u\n", m->read_done);
610
+
prt_printf(out, "read_done:\t%u\n", m->read_done);
611
611
bch2_write_op_to_text(out, &m->op);
612
612
printbuf_indent_sub(out, 2);
613
613
}
+2
-2
fs/bcachefs/dirent.c
+2
-2
fs/bcachefs/dirent.c
···
287
287
EBUG_ON(!dirent->v.d_casefold);
288
288
EBUG_ON(!cf_name->len);
289
289
290
-
dirent->v.d_cf_name_block.d_name_len = name->len;
291
-
dirent->v.d_cf_name_block.d_cf_name_len = cf_name->len;
290
+
dirent->v.d_cf_name_block.d_name_len = cpu_to_le16(name->len);
291
+
dirent->v.d_cf_name_block.d_cf_name_len = cpu_to_le16(cf_name->len);
292
292
memcpy(&dirent->v.d_cf_name_block.d_names[0], name->name, name->len);
293
293
memcpy(&dirent->v.d_cf_name_block.d_names[name->len], cf_name->name, cf_name->len);
294
294
memset(&dirent->v.d_cf_name_block.d_names[name->len + cf_name->len], 0,
+16
-1
fs/bcachefs/fs-io-buffered.c
+16
-1
fs/bcachefs/fs-io-buffered.c
···
225
225
226
226
bch2_read_extent(trans, rbio, iter.pos,
227
227
data_btree, k, offset_into_extent, flags);
228
-
swap(rbio->bio.bi_iter.bi_size, bytes);
228
+
/*
229
+
* Careful there's a landmine here if bch2_read_extent() ever
230
+
* starts returning transaction restarts here.
231
+
*
232
+
* We've changed rbio->bi_iter.bi_size to be "bytes we can read
233
+
* from this extent" with the swap call, and we restore it
234
+
* below. That restore needs to come before checking for
235
+
* errors.
236
+
*
237
+
* But unlike __bch2_read(), we use the rbio bvec iter, not one
238
+
* on the stack, so we can't do the restore right after the
239
+
* bch2_read_extent() call: we don't own that iterator anymore
240
+
* if BCH_READ_last_fragment is set, since we may have submitted
241
+
* that rbio instead of cloning it.
242
+
*/
229
243
230
244
if (flags & BCH_READ_last_fragment)
231
245
break;
232
246
247
+
swap(rbio->bio.bi_iter.bi_size, bytes);
233
248
bio_advance(&rbio->bio, bytes);
234
249
err:
235
250
if (ret &&
+2
-1
fs/bcachefs/io_read.c
+2
-1
fs/bcachefs/io_read.c
···
977
977
goto err;
978
978
}
979
979
980
-
if (unlikely(bch2_csum_type_is_encryption(pick.crc.csum_type)) && !c->chacha20) {
980
+
if (unlikely(bch2_csum_type_is_encryption(pick.crc.csum_type)) &&
981
+
!c->chacha20_key_set) {
981
982
struct printbuf buf = PRINTBUF;
982
983
bch2_read_err_msg_trans(trans, &buf, orig, read_pos);
983
984
prt_printf(&buf, "attempting to read encrypted data without encryption key\n ");
+1
-1
fs/bcachefs/journal_io.c
+1
-1
fs/bcachefs/journal_io.c
+3
-3
fs/bcachefs/recovery.c
+3
-3
fs/bcachefs/recovery.c
···
389
389
* Now, replay any remaining keys in the order in which they appear in
390
390
* the journal, unpinning those journal entries as we go:
391
391
*/
392
-
sort(keys_sorted.data, keys_sorted.nr,
393
-
sizeof(keys_sorted.data[0]),
394
-
journal_sort_seq_cmp, NULL);
392
+
sort_nonatomic(keys_sorted.data, keys_sorted.nr,
393
+
sizeof(keys_sorted.data[0]),
394
+
journal_sort_seq_cmp, NULL);
395
395
396
396
darray_for_each(keys_sorted, kp) {
397
397
cond_resched();
-10
fs/bcachefs/super.c
-10
fs/bcachefs/super.c
···
70
70
#include <linux/percpu.h>
71
71
#include <linux/random.h>
72
72
#include <linux/sysfs.h>
73
-
#include <crypto/hash.h>
74
73
75
74
MODULE_LICENSE("GPL");
76
75
MODULE_AUTHOR("Kent Overstreet <kent.overstreet@gmail.com>");
77
76
MODULE_DESCRIPTION("bcachefs filesystem");
78
-
MODULE_SOFTDEP("pre: chacha20");
79
-
MODULE_SOFTDEP("pre: poly1305");
80
-
MODULE_SOFTDEP("pre: xxhash");
81
77
82
78
const char * const bch2_fs_flag_strs[] = {
83
79
#define x(n) #n,
···
997
1001
998
1002
prt_str(&p, "starting version ");
999
1003
bch2_version_to_text(&p, c->sb.version);
1000
-
1001
-
if (c->opts.read_only) {
1002
-
prt_str(&p, " opts=");
1003
-
first = false;
1004
-
prt_printf(&p, "ro");
1005
-
}
1006
1004
1007
1005
for (i = 0; i < bch2_opts_nr; i++) {
1008
1006
const struct bch_option *opt = &bch2_opt_table[i];
+1
-1
fs/btrfs/Kconfig
+1
-1
fs/btrfs/Kconfig
+1
-1
fs/ceph/Kconfig
+1
-1
fs/ceph/Kconfig
+1
-1
fs/erofs/Kconfig
+1
-1
fs/erofs/Kconfig
+4
-4
fs/erofs/erofs_fs.h
+4
-4
fs/erofs/erofs_fs.h
···
56
56
union {
57
57
__le16 rootnid_2b; /* nid of root directory */
58
58
__le16 blocks_hi; /* (48BIT on) blocks count MSB */
59
-
} rb;
59
+
} __packed rb;
60
60
__le64 inos; /* total valid ino # (== f_files - f_favail) */
61
61
__le64 epoch; /* base seconds used for compact inodes */
62
62
__le32 fixed_nsec; /* fixed nanoseconds for compact inodes */
···
148
148
__le16 nlink; /* if EROFS_I_NLINK_1_BIT is unset */
149
149
__le16 blocks_hi; /* total blocks count MSB */
150
150
__le16 startblk_hi; /* starting block number MSB */
151
-
};
151
+
} __packed;
152
152
153
153
/* 32-byte reduced form of an ondisk inode */
154
154
struct erofs_inode_compact {
···
369
369
* bit 7 : pack the whole file into packed inode
370
370
*/
371
371
__u8 h_clusterbits;
372
-
};
372
+
} __packed;
373
373
__le16 h_extents_hi; /* extent count MSB */
374
-
};
374
+
} __packed;
375
375
};
376
376
377
377
enum {
+2
fs/erofs/fileio.c
+2
fs/erofs/fileio.c
-1
fs/erofs/zdata.c
-1
fs/erofs/zdata.c
+3
-2
fs/erofs/zmap.c
+3
-2
fs/erofs/zmap.c
···
559
559
pos += sizeof(__le64);
560
560
lstart = 0;
561
561
} else {
562
-
lstart = map->m_la >> vi->z_lclusterbits;
562
+
lstart = round_down(map->m_la, 1 << vi->z_lclusterbits);
563
+
pos += (lstart >> vi->z_lclusterbits) * recsz;
563
564
pa = EROFS_NULL_ADDR;
564
565
}
565
566
···
615
614
if (last && (vi->z_advise & Z_EROFS_ADVISE_FRAGMENT_PCLUSTER)) {
616
615
map->m_flags |= EROFS_MAP_MAPPED | EROFS_MAP_FRAGMENT;
617
616
vi->z_fragmentoff = map->m_plen;
618
-
if (recsz >= offsetof(struct z_erofs_extent, pstart_lo))
617
+
if (recsz > offsetof(struct z_erofs_extent, pstart_lo))
619
618
vi->z_fragmentoff |= map->m_pa << 32;
620
619
} else if (map->m_plen) {
621
620
map->m_flags |= EROFS_MAP_MAPPED |
+2
-3
fs/ext4/block_validity.c
+2
-3
fs/ext4/block_validity.c
···
351
351
{
352
352
__le32 *bref = p;
353
353
unsigned int blk;
354
+
journal_t *journal = EXT4_SB(inode->i_sb)->s_journal;
354
355
355
-
if (ext4_has_feature_journal(inode->i_sb) &&
356
-
(inode->i_ino ==
357
-
le32_to_cpu(EXT4_SB(inode->i_sb)->s_es->s_journal_inum)))
356
+
if (journal && inode == journal->j_inode)
358
357
return 0;
359
358
360
359
while (bref < p+max) {
+52
-23
fs/ext4/inode.c
+52
-23
fs/ext4/inode.c
···
386
386
unsigned int line,
387
387
struct ext4_map_blocks *map)
388
388
{
389
-
if (ext4_has_feature_journal(inode->i_sb) &&
390
-
(inode->i_ino ==
391
-
le32_to_cpu(EXT4_SB(inode->i_sb)->s_es->s_journal_inum)))
389
+
journal_t *journal = EXT4_SB(inode->i_sb)->s_journal;
390
+
391
+
if (journal && inode == journal->j_inode)
392
392
return 0;
393
+
393
394
if (!ext4_inode_block_valid(inode, map->m_pblk, map->m_len)) {
394
395
ext4_error_inode(inode, func, line, map->m_pblk,
395
396
"lblock %lu mapped to illegal pblock %llu "
···
4725
4724
inode_set_iversion_queried(inode, val);
4726
4725
}
4727
4726
4728
-
static const char *check_igot_inode(struct inode *inode, ext4_iget_flags flags)
4729
-
4727
+
static int check_igot_inode(struct inode *inode, ext4_iget_flags flags,
4728
+
const char *function, unsigned int line)
4730
4729
{
4730
+
const char *err_str;
4731
+
4731
4732
if (flags & EXT4_IGET_EA_INODE) {
4732
-
if (!(EXT4_I(inode)->i_flags & EXT4_EA_INODE_FL))
4733
-
return "missing EA_INODE flag";
4733
+
if (!(EXT4_I(inode)->i_flags & EXT4_EA_INODE_FL)) {
4734
+
err_str = "missing EA_INODE flag";
4735
+
goto error;
4736
+
}
4734
4737
if (ext4_test_inode_state(inode, EXT4_STATE_XATTR) ||
4735
-
EXT4_I(inode)->i_file_acl)
4736
-
return "ea_inode with extended attributes";
4738
+
EXT4_I(inode)->i_file_acl) {
4739
+
err_str = "ea_inode with extended attributes";
4740
+
goto error;
4741
+
}
4737
4742
} else {
4738
-
if ((EXT4_I(inode)->i_flags & EXT4_EA_INODE_FL))
4739
-
return "unexpected EA_INODE flag";
4743
+
if ((EXT4_I(inode)->i_flags & EXT4_EA_INODE_FL)) {
4744
+
/*
4745
+
* open_by_handle_at() could provide an old inode number
4746
+
* that has since been reused for an ea_inode; this does
4747
+
* not indicate filesystem corruption
4748
+
*/
4749
+
if (flags & EXT4_IGET_HANDLE)
4750
+
return -ESTALE;
4751
+
err_str = "unexpected EA_INODE flag";
4752
+
goto error;
4753
+
}
4740
4754
}
4741
-
if (is_bad_inode(inode) && !(flags & EXT4_IGET_BAD))
4742
-
return "unexpected bad inode w/o EXT4_IGET_BAD";
4743
-
return NULL;
4755
+
if (is_bad_inode(inode) && !(flags & EXT4_IGET_BAD)) {
4756
+
err_str = "unexpected bad inode w/o EXT4_IGET_BAD";
4757
+
goto error;
4758
+
}
4759
+
return 0;
4760
+
4761
+
error:
4762
+
ext4_error_inode(inode, function, line, 0, err_str);
4763
+
return -EFSCORRUPTED;
4744
4764
}
4745
4765
4746
4766
struct inode *__ext4_iget(struct super_block *sb, unsigned long ino,
···
4773
4751
struct ext4_inode_info *ei;
4774
4752
struct ext4_super_block *es = EXT4_SB(sb)->s_es;
4775
4753
struct inode *inode;
4776
-
const char *err_str;
4777
4754
journal_t *journal = EXT4_SB(sb)->s_journal;
4778
4755
long ret;
4779
4756
loff_t size;
···
4801
4780
if (!inode)
4802
4781
return ERR_PTR(-ENOMEM);
4803
4782
if (!(inode->i_state & I_NEW)) {
4804
-
if ((err_str = check_igot_inode(inode, flags)) != NULL) {
4805
-
ext4_error_inode(inode, function, line, 0, err_str);
4783
+
ret = check_igot_inode(inode, flags, function, line);
4784
+
if (ret) {
4806
4785
iput(inode);
4807
-
return ERR_PTR(-EFSCORRUPTED);
4786
+
return ERR_PTR(ret);
4808
4787
}
4809
4788
return inode;
4810
4789
}
···
5086
5065
ret = -EFSCORRUPTED;
5087
5066
goto bad_inode;
5088
5067
}
5089
-
if ((err_str = check_igot_inode(inode, flags)) != NULL) {
5090
-
ext4_error_inode(inode, function, line, 0, err_str);
5091
-
ret = -EFSCORRUPTED;
5092
-
goto bad_inode;
5068
+
ret = check_igot_inode(inode, flags, function, line);
5069
+
/*
5070
+
* -ESTALE here means there is nothing inherently wrong with the inode,
5071
+
* it's just not an inode we can return for an fhandle lookup.
5072
+
*/
5073
+
if (ret == -ESTALE) {
5074
+
brelse(iloc.bh);
5075
+
unlock_new_inode(inode);
5076
+
iput(inode);
5077
+
return ERR_PTR(-ESTALE);
5093
5078
}
5094
-
5079
+
if (ret)
5080
+
goto bad_inode;
5095
5081
brelse(iloc.bh);
5082
+
5096
5083
unlock_new_inode(inode);
5097
5084
return inode;
5098
5085
+8
-10
fs/ext4/mballoc.c
+8
-10
fs/ext4/mballoc.c
···
3037
3037
unsigned char blocksize_bits = min_t(unsigned char,
3038
3038
sb->s_blocksize_bits,
3039
3039
EXT4_MAX_BLOCK_LOG_SIZE);
3040
-
struct sg {
3041
-
struct ext4_group_info info;
3042
-
ext4_grpblk_t counters[EXT4_MAX_BLOCK_LOG_SIZE + 2];
3043
-
} sg;
3040
+
DEFINE_RAW_FLEX(struct ext4_group_info, sg, bb_counters,
3041
+
EXT4_MAX_BLOCK_LOG_SIZE + 2);
3044
3042
3045
3043
group--;
3046
3044
if (group == 0)
···
3046
3048
" 2^0 2^1 2^2 2^3 2^4 2^5 2^6 "
3047
3049
" 2^7 2^8 2^9 2^10 2^11 2^12 2^13 ]\n");
3048
3050
3049
-
i = (blocksize_bits + 2) * sizeof(sg.info.bb_counters[0]) +
3051
+
i = (blocksize_bits + 2) * sizeof(sg->bb_counters[0]) +
3050
3052
sizeof(struct ext4_group_info);
3051
3053
3052
3054
grinfo = ext4_get_group_info(sb, group);
···
3066
3068
* We care only about free space counters in the group info and
3067
3069
* these are safe to access even after the buddy has been unloaded
3068
3070
*/
3069
-
memcpy(&sg, grinfo, i);
3070
-
seq_printf(seq, "#%-5u: %-5u %-5u %-5u [", group, sg.info.bb_free,
3071
-
sg.info.bb_fragments, sg.info.bb_first_free);
3071
+
memcpy(sg, grinfo, i);
3072
+
seq_printf(seq, "#%-5u: %-5u %-5u %-5u [", group, sg->bb_free,
3073
+
sg->bb_fragments, sg->bb_first_free);
3072
3074
for (i = 0; i <= 13; i++)
3073
3075
seq_printf(seq, " %-5u", i <= blocksize_bits + 1 ?
3074
-
sg.info.bb_counters[i] : 0);
3076
+
sg->bb_counters[i] : 0);
3075
3077
seq_puts(seq, " ]");
3076
-
if (EXT4_MB_GRP_BBITMAP_CORRUPT(&sg.info))
3078
+
if (EXT4_MB_GRP_BBITMAP_CORRUPT(sg))
3077
3079
seq_puts(seq, " Block bitmap corrupted!");
3078
3080
seq_putc(seq, '\n');
3079
3081
return 0;
+1
-1
fs/ext4/namei.c
+1
-1
fs/ext4/namei.c
-1
fs/gfs2/Kconfig
-1
fs/gfs2/Kconfig
+5
-11
fs/smb/client/cifsencrypt.c
+5
-11
fs/smb/client/cifsencrypt.c
···
704
704
cifs_free_hash(&server->secmech.md5);
705
705
cifs_free_hash(&server->secmech.sha512);
706
706
707
-
if (!SERVER_IS_CHAN(server)) {
708
-
if (server->secmech.enc) {
709
-
crypto_free_aead(server->secmech.enc);
710
-
server->secmech.enc = NULL;
711
-
}
712
-
713
-
if (server->secmech.dec) {
714
-
crypto_free_aead(server->secmech.dec);
715
-
server->secmech.dec = NULL;
716
-
}
717
-
} else {
707
+
if (server->secmech.enc) {
708
+
crypto_free_aead(server->secmech.enc);
718
709
server->secmech.enc = NULL;
710
+
}
711
+
if (server->secmech.dec) {
712
+
crypto_free_aead(server->secmech.dec);
719
713
server->secmech.dec = NULL;
720
714
}
721
715
}
+2
-4
fs/smb/client/cifsglob.h
+2
-4
fs/smb/client/cifsglob.h
···
625
625
bool (*is_status_io_timeout)(char *buf);
626
626
/* Check for STATUS_NETWORK_NAME_DELETED */
627
627
bool (*is_network_name_deleted)(char *buf, struct TCP_Server_Info *srv);
628
-
int (*parse_reparse_point)(struct cifs_sb_info *cifs_sb,
629
-
const char *full_path,
630
-
struct kvec *rsp_iov,
631
-
struct cifs_open_info_data *data);
628
+
struct reparse_data_buffer * (*get_reparse_point_buffer)(const struct kvec *rsp_iov,
629
+
u32 *plen);
632
630
int (*create_reparse_symlink)(const unsigned int xid,
633
631
struct inode *inode,
634
632
struct dentry *dentry,
+2
fs/smb/client/cifspdu.h
+2
fs/smb/client/cifspdu.h
···
2256
2256
#define FILE_SUPPORTS_ENCRYPTION 0x00020000
2257
2257
#define FILE_SUPPORTS_OBJECT_IDS 0x00010000
2258
2258
#define FILE_VOLUME_IS_COMPRESSED 0x00008000
2259
+
#define FILE_SUPPORTS_POSIX_UNLINK_RENAME 0x00000400
2260
+
#define FILE_RETURNS_CLEANUP_RESULT_INFO 0x00000200
2259
2261
#define FILE_SUPPORTS_REMOTE_STORAGE 0x00000100
2260
2262
#define FILE_SUPPORTS_REPARSE_POINTS 0x00000080
2261
2263
#define FILE_SUPPORTS_SPARSE_FILES 0x00000040
+2
fs/smb/client/connect.c
+2
fs/smb/client/connect.c
+17
-8
fs/smb/client/inode.c
+17
-8
fs/smb/client/inode.c
···
1203
1203
goto out;
1204
1204
}
1205
1205
break;
1206
-
case IO_REPARSE_TAG_MOUNT_POINT:
1207
-
cifs_create_junction_fattr(fattr, sb);
1208
-
rc = 0;
1209
-
goto out;
1210
1206
default:
1211
1207
/* Check for cached reparse point data */
1212
1208
if (data->symlink_target || data->reparse.buf) {
1213
1209
rc = 0;
1214
-
} else if (iov && server->ops->parse_reparse_point) {
1215
-
rc = server->ops->parse_reparse_point(cifs_sb,
1216
-
full_path,
1217
-
iov, data);
1210
+
} else if (iov && server->ops->get_reparse_point_buffer) {
1211
+
struct reparse_data_buffer *reparse_buf;
1212
+
u32 reparse_len;
1213
+
1214
+
reparse_buf = server->ops->get_reparse_point_buffer(iov, &reparse_len);
1215
+
rc = parse_reparse_point(reparse_buf, reparse_len,
1216
+
cifs_sb, full_path, data);
1218
1217
/*
1219
1218
* If the reparse point was not handled but it is the
1220
1219
* name surrogate which points to directory, then treat
···
1227
1228
cifs_create_junction_fattr(fattr, sb);
1228
1229
goto out;
1229
1230
}
1231
+
/*
1232
+
* If the reparse point is unsupported by the Linux SMB
1233
+
* client then let it process by the SMB server. So mask
1234
+
* the -EOPNOTSUPP error code. This will allow Linux SMB
1235
+
* client to send SMB OPEN request to server. If server
1236
+
* does not support this reparse point too then server
1237
+
* will return error during open the path.
1238
+
*/
1239
+
if (rc == -EOPNOTSUPP)
1240
+
rc = 0;
1230
1241
}
1231
1242
1232
1243
if (data->reparse.tag == IO_REPARSE_TAG_SYMLINK && !rc) {
+29
-34
fs/smb/client/reparse.c
+29
-34
fs/smb/client/reparse.c
···
542
542
kfree(symname_utf16);
543
543
return -ENOMEM;
544
544
}
545
-
/* Flag 0x02000000 is unknown, but all wsl symlinks have this value */
546
-
symlink_buf->Flags = cpu_to_le32(0x02000000);
547
-
/* PathBuffer is in UTF-8 but without trailing null-term byte */
545
+
/* Version field must be set to 2 (MS-FSCC 2.1.2.7) */
546
+
symlink_buf->Version = cpu_to_le32(2);
547
+
/* Target for Version 2 is in UTF-8 but without trailing null-term byte */
548
548
symname_utf8_len = utf16s_to_utf8s((wchar_t *)symname_utf16, symname_utf16_len/2,
549
549
UTF16_LITTLE_ENDIAN,
550
-
symlink_buf->PathBuffer,
550
+
symlink_buf->Target,
551
551
symname_utf8_maxlen);
552
552
*buf = (struct reparse_data_buffer *)symlink_buf;
553
553
buf_len = sizeof(struct reparse_wsl_symlink_data_buffer) + symname_utf8_len;
···
1016
1016
struct cifs_open_info_data *data)
1017
1017
{
1018
1018
int len = le16_to_cpu(buf->ReparseDataLength);
1019
+
int data_offset = offsetof(typeof(*buf), Target) - offsetof(typeof(*buf), Version);
1019
1020
int symname_utf8_len;
1020
1021
__le16 *symname_utf16;
1021
1022
int symname_utf16_len;
1022
1023
1023
-
if (len <= sizeof(buf->Flags)) {
1024
+
if (len <= data_offset) {
1024
1025
cifs_dbg(VFS, "srv returned malformed wsl symlink buffer\n");
1025
1026
return -EIO;
1026
1027
}
1027
1028
1028
-
/* PathBuffer is in UTF-8 but without trailing null-term byte */
1029
-
symname_utf8_len = len - sizeof(buf->Flags);
1029
+
/* MS-FSCC 2.1.2.7 defines layout of the Target field only for Version 2. */
1030
+
if (le32_to_cpu(buf->Version) != 2) {
1031
+
cifs_dbg(VFS, "srv returned unsupported wsl symlink version %u\n", le32_to_cpu(buf->Version));
1032
+
return -EIO;
1033
+
}
1034
+
1035
+
/* Target for Version 2 is in UTF-8 but without trailing null-term byte */
1036
+
symname_utf8_len = len - data_offset;
1030
1037
/*
1031
1038
* Check that buffer does not contain null byte
1032
1039
* because Linux cannot process symlink with null byte.
1033
1040
*/
1034
-
if (strnlen(buf->PathBuffer, symname_utf8_len) != symname_utf8_len) {
1041
+
if (strnlen(buf->Target, symname_utf8_len) != symname_utf8_len) {
1035
1042
cifs_dbg(VFS, "srv returned null byte in wsl symlink target location\n");
1036
1043
return -EIO;
1037
1044
}
1038
1045
symname_utf16 = kzalloc(symname_utf8_len * 2, GFP_KERNEL);
1039
1046
if (!symname_utf16)
1040
1047
return -ENOMEM;
1041
-
symname_utf16_len = utf8s_to_utf16s(buf->PathBuffer, symname_utf8_len,
1048
+
symname_utf16_len = utf8s_to_utf16s(buf->Target, symname_utf8_len,
1042
1049
UTF16_LITTLE_ENDIAN,
1043
1050
(wchar_t *) symname_utf16, symname_utf8_len * 2);
1044
1051
if (symname_utf16_len < 0) {
···
1069
1062
const char *full_path,
1070
1063
struct cifs_open_info_data *data)
1071
1064
{
1072
-
struct cifs_tcon *tcon = cifs_sb_master_tcon(cifs_sb);
1073
-
1074
1065
data->reparse.buf = buf;
1075
1066
1076
1067
/* See MS-FSCC 2.1.2 */
···
1095
1090
}
1096
1091
return 0;
1097
1092
default:
1098
-
cifs_tcon_dbg(VFS | ONCE, "unhandled reparse tag: 0x%08x\n",
1099
-
le32_to_cpu(buf->ReparseTag));
1100
1093
return -EOPNOTSUPP;
1101
1094
}
1102
1095
}
1103
1096
1104
-
int smb2_parse_reparse_point(struct cifs_sb_info *cifs_sb,
1105
-
const char *full_path,
1106
-
struct kvec *rsp_iov,
1107
-
struct cifs_open_info_data *data)
1097
+
struct reparse_data_buffer *smb2_get_reparse_point_buffer(const struct kvec *rsp_iov,
1098
+
u32 *plen)
1108
1099
{
1109
-
struct reparse_data_buffer *buf;
1110
1100
struct smb2_ioctl_rsp *io = rsp_iov->iov_base;
1111
-
u32 plen = le32_to_cpu(io->OutputCount);
1112
-
1113
-
buf = (struct reparse_data_buffer *)((u8 *)io +
1114
-
le32_to_cpu(io->OutputOffset));
1115
-
return parse_reparse_point(buf, plen, cifs_sb, full_path, data);
1101
+
*plen = le32_to_cpu(io->OutputCount);
1102
+
return (struct reparse_data_buffer *)((u8 *)io +
1103
+
le32_to_cpu(io->OutputOffset));
1116
1104
}
1117
1105
1118
1106
static bool wsl_to_fattr(struct cifs_open_info_data *data,
···
1231
1233
bool ok;
1232
1234
1233
1235
switch (tag) {
1234
-
case IO_REPARSE_TAG_INTERNAL:
1235
-
if (!(fattr->cf_cifsattrs & ATTR_DIRECTORY))
1236
-
return false;
1237
-
fallthrough;
1238
-
case IO_REPARSE_TAG_DFS:
1239
-
case IO_REPARSE_TAG_DFSR:
1240
-
case IO_REPARSE_TAG_MOUNT_POINT:
1241
-
/* See cifs_create_junction_fattr() */
1242
-
fattr->cf_mode = S_IFDIR | 0711;
1243
-
break;
1244
1236
case IO_REPARSE_TAG_LX_SYMLINK:
1245
1237
case IO_REPARSE_TAG_LX_FIFO:
1246
1238
case IO_REPARSE_TAG_AF_UNIX:
···
1250
1262
fattr->cf_mode |= S_IFLNK;
1251
1263
break;
1252
1264
default:
1253
-
return false;
1265
+
if (!(fattr->cf_cifsattrs & ATTR_DIRECTORY))
1266
+
return false;
1267
+
if (!IS_REPARSE_TAG_NAME_SURROGATE(tag) &&
1268
+
tag != IO_REPARSE_TAG_INTERNAL)
1269
+
return false;
1270
+
/* See cifs_create_junction_fattr() */
1271
+
fattr->cf_mode = S_IFDIR | 0711;
1272
+
break;
1254
1273
}
1255
1274
1256
1275
fattr->cf_dtype = S_DT(fattr->cf_mode);
+1
-4
fs/smb/client/reparse.h
+1
-4
fs/smb/client/reparse.h
···
135
135
int smb2_mknod_reparse(unsigned int xid, struct inode *inode,
136
136
struct dentry *dentry, struct cifs_tcon *tcon,
137
137
const char *full_path, umode_t mode, dev_t dev);
138
-
int smb2_parse_reparse_point(struct cifs_sb_info *cifs_sb,
139
-
const char *full_path,
140
-
struct kvec *rsp_iov,
141
-
struct cifs_open_info_data *data);
138
+
struct reparse_data_buffer *smb2_get_reparse_point_buffer(const struct kvec *rsp_iov, u32 *len);
142
139
143
140
#endif /* _CIFS_REPARSE_H */
+40
-20
fs/smb/client/sess.c
+40
-20
fs/smb/client/sess.c
···
680
680
*pbcc_area = bcc_ptr;
681
681
}
682
682
683
+
static void
684
+
ascii_oslm_strings(char **pbcc_area, const struct nls_table *nls_cp)
685
+
{
686
+
char *bcc_ptr = *pbcc_area;
687
+
688
+
strcpy(bcc_ptr, "Linux version ");
689
+
bcc_ptr += strlen("Linux version ");
690
+
strcpy(bcc_ptr, init_utsname()->release);
691
+
bcc_ptr += strlen(init_utsname()->release) + 1;
692
+
693
+
strcpy(bcc_ptr, CIFS_NETWORK_OPSYS);
694
+
bcc_ptr += strlen(CIFS_NETWORK_OPSYS) + 1;
695
+
696
+
*pbcc_area = bcc_ptr;
697
+
}
698
+
683
699
static void unicode_domain_string(char **pbcc_area, struct cifs_ses *ses,
684
700
const struct nls_table *nls_cp)
685
701
{
···
716
700
CIFS_MAX_DOMAINNAME_LEN, nls_cp);
717
701
bcc_ptr += 2 * bytes_ret;
718
702
bcc_ptr += 2; /* account for null terminator */
703
+
704
+
*pbcc_area = bcc_ptr;
705
+
}
706
+
707
+
static void ascii_domain_string(char **pbcc_area, struct cifs_ses *ses,
708
+
const struct nls_table *nls_cp)
709
+
{
710
+
char *bcc_ptr = *pbcc_area;
711
+
int len;
712
+
713
+
/* copy domain */
714
+
if (ses->domainName != NULL) {
715
+
len = strscpy(bcc_ptr, ses->domainName, CIFS_MAX_DOMAINNAME_LEN);
716
+
if (WARN_ON_ONCE(len < 0))
717
+
len = CIFS_MAX_DOMAINNAME_LEN - 1;
718
+
bcc_ptr += len;
719
+
} /* else we send a null domain name so server will default to its own domain */
720
+
*bcc_ptr = 0;
721
+
bcc_ptr++;
719
722
720
723
*pbcc_area = bcc_ptr;
721
724
}
···
784
749
*bcc_ptr = 0;
785
750
bcc_ptr++; /* account for null termination */
786
751
787
-
/* copy domain */
788
-
if (ses->domainName != NULL) {
789
-
len = strscpy(bcc_ptr, ses->domainName, CIFS_MAX_DOMAINNAME_LEN);
790
-
if (WARN_ON_ONCE(len < 0))
791
-
len = CIFS_MAX_DOMAINNAME_LEN - 1;
792
-
bcc_ptr += len;
793
-
} /* else we send a null domain name so server will default to its own domain */
794
-
*bcc_ptr = 0;
795
-
bcc_ptr++;
796
-
797
752
/* BB check for overflow here */
798
753
799
-
strcpy(bcc_ptr, "Linux version ");
800
-
bcc_ptr += strlen("Linux version ");
801
-
strcpy(bcc_ptr, init_utsname()->release);
802
-
bcc_ptr += strlen(init_utsname()->release) + 1;
803
-
804
-
strcpy(bcc_ptr, CIFS_NETWORK_OPSYS);
805
-
bcc_ptr += strlen(CIFS_NETWORK_OPSYS) + 1;
754
+
ascii_domain_string(&bcc_ptr, ses, nls_cp);
755
+
ascii_oslm_strings(&bcc_ptr, nls_cp);
806
756
807
757
*pbcc_area = bcc_ptr;
808
758
}
···
1590
1570
sess_data->iov[1].iov_len = msg->secblob_len;
1591
1571
pSMB->req.SecurityBlobLength = cpu_to_le16(sess_data->iov[1].iov_len);
1592
1572
1593
-
if (ses->capabilities & CAP_UNICODE) {
1573
+
if (pSMB->req.hdr.Flags2 & SMBFLG2_UNICODE) {
1594
1574
/* unicode strings must be word aligned */
1595
1575
if (!IS_ALIGNED(sess_data->iov[0].iov_len + sess_data->iov[1].iov_len, 2)) {
1596
1576
*bcc_ptr = 0;
···
1599
1579
unicode_oslm_strings(&bcc_ptr, sess_data->nls_cp);
1600
1580
unicode_domain_string(&bcc_ptr, ses, sess_data->nls_cp);
1601
1581
} else {
1602
-
/* BB: is this right? */
1603
-
ascii_ssetup_strings(&bcc_ptr, ses, sess_data->nls_cp);
1582
+
ascii_oslm_strings(&bcc_ptr, sess_data->nls_cp);
1583
+
ascii_domain_string(&bcc_ptr, ses, sess_data->nls_cp);
1604
1584
}
1605
1585
1606
1586
sess_data->iov[2].iov_len = (long) bcc_ptr -
+42
-11
fs/smb/client/smb1ops.c
+42
-11
fs/smb/client/smb1ops.c
···
568
568
data->reparse_point = le32_to_cpu(fi.Attributes) & ATTR_REPARSE;
569
569
}
570
570
571
+
#ifdef CONFIG_CIFS_XATTR
572
+
/*
573
+
* For WSL CHR and BLK reparse points it is required to fetch
574
+
* EA $LXDEV which contains major and minor device numbers.
575
+
*/
576
+
if (!rc && data->reparse_point) {
577
+
struct smb2_file_full_ea_info *ea;
578
+
579
+
ea = (struct smb2_file_full_ea_info *)data->wsl.eas;
580
+
rc = CIFSSMBQAllEAs(xid, tcon, full_path, SMB2_WSL_XATTR_DEV,
581
+
&ea->ea_data[SMB2_WSL_XATTR_NAME_LEN + 1],
582
+
SMB2_WSL_XATTR_DEV_SIZE, cifs_sb);
583
+
if (rc == SMB2_WSL_XATTR_DEV_SIZE) {
584
+
ea->next_entry_offset = cpu_to_le32(0);
585
+
ea->flags = 0;
586
+
ea->ea_name_length = SMB2_WSL_XATTR_NAME_LEN;
587
+
ea->ea_value_length = cpu_to_le16(SMB2_WSL_XATTR_DEV_SIZE);
588
+
memcpy(&ea->ea_data[0], SMB2_WSL_XATTR_DEV, SMB2_WSL_XATTR_NAME_LEN + 1);
589
+
data->wsl.eas_len = sizeof(*ea) + SMB2_WSL_XATTR_NAME_LEN + 1 +
590
+
SMB2_WSL_XATTR_DEV_SIZE;
591
+
rc = 0;
592
+
} else if (rc >= 0) {
593
+
/* It is an error if EA $LXDEV has wrong size. */
594
+
rc = -EINVAL;
595
+
} else {
596
+
/*
597
+
* In all other cases ignore error if fetching
598
+
* of EA $LXDEV failed. It is needed only for
599
+
* WSL CHR and BLK reparse points and wsl_to_fattr()
600
+
* handle the case when EA is missing.
601
+
*/
602
+
rc = 0;
603
+
}
604
+
}
605
+
#endif
606
+
571
607
return rc;
572
608
}
573
609
···
1006
970
return rc;
1007
971
}
1008
972
1009
-
static int cifs_parse_reparse_point(struct cifs_sb_info *cifs_sb,
1010
-
const char *full_path,
1011
-
struct kvec *rsp_iov,
1012
-
struct cifs_open_info_data *data)
973
+
static struct reparse_data_buffer *cifs_get_reparse_point_buffer(const struct kvec *rsp_iov,
974
+
u32 *plen)
1013
975
{
1014
-
struct reparse_data_buffer *buf;
1015
976
TRANSACT_IOCTL_RSP *io = rsp_iov->iov_base;
1016
-
u32 plen = le16_to_cpu(io->ByteCount);
1017
-
1018
-
buf = (struct reparse_data_buffer *)((__u8 *)&io->hdr.Protocol +
1019
-
le32_to_cpu(io->DataOffset));
1020
-
return parse_reparse_point(buf, plen, cifs_sb, full_path, data);
977
+
*plen = le16_to_cpu(io->ByteCount);
978
+
return (struct reparse_data_buffer *)((__u8 *)&io->hdr.Protocol +
979
+
le32_to_cpu(io->DataOffset));
1021
980
}
1022
981
1023
982
static bool
···
1188
1157
.rename = CIFSSMBRename,
1189
1158
.create_hardlink = CIFSCreateHardLink,
1190
1159
.query_symlink = cifs_query_symlink,
1191
-
.parse_reparse_point = cifs_parse_reparse_point,
1160
+
.get_reparse_point_buffer = cifs_get_reparse_point_buffer,
1192
1161
.open = cifs_open_file,
1193
1162
.set_fid = cifs_set_fid,
1194
1163
.close = cifs_close_file,
+7
-7
fs/smb/client/smb2ops.c
+7
-7
fs/smb/client/smb2ops.c
···
4555
4555
return rc;
4556
4556
}
4557
4557
} else {
4558
-
if (unlikely(!server->secmech.dec))
4559
-
return -EIO;
4560
-
4558
+
rc = smb3_crypto_aead_allocate(server);
4559
+
if (unlikely(rc))
4560
+
return rc;
4561
4561
tfm = server->secmech.dec;
4562
4562
}
4563
4563
···
5303
5303
.unlink = smb2_unlink,
5304
5304
.rename = smb2_rename_path,
5305
5305
.create_hardlink = smb2_create_hardlink,
5306
-
.parse_reparse_point = smb2_parse_reparse_point,
5306
+
.get_reparse_point_buffer = smb2_get_reparse_point_buffer,
5307
5307
.query_mf_symlink = smb3_query_mf_symlink,
5308
5308
.create_mf_symlink = smb3_create_mf_symlink,
5309
5309
.create_reparse_symlink = smb2_create_reparse_symlink,
···
5406
5406
.unlink = smb2_unlink,
5407
5407
.rename = smb2_rename_path,
5408
5408
.create_hardlink = smb2_create_hardlink,
5409
-
.parse_reparse_point = smb2_parse_reparse_point,
5409
+
.get_reparse_point_buffer = smb2_get_reparse_point_buffer,
5410
5410
.query_mf_symlink = smb3_query_mf_symlink,
5411
5411
.create_mf_symlink = smb3_create_mf_symlink,
5412
5412
.create_reparse_symlink = smb2_create_reparse_symlink,
···
5513
5513
.unlink = smb2_unlink,
5514
5514
.rename = smb2_rename_path,
5515
5515
.create_hardlink = smb2_create_hardlink,
5516
-
.parse_reparse_point = smb2_parse_reparse_point,
5516
+
.get_reparse_point_buffer = smb2_get_reparse_point_buffer,
5517
5517
.query_mf_symlink = smb3_query_mf_symlink,
5518
5518
.create_mf_symlink = smb3_create_mf_symlink,
5519
5519
.create_reparse_symlink = smb2_create_reparse_symlink,
···
5629
5629
.unlink = smb2_unlink,
5630
5630
.rename = smb2_rename_path,
5631
5631
.create_hardlink = smb2_create_hardlink,
5632
-
.parse_reparse_point = smb2_parse_reparse_point,
5632
+
.get_reparse_point_buffer = smb2_get_reparse_point_buffer,
5633
5633
.query_mf_symlink = smb3_query_mf_symlink,
5634
5634
.create_mf_symlink = smb3_create_mf_symlink,
5635
5635
.create_reparse_symlink = smb2_create_reparse_symlink,
+2
-9
fs/smb/client/smb2pdu.c
+2
-9
fs/smb/client/smb2pdu.c
···
1252
1252
cifs_server_dbg(VFS, "Missing expected negotiate contexts\n");
1253
1253
}
1254
1254
1255
-
if (server->cipher_type && !rc) {
1256
-
if (!SERVER_IS_CHAN(server)) {
1257
-
rc = smb3_crypto_aead_allocate(server);
1258
-
} else {
1259
-
/* For channels, just reuse the primary server crypto secmech. */
1260
-
server->secmech.enc = server->primary_server->secmech.enc;
1261
-
server->secmech.dec = server->primary_server->secmech.dec;
1262
-
}
1263
-
}
1255
+
if (server->cipher_type && !rc)
1256
+
rc = smb3_crypto_aead_allocate(server);
1264
1257
neg_exit:
1265
1258
free_rsp_buf(resp_buftype, rsp);
1266
1259
return rc;
+3
-3
fs/smb/common/smb2pdu.h
+3
-3
fs/smb/common/smb2pdu.h
···
1567
1567
__u8 DataBuffer[];
1568
1568
} __packed;
1569
1569
1570
-
/* For IO_REPARSE_TAG_LX_SYMLINK */
1570
+
/* For IO_REPARSE_TAG_LX_SYMLINK - see MS-FSCC 2.1.2.7 */
1571
1571
struct reparse_wsl_symlink_data_buffer {
1572
1572
__le32 ReparseTag;
1573
1573
__le16 ReparseDataLength;
1574
1574
__u16 Reserved;
1575
-
__le32 Flags;
1576
-
__u8 PathBuffer[]; /* Variable Length UTF-8 string without nul-term */
1575
+
__le32 Version; /* Always 2 */
1576
+
__u8 Target[]; /* Variable Length UTF-8 string without nul-term */
1577
1577
} __packed;
1578
1578
1579
1579
struct validate_negotiate_info_req {
+2
fs/smb/server/smb_common.h
+2
fs/smb/server/smb_common.h
···
72
72
#define FILE_SUPPORTS_ENCRYPTION 0x00020000
73
73
#define FILE_SUPPORTS_OBJECT_IDS 0x00010000
74
74
#define FILE_VOLUME_IS_COMPRESSED 0x00008000
75
+
#define FILE_SUPPORTS_POSIX_UNLINK_RENAME 0x00000400
76
+
#define FILE_RETURNS_CLEANUP_RESULT_INFO 0x00000200
75
77
#define FILE_SUPPORTS_REMOTE_STORAGE 0x00000100
76
78
#define FILE_SUPPORTS_REPARSE_POINTS 0x00000080
77
79
#define FILE_SUPPORTS_SPARSE_FILES 0x00000040
+1
-1
fs/xfs/Kconfig
+1
-1
fs/xfs/Kconfig
+3
include/drm/drm_kunit_helpers.h
+3
include/drm/drm_kunit_helpers.h
···
118
118
const struct drm_crtc_funcs *funcs,
119
119
const struct drm_crtc_helper_funcs *helper_funcs);
120
120
121
+
int drm_kunit_add_mode_destroy_action(struct kunit *test,
122
+
struct drm_display_mode *mode);
123
+
121
124
struct drm_display_mode *
122
125
drm_kunit_display_mode_from_cea_vic(struct kunit *test, struct drm_device *dev,
123
126
u8 video_code);
+1
include/drm/intel/pciids.h
+1
include/drm/intel/pciids.h
+1
-1
include/kunit/test.h
+1
-1
include/kunit/test.h
···
67
67
68
68
/*
69
69
* Speed Attribute is stored as an enum and separated into categories of
70
-
* speed: very_slowm, slow, and normal. These speeds are relative to
70
+
* speed: very_slow, slow, and normal. These speeds are relative to
71
71
* other KUnit tests.
72
72
*
73
73
* Note: unset speed attribute acts as default of KUNIT_SPEED_NORMAL.
+1
include/linux/cgroup-defs.h
+1
include/linux/cgroup-defs.h
···
710
710
void (*css_released)(struct cgroup_subsys_state *css);
711
711
void (*css_free)(struct cgroup_subsys_state *css);
712
712
void (*css_reset)(struct cgroup_subsys_state *css);
713
+
void (*css_killed)(struct cgroup_subsys_state *css);
713
714
void (*css_rstat_flush)(struct cgroup_subsys_state *css, int cpu);
714
715
int (*css_extra_stat_show)(struct seq_file *seq,
715
716
struct cgroup_subsys_state *css);
+1
-1
include/linux/cgroup.h
+1
-1
include/linux/cgroup.h
+1
include/linux/gpio/consumer.h
+1
include/linux/gpio/consumer.h
+1
-1
include/linux/hrtimer.h
+1
-1
include/linux/hrtimer.h
-27
include/linux/irqchip/irq-davinci-aintc.h
-27
include/linux/irqchip/irq-davinci-aintc.h
···
1
-
/* SPDX-License-Identifier: GPL-2.0-or-later */
2
-
/*
3
-
* Copyright (C) 2019 Texas Instruments
4
-
*/
5
-
6
-
#ifndef _LINUX_IRQ_DAVINCI_AINTC_
7
-
#define _LINUX_IRQ_DAVINCI_AINTC_
8
-
9
-
#include <linux/ioport.h>
10
-
11
-
/**
12
-
* struct davinci_aintc_config - configuration data for davinci-aintc driver.
13
-
*
14
-
* @reg: register range to map
15
-
* @num_irqs: number of HW interrupts supported by the controller
16
-
* @prios: an array of size num_irqs containing priority settings for
17
-
* each interrupt
18
-
*/
19
-
struct davinci_aintc_config {
20
-
struct resource reg;
21
-
unsigned int num_irqs;
22
-
u8 *prios;
23
-
};
24
-
25
-
void davinci_aintc_init(const struct davinci_aintc_config *config);
26
-
27
-
#endif /* _LINUX_IRQ_DAVINCI_AINTC_ */
+1
-1
include/linux/mtd/spinand.h
+1
-1
include/linux/mtd/spinand.h
···
67
67
SPI_MEM_OP_ADDR(2, addr, 1), \
68
68
SPI_MEM_OP_DUMMY(ndummy, 1), \
69
69
SPI_MEM_OP_DATA_IN(len, buf, 1), \
70
-
__VA_OPT__(SPI_MEM_OP_MAX_FREQ(__VA_ARGS__)))
70
+
SPI_MEM_OP_MAX_FREQ(__VA_ARGS__ + 0))
71
71
72
72
#define SPINAND_PAGE_READ_FROM_CACHE_FAST_OP(addr, ndummy, buf, len) \
73
73
SPI_MEM_OP(SPI_MEM_OP_CMD(0x0b, 1), \
+2
include/linux/netdevice.h
+2
include/linux/netdevice.h
···
4429
4429
* pending work list (if queued).
4430
4430
*/
4431
4431
void linkwatch_sync_dev(struct net_device *dev);
4432
+
void __linkwatch_sync_dev(struct net_device *dev);
4432
4433
4433
4434
/**
4434
4435
* netif_carrier_ok - test if carrier present
···
4975
4974
int dev_set_promiscuity(struct net_device *dev, int inc);
4976
4975
int netif_set_allmulti(struct net_device *dev, int inc, bool notify);
4977
4976
int dev_set_allmulti(struct net_device *dev, int inc);
4977
+
void netif_state_change(struct net_device *dev);
4978
4978
void netdev_state_change(struct net_device *dev);
4979
4979
void __netdev_notify_peers(struct net_device *dev);
4980
4980
void netdev_notify_peers(struct net_device *dev);
-1
include/linux/perf_event.h
-1
include/linux/perf_event.h
+1
-1
include/linux/rtnetlink.h
+1
-1
include/linux/rtnetlink.h
+2
-1
include/net/sctp/structs.h
+2
-1
include/net/sctp/structs.h
···
775
775
776
776
/* Reference counting. */
777
777
refcount_t refcnt;
778
+
__u32 dead:1,
778
779
/* RTO-Pending : A flag used to track if one of the DATA
779
780
* chunks sent to this address is currently being
780
781
* used to compute a RTT. If this flag is 0,
···
785
784
* calculation completes (i.e. the DATA chunk
786
785
* is SACK'd) clear this flag.
787
786
*/
788
-
__u32 rto_pending:1,
787
+
rto_pending:1,
789
788
790
789
/*
791
790
* hb_sent : a flag that signals that we have a pending
+38
-2
include/net/sock.h
+38
-2
include/net/sock.h
···
339
339
* @sk_txtime_unused: unused txtime flags
340
340
* @ns_tracker: tracker for netns reference
341
341
* @sk_user_frags: xarray of pages the user is holding a reference on.
342
+
* @sk_owner: reference to the real owner of the socket that calls
343
+
* sock_lock_init_class_and_name().
342
344
*/
343
345
struct sock {
344
346
/*
···
549
547
struct rcu_head sk_rcu;
550
548
netns_tracker ns_tracker;
551
549
struct xarray sk_user_frags;
550
+
551
+
#if IS_ENABLED(CONFIG_PROVE_LOCKING) && IS_ENABLED(CONFIG_MODULES)
552
+
struct module *sk_owner;
553
+
#endif
552
554
};
553
555
554
556
struct sock_bh_locked {
···
1589
1583
sk_mem_reclaim(sk);
1590
1584
}
1591
1585
1586
+
#if IS_ENABLED(CONFIG_PROVE_LOCKING) && IS_ENABLED(CONFIG_MODULES)
1587
+
static inline void sk_owner_set(struct sock *sk, struct module *owner)
1588
+
{
1589
+
__module_get(owner);
1590
+
sk->sk_owner = owner;
1591
+
}
1592
+
1593
+
static inline void sk_owner_clear(struct sock *sk)
1594
+
{
1595
+
sk->sk_owner = NULL;
1596
+
}
1597
+
1598
+
static inline void sk_owner_put(struct sock *sk)
1599
+
{
1600
+
module_put(sk->sk_owner);
1601
+
}
1602
+
#else
1603
+
static inline void sk_owner_set(struct sock *sk, struct module *owner)
1604
+
{
1605
+
}
1606
+
1607
+
static inline void sk_owner_clear(struct sock *sk)
1608
+
{
1609
+
}
1610
+
1611
+
static inline void sk_owner_put(struct sock *sk)
1612
+
{
1613
+
}
1614
+
#endif
1592
1615
/*
1593
1616
* Macro so as to not evaluate some arguments when
1594
1617
* lockdep is not enabled.
···
1627
1592
*/
1628
1593
#define sock_lock_init_class_and_name(sk, sname, skey, name, key) \
1629
1594
do { \
1595
+
sk_owner_set(sk, THIS_MODULE); \
1630
1596
sk->sk_lock.owned = 0; \
1631
1597
init_waitqueue_head(&sk->sk_lock.wq); \
1632
1598
spin_lock_init(&(sk)->sk_lock.slock); \
1633
1599
debug_check_no_locks_freed((void *)&(sk)->sk_lock, \
1634
-
sizeof((sk)->sk_lock)); \
1600
+
sizeof((sk)->sk_lock)); \
1635
1601
lockdep_set_class_and_name(&(sk)->sk_lock.slock, \
1636
-
(skey), (sname)); \
1602
+
(skey), (sname)); \
1637
1603
lockdep_init_map(&(sk)->sk_lock.dep_map, (name), (key), 0); \
1638
1604
} while (0)
1639
1605
+6
-6
include/vdso/unaligned.h
+6
-6
include/vdso/unaligned.h
···
2
2
#ifndef __VDSO_UNALIGNED_H
3
3
#define __VDSO_UNALIGNED_H
4
4
5
-
#define __get_unaligned_t(type, ptr) ({ \
6
-
const struct { type x; } __packed *__pptr = (typeof(__pptr))(ptr); \
7
-
__pptr->x; \
5
+
#define __get_unaligned_t(type, ptr) ({ \
6
+
const struct { type x; } __packed * __get_pptr = (typeof(__get_pptr))(ptr); \
7
+
__get_pptr->x; \
8
8
})
9
9
10
-
#define __put_unaligned_t(type, val, ptr) do { \
11
-
struct { type x; } __packed *__pptr = (typeof(__pptr))(ptr); \
12
-
__pptr->x = (val); \
10
+
#define __put_unaligned_t(type, val, ptr) do { \
11
+
struct { type x; } __packed * __put_pptr = (typeof(__put_pptr))(ptr); \
12
+
__put_pptr->x = (val); \
13
13
} while (0)
14
14
15
15
#endif /* __VDSO_UNALIGNED_H */
+2
io_uring/kbuf.c
+2
io_uring/kbuf.c
+16
-1
io_uring/rsrc.c
+16
-1
io_uring/rsrc.c
···
175
175
io_alloc_cache_free(&ctx->imu_cache, kfree);
176
176
}
177
177
178
+
static void io_clear_table_tags(struct io_rsrc_data *data)
179
+
{
180
+
int i;
181
+
182
+
for (i = 0; i < data->nr; i++) {
183
+
struct io_rsrc_node *node = data->nodes[i];
184
+
185
+
if (node)
186
+
node->tag = 0;
187
+
}
188
+
}
189
+
178
190
__cold void io_rsrc_data_free(struct io_ring_ctx *ctx,
179
191
struct io_rsrc_data *data)
180
192
{
···
595
583
io_file_table_set_alloc_range(ctx, 0, ctx->file_table.data.nr);
596
584
return 0;
597
585
fail:
586
+
io_clear_table_tags(&ctx->file_table.data);
598
587
io_sqe_files_unregister(ctx);
599
588
return ret;
600
589
}
···
915
902
}
916
903
917
904
ctx->buf_table = data;
918
-
if (ret)
905
+
if (ret) {
906
+
io_clear_table_tags(&ctx->buf_table);
919
907
io_sqe_buffers_unregister(ctx);
908
+
}
920
909
return ret;
921
910
}
922
911
+10
-9
io_uring/zcrx.c
+10
-9
io_uring/zcrx.c
···
181
181
kvfree(area->nia.niovs);
182
182
kvfree(area->user_refs);
183
183
if (area->pages) {
184
-
unpin_user_pages(area->pages, area->nia.num_niovs);
184
+
unpin_user_pages(area->pages, area->nr_folios);
185
185
kvfree(area->pages);
186
186
}
187
187
kfree(area);
···
192
192
struct io_uring_zcrx_area_reg *area_reg)
193
193
{
194
194
struct io_zcrx_area *area;
195
-
int i, ret, nr_pages;
195
+
int i, ret, nr_pages, nr_iovs;
196
196
struct iovec iov;
197
197
198
198
if (area_reg->flags || area_reg->rq_area_token)
···
220
220
area->pages = NULL;
221
221
goto err;
222
222
}
223
-
area->nia.num_niovs = nr_pages;
223
+
area->nr_folios = nr_iovs = nr_pages;
224
+
area->nia.num_niovs = nr_iovs;
224
225
225
-
area->nia.niovs = kvmalloc_array(nr_pages, sizeof(area->nia.niovs[0]),
226
+
area->nia.niovs = kvmalloc_array(nr_iovs, sizeof(area->nia.niovs[0]),
226
227
GFP_KERNEL | __GFP_ZERO);
227
228
if (!area->nia.niovs)
228
229
goto err;
229
230
230
-
area->freelist = kvmalloc_array(nr_pages, sizeof(area->freelist[0]),
231
+
area->freelist = kvmalloc_array(nr_iovs, sizeof(area->freelist[0]),
231
232
GFP_KERNEL | __GFP_ZERO);
232
233
if (!area->freelist)
233
234
goto err;
234
235
235
-
for (i = 0; i < nr_pages; i++)
236
+
for (i = 0; i < nr_iovs; i++)
236
237
area->freelist[i] = i;
237
238
238
-
area->user_refs = kvmalloc_array(nr_pages, sizeof(area->user_refs[0]),
239
+
area->user_refs = kvmalloc_array(nr_iovs, sizeof(area->user_refs[0]),
239
240
GFP_KERNEL | __GFP_ZERO);
240
241
if (!area->user_refs)
241
242
goto err;
242
243
243
-
for (i = 0; i < nr_pages; i++) {
244
+
for (i = 0; i < nr_iovs; i++) {
244
245
struct net_iov *niov = &area->nia.niovs[i];
245
246
246
247
niov->owner = &area->nia;
···
249
248
atomic_set(&area->user_refs[i], 0);
250
249
}
251
250
252
-
area->free_count = nr_pages;
251
+
area->free_count = nr_iovs;
253
252
area->ifq = ifq;
254
253
/* we're only supporting one area per ifq for now */
255
254
area->area_id = 0;
+3
-2
io_uring/zcrx.h
+3
-2
io_uring/zcrx.h
···
15
15
bool is_mapped;
16
16
u16 area_id;
17
17
struct page **pages;
18
+
unsigned long nr_folios;
18
19
19
20
/* freelist */
20
21
spinlock_t freelist_lock ____cacheline_aligned_in_smp;
···
27
26
struct io_ring_ctx *ctx;
28
27
struct io_zcrx_area *area;
29
28
29
+
spinlock_t rq_lock ____cacheline_aligned_in_smp;
30
30
struct io_uring *rq_ring;
31
31
struct io_uring_zcrx_rqe *rqes;
32
-
u32 rq_entries;
33
32
u32 cached_rq_head;
34
-
spinlock_t rq_lock;
33
+
u32 rq_entries;
35
34
36
35
u32 if_rxq;
37
36
struct device *dev;
+12
-23
kernel/bpf/queue_stack_maps.c
+12
-23
kernel/bpf/queue_stack_maps.c
···
9
9
#include <linux/slab.h>
10
10
#include <linux/btf_ids.h>
11
11
#include "percpu_freelist.h"
12
+
#include <asm/rqspinlock.h>
12
13
13
14
#define QUEUE_STACK_CREATE_FLAG_MASK \
14
15
(BPF_F_NUMA_NODE | BPF_F_ACCESS_MASK)
15
16
16
17
struct bpf_queue_stack {
17
18
struct bpf_map map;
18
-
raw_spinlock_t lock;
19
+
rqspinlock_t lock;
19
20
u32 head, tail;
20
21
u32 size; /* max_entries + 1 */
21
22
···
79
78
80
79
qs->size = size;
81
80
82
-
raw_spin_lock_init(&qs->lock);
81
+
raw_res_spin_lock_init(&qs->lock);
83
82
84
83
return &qs->map;
85
84
}
···
99
98
int err = 0;
100
99
void *ptr;
101
100
102
-
if (in_nmi()) {
103
-
if (!raw_spin_trylock_irqsave(&qs->lock, flags))
104
-
return -EBUSY;
105
-
} else {
106
-
raw_spin_lock_irqsave(&qs->lock, flags);
107
-
}
101
+
if (raw_res_spin_lock_irqsave(&qs->lock, flags))
102
+
return -EBUSY;
108
103
109
104
if (queue_stack_map_is_empty(qs)) {
110
105
memset(value, 0, qs->map.value_size);
···
117
120
}
118
121
119
122
out:
120
-
raw_spin_unlock_irqrestore(&qs->lock, flags);
123
+
raw_res_spin_unlock_irqrestore(&qs->lock, flags);
121
124
return err;
122
125
}
123
126
···
130
133
void *ptr;
131
134
u32 index;
132
135
133
-
if (in_nmi()) {
134
-
if (!raw_spin_trylock_irqsave(&qs->lock, flags))
135
-
return -EBUSY;
136
-
} else {
137
-
raw_spin_lock_irqsave(&qs->lock, flags);
138
-
}
136
+
if (raw_res_spin_lock_irqsave(&qs->lock, flags))
137
+
return -EBUSY;
139
138
140
139
if (queue_stack_map_is_empty(qs)) {
141
140
memset(value, 0, qs->map.value_size);
···
150
157
qs->head = index;
151
158
152
159
out:
153
-
raw_spin_unlock_irqrestore(&qs->lock, flags);
160
+
raw_res_spin_unlock_irqrestore(&qs->lock, flags);
154
161
return err;
155
162
}
156
163
···
196
203
if (flags & BPF_NOEXIST || flags > BPF_EXIST)
197
204
return -EINVAL;
198
205
199
-
if (in_nmi()) {
200
-
if (!raw_spin_trylock_irqsave(&qs->lock, irq_flags))
201
-
return -EBUSY;
202
-
} else {
203
-
raw_spin_lock_irqsave(&qs->lock, irq_flags);
204
-
}
206
+
if (raw_res_spin_lock_irqsave(&qs->lock, irq_flags))
207
+
return -EBUSY;
205
208
206
209
if (queue_stack_map_is_full(qs)) {
207
210
if (!replace) {
···
216
227
qs->head = 0;
217
228
218
229
out:
219
-
raw_spin_unlock_irqrestore(&qs->lock, irq_flags);
230
+
raw_res_spin_unlock_irqrestore(&qs->lock, irq_flags);
220
231
return err;
221
232
}
222
233
+7
-10
kernel/bpf/ringbuf.c
+7
-10
kernel/bpf/ringbuf.c
···
11
11
#include <linux/kmemleak.h>
12
12
#include <uapi/linux/btf.h>
13
13
#include <linux/btf_ids.h>
14
+
#include <asm/rqspinlock.h>
14
15
15
16
#define RINGBUF_CREATE_FLAG_MASK (BPF_F_NUMA_NODE)
16
17
···
30
29
u64 mask;
31
30
struct page **pages;
32
31
int nr_pages;
33
-
raw_spinlock_t spinlock ____cacheline_aligned_in_smp;
32
+
rqspinlock_t spinlock ____cacheline_aligned_in_smp;
34
33
/* For user-space producer ring buffers, an atomic_t busy bit is used
35
34
* to synchronize access to the ring buffers in the kernel, rather than
36
35
* the spinlock that is used for kernel-producer ring buffers. This is
···
174
173
if (!rb)
175
174
return NULL;
176
175
177
-
raw_spin_lock_init(&rb->spinlock);
176
+
raw_res_spin_lock_init(&rb->spinlock);
178
177
atomic_set(&rb->busy, 0);
179
178
init_waitqueue_head(&rb->waitq);
180
179
init_irq_work(&rb->work, bpf_ringbuf_notify);
···
417
416
418
417
cons_pos = smp_load_acquire(&rb->consumer_pos);
419
418
420
-
if (in_nmi()) {
421
-
if (!raw_spin_trylock_irqsave(&rb->spinlock, flags))
422
-
return NULL;
423
-
} else {
424
-
raw_spin_lock_irqsave(&rb->spinlock, flags);
425
-
}
419
+
if (raw_res_spin_lock_irqsave(&rb->spinlock, flags))
420
+
return NULL;
426
421
427
422
pend_pos = rb->pending_pos;
428
423
prod_pos = rb->producer_pos;
···
443
446
*/
444
447
if (new_prod_pos - cons_pos > rb->mask ||
445
448
new_prod_pos - pend_pos > rb->mask) {
446
-
raw_spin_unlock_irqrestore(&rb->spinlock, flags);
449
+
raw_res_spin_unlock_irqrestore(&rb->spinlock, flags);
447
450
return NULL;
448
451
}
449
452
···
455
458
/* pairs with consumer's smp_load_acquire() */
456
459
smp_store_release(&rb->producer_pos, new_prod_pos);
457
460
458
-
raw_spin_unlock_irqrestore(&rb->spinlock, flags);
461
+
raw_res_spin_unlock_irqrestore(&rb->spinlock, flags);
459
462
460
463
return (void *)hdr + BPF_RINGBUF_HDR_SZ;
461
464
}
+1
-1
kernel/bpf/rqspinlock.c
+1
-1
kernel/bpf/rqspinlock.c
+6
kernel/cgroup/cgroup.c
+6
kernel/cgroup/cgroup.c
+1
kernel/cgroup/cpuset-internal.h
+1
kernel/cgroup/cpuset-internal.h
+240
-165
kernel/cgroup/cpuset.c
+240
-165
kernel/cgroup/cpuset.c
···
61
61
[PERR_CPUSEMPTY] = "cpuset.cpus and cpuset.cpus.exclusive are empty",
62
62
[PERR_HKEEPING] = "partition config conflicts with housekeeping setup",
63
63
[PERR_ACCESS] = "Enable partition not permitted",
64
+
[PERR_REMOTE] = "Have remote partition underneath",
64
65
};
65
66
66
67
/*
67
-
* Exclusive CPUs distributed out to sub-partitions of top_cpuset
68
+
* For local partitions, update to subpartitions_cpus & isolated_cpus is done
69
+
* in update_parent_effective_cpumask(). For remote partitions, it is done in
70
+
* the remote_partition_*() and remote_cpus_update() helpers.
71
+
*/
72
+
/*
73
+
* Exclusive CPUs distributed out to local or remote sub-partitions of
74
+
* top_cpuset
68
75
*/
69
76
static cpumask_var_t subpartitions_cpus;
70
77
···
93
86
* A flag to force sched domain rebuild at the end of an operation.
94
87
* It can be set in
95
88
* - update_partition_sd_lb()
96
-
* - remote_partition_check()
97
89
* - update_cpumasks_hier()
98
90
* - cpuset_update_flag()
99
91
* - cpuset_hotplug_update_tasks()
···
1095
1089
*
1096
1090
* Iterate through each task of @cs updating its cpus_allowed to the
1097
1091
* effective cpuset's. As this function is called with cpuset_mutex held,
1098
-
* cpuset membership stays stable. For top_cpuset, task_cpu_possible_mask()
1099
-
* is used instead of effective_cpus to make sure all offline CPUs are also
1100
-
* included as hotplug code won't update cpumasks for tasks in top_cpuset.
1092
+
* cpuset membership stays stable.
1093
+
*
1094
+
* For top_cpuset, task_cpu_possible_mask() is used instead of effective_cpus
1095
+
* to make sure all offline CPUs are also included as hotplug code won't
1096
+
* update cpumasks for tasks in top_cpuset.
1097
+
*
1098
+
* As task_cpu_possible_mask() can be task dependent in arm64, we have to
1099
+
* do cpu masking per task instead of doing it once for all.
1101
1100
*/
1102
1101
void cpuset_update_tasks_cpumask(struct cpuset *cs, struct cpumask *new_cpus)
1103
1102
{
···
1162
1151
*
1163
1152
* Return: 0 if successful, an error code otherwise
1164
1153
*/
1165
-
static int update_partition_exclusive(struct cpuset *cs, int new_prs)
1154
+
static int update_partition_exclusive_flag(struct cpuset *cs, int new_prs)
1166
1155
{
1167
1156
bool exclusive = (new_prs > PRS_MEMBER);
1168
1157
···
1245
1234
}
1246
1235
1247
1236
/*
1248
-
* partition_xcpus_newstate - Exclusive CPUs state change
1237
+
* isolated_cpus_update - Update the isolated_cpus mask
1249
1238
* @old_prs: old partition_root_state
1250
1239
* @new_prs: new partition_root_state
1251
1240
* @xcpus: exclusive CPUs with state change
1252
1241
*/
1253
-
static void partition_xcpus_newstate(int old_prs, int new_prs, struct cpumask *xcpus)
1242
+
static void isolated_cpus_update(int old_prs, int new_prs, struct cpumask *xcpus)
1254
1243
{
1255
1244
WARN_ON_ONCE(old_prs == new_prs);
1256
1245
if (new_prs == PRS_ISOLATED)
···
1284
1273
1285
1274
isolcpus_updated = (new_prs != parent->partition_root_state);
1286
1275
if (isolcpus_updated)
1287
-
partition_xcpus_newstate(parent->partition_root_state, new_prs,
1288
-
xcpus);
1276
+
isolated_cpus_update(parent->partition_root_state, new_prs,
1277
+
xcpus);
1289
1278
1290
1279
cpumask_andnot(parent->effective_cpus, parent->effective_cpus, xcpus);
1291
1280
return isolcpus_updated;
···
1315
1304
1316
1305
isolcpus_updated = (old_prs != parent->partition_root_state);
1317
1306
if (isolcpus_updated)
1318
-
partition_xcpus_newstate(old_prs, parent->partition_root_state,
1319
-
xcpus);
1307
+
isolated_cpus_update(old_prs, parent->partition_root_state,
1308
+
xcpus);
1320
1309
1321
1310
cpumask_and(xcpus, xcpus, cpu_active_mask);
1322
1311
cpumask_or(parent->effective_cpus, parent->effective_cpus, xcpus);
···
1351
1340
* compute_effective_exclusive_cpumask - compute effective exclusive CPUs
1352
1341
* @cs: cpuset
1353
1342
* @xcpus: effective exclusive CPUs value to be set
1354
-
* Return: true if xcpus is not empty, false otherwise.
1343
+
* @real_cs: the real cpuset (can be NULL)
1344
+
* Return: 0 if there is no sibling conflict, > 0 otherwise
1355
1345
*
1356
-
* Starting with exclusive_cpus (cpus_allowed if exclusive_cpus is not set),
1357
-
* it must be a subset of parent's effective_xcpus.
1346
+
* If exclusive_cpus isn't explicitly set or a real_cs is provided, we have to
1347
+
* scan the sibling cpusets and exclude their exclusive_cpus or effective_xcpus
1348
+
* as well. The provision of real_cs means that a cpumask is being changed and
1349
+
* the given cs is a trial one.
1358
1350
*/
1359
-
static bool compute_effective_exclusive_cpumask(struct cpuset *cs,
1360
-
struct cpumask *xcpus)
1351
+
static int compute_effective_exclusive_cpumask(struct cpuset *cs,
1352
+
struct cpumask *xcpus,
1353
+
struct cpuset *real_cs)
1361
1354
{
1355
+
struct cgroup_subsys_state *css;
1362
1356
struct cpuset *parent = parent_cs(cs);
1357
+
struct cpuset *sibling;
1358
+
int retval = 0;
1363
1359
1364
1360
if (!xcpus)
1365
1361
xcpus = cs->effective_xcpus;
1366
1362
1367
-
return cpumask_and(xcpus, user_xcpus(cs), parent->effective_xcpus);
1363
+
cpumask_and(xcpus, user_xcpus(cs), parent->effective_xcpus);
1364
+
1365
+
if (!real_cs) {
1366
+
if (!cpumask_empty(cs->exclusive_cpus))
1367
+
return 0;
1368
+
} else {
1369
+
cs = real_cs;
1370
+
}
1371
+
1372
+
/*
1373
+
* Exclude exclusive CPUs from siblings
1374
+
*/
1375
+
rcu_read_lock();
1376
+
cpuset_for_each_child(sibling, css, parent) {
1377
+
if (sibling == cs)
1378
+
continue;
1379
+
1380
+
if (!cpumask_empty(sibling->exclusive_cpus) &&
1381
+
cpumask_intersects(xcpus, sibling->exclusive_cpus)) {
1382
+
cpumask_andnot(xcpus, xcpus, sibling->exclusive_cpus);
1383
+
retval++;
1384
+
continue;
1385
+
}
1386
+
if (!cpumask_empty(sibling->effective_xcpus) &&
1387
+
cpumask_intersects(xcpus, sibling->effective_xcpus)) {
1388
+
cpumask_andnot(xcpus, xcpus, sibling->effective_xcpus);
1389
+
retval++;
1390
+
}
1391
+
}
1392
+
rcu_read_unlock();
1393
+
return retval;
1368
1394
}
1369
1395
1370
1396
static inline bool is_remote_partition(struct cpuset *cs)
···
1443
1395
* remote partition root underneath it, its exclusive_cpus must
1444
1396
* have overlapped with subpartitions_cpus.
1445
1397
*/
1446
-
compute_effective_exclusive_cpumask(cs, tmp->new_cpus);
1398
+
compute_effective_exclusive_cpumask(cs, tmp->new_cpus, NULL);
1447
1399
if (cpumask_empty(tmp->new_cpus) ||
1448
1400
cpumask_intersects(tmp->new_cpus, subpartitions_cpus) ||
1449
1401
cpumask_subset(top_cpuset.effective_cpus, tmp->new_cpus))
···
1452
1404
spin_lock_irq(&callback_lock);
1453
1405
isolcpus_updated = partition_xcpus_add(new_prs, NULL, tmp->new_cpus);
1454
1406
list_add(&cs->remote_sibling, &remote_children);
1407
+
cpumask_copy(cs->effective_xcpus, tmp->new_cpus);
1455
1408
spin_unlock_irq(&callback_lock);
1456
1409
update_unbound_workqueue_cpumask(isolcpus_updated);
1410
+
cpuset_force_rebuild();
1411
+
cs->prs_err = 0;
1457
1412
1458
1413
/*
1459
1414
* Propagate changes in top_cpuset's effective_cpus down the hierarchy.
···
1479
1428
{
1480
1429
bool isolcpus_updated;
1481
1430
1482
-
compute_effective_exclusive_cpumask(cs, tmp->new_cpus);
1483
1431
WARN_ON_ONCE(!is_remote_partition(cs));
1484
-
WARN_ON_ONCE(!cpumask_subset(tmp->new_cpus, subpartitions_cpus));
1432
+
WARN_ON_ONCE(!cpumask_subset(cs->effective_xcpus, subpartitions_cpus));
1485
1433
1486
1434
spin_lock_irq(&callback_lock);
1487
1435
list_del_init(&cs->remote_sibling);
1488
1436
isolcpus_updated = partition_xcpus_del(cs->partition_root_state,
1489
-
NULL, tmp->new_cpus);
1490
-
cs->partition_root_state = -cs->partition_root_state;
1491
-
if (!cs->prs_err)
1492
-
cs->prs_err = PERR_INVCPUS;
1437
+
NULL, cs->effective_xcpus);
1438
+
if (cs->prs_err)
1439
+
cs->partition_root_state = -cs->partition_root_state;
1440
+
else
1441
+
cs->partition_root_state = PRS_MEMBER;
1442
+
1443
+
/* effective_xcpus may need to be changed */
1444
+
compute_effective_exclusive_cpumask(cs, NULL, NULL);
1493
1445
reset_partition_data(cs);
1494
1446
spin_unlock_irq(&callback_lock);
1495
1447
update_unbound_workqueue_cpumask(isolcpus_updated);
1448
+
cpuset_force_rebuild();
1496
1449
1497
1450
/*
1498
1451
* Propagate changes in top_cpuset's effective_cpus down the hierarchy.
···
1508
1453
/*
1509
1454
* remote_cpus_update - cpus_exclusive change of remote partition
1510
1455
* @cs: the cpuset to be updated
1511
-
* @newmask: the new effective_xcpus mask
1456
+
* @xcpus: the new exclusive_cpus mask, if non-NULL
1457
+
* @excpus: the new effective_xcpus mask
1512
1458
* @tmp: temporary masks
1513
1459
*
1514
1460
* top_cpuset and subpartitions_cpus will be updated or partition can be
1515
1461
* invalidated.
1516
1462
*/
1517
-
static void remote_cpus_update(struct cpuset *cs, struct cpumask *newmask,
1518
-
struct tmpmasks *tmp)
1463
+
static void remote_cpus_update(struct cpuset *cs, struct cpumask *xcpus,
1464
+
struct cpumask *excpus, struct tmpmasks *tmp)
1519
1465
{
1520
1466
bool adding, deleting;
1521
1467
int prs = cs->partition_root_state;
···
1527
1471
1528
1472
WARN_ON_ONCE(!cpumask_subset(cs->effective_xcpus, subpartitions_cpus));
1529
1473
1530
-
if (cpumask_empty(newmask))
1474
+
if (cpumask_empty(excpus)) {
1475
+
cs->prs_err = PERR_CPUSEMPTY;
1531
1476
goto invalidate;
1477
+
}
1532
1478
1533
-
adding = cpumask_andnot(tmp->addmask, newmask, cs->effective_xcpus);
1534
-
deleting = cpumask_andnot(tmp->delmask, cs->effective_xcpus, newmask);
1479
+
adding = cpumask_andnot(tmp->addmask, excpus, cs->effective_xcpus);
1480
+
deleting = cpumask_andnot(tmp->delmask, cs->effective_xcpus, excpus);
1535
1481
1536
1482
/*
1537
1483
* Additions of remote CPUs is only allowed if those CPUs are
1538
1484
* not allocated to other partitions and there are effective_cpus
1539
1485
* left in the top cpuset.
1540
1486
*/
1541
-
if (adding && (!capable(CAP_SYS_ADMIN) ||
1542
-
cpumask_intersects(tmp->addmask, subpartitions_cpus) ||
1543
-
cpumask_subset(top_cpuset.effective_cpus, tmp->addmask)))
1544
-
goto invalidate;
1487
+
if (adding) {
1488
+
if (!capable(CAP_SYS_ADMIN))
1489
+
cs->prs_err = PERR_ACCESS;
1490
+
else if (cpumask_intersects(tmp->addmask, subpartitions_cpus) ||
1491
+
cpumask_subset(top_cpuset.effective_cpus, tmp->addmask))
1492
+
cs->prs_err = PERR_NOCPUS;
1493
+
if (cs->prs_err)
1494
+
goto invalidate;
1495
+
}
1545
1496
1546
1497
spin_lock_irq(&callback_lock);
1547
1498
if (adding)
1548
1499
isolcpus_updated += partition_xcpus_add(prs, NULL, tmp->addmask);
1549
1500
if (deleting)
1550
1501
isolcpus_updated += partition_xcpus_del(prs, NULL, tmp->delmask);
1502
+
/*
1503
+
* Need to update effective_xcpus and exclusive_cpus now as
1504
+
* update_sibling_cpumasks() below may iterate back to the same cs.
1505
+
*/
1506
+
cpumask_copy(cs->effective_xcpus, excpus);
1507
+
if (xcpus)
1508
+
cpumask_copy(cs->exclusive_cpus, xcpus);
1551
1509
spin_unlock_irq(&callback_lock);
1552
1510
update_unbound_workqueue_cpumask(isolcpus_updated);
1511
+
if (adding || deleting)
1512
+
cpuset_force_rebuild();
1553
1513
1554
1514
/*
1555
1515
* Propagate changes in top_cpuset's effective_cpus down the hierarchy.
···
1576
1504
1577
1505
invalidate:
1578
1506
remote_partition_disable(cs, tmp);
1579
-
}
1580
-
1581
-
/*
1582
-
* remote_partition_check - check if a child remote partition needs update
1583
-
* @cs: the cpuset to be updated
1584
-
* @newmask: the new effective_xcpus mask
1585
-
* @delmask: temporary mask for deletion (not in tmp)
1586
-
* @tmp: temporary masks
1587
-
*
1588
-
* This should be called before the given cs has updated its cpus_allowed
1589
-
* and/or effective_xcpus.
1590
-
*/
1591
-
static void remote_partition_check(struct cpuset *cs, struct cpumask *newmask,
1592
-
struct cpumask *delmask, struct tmpmasks *tmp)
1593
-
{
1594
-
struct cpuset *child, *next;
1595
-
int disable_cnt = 0;
1596
-
1597
-
/*
1598
-
* Compute the effective exclusive CPUs that will be deleted.
1599
-
*/
1600
-
if (!cpumask_andnot(delmask, cs->effective_xcpus, newmask) ||
1601
-
!cpumask_intersects(delmask, subpartitions_cpus))
1602
-
return; /* No deletion of exclusive CPUs in partitions */
1603
-
1604
-
/*
1605
-
* Searching the remote children list to look for those that will
1606
-
* be impacted by the deletion of exclusive CPUs.
1607
-
*
1608
-
* Since a cpuset must be removed from the remote children list
1609
-
* before it can go offline and holding cpuset_mutex will prevent
1610
-
* any change in cpuset status. RCU read lock isn't needed.
1611
-
*/
1612
-
lockdep_assert_held(&cpuset_mutex);
1613
-
list_for_each_entry_safe(child, next, &remote_children, remote_sibling)
1614
-
if (cpumask_intersects(child->effective_cpus, delmask)) {
1615
-
remote_partition_disable(child, tmp);
1616
-
disable_cnt++;
1617
-
}
1618
-
if (disable_cnt)
1619
-
cpuset_force_rebuild();
1620
1507
}
1621
1508
1622
1509
/*
···
1632
1601
* The partcmd_update command is used by update_cpumasks_hier() with newmask
1633
1602
* NULL and update_cpumask() with newmask set. The partcmd_invalidate is used
1634
1603
* by update_cpumask() with NULL newmask. In both cases, the callers won't
1635
-
* check for error and so partition_root_state and prs_error will be updated
1604
+
* check for error and so partition_root_state and prs_err will be updated
1636
1605
* directly.
1637
1606
*/
1638
1607
static int update_parent_effective_cpumask(struct cpuset *cs, int cmd,
···
1645
1614
int old_prs, new_prs;
1646
1615
int part_error = PERR_NONE; /* Partition error? */
1647
1616
int subparts_delta = 0;
1648
-
struct cpumask *xcpus; /* cs effective_xcpus */
1649
1617
int isolcpus_updated = 0;
1618
+
struct cpumask *xcpus = user_xcpus(cs);
1650
1619
bool nocpu;
1651
1620
1652
1621
lockdep_assert_held(&cpuset_mutex);
1622
+
WARN_ON_ONCE(is_remote_partition(cs));
1653
1623
1654
1624
/*
1655
1625
* new_prs will only be changed for the partcmd_update and
···
1658
1626
*/
1659
1627
adding = deleting = false;
1660
1628
old_prs = new_prs = cs->partition_root_state;
1661
-
xcpus = user_xcpus(cs);
1662
1629
1663
1630
if (cmd == partcmd_invalidate) {
1664
1631
if (is_prs_invalid(old_prs))
···
1692
1661
1693
1662
if ((cmd == partcmd_enable) || (cmd == partcmd_enablei)) {
1694
1663
/*
1695
-
* Enabling partition root is not allowed if its
1696
-
* effective_xcpus is empty or doesn't overlap with
1697
-
* parent's effective_xcpus.
1664
+
* Need to call compute_effective_exclusive_cpumask() in case
1665
+
* exclusive_cpus not set. Sibling conflict should only happen
1666
+
* if exclusive_cpus isn't set.
1698
1667
*/
1699
-
if (cpumask_empty(xcpus) ||
1700
-
!cpumask_intersects(xcpus, parent->effective_xcpus))
1668
+
xcpus = tmp->new_cpus;
1669
+
if (compute_effective_exclusive_cpumask(cs, xcpus, NULL))
1670
+
WARN_ON_ONCE(!cpumask_empty(cs->exclusive_cpus));
1671
+
1672
+
/*
1673
+
* Enabling partition root is not allowed if its
1674
+
* effective_xcpus is empty.
1675
+
*/
1676
+
if (cpumask_empty(xcpus))
1701
1677
return PERR_INVCPUS;
1702
1678
1703
1679
if (prstate_housekeeping_conflict(new_prs, xcpus))
···
1717
1679
if (nocpu)
1718
1680
return PERR_NOCPUS;
1719
1681
1720
-
cpumask_copy(tmp->delmask, xcpus);
1721
-
deleting = true;
1722
-
subparts_delta++;
1682
+
deleting = cpumask_and(tmp->delmask, xcpus, parent->effective_xcpus);
1683
+
if (deleting)
1684
+
subparts_delta++;
1723
1685
new_prs = (cmd == partcmd_enable) ? PRS_ROOT : PRS_ISOLATED;
1724
1686
} else if (cmd == partcmd_disable) {
1725
1687
/*
1726
-
* May need to add cpus to parent's effective_cpus for
1727
-
* valid partition root.
1688
+
* May need to add cpus back to parent's effective_cpus
1689
+
* (and maybe removed from subpartitions_cpus/isolated_cpus)
1690
+
* for valid partition root. xcpus may contain CPUs that
1691
+
* shouldn't be removed from the two global cpumasks.
1728
1692
*/
1729
-
adding = !is_prs_invalid(old_prs) &&
1730
-
cpumask_and(tmp->addmask, xcpus, parent->effective_xcpus);
1731
-
if (adding)
1693
+
if (is_partition_valid(cs)) {
1694
+
cpumask_copy(tmp->addmask, cs->effective_xcpus);
1695
+
adding = true;
1732
1696
subparts_delta--;
1697
+
}
1733
1698
new_prs = PRS_MEMBER;
1734
1699
} else if (newmask) {
1735
1700
/*
···
1742
1701
part_error = PERR_CPUSEMPTY;
1743
1702
goto write_error;
1744
1703
}
1704
+
1745
1705
/* Check newmask again, whether cpus are available for parent/cs */
1746
1706
nocpu |= tasks_nocpu_error(parent, cs, newmask);
1747
1707
···
1871
1829
* CPU lists in cs haven't been updated yet. So defer it to later.
1872
1830
*/
1873
1831
if ((old_prs != new_prs) && (cmd != partcmd_update)) {
1874
-
int err = update_partition_exclusive(cs, new_prs);
1832
+
int err = update_partition_exclusive_flag(cs, new_prs);
1875
1833
1876
1834
if (err)
1877
1835
return err;
···
1909
1867
update_unbound_workqueue_cpumask(isolcpus_updated);
1910
1868
1911
1869
if ((old_prs != new_prs) && (cmd == partcmd_update))
1912
-
update_partition_exclusive(cs, new_prs);
1870
+
update_partition_exclusive_flag(cs, new_prs);
1913
1871
1914
1872
if (adding || deleting) {
1915
1873
cpuset_update_tasks_cpumask(parent, tmp->addmask);
···
1959
1917
* 2) All the effective_cpus will be used up and cp
1960
1918
* has tasks
1961
1919
*/
1962
-
compute_effective_exclusive_cpumask(cs, new_ecpus);
1920
+
compute_effective_exclusive_cpumask(cs, new_ecpus, NULL);
1963
1921
cpumask_and(new_ecpus, new_ecpus, cpu_active_mask);
1964
1922
1965
1923
rcu_read_lock();
···
1967
1925
if (!is_partition_valid(child))
1968
1926
continue;
1969
1927
1928
+
/*
1929
+
* There shouldn't be a remote partition underneath another
1930
+
* partition root.
1931
+
*/
1932
+
WARN_ON_ONCE(is_remote_partition(child));
1970
1933
child->prs_err = 0;
1971
1934
if (!cpumask_subset(child->effective_xcpus,
1972
1935
cs->effective_xcpus))
···
2027
1980
bool remote = is_remote_partition(cp);
2028
1981
bool update_parent = false;
2029
1982
1983
+
old_prs = new_prs = cp->partition_root_state;
1984
+
2030
1985
/*
2031
-
* Skip descendent remote partition that acquires CPUs
2032
-
* directly from top cpuset unless it is cs.
1986
+
* For child remote partition root (!= cs), we need to call
1987
+
* remote_cpus_update() if effective_xcpus will be changed.
1988
+
* Otherwise, we can skip the whole subtree.
1989
+
*
1990
+
* remote_cpus_update() will reuse tmp->new_cpus only after
1991
+
* its value is being processed.
2033
1992
*/
2034
1993
if (remote && (cp != cs)) {
2035
-
pos_css = css_rightmost_descendant(pos_css);
2036
-
continue;
1994
+
compute_effective_exclusive_cpumask(cp, tmp->new_cpus, NULL);
1995
+
if (cpumask_equal(cp->effective_xcpus, tmp->new_cpus)) {
1996
+
pos_css = css_rightmost_descendant(pos_css);
1997
+
continue;
1998
+
}
1999
+
rcu_read_unlock();
2000
+
remote_cpus_update(cp, NULL, tmp->new_cpus, tmp);
2001
+
rcu_read_lock();
2002
+
2003
+
/* Remote partition may be invalidated */
2004
+
new_prs = cp->partition_root_state;
2005
+
remote = (new_prs == old_prs);
2037
2006
}
2038
2007
2039
-
/*
2040
-
* Update effective_xcpus if exclusive_cpus set.
2041
-
* The case when exclusive_cpus isn't set is handled later.
2042
-
*/
2043
-
if (!cpumask_empty(cp->exclusive_cpus) && (cp != cs)) {
2044
-
spin_lock_irq(&callback_lock);
2045
-
compute_effective_exclusive_cpumask(cp, NULL);
2046
-
spin_unlock_irq(&callback_lock);
2047
-
}
2048
-
2049
-
old_prs = new_prs = cp->partition_root_state;
2050
-
if (remote || (is_partition_valid(parent) &&
2051
-
is_partition_valid(cp)))
2008
+
if (remote || (is_partition_valid(parent) && is_partition_valid(cp)))
2052
2009
compute_partition_effective_cpumask(cp, tmp->new_cpus);
2053
2010
else
2054
2011
compute_effective_cpumask(tmp->new_cpus, cp, parent);
2012
+
2013
+
if (remote)
2014
+
goto get_css; /* Ready to update cpuset data */
2055
2015
2056
2016
/*
2057
2017
* A partition with no effective_cpus is allowed as long as
···
2078
2024
*/
2079
2025
if (is_in_v2_mode() && !remote && cpumask_empty(tmp->new_cpus))
2080
2026
cpumask_copy(tmp->new_cpus, parent->effective_cpus);
2081
-
2082
-
if (remote)
2083
-
goto get_css;
2084
2027
2085
2028
/*
2086
2029
* Skip the whole subtree if
···
2139
2088
spin_lock_irq(&callback_lock);
2140
2089
cpumask_copy(cp->effective_cpus, tmp->new_cpus);
2141
2090
cp->partition_root_state = new_prs;
2091
+
if (!cpumask_empty(cp->exclusive_cpus) && (cp != cs))
2092
+
compute_effective_exclusive_cpumask(cp, NULL, NULL);
2093
+
2142
2094
/*
2143
2095
* Make sure effective_xcpus is properly set for a valid
2144
2096
* partition root.
···
2228
2174
parent);
2229
2175
if (cpumask_equal(tmp->new_cpus, sibling->effective_cpus))
2230
2176
continue;
2177
+
} else if (is_remote_partition(sibling)) {
2178
+
/*
2179
+
* Change in a sibling cpuset won't affect a remote
2180
+
* partition root.
2181
+
*/
2182
+
continue;
2231
2183
}
2184
+
2232
2185
if (!css_tryget_online(&sibling->css))
2233
2186
continue;
2234
2187
···
2292
2231
* trialcs->effective_xcpus is used as a temporary cpumask
2293
2232
* for checking validity of the partition root.
2294
2233
*/
2234
+
trialcs->partition_root_state = PRS_MEMBER;
2295
2235
if (!cpumask_empty(trialcs->exclusive_cpus) || is_partition_valid(cs))
2296
-
compute_effective_exclusive_cpumask(trialcs, NULL);
2236
+
compute_effective_exclusive_cpumask(trialcs, NULL, cs);
2297
2237
}
2298
2238
2299
2239
/* Nothing to do if the cpus didn't change */
···
2367
2305
* Call remote_cpus_update() to handle valid remote partition
2368
2306
*/
2369
2307
if (is_remote_partition(cs))
2370
-
remote_cpus_update(cs, xcpus, &tmp);
2308
+
remote_cpus_update(cs, NULL, xcpus, &tmp);
2371
2309
else if (invalidate)
2372
2310
update_parent_effective_cpumask(cs, partcmd_invalidate,
2373
2311
NULL, &tmp);
2374
2312
else
2375
2313
update_parent_effective_cpumask(cs, partcmd_update,
2376
2314
xcpus, &tmp);
2377
-
} else if (!cpumask_empty(cs->exclusive_cpus)) {
2378
-
/*
2379
-
* Use trialcs->effective_cpus as a temp cpumask
2380
-
*/
2381
-
remote_partition_check(cs, trialcs->effective_xcpus,
2382
-
trialcs->effective_cpus, &tmp);
2383
2315
}
2384
2316
2385
2317
spin_lock_irq(&callback_lock);
···
2425
2369
if (cpumask_equal(cs->exclusive_cpus, trialcs->exclusive_cpus))
2426
2370
return 0;
2427
2371
2428
-
if (*buf)
2429
-
compute_effective_exclusive_cpumask(trialcs, NULL);
2372
+
if (*buf) {
2373
+
trialcs->partition_root_state = PRS_MEMBER;
2374
+
/*
2375
+
* Reject the change if there is exclusive CPUs conflict with
2376
+
* the siblings.
2377
+
*/
2378
+
if (compute_effective_exclusive_cpumask(trialcs, NULL, cs))
2379
+
return -EINVAL;
2380
+
}
2430
2381
2431
2382
/*
2432
2383
* Check all the descendants in update_cpumasks_hier() if
···
2464
2401
if (invalidate)
2465
2402
remote_partition_disable(cs, &tmp);
2466
2403
else
2467
-
remote_cpus_update(cs, trialcs->effective_xcpus,
2468
-
&tmp);
2404
+
remote_cpus_update(cs, trialcs->exclusive_cpus,
2405
+
trialcs->effective_xcpus, &tmp);
2469
2406
} else if (invalidate) {
2470
2407
update_parent_effective_cpumask(cs, partcmd_invalidate,
2471
2408
NULL, &tmp);
···
2473
2410
update_parent_effective_cpumask(cs, partcmd_update,
2474
2411
trialcs->effective_xcpus, &tmp);
2475
2412
}
2476
-
} else if (!cpumask_empty(trialcs->exclusive_cpus)) {
2477
-
/*
2478
-
* Use trialcs->effective_cpus as a temp cpumask
2479
-
*/
2480
-
remote_partition_check(cs, trialcs->effective_xcpus,
2481
-
trialcs->effective_cpus, &tmp);
2482
2413
}
2483
2414
spin_lock_irq(&callback_lock);
2484
2415
cpumask_copy(cs->exclusive_cpus, trialcs->exclusive_cpus);
···
2839
2782
int err = PERR_NONE, old_prs = cs->partition_root_state;
2840
2783
struct cpuset *parent = parent_cs(cs);
2841
2784
struct tmpmasks tmpmask;
2842
-
bool new_xcpus_state = false;
2785
+
bool isolcpus_updated = false;
2843
2786
2844
2787
if (old_prs == new_prs)
2845
2788
return 0;
···
2853
2796
if (alloc_cpumasks(NULL, &tmpmask))
2854
2797
return -ENOMEM;
2855
2798
2856
-
/*
2857
-
* Setup effective_xcpus if not properly set yet, it will be cleared
2858
-
* later if partition becomes invalid.
2859
-
*/
2860
-
if ((new_prs > 0) && cpumask_empty(cs->exclusive_cpus)) {
2861
-
spin_lock_irq(&callback_lock);
2862
-
cpumask_and(cs->effective_xcpus,
2863
-
cs->cpus_allowed, parent->effective_xcpus);
2864
-
spin_unlock_irq(&callback_lock);
2865
-
}
2866
-
2867
-
err = update_partition_exclusive(cs, new_prs);
2799
+
err = update_partition_exclusive_flag(cs, new_prs);
2868
2800
if (err)
2869
2801
goto out;
2870
2802
···
2863
2817
*/
2864
2818
if (xcpus_empty(cs)) {
2865
2819
err = PERR_CPUSEMPTY;
2820
+
goto out;
2821
+
}
2822
+
2823
+
/*
2824
+
* We don't support the creation of a new local partition with
2825
+
* a remote partition underneath it. This unsupported
2826
+
* setting can happen only if parent is the top_cpuset because
2827
+
* a remote partition cannot be created underneath an existing
2828
+
* local or remote partition.
2829
+
*/
2830
+
if ((parent == &top_cpuset) &&
2831
+
cpumask_intersects(cs->exclusive_cpus, subpartitions_cpus)) {
2832
+
err = PERR_REMOTE;
2866
2833
goto out;
2867
2834
}
2868
2835
···
2894
2835
} else if (old_prs && new_prs) {
2895
2836
/*
2896
2837
* A change in load balance state only, no change in cpumasks.
2838
+
* Need to update isolated_cpus.
2897
2839
*/
2898
-
new_xcpus_state = true;
2840
+
isolcpus_updated = true;
2899
2841
} else {
2900
2842
/*
2901
2843
* Switching back to member is always allowed even if it
···
2920
2860
*/
2921
2861
if (err) {
2922
2862
new_prs = -new_prs;
2923
-
update_partition_exclusive(cs, new_prs);
2863
+
update_partition_exclusive_flag(cs, new_prs);
2924
2864
}
2925
2865
2926
2866
spin_lock_irq(&callback_lock);
···
2928
2868
WRITE_ONCE(cs->prs_err, err);
2929
2869
if (!is_partition_valid(cs))
2930
2870
reset_partition_data(cs);
2931
-
else if (new_xcpus_state)
2932
-
partition_xcpus_newstate(old_prs, new_prs, cs->effective_xcpus);
2871
+
else if (isolcpus_updated)
2872
+
isolated_cpus_update(old_prs, new_prs, cs->effective_xcpus);
2933
2873
spin_unlock_irq(&callback_lock);
2934
-
update_unbound_workqueue_cpumask(new_xcpus_state);
2874
+
update_unbound_workqueue_cpumask(isolcpus_updated);
2935
2875
2936
-
/* Force update if switching back to member */
2876
+
/* Force update if switching back to member & update effective_xcpus */
2937
2877
update_cpumasks_hier(cs, &tmpmask, !new_prs);
2878
+
2879
+
/* A newly created partition must have effective_xcpus set */
2880
+
WARN_ON_ONCE(!old_prs && (new_prs > 0)
2881
+
&& cpumask_empty(cs->effective_xcpus));
2938
2882
2939
2883
/* Update sched domains and load balance flag */
2940
2884
update_partition_sd_lb(cs, old_prs);
···
3272
3208
return ret;
3273
3209
}
3274
3210
3275
-
static int sched_partition_show(struct seq_file *seq, void *v)
3211
+
static int cpuset_partition_show(struct seq_file *seq, void *v)
3276
3212
{
3277
3213
struct cpuset *cs = css_cs(seq_css(seq));
3278
3214
const char *err, *type = NULL;
···
3303
3239
return 0;
3304
3240
}
3305
3241
3306
-
static ssize_t sched_partition_write(struct kernfs_open_file *of, char *buf,
3242
+
static ssize_t cpuset_partition_write(struct kernfs_open_file *of, char *buf,
3307
3243
size_t nbytes, loff_t off)
3308
3244
{
3309
3245
struct cpuset *cs = css_cs(of_css(of));
···
3324
3260
css_get(&cs->css);
3325
3261
cpus_read_lock();
3326
3262
mutex_lock(&cpuset_mutex);
3327
-
if (!is_cpuset_online(cs))
3328
-
goto out_unlock;
3329
-
3330
-
retval = update_prstate(cs, val);
3331
-
out_unlock:
3263
+
if (is_cpuset_online(cs))
3264
+
retval = update_prstate(cs, val);
3332
3265
mutex_unlock(&cpuset_mutex);
3333
3266
cpus_read_unlock();
3334
3267
css_put(&cs->css);
···
3369
3308
3370
3309
{
3371
3310
.name = "cpus.partition",
3372
-
.seq_show = sched_partition_show,
3373
-
.write = sched_partition_write,
3311
+
.seq_show = cpuset_partition_show,
3312
+
.write = cpuset_partition_write,
3374
3313
.private = FILE_PARTITION_ROOT,
3375
3314
.flags = CFTYPE_NOT_ON_ROOT,
3376
3315
.file_offset = offsetof(struct cpuset, partition_file),
···
3536
3475
cpus_read_lock();
3537
3476
mutex_lock(&cpuset_mutex);
3538
3477
3539
-
if (is_partition_valid(cs))
3540
-
update_prstate(cs, 0);
3541
-
3542
3478
if (!cpuset_v2() && is_sched_load_balance(cs))
3543
3479
cpuset_update_flag(CS_SCHED_LOAD_BALANCE, cs, 0);
3544
3480
···
3544
3486
3545
3487
mutex_unlock(&cpuset_mutex);
3546
3488
cpus_read_unlock();
3489
+
}
3490
+
3491
+
static void cpuset_css_killed(struct cgroup_subsys_state *css)
3492
+
{
3493
+
struct cpuset *cs = css_cs(css);
3494
+
3495
+
cpus_read_lock();
3496
+
mutex_lock(&cpuset_mutex);
3497
+
3498
+
/* Reset valid partition back to member */
3499
+
if (is_partition_valid(cs))
3500
+
update_prstate(cs, PRS_MEMBER);
3501
+
3502
+
mutex_unlock(&cpuset_mutex);
3503
+
cpus_read_unlock();
3504
+
3547
3505
}
3548
3506
3549
3507
static void cpuset_css_free(struct cgroup_subsys_state *css)
···
3683
3609
.css_alloc = cpuset_css_alloc,
3684
3610
.css_online = cpuset_css_online,
3685
3611
.css_offline = cpuset_css_offline,
3612
+
.css_killed = cpuset_css_killed,
3686
3613
.css_free = cpuset_css_free,
3687
3614
.can_attach = cpuset_can_attach,
3688
3615
.cancel_attach = cpuset_cancel_attach,
···
3814
3739
3815
3740
if (remote && cpumask_empty(&new_cpus) &&
3816
3741
partition_is_populated(cs, NULL)) {
3742
+
cs->prs_err = PERR_HOTPLUG;
3817
3743
remote_partition_disable(cs, tmp);
3818
3744
compute_effective_cpumask(&new_cpus, cs, parent);
3819
3745
remote = false;
3820
-
cpuset_force_rebuild();
3821
3746
}
3822
3747
3823
3748
/*
+2
-1
kernel/cgroup/rstat.c
+2
-1
kernel/cgroup/rstat.c
···
318
318
319
319
might_sleep();
320
320
for_each_possible_cpu(cpu) {
321
-
struct cgroup *pos = cgroup_rstat_updated_list(cgrp, cpu);
321
+
struct cgroup *pos;
322
322
323
323
/* Reacquire for each CPU to avoid disabling IRQs too long */
324
324
__cgroup_rstat_lock(cgrp, cpu);
325
+
pos = cgroup_rstat_updated_list(cgrp, cpu);
325
326
for (; pos; pos = pos->rstat_flush_next) {
326
327
struct cgroup_subsys_state *css;
327
328
+21
-49
kernel/events/core.c
+21
-49
kernel/events/core.c
···
5518
5518
5519
5519
static void perf_free_addr_filters(struct perf_event *event);
5520
5520
5521
-
static void perf_pending_task_sync(struct perf_event *event)
5522
-
{
5523
-
struct callback_head *head = &event->pending_task;
5524
-
5525
-
if (!event->pending_work)
5526
-
return;
5527
-
/*
5528
-
* If the task is queued to the current task's queue, we
5529
-
* obviously can't wait for it to complete. Simply cancel it.
5530
-
*/
5531
-
if (task_work_cancel(current, head)) {
5532
-
event->pending_work = 0;
5533
-
local_dec(&event->ctx->nr_no_switch_fast);
5534
-
return;
5535
-
}
5536
-
5537
-
/*
5538
-
* All accesses related to the event are within the same RCU section in
5539
-
* perf_pending_task(). The RCU grace period before the event is freed
5540
-
* will make sure all those accesses are complete by then.
5541
-
*/
5542
-
rcuwait_wait_event(&event->pending_work_wait, !event->pending_work, TASK_UNINTERRUPTIBLE);
5543
-
}
5544
-
5545
5521
/* vs perf_event_alloc() error */
5546
5522
static void __free_event(struct perf_event *event)
5547
5523
{
···
5575
5599
{
5576
5600
irq_work_sync(&event->pending_irq);
5577
5601
irq_work_sync(&event->pending_disable_irq);
5578
-
perf_pending_task_sync(event);
5579
5602
5580
5603
unaccount_event(event);
5581
5604
···
5667
5692
5668
5693
static void put_event(struct perf_event *event)
5669
5694
{
5695
+
struct perf_event *parent;
5696
+
5670
5697
if (!atomic_long_dec_and_test(&event->refcount))
5671
5698
return;
5672
5699
5700
+
parent = event->parent;
5673
5701
_free_event(event);
5702
+
5703
+
/* Matches the refcount bump in inherit_event() */
5704
+
if (parent)
5705
+
put_event(parent);
5674
5706
}
5675
5707
5676
5708
/*
···
5761
5779
if (tmp == child) {
5762
5780
perf_remove_from_context(child, DETACH_GROUP);
5763
5781
list_move(&child->child_list, &free_list);
5764
-
/*
5765
-
* This matches the refcount bump in inherit_event();
5766
-
* this can't be the last reference.
5767
-
*/
5768
-
put_event(event);
5769
5782
} else {
5770
5783
var = &ctx->refcount;
5771
5784
}
···
5786
5809
void *var = &child->ctx->refcount;
5787
5810
5788
5811
list_del(&child->child_list);
5789
-
free_event(child);
5812
+
/* Last reference unless ->pending_task work is pending */
5813
+
put_event(child);
5790
5814
5791
5815
/*
5792
5816
* Wake any perf_event_free_task() waiting for this event to be
···
5798
5820
}
5799
5821
5800
5822
no_ctx:
5801
-
put_event(event); /* Must be the 'last' reference */
5823
+
/*
5824
+
* Last reference unless ->pending_task work is pending on this event
5825
+
* or any of its children.
5826
+
*/
5827
+
put_event(event);
5802
5828
return 0;
5803
5829
}
5804
5830
EXPORT_SYMBOL_GPL(perf_event_release_kernel);
···
7218
7236
int rctx;
7219
7237
7220
7238
/*
7221
-
* All accesses to the event must belong to the same implicit RCU read-side
7222
-
* critical section as the ->pending_work reset. See comment in
7223
-
* perf_pending_task_sync().
7224
-
*/
7225
-
rcu_read_lock();
7226
-
/*
7227
7239
* If we 'fail' here, that's OK, it means recursion is already disabled
7228
7240
* and we won't recurse 'further'.
7229
7241
*/
···
7227
7251
event->pending_work = 0;
7228
7252
perf_sigtrap(event);
7229
7253
local_dec(&event->ctx->nr_no_switch_fast);
7230
-
rcuwait_wake_up(&event->pending_work_wait);
7231
7254
}
7232
-
rcu_read_unlock();
7255
+
put_event(event);
7233
7256
7234
7257
if (rctx >= 0)
7235
7258
perf_swevent_put_recursion_context(rctx);
···
10223
10248
!task_work_add(current, &event->pending_task, notify_mode)) {
10224
10249
event->pending_work = pending_id;
10225
10250
local_inc(&event->ctx->nr_no_switch_fast);
10251
+
WARN_ON_ONCE(!atomic_long_inc_not_zero(&event->refcount));
10226
10252
10227
10253
event->pending_addr = 0;
10228
10254
if (valid_sample && (data->sample_flags & PERF_SAMPLE_ADDR))
···
12586
12610
init_irq_work(&event->pending_irq, perf_pending_irq);
12587
12611
event->pending_disable_irq = IRQ_WORK_INIT_HARD(perf_pending_disable);
12588
12612
init_task_work(&event->pending_task, perf_pending_task);
12589
-
rcuwait_init(&event->pending_work_wait);
12590
12613
12591
12614
mutex_init(&event->mmap_mutex);
12592
12615
raw_spin_lock_init(&event->addr_filters.lock);
···
13722
13747
* Kick perf_poll() for is_event_hup();
13723
13748
*/
13724
13749
perf_event_wakeup(parent_event);
13725
-
free_event(event);
13726
-
put_event(parent_event);
13750
+
put_event(event);
13727
13751
return;
13728
13752
}
13729
13753
···
13846
13872
list_del_init(&event->child_list);
13847
13873
mutex_unlock(&parent->child_mutex);
13848
13874
13849
-
put_event(parent);
13850
-
13851
13875
raw_spin_lock_irq(&ctx->lock);
13852
13876
perf_group_detach(event);
13853
13877
list_del_event(event, ctx);
13854
13878
raw_spin_unlock_irq(&ctx->lock);
13855
-
free_event(event);
13879
+
put_event(event);
13856
13880
}
13857
13881
13858
13882
/*
···
13988
14016
if (IS_ERR(child_event))
13989
14017
return child_event;
13990
14018
14019
+
get_ctx(child_ctx);
14020
+
child_event->ctx = child_ctx;
14021
+
13991
14022
pmu_ctx = find_get_pmu_context(child_event->pmu, child_ctx, child_event);
13992
14023
if (IS_ERR(pmu_ctx)) {
13993
14024
free_event(child_event);
···
14012
14037
return NULL;
14013
14038
}
14014
14039
14015
-
get_ctx(child_ctx);
14016
-
14017
14040
/*
14018
14041
* Make the child state follow the state of the parent event,
14019
14042
* not its attr.disabled bit. We hold the parent's mutex,
···
14032
14059
local64_set(&hwc->period_left, sample_period);
14033
14060
}
14034
14061
14035
-
child_event->ctx = child_ctx;
14036
14062
child_event->overflow_handler = parent_event->overflow_handler;
14037
14063
child_event->overflow_handler_context
14038
14064
= parent_event->overflow_handler_context;
+13
-2
kernel/events/uprobes.c
+13
-2
kernel/events/uprobes.c
···
1956
1956
* to-be-reused return instances for future uretprobes. If ri_timer()
1957
1957
* happens to be running right now, though, we fallback to safety and
1958
1958
* just perform RCU-delated freeing of ri.
1959
+
* Admittedly, this is a rather simple use of seqcount, but it nicely
1960
+
* abstracts away all the necessary memory barriers, so we use
1961
+
* a well-supported kernel primitive here.
1959
1962
*/
1960
1963
if (raw_seqcount_try_begin(&utask->ri_seqcount, seq)) {
1961
1964
/* immediate reuse of ri without RCU GP is OK */
···
2019
2016
/* RCU protects return_instance from freeing. */
2020
2017
guard(rcu)();
2021
2018
2022
-
write_seqcount_begin(&utask->ri_seqcount);
2019
+
/*
2020
+
* See free_ret_instance() for notes on seqcount use.
2021
+
* We also employ raw API variants to avoid lockdep false-positive
2022
+
* warning complaining about enabled preemption. The timer can only be
2023
+
* invoked once for a uprobe_task. Therefore there can only be one
2024
+
* writer. The reader does not require an even sequence count to make
2025
+
* progress, so it is OK to remain preemptible on PREEMPT_RT.
2026
+
*/
2027
+
raw_write_seqcount_begin(&utask->ri_seqcount);
2023
2028
2024
2029
for_each_ret_instance_rcu(ri, utask->return_instances)
2025
2030
hprobe_expire(&ri->hprobe, false);
2026
2031
2027
-
write_seqcount_end(&utask->ri_seqcount);
2032
+
raw_write_seqcount_end(&utask->ri_seqcount);
2028
2033
}
2029
2034
2030
2035
static struct uprobe_task *alloc_utask(void)
+1
-1
kernel/time/hrtimer.c
+1
-1
kernel/time/hrtimer.c
+22
kernel/time/tick-common.c
+22
kernel/time/tick-common.c
···
509
509
510
510
#ifdef CONFIG_SUSPEND
511
511
static DEFINE_RAW_SPINLOCK(tick_freeze_lock);
512
+
static DEFINE_WAIT_OVERRIDE_MAP(tick_freeze_map, LD_WAIT_SLEEP);
512
513
static unsigned int tick_freeze_depth;
513
514
514
515
/**
···
529
528
if (tick_freeze_depth == num_online_cpus()) {
530
529
trace_suspend_resume(TPS("timekeeping_freeze"),
531
530
smp_processor_id(), true);
531
+
/*
532
+
* All other CPUs have their interrupts disabled and are
533
+
* suspended to idle. Other tasks have been frozen so there
534
+
* is no scheduling happening. This means that there is no
535
+
* concurrency in the system at this point. Therefore it is
536
+
* okay to acquire a sleeping lock on PREEMPT_RT, such as a
537
+
* spinlock, because the lock cannot be held by other CPUs
538
+
* or threads and acquiring it cannot block.
539
+
*
540
+
* Inform lockdep about the situation.
541
+
*/
542
+
lock_map_acquire_try(&tick_freeze_map);
532
543
system_state = SYSTEM_SUSPEND;
533
544
sched_clock_suspend();
534
545
timekeeping_suspend();
546
+
lock_map_release(&tick_freeze_map);
535
547
} else {
536
548
tick_suspend_local();
537
549
}
···
566
552
raw_spin_lock(&tick_freeze_lock);
567
553
568
554
if (tick_freeze_depth == num_online_cpus()) {
555
+
/*
556
+
* Similar to tick_freeze(). On resumption the first CPU may
557
+
* acquire uncontended sleeping locks while other CPUs block on
558
+
* tick_freeze_lock.
559
+
*/
560
+
lock_map_acquire_try(&tick_freeze_map);
569
561
timekeeping_resume();
570
562
sched_clock_resume();
563
+
lock_map_release(&tick_freeze_map);
564
+
571
565
system_state = SYSTEM_RUNNING;
572
566
trace_suspend_resume(TPS("timekeeping_freeze"),
573
567
smp_processor_id(), false);
+149
-21
kernel/trace/fprobe.c
+149
-21
kernel/trace/fprobe.c
···
89
89
{
90
90
lockdep_assert_held(&fprobe_mutex);
91
91
92
-
WRITE_ONCE(node->fp, NULL);
93
-
hlist_del_rcu(&node->hlist);
92
+
/* Avoid double deleting */
93
+
if (READ_ONCE(node->fp) != NULL) {
94
+
WRITE_ONCE(node->fp, NULL);
95
+
hlist_del_rcu(&node->hlist);
96
+
}
94
97
return !!find_first_fprobe_node(node->addr);
95
98
}
96
99
···
414
411
ftrace_set_filter_ips(&fprobe_graph_ops.ops, addrs, num, 1, 0);
415
412
}
416
413
414
+
#ifdef CONFIG_MODULES
415
+
416
+
#define FPROBE_IPS_BATCH_INIT 8
417
+
/* instruction pointer address list */
418
+
struct fprobe_addr_list {
419
+
int index;
420
+
int size;
421
+
unsigned long *addrs;
422
+
};
423
+
424
+
static int fprobe_addr_list_add(struct fprobe_addr_list *alist, unsigned long addr)
425
+
{
426
+
unsigned long *addrs;
427
+
428
+
if (alist->index >= alist->size)
429
+
return -ENOMEM;
430
+
431
+
alist->addrs[alist->index++] = addr;
432
+
if (alist->index < alist->size)
433
+
return 0;
434
+
435
+
/* Expand the address list */
436
+
addrs = kcalloc(alist->size * 2, sizeof(*addrs), GFP_KERNEL);
437
+
if (!addrs)
438
+
return -ENOMEM;
439
+
440
+
memcpy(addrs, alist->addrs, alist->size * sizeof(*addrs));
441
+
alist->size *= 2;
442
+
kfree(alist->addrs);
443
+
alist->addrs = addrs;
444
+
445
+
return 0;
446
+
}
447
+
448
+
static void fprobe_remove_node_in_module(struct module *mod, struct hlist_head *head,
449
+
struct fprobe_addr_list *alist)
450
+
{
451
+
struct fprobe_hlist_node *node;
452
+
int ret = 0;
453
+
454
+
hlist_for_each_entry_rcu(node, head, hlist) {
455
+
if (!within_module(node->addr, mod))
456
+
continue;
457
+
if (delete_fprobe_node(node))
458
+
continue;
459
+
/*
460
+
* If failed to update alist, just continue to update hlist.
461
+
* Therefore, at list user handler will not hit anymore.
462
+
*/
463
+
if (!ret)
464
+
ret = fprobe_addr_list_add(alist, node->addr);
465
+
}
466
+
}
467
+
468
+
/* Handle module unloading to manage fprobe_ip_table. */
469
+
static int fprobe_module_callback(struct notifier_block *nb,
470
+
unsigned long val, void *data)
471
+
{
472
+
struct fprobe_addr_list alist = {.size = FPROBE_IPS_BATCH_INIT};
473
+
struct module *mod = data;
474
+
int i;
475
+
476
+
if (val != MODULE_STATE_GOING)
477
+
return NOTIFY_DONE;
478
+
479
+
alist.addrs = kcalloc(alist.size, sizeof(*alist.addrs), GFP_KERNEL);
480
+
/* If failed to alloc memory, we can not remove ips from hash. */
481
+
if (!alist.addrs)
482
+
return NOTIFY_DONE;
483
+
484
+
mutex_lock(&fprobe_mutex);
485
+
for (i = 0; i < FPROBE_IP_TABLE_SIZE; i++)
486
+
fprobe_remove_node_in_module(mod, &fprobe_ip_table[i], &alist);
487
+
488
+
if (alist.index < alist.size && alist.index > 0)
489
+
ftrace_set_filter_ips(&fprobe_graph_ops.ops,
490
+
alist.addrs, alist.index, 1, 0);
491
+
mutex_unlock(&fprobe_mutex);
492
+
493
+
kfree(alist.addrs);
494
+
495
+
return NOTIFY_DONE;
496
+
}
497
+
498
+
static struct notifier_block fprobe_module_nb = {
499
+
.notifier_call = fprobe_module_callback,
500
+
.priority = 0,
501
+
};
502
+
503
+
static int __init init_fprobe_module(void)
504
+
{
505
+
return register_module_notifier(&fprobe_module_nb);
506
+
}
507
+
early_initcall(init_fprobe_module);
508
+
#endif
509
+
417
510
static int symbols_cmp(const void *a, const void *b)
418
511
{
419
512
const char **str_a = (const char **) a;
···
544
445
size_t index;
545
446
size_t size;
546
447
unsigned long *addrs;
448
+
struct module **mods;
547
449
};
548
450
549
451
static int filter_match_callback(void *data, const char *name, unsigned long addr)
···
558
458
if (!ftrace_location(addr))
559
459
return 0;
560
460
561
-
if (match->addrs)
562
-
match->addrs[match->index] = addr;
461
+
if (match->addrs) {
462
+
struct module *mod = __module_text_address(addr);
563
463
464
+
if (mod && !try_module_get(mod))
465
+
return 0;
466
+
467
+
match->mods[match->index] = mod;
468
+
match->addrs[match->index] = addr;
469
+
}
564
470
match->index++;
565
471
return match->index == match->size;
566
472
}
567
473
568
474
/*
569
475
* Make IP list from the filter/no-filter glob patterns.
570
-
* Return the number of matched symbols, or -ENOENT.
476
+
* Return the number of matched symbols, or errno.
477
+
* If @addrs == NULL, this just counts the number of matched symbols. If @addrs
478
+
* is passed with an array, we need to pass the an @mods array of the same size
479
+
* to increment the module refcount for each symbol.
480
+
* This means we also need to call `module_put` for each element of @mods after
481
+
* using the @addrs.
571
482
*/
572
-
static int ip_list_from_filter(const char *filter, const char *notfilter,
573
-
unsigned long *addrs, size_t size)
483
+
static int get_ips_from_filter(const char *filter, const char *notfilter,
484
+
unsigned long *addrs, struct module **mods,
485
+
size_t size)
574
486
{
575
487
struct filter_match_data match = { .filter = filter, .notfilter = notfilter,
576
-
.index = 0, .size = size, .addrs = addrs};
488
+
.index = 0, .size = size, .addrs = addrs, .mods = mods};
577
489
int ret;
490
+
491
+
if (addrs && !mods)
492
+
return -EINVAL;
578
493
579
494
ret = kallsyms_on_each_symbol(filter_match_callback, &match);
580
495
if (ret < 0)
581
496
return ret;
582
-
ret = module_kallsyms_on_each_symbol(NULL, filter_match_callback, &match);
583
-
if (ret < 0)
584
-
return ret;
497
+
if (IS_ENABLED(CONFIG_MODULES)) {
498
+
ret = module_kallsyms_on_each_symbol(NULL, filter_match_callback, &match);
499
+
if (ret < 0)
500
+
return ret;
501
+
}
585
502
586
503
return match.index ?: -ENOENT;
587
504
}
···
660
543
*/
661
544
int register_fprobe(struct fprobe *fp, const char *filter, const char *notfilter)
662
545
{
663
-
unsigned long *addrs;
664
-
int ret;
546
+
unsigned long *addrs __free(kfree) = NULL;
547
+
struct module **mods __free(kfree) = NULL;
548
+
int ret, num;
665
549
666
550
if (!fp || !filter)
667
551
return -EINVAL;
668
552
669
-
ret = ip_list_from_filter(filter, notfilter, NULL, FPROBE_IPS_MAX);
553
+
num = get_ips_from_filter(filter, notfilter, NULL, NULL, FPROBE_IPS_MAX);
554
+
if (num < 0)
555
+
return num;
556
+
557
+
addrs = kcalloc(num, sizeof(*addrs), GFP_KERNEL);
558
+
if (!addrs)
559
+
return -ENOMEM;
560
+
561
+
mods = kcalloc(num, sizeof(*mods), GFP_KERNEL);
562
+
if (!mods)
563
+
return -ENOMEM;
564
+
565
+
ret = get_ips_from_filter(filter, notfilter, addrs, mods, num);
670
566
if (ret < 0)
671
567
return ret;
672
568
673
-
addrs = kcalloc(ret, sizeof(unsigned long), GFP_KERNEL);
674
-
if (!addrs)
675
-
return -ENOMEM;
676
-
ret = ip_list_from_filter(filter, notfilter, addrs, ret);
677
-
if (ret > 0)
678
-
ret = register_fprobe_ips(fp, addrs, ret);
569
+
ret = register_fprobe_ips(fp, addrs, ret);
679
570
680
-
kfree(addrs);
571
+
for (int i = 0; i < num; i++) {
572
+
if (mods[i])
573
+
module_put(mods[i]);
574
+
}
681
575
return ret;
682
576
}
683
577
EXPORT_SYMBOL_GPL(register_fprobe);
+177
-137
kernel/trace/ftrace.c
+177
-137
kernel/trace/ftrace.c
···
3256
3256
}
3257
3257
3258
3258
/*
3259
+
* Remove functions from @hash that are in @notrace_hash
3260
+
*/
3261
+
static void remove_hash(struct ftrace_hash *hash, struct ftrace_hash *notrace_hash)
3262
+
{
3263
+
struct ftrace_func_entry *entry;
3264
+
struct hlist_node *tmp;
3265
+
int size;
3266
+
int i;
3267
+
3268
+
/* If the notrace hash is empty, there's nothing to do */
3269
+
if (ftrace_hash_empty(notrace_hash))
3270
+
return;
3271
+
3272
+
size = 1 << hash->size_bits;
3273
+
for (i = 0; i < size; i++) {
3274
+
hlist_for_each_entry_safe(entry, tmp, &hash->buckets[i], hlist) {
3275
+
if (!__ftrace_lookup_ip(notrace_hash, entry->ip))
3276
+
continue;
3277
+
remove_hash_entry(hash, entry);
3278
+
kfree(entry);
3279
+
}
3280
+
}
3281
+
}
3282
+
3283
+
/*
3259
3284
* Add to @hash only those that are in both @new_hash1 and @new_hash2
3260
3285
*
3261
3286
* The notrace_hash updates uses just the intersect_hash() function
···
3318
3293
*hash = EMPTY_HASH;
3319
3294
}
3320
3295
return 0;
3321
-
}
3322
-
3323
-
/* Return a new hash that has a union of all @ops->filter_hash entries */
3324
-
static struct ftrace_hash *append_hashes(struct ftrace_ops *ops)
3325
-
{
3326
-
struct ftrace_hash *new_hash = NULL;
3327
-
struct ftrace_ops *subops;
3328
-
int size_bits;
3329
-
int ret;
3330
-
3331
-
if (ops->func_hash->filter_hash)
3332
-
size_bits = ops->func_hash->filter_hash->size_bits;
3333
-
else
3334
-
size_bits = FTRACE_HASH_DEFAULT_BITS;
3335
-
3336
-
list_for_each_entry(subops, &ops->subop_list, list) {
3337
-
ret = append_hash(&new_hash, subops->func_hash->filter_hash, size_bits);
3338
-
if (ret < 0) {
3339
-
free_ftrace_hash(new_hash);
3340
-
return NULL;
3341
-
}
3342
-
/* Nothing more to do if new_hash is empty */
3343
-
if (ftrace_hash_empty(new_hash))
3344
-
break;
3345
-
}
3346
-
/* Can't return NULL as that means this failed */
3347
-
return new_hash ? : EMPTY_HASH;
3348
-
}
3349
-
3350
-
/* Make @ops trace evenything except what all its subops do not trace */
3351
-
static struct ftrace_hash *intersect_hashes(struct ftrace_ops *ops)
3352
-
{
3353
-
struct ftrace_hash *new_hash = NULL;
3354
-
struct ftrace_ops *subops;
3355
-
int size_bits;
3356
-
int ret;
3357
-
3358
-
list_for_each_entry(subops, &ops->subop_list, list) {
3359
-
struct ftrace_hash *next_hash;
3360
-
3361
-
if (!new_hash) {
3362
-
size_bits = subops->func_hash->notrace_hash->size_bits;
3363
-
new_hash = alloc_and_copy_ftrace_hash(size_bits, ops->func_hash->notrace_hash);
3364
-
if (!new_hash)
3365
-
return NULL;
3366
-
continue;
3367
-
}
3368
-
size_bits = new_hash->size_bits;
3369
-
next_hash = new_hash;
3370
-
new_hash = alloc_ftrace_hash(size_bits);
3371
-
ret = intersect_hash(&new_hash, next_hash, subops->func_hash->notrace_hash);
3372
-
free_ftrace_hash(next_hash);
3373
-
if (ret < 0) {
3374
-
free_ftrace_hash(new_hash);
3375
-
return NULL;
3376
-
}
3377
-
/* Nothing more to do if new_hash is empty */
3378
-
if (ftrace_hash_empty(new_hash))
3379
-
break;
3380
-
}
3381
-
return new_hash;
3382
3296
}
3383
3297
3384
3298
static bool ops_equal(struct ftrace_hash *A, struct ftrace_hash *B)
···
3391
3427
return 0;
3392
3428
}
3393
3429
3430
+
static int add_first_hash(struct ftrace_hash **filter_hash, struct ftrace_hash **notrace_hash,
3431
+
struct ftrace_ops_hash *func_hash)
3432
+
{
3433
+
/* If the filter hash is not empty, simply remove the nohash from it */
3434
+
if (!ftrace_hash_empty(func_hash->filter_hash)) {
3435
+
*filter_hash = copy_hash(func_hash->filter_hash);
3436
+
if (!*filter_hash)
3437
+
return -ENOMEM;
3438
+
remove_hash(*filter_hash, func_hash->notrace_hash);
3439
+
*notrace_hash = EMPTY_HASH;
3440
+
3441
+
} else {
3442
+
*notrace_hash = copy_hash(func_hash->notrace_hash);
3443
+
if (!*notrace_hash)
3444
+
return -ENOMEM;
3445
+
*filter_hash = EMPTY_HASH;
3446
+
}
3447
+
return 0;
3448
+
}
3449
+
3450
+
static int add_next_hash(struct ftrace_hash **filter_hash, struct ftrace_hash **notrace_hash,
3451
+
struct ftrace_ops_hash *ops_hash, struct ftrace_ops_hash *subops_hash)
3452
+
{
3453
+
int size_bits;
3454
+
int ret;
3455
+
3456
+
/* If the subops trace all functions so must the main ops */
3457
+
if (ftrace_hash_empty(ops_hash->filter_hash) ||
3458
+
ftrace_hash_empty(subops_hash->filter_hash)) {
3459
+
*filter_hash = EMPTY_HASH;
3460
+
} else {
3461
+
/*
3462
+
* The main ops filter hash is not empty, so its
3463
+
* notrace_hash had better be, as the notrace hash
3464
+
* is only used for empty main filter hashes.
3465
+
*/
3466
+
WARN_ON_ONCE(!ftrace_hash_empty(ops_hash->notrace_hash));
3467
+
3468
+
size_bits = max(ops_hash->filter_hash->size_bits,
3469
+
subops_hash->filter_hash->size_bits);
3470
+
3471
+
/* Copy the subops hash */
3472
+
*filter_hash = alloc_and_copy_ftrace_hash(size_bits, subops_hash->filter_hash);
3473
+
if (!filter_hash)
3474
+
return -ENOMEM;
3475
+
/* Remove any notrace functions from the copy */
3476
+
remove_hash(*filter_hash, subops_hash->notrace_hash);
3477
+
3478
+
ret = append_hash(filter_hash, ops_hash->filter_hash,
3479
+
size_bits);
3480
+
if (ret < 0) {
3481
+
free_ftrace_hash(*filter_hash);
3482
+
return ret;
3483
+
}
3484
+
}
3485
+
3486
+
/*
3487
+
* Only process notrace hashes if the main filter hash is empty
3488
+
* (tracing all functions), otherwise the filter hash will just
3489
+
* remove the notrace hash functions, and the notrace hash is
3490
+
* not needed.
3491
+
*/
3492
+
if (ftrace_hash_empty(*filter_hash)) {
3493
+
/*
3494
+
* Intersect the notrace functions. That is, if two
3495
+
* subops are not tracing a set of functions, the
3496
+
* main ops will only not trace the functions that are
3497
+
* in both subops, but has to trace the functions that
3498
+
* are only notrace in one of the subops, for the other
3499
+
* subops to be able to trace them.
3500
+
*/
3501
+
size_bits = max(ops_hash->notrace_hash->size_bits,
3502
+
subops_hash->notrace_hash->size_bits);
3503
+
*notrace_hash = alloc_ftrace_hash(size_bits);
3504
+
if (!*notrace_hash)
3505
+
return -ENOMEM;
3506
+
3507
+
ret = intersect_hash(notrace_hash, ops_hash->notrace_hash,
3508
+
subops_hash->notrace_hash);
3509
+
if (ret < 0) {
3510
+
free_ftrace_hash(*notrace_hash);
3511
+
return ret;
3512
+
}
3513
+
}
3514
+
return 0;
3515
+
}
3516
+
3394
3517
/**
3395
3518
* ftrace_startup_subops - enable tracing for subops of an ops
3396
3519
* @ops: Manager ops (used to pick all the functions of its subops)
···
3494
3443
struct ftrace_hash *notrace_hash;
3495
3444
struct ftrace_hash *save_filter_hash;
3496
3445
struct ftrace_hash *save_notrace_hash;
3497
-
int size_bits;
3498
3446
int ret;
3499
3447
3500
3448
if (unlikely(ftrace_disabled))
···
3517
3467
3518
3468
/* For the first subops to ops just enable it normally */
3519
3469
if (list_empty(&ops->subop_list)) {
3520
-
/* Just use the subops hashes */
3521
-
filter_hash = copy_hash(subops->func_hash->filter_hash);
3522
-
notrace_hash = copy_hash(subops->func_hash->notrace_hash);
3523
-
if (!filter_hash || !notrace_hash) {
3524
-
free_ftrace_hash(filter_hash);
3525
-
free_ftrace_hash(notrace_hash);
3526
-
return -ENOMEM;
3527
-
}
3470
+
3471
+
/* The ops was empty, should have empty hashes */
3472
+
WARN_ON_ONCE(!ftrace_hash_empty(ops->func_hash->filter_hash));
3473
+
WARN_ON_ONCE(!ftrace_hash_empty(ops->func_hash->notrace_hash));
3474
+
3475
+
ret = add_first_hash(&filter_hash, ¬race_hash, subops->func_hash);
3476
+
if (ret < 0)
3477
+
return ret;
3528
3478
3529
3479
save_filter_hash = ops->func_hash->filter_hash;
3530
3480
save_notrace_hash = ops->func_hash->notrace_hash;
···
3550
3500
3551
3501
/*
3552
3502
* Here there's already something attached. Here are the rules:
3553
-
* o If either filter_hash is empty then the final stays empty
3554
-
* o Otherwise, the final is a superset of both hashes
3555
-
* o If either notrace_hash is empty then the final stays empty
3556
-
* o Otherwise, the final is an intersection between the hashes
3503
+
* If the new subops and main ops filter hashes are not empty:
3504
+
* o Make a copy of the subops filter hash
3505
+
* o Remove all functions in the nohash from it.
3506
+
* o Add in the main hash filter functions
3507
+
* o Remove any of these functions from the main notrace hash
3557
3508
*/
3558
-
if (ftrace_hash_empty(ops->func_hash->filter_hash) ||
3559
-
ftrace_hash_empty(subops->func_hash->filter_hash)) {
3560
-
filter_hash = EMPTY_HASH;
3561
-
} else {
3562
-
size_bits = max(ops->func_hash->filter_hash->size_bits,
3563
-
subops->func_hash->filter_hash->size_bits);
3564
-
filter_hash = alloc_and_copy_ftrace_hash(size_bits, ops->func_hash->filter_hash);
3565
-
if (!filter_hash)
3566
-
return -ENOMEM;
3567
-
ret = append_hash(&filter_hash, subops->func_hash->filter_hash,
3568
-
size_bits);
3569
-
if (ret < 0) {
3570
-
free_ftrace_hash(filter_hash);
3571
-
return ret;
3572
-
}
3573
-
}
3574
3509
3575
-
if (ftrace_hash_empty(ops->func_hash->notrace_hash) ||
3576
-
ftrace_hash_empty(subops->func_hash->notrace_hash)) {
3577
-
notrace_hash = EMPTY_HASH;
3578
-
} else {
3579
-
size_bits = max(ops->func_hash->filter_hash->size_bits,
3580
-
subops->func_hash->filter_hash->size_bits);
3581
-
notrace_hash = alloc_ftrace_hash(size_bits);
3582
-
if (!notrace_hash) {
3583
-
free_ftrace_hash(filter_hash);
3584
-
return -ENOMEM;
3585
-
}
3586
-
3587
-
ret = intersect_hash(¬race_hash, ops->func_hash->filter_hash,
3588
-
subops->func_hash->filter_hash);
3589
-
if (ret < 0) {
3590
-
free_ftrace_hash(filter_hash);
3591
-
free_ftrace_hash(notrace_hash);
3592
-
return ret;
3593
-
}
3594
-
}
3510
+
ret = add_next_hash(&filter_hash, ¬race_hash, ops->func_hash, subops->func_hash);
3511
+
if (ret < 0)
3512
+
return ret;
3595
3513
3596
3514
list_add(&subops->list, &ops->subop_list);
3597
3515
···
3573
3555
subops->managed = ops;
3574
3556
}
3575
3557
return ret;
3558
+
}
3559
+
3560
+
static int rebuild_hashes(struct ftrace_hash **filter_hash, struct ftrace_hash **notrace_hash,
3561
+
struct ftrace_ops *ops)
3562
+
{
3563
+
struct ftrace_ops_hash temp_hash;
3564
+
struct ftrace_ops *subops;
3565
+
bool first = true;
3566
+
int ret;
3567
+
3568
+
temp_hash.filter_hash = EMPTY_HASH;
3569
+
temp_hash.notrace_hash = EMPTY_HASH;
3570
+
3571
+
list_for_each_entry(subops, &ops->subop_list, list) {
3572
+
*filter_hash = EMPTY_HASH;
3573
+
*notrace_hash = EMPTY_HASH;
3574
+
3575
+
if (first) {
3576
+
ret = add_first_hash(filter_hash, notrace_hash, subops->func_hash);
3577
+
if (ret < 0)
3578
+
return ret;
3579
+
first = false;
3580
+
} else {
3581
+
ret = add_next_hash(filter_hash, notrace_hash,
3582
+
&temp_hash, subops->func_hash);
3583
+
if (ret < 0) {
3584
+
free_ftrace_hash(temp_hash.filter_hash);
3585
+
free_ftrace_hash(temp_hash.notrace_hash);
3586
+
return ret;
3587
+
}
3588
+
}
3589
+
3590
+
temp_hash.filter_hash = *filter_hash;
3591
+
temp_hash.notrace_hash = *notrace_hash;
3592
+
}
3593
+
return 0;
3576
3594
}
3577
3595
3578
3596
/**
···
3659
3605
}
3660
3606
3661
3607
/* Rebuild the hashes without subops */
3662
-
filter_hash = append_hashes(ops);
3663
-
notrace_hash = intersect_hashes(ops);
3664
-
if (!filter_hash || !notrace_hash) {
3665
-
free_ftrace_hash(filter_hash);
3666
-
free_ftrace_hash(notrace_hash);
3667
-
list_add(&subops->list, &ops->subop_list);
3668
-
return -ENOMEM;
3669
-
}
3608
+
ret = rebuild_hashes(&filter_hash, ¬race_hash, ops);
3609
+
if (ret < 0)
3610
+
return ret;
3670
3611
3671
3612
ret = ftrace_update_ops(ops, filter_hash, notrace_hash);
3672
3613
if (ret < 0) {
···
3677
3628
3678
3629
static int ftrace_hash_move_and_update_subops(struct ftrace_ops *subops,
3679
3630
struct ftrace_hash **orig_subhash,
3680
-
struct ftrace_hash *hash,
3681
-
int enable)
3631
+
struct ftrace_hash *hash)
3682
3632
{
3683
3633
struct ftrace_ops *ops = subops->managed;
3684
-
struct ftrace_hash **orig_hash;
3634
+
struct ftrace_hash *notrace_hash;
3635
+
struct ftrace_hash *filter_hash;
3685
3636
struct ftrace_hash *save_hash;
3686
3637
struct ftrace_hash *new_hash;
3687
3638
int ret;
···
3698
3649
return -ENOMEM;
3699
3650
}
3700
3651
3701
-
/* Create a new_hash to hold the ops new functions */
3702
-
if (enable) {
3703
-
orig_hash = &ops->func_hash->filter_hash;
3704
-
new_hash = append_hashes(ops);
3705
-
} else {
3706
-
orig_hash = &ops->func_hash->notrace_hash;
3707
-
new_hash = intersect_hashes(ops);
3708
-
}
3709
-
3710
-
/* Move the hash over to the new hash */
3711
-
ret = __ftrace_hash_move_and_update_ops(ops, orig_hash, new_hash, enable);
3712
-
3713
-
free_ftrace_hash(new_hash);
3652
+
ret = rebuild_hashes(&filter_hash, ¬race_hash, ops);
3653
+
if (!ret)
3654
+
ret = ftrace_update_ops(ops, filter_hash, notrace_hash);
3714
3655
3715
3656
if (ret) {
3716
3657
/* Put back the original hash */
3717
-
free_ftrace_hash_rcu(*orig_subhash);
3658
+
new_hash = *orig_subhash;
3718
3659
*orig_subhash = save_hash;
3660
+
free_ftrace_hash_rcu(new_hash);
3719
3661
} else {
3720
3662
free_ftrace_hash_rcu(save_hash);
3721
3663
}
···
4930
4890
int enable)
4931
4891
{
4932
4892
if (ops->flags & FTRACE_OPS_FL_SUBOP)
4933
-
return ftrace_hash_move_and_update_subops(ops, orig_hash, hash, enable);
4893
+
return ftrace_hash_move_and_update_subops(ops, orig_hash, hash);
4934
4894
4935
4895
/*
4936
4896
* If this ops is not enabled, it could be sharing its filters
···
4949
4909
list_for_each_entry(subops, &op->subop_list, list) {
4950
4910
if ((subops->flags & FTRACE_OPS_FL_ENABLED) &&
4951
4911
subops->func_hash == ops->func_hash) {
4952
-
return ftrace_hash_move_and_update_subops(subops, orig_hash, hash, enable);
4912
+
return ftrace_hash_move_and_update_subops(subops, orig_hash, hash);
4953
4913
}
4954
4914
}
4955
4915
} while_for_each_ftrace_op(op);
+6
-1
kernel/trace/rv/rv.c
+6
-1
kernel/trace/rv/rv.c
···
225
225
*/
226
226
bool rv_is_container_monitor(struct rv_monitor_def *mdef)
227
227
{
228
-
struct rv_monitor_def *next = list_next_entry(mdef, list);
228
+
struct rv_monitor_def *next;
229
+
230
+
if (list_is_last(&mdef->list, &rv_monitors_list))
231
+
return false;
232
+
233
+
next = list_next_entry(mdef, list);
229
234
230
235
return next->parent == mdef->monitor || !mdef->monitor->enable;
231
236
}
+7
kernel/trace/trace.c
+7
kernel/trace/trace.c
···
9806
9806
return ret;
9807
9807
}
9808
9808
9809
+
#ifdef CONFIG_MMU
9809
9810
static u64 map_pages(unsigned long start, unsigned long size)
9810
9811
{
9811
9812
unsigned long vmap_start, vmap_end;
···
9829
9828
9830
9829
return (u64)vmap_start;
9831
9830
}
9831
+
#else
9832
+
static inline u64 map_pages(unsigned long start, unsigned long size)
9833
+
{
9834
+
return 0;
9835
+
}
9836
+
#endif
9832
9837
9833
9838
/**
9834
9839
* trace_array_get_by_name - Create/Lookup a trace array, given its name.
-1
kernel/trace/trace_events_synth.c
-1
kernel/trace/trace_events_synth.c
+17
-9
kernel/trace/trace_fprobe.c
+17
-9
kernel/trace/trace_fprobe.c
···
919
919
struct __find_tracepoint_cb_data *data = priv;
920
920
921
921
if (!data->tpoint && !strcmp(data->tp_name, tp->name)) {
922
-
data->tpoint = tp;
923
-
if (!data->mod)
922
+
/* If module is not specified, try getting module refcount. */
923
+
if (!data->mod && mod) {
924
+
/* If failed to get refcount, ignore this tracepoint. */
925
+
if (!try_module_get(mod))
926
+
return;
927
+
924
928
data->mod = mod;
929
+
}
930
+
data->tpoint = tp;
925
931
}
926
932
}
927
933
···
939
933
data->tpoint = tp;
940
934
}
941
935
942
-
/* Find a tracepoint from kernel and module. */
936
+
/*
937
+
* Find a tracepoint from kernel and module. If the tracepoint is on the module,
938
+
* the module's refcount is incremented and returned as *@tp_mod. Thus, if it is
939
+
* not NULL, caller must call module_put(*tp_mod) after used the tracepoint.
940
+
*/
943
941
static struct tracepoint *find_tracepoint(const char *tp_name,
944
942
struct module **tp_mod)
945
943
{
···
972
962
}
973
963
}
974
964
975
-
/* Find a tracepoint from specified module. */
965
+
/*
966
+
* Find a tracepoint from specified module. In this case, this does not get the
967
+
* module's refcount. The caller must ensure the module is not freed.
968
+
*/
976
969
static struct tracepoint *find_tracepoint_in_module(struct module *mod,
977
970
const char *tp_name)
978
971
{
···
1182
1169
if (is_tracepoint) {
1183
1170
ctx->flags |= TPARG_FL_TPOINT;
1184
1171
tpoint = find_tracepoint(symbol, &tp_mod);
1185
-
/* lock module until register this tprobe. */
1186
-
if (tp_mod && !try_module_get(tp_mod)) {
1187
-
tpoint = NULL;
1188
-
tp_mod = NULL;
1189
-
}
1190
1172
if (tpoint) {
1191
1173
ctx->funcname = kallsyms_lookup(
1192
1174
(unsigned long)tpoint->probestub,
+5
-6
kernel/trace/trace_functions_graph.c
+5
-6
kernel/trace/trace_functions_graph.c
···
880
880
881
881
if (print_retval || print_retaddr)
882
882
trace_seq_puts(s, " /*");
883
-
else
884
-
trace_seq_putc(s, '\n');
885
883
} else {
886
884
print_retaddr = false;
887
885
trace_seq_printf(s, "} /* %ps", func);
···
897
899
}
898
900
899
901
if (!entry || print_retval || print_retaddr)
900
-
trace_seq_puts(s, " */\n");
902
+
trace_seq_puts(s, " */");
901
903
}
902
904
903
905
#else
···
973
975
} else
974
976
trace_seq_puts(s, "();");
975
977
}
976
-
trace_seq_printf(s, "\n");
978
+
trace_seq_putc(s, '\n');
977
979
978
980
print_graph_irq(iter, graph_ret->func, TRACE_GRAPH_RET,
979
981
cpu, iter->ent->pid, flags);
···
1311
1313
* that if the funcgraph-tail option is enabled.
1312
1314
*/
1313
1315
if (func_match && !(flags & TRACE_GRAPH_PRINT_TAIL))
1314
-
trace_seq_puts(s, "}\n");
1316
+
trace_seq_puts(s, "}");
1315
1317
else
1316
-
trace_seq_printf(s, "} /* %ps */\n", (void *)func);
1318
+
trace_seq_printf(s, "} /* %ps */", (void *)func);
1317
1319
}
1320
+
trace_seq_putc(s, '\n');
1318
1321
1319
1322
/* Overrun */
1320
1323
if (flags & TRACE_GRAPH_PRINT_OVERRUN)
+26
-31
lib/Kconfig
+26
-31
lib/Kconfig
···
139
139
source "lib/crypto/Kconfig"
140
140
141
141
config CRC_CCITT
142
-
tristate "CRC-CCITT functions"
142
+
tristate
143
143
help
144
-
This option is provided for the case where no in-kernel-tree
145
-
modules require CRC-CCITT functions, but a module built outside
146
-
the kernel tree does. Such modules that use library CRC-CCITT
147
-
functions require M here.
144
+
The CRC-CCITT library functions. Select this if your module uses any
145
+
of the functions from <linux/crc-ccitt.h>.
148
146
149
147
config CRC16
150
-
tristate "CRC16 functions"
148
+
tristate
151
149
help
152
-
This option is provided for the case where no in-kernel-tree
153
-
modules require CRC16 functions, but a module built outside
154
-
the kernel tree does. Such modules that use library CRC16
155
-
functions require M here.
150
+
The CRC16 library functions. Select this if your module uses any of
151
+
the functions from <linux/crc16.h>.
156
152
157
153
config CRC_T10DIF
158
-
tristate "CRC calculation for the T10 Data Integrity Field"
154
+
tristate
159
155
help
160
-
This option is only needed if a module that's not in the
161
-
kernel tree needs to calculate CRC checks for use with the
162
-
SCSI data integrity subsystem.
156
+
The CRC-T10DIF library functions. Select this if your module uses
157
+
any of the functions from <linux/crc-t10dif.h>.
163
158
164
159
config ARCH_HAS_CRC_T10DIF
165
160
bool
···
164
169
default CRC_T10DIF if ARCH_HAS_CRC_T10DIF && CRC_OPTIMIZATIONS
165
170
166
171
config CRC_ITU_T
167
-
tristate "CRC ITU-T V.41 functions"
172
+
tristate
168
173
help
169
-
This option is provided for the case where no in-kernel-tree
170
-
modules require CRC ITU-T V.41 functions, but a module built outside
171
-
the kernel tree does. Such modules that use library CRC ITU-T V.41
172
-
functions require M here.
174
+
The CRC-ITU-T library functions. Select this if your module uses
175
+
any of the functions from <linux/crc-itu-t.h>.
173
176
174
177
config CRC32
175
-
tristate "CRC32/CRC32c functions"
176
-
default y
178
+
tristate
177
179
select BITREVERSE
178
180
help
179
-
This option is provided for the case where no in-kernel-tree
180
-
modules require CRC32/CRC32c functions, but a module built outside
181
-
the kernel tree does. Such modules that use library CRC32/CRC32c
182
-
functions require M here.
181
+
The CRC32 library functions. Select this if your module uses any of
182
+
the functions from <linux/crc32.h> or <linux/crc32c.h>.
183
183
184
184
config ARCH_HAS_CRC32
185
185
bool
···
185
195
186
196
config CRC64
187
197
tristate
198
+
help
199
+
The CRC64 library functions. Select this if your module uses any of
200
+
the functions from <linux/crc64.h>.
188
201
189
202
config ARCH_HAS_CRC64
190
203
bool
···
198
205
199
206
config CRC4
200
207
tristate
208
+
help
209
+
The CRC4 library functions. Select this if your module uses any of
210
+
the functions from <linux/crc4.h>.
201
211
202
212
config CRC7
203
213
tristate
204
-
205
-
config LIBCRC32C
206
-
tristate
207
-
select CRC32
208
214
help
209
-
This option just selects CRC32 and is provided for compatibility
210
-
purposes until the users are updated to select CRC32 directly.
215
+
The CRC7 library functions. Select this if your module uses any of
216
+
the functions from <linux/crc7.h>.
211
217
212
218
config CRC8
213
219
tristate
220
+
help
221
+
The CRC8 library functions. Select this if your module uses any of
222
+
the functions from <linux/crc8.h>.
214
223
215
224
config CRC_OPTIMIZATIONS
216
225
bool "Enable optimized CRC implementations" if EXPERT
+1
-1
net/batman-adv/Kconfig
+1
-1
net/batman-adv/Kconfig
+1
-1
net/ceph/Kconfig
+1
-1
net/ceph/Kconfig
+1
-10
net/core/dev.c
+1
-10
net/core/dev.c
···
1518
1518
}
1519
1519
EXPORT_SYMBOL(netdev_features_change);
1520
1520
1521
-
/**
1522
-
* netdev_state_change - device changes state
1523
-
* @dev: device to cause notification
1524
-
*
1525
-
* Called to indicate a device has changed state. This function calls
1526
-
* the notifier chains for netdev_chain and sends a NEWLINK message
1527
-
* to the routing socket.
1528
-
*/
1529
-
void netdev_state_change(struct net_device *dev)
1521
+
void netif_state_change(struct net_device *dev)
1530
1522
{
1531
1523
if (dev->flags & IFF_UP) {
1532
1524
struct netdev_notifier_change_info change_info = {
···
1530
1538
rtmsg_ifinfo(RTM_NEWLINK, dev, 0, GFP_KERNEL, 0, NULL);
1531
1539
}
1532
1540
}
1533
-
EXPORT_SYMBOL(netdev_state_change);
1534
1541
1535
1542
/**
1536
1543
* __netdev_notify_peers - notify network peers about existence of @dev,
+16
net/core/dev_api.c
+16
net/core/dev_api.c
···
327
327
return ret;
328
328
}
329
329
EXPORT_SYMBOL_GPL(dev_xdp_propagate);
330
+
331
+
/**
332
+
* netdev_state_change() - device changes state
333
+
* @dev: device to cause notification
334
+
*
335
+
* Called to indicate a device has changed state. This function calls
336
+
* the notifier chains for netdev_chain and sends a NEWLINK message
337
+
* to the routing socket.
338
+
*/
339
+
void netdev_state_change(struct net_device *dev)
340
+
{
341
+
netdev_lock_ops(dev);
342
+
netif_state_change(dev);
343
+
netdev_unlock_ops(dev);
344
+
}
345
+
EXPORT_SYMBOL(netdev_state_change);
+44
-36
net/core/filter.c
+44
-36
net/core/filter.c
···
218
218
return 0;
219
219
}
220
220
221
+
static int bpf_skb_load_helper_convert_offset(const struct sk_buff *skb, int offset)
222
+
{
223
+
if (likely(offset >= 0))
224
+
return offset;
225
+
226
+
if (offset >= SKF_NET_OFF)
227
+
return offset - SKF_NET_OFF + skb_network_offset(skb);
228
+
229
+
if (offset >= SKF_LL_OFF && skb_mac_header_was_set(skb))
230
+
return offset - SKF_LL_OFF + skb_mac_offset(skb);
231
+
232
+
return INT_MIN;
233
+
}
234
+
221
235
BPF_CALL_4(bpf_skb_load_helper_8, const struct sk_buff *, skb, const void *,
222
236
data, int, headlen, int, offset)
223
237
{
224
-
u8 tmp, *ptr;
238
+
u8 tmp;
225
239
const int len = sizeof(tmp);
226
240
227
-
if (offset >= 0) {
228
-
if (headlen - offset >= len)
229
-
return *(u8 *)(data + offset);
230
-
if (!skb_copy_bits(skb, offset, &tmp, sizeof(tmp)))
231
-
return tmp;
232
-
} else {
233
-
ptr = bpf_internal_load_pointer_neg_helper(skb, offset, len);
234
-
if (likely(ptr))
235
-
return *(u8 *)ptr;
236
-
}
241
+
offset = bpf_skb_load_helper_convert_offset(skb, offset);
242
+
if (offset == INT_MIN)
243
+
return -EFAULT;
237
244
238
-
return -EFAULT;
245
+
if (headlen - offset >= len)
246
+
return *(u8 *)(data + offset);
247
+
if (!skb_copy_bits(skb, offset, &tmp, sizeof(tmp)))
248
+
return tmp;
249
+
else
250
+
return -EFAULT;
239
251
}
240
252
241
253
BPF_CALL_2(bpf_skb_load_helper_8_no_cache, const struct sk_buff *, skb,
···
260
248
BPF_CALL_4(bpf_skb_load_helper_16, const struct sk_buff *, skb, const void *,
261
249
data, int, headlen, int, offset)
262
250
{
263
-
__be16 tmp, *ptr;
251
+
__be16 tmp;
264
252
const int len = sizeof(tmp);
265
253
266
-
if (offset >= 0) {
267
-
if (headlen - offset >= len)
268
-
return get_unaligned_be16(data + offset);
269
-
if (!skb_copy_bits(skb, offset, &tmp, sizeof(tmp)))
270
-
return be16_to_cpu(tmp);
271
-
} else {
272
-
ptr = bpf_internal_load_pointer_neg_helper(skb, offset, len);
273
-
if (likely(ptr))
274
-
return get_unaligned_be16(ptr);
275
-
}
254
+
offset = bpf_skb_load_helper_convert_offset(skb, offset);
255
+
if (offset == INT_MIN)
256
+
return -EFAULT;
276
257
277
-
return -EFAULT;
258
+
if (headlen - offset >= len)
259
+
return get_unaligned_be16(data + offset);
260
+
if (!skb_copy_bits(skb, offset, &tmp, sizeof(tmp)))
261
+
return be16_to_cpu(tmp);
262
+
else
263
+
return -EFAULT;
278
264
}
279
265
280
266
BPF_CALL_2(bpf_skb_load_helper_16_no_cache, const struct sk_buff *, skb,
···
285
275
BPF_CALL_4(bpf_skb_load_helper_32, const struct sk_buff *, skb, const void *,
286
276
data, int, headlen, int, offset)
287
277
{
288
-
__be32 tmp, *ptr;
278
+
__be32 tmp;
289
279
const int len = sizeof(tmp);
290
280
291
-
if (likely(offset >= 0)) {
292
-
if (headlen - offset >= len)
293
-
return get_unaligned_be32(data + offset);
294
-
if (!skb_copy_bits(skb, offset, &tmp, sizeof(tmp)))
295
-
return be32_to_cpu(tmp);
296
-
} else {
297
-
ptr = bpf_internal_load_pointer_neg_helper(skb, offset, len);
298
-
if (likely(ptr))
299
-
return get_unaligned_be32(ptr);
300
-
}
281
+
offset = bpf_skb_load_helper_convert_offset(skb, offset);
282
+
if (offset == INT_MIN)
283
+
return -EFAULT;
301
284
302
-
return -EFAULT;
285
+
if (headlen - offset >= len)
286
+
return get_unaligned_be32(data + offset);
287
+
if (!skb_copy_bits(skb, offset, &tmp, sizeof(tmp)))
288
+
return be32_to_cpu(tmp);
289
+
else
290
+
return -EFAULT;
303
291
}
304
292
305
293
BPF_CALL_2(bpf_skb_load_helper_32_no_cache, const struct sk_buff *, skb,
+23
-5
net/core/link_watch.c
+23
-5
net/core/link_watch.c
···
183
183
else
184
184
dev_deactivate(dev);
185
185
186
-
netdev_state_change(dev);
186
+
netif_state_change(dev);
187
187
}
188
188
/* Note: our callers are responsible for calling netdev_tracker_free().
189
189
* This is the reason we use __dev_put() instead of dev_put().
···
240
240
*/
241
241
netdev_tracker_free(dev, &dev->linkwatch_dev_tracker);
242
242
spin_unlock_irq(&lweventlist_lock);
243
+
netdev_lock_ops(dev);
243
244
linkwatch_do_dev(dev);
245
+
netdev_unlock_ops(dev);
244
246
do_dev--;
245
247
spin_lock_irq(&lweventlist_lock);
246
248
}
···
255
253
spin_unlock_irq(&lweventlist_lock);
256
254
}
257
255
258
-
void linkwatch_sync_dev(struct net_device *dev)
256
+
static bool linkwatch_clean_dev(struct net_device *dev)
259
257
{
260
258
unsigned long flags;
261
-
int clean = 0;
259
+
bool clean = false;
262
260
263
261
spin_lock_irqsave(&lweventlist_lock, flags);
264
262
if (!list_empty(&dev->link_watch_list)) {
265
263
list_del_init(&dev->link_watch_list);
266
-
clean = 1;
264
+
clean = true;
267
265
/* We must release netdev tracker under
268
266
* the spinlock protection.
269
267
*/
270
268
netdev_tracker_free(dev, &dev->linkwatch_dev_tracker);
271
269
}
272
270
spin_unlock_irqrestore(&lweventlist_lock, flags);
273
-
if (clean)
271
+
272
+
return clean;
273
+
}
274
+
275
+
void __linkwatch_sync_dev(struct net_device *dev)
276
+
{
277
+
netdev_ops_assert_locked(dev);
278
+
279
+
if (linkwatch_clean_dev(dev))
274
280
linkwatch_do_dev(dev);
275
281
}
276
282
283
+
void linkwatch_sync_dev(struct net_device *dev)
284
+
{
285
+
if (linkwatch_clean_dev(dev)) {
286
+
netdev_lock_ops(dev);
287
+
linkwatch_do_dev(dev);
288
+
netdev_unlock_ops(dev);
289
+
}
290
+
}
277
291
278
292
/* Must be called with the rtnl semaphore held */
279
293
void linkwatch_run_queue(void)
+1
-1
net/core/lock_debug.c
+1
-1
net/core/lock_debug.c
···
20
20
switch (cmd) {
21
21
case NETDEV_REGISTER:
22
22
case NETDEV_UP:
23
+
case NETDEV_CHANGE:
23
24
netdev_ops_assert_locked(dev);
24
25
fallthrough;
25
26
case NETDEV_DOWN:
26
27
case NETDEV_REBOOT:
27
-
case NETDEV_CHANGE:
28
28
case NETDEV_UNREGISTER:
29
29
case NETDEV_CHANGEMTU:
30
30
case NETDEV_CHANGEADDR:
+10
-7
net/core/rtnetlink.c
+10
-7
net/core/rtnetlink.c
···
1043
1043
}
1044
1044
EXPORT_SYMBOL_GPL(rtnl_put_cacheinfo);
1045
1045
1046
-
void netdev_set_operstate(struct net_device *dev, int newstate)
1046
+
void netif_set_operstate(struct net_device *dev, int newstate)
1047
1047
{
1048
1048
unsigned int old = READ_ONCE(dev->operstate);
1049
1049
···
1052
1052
return;
1053
1053
} while (!try_cmpxchg(&dev->operstate, &old, newstate));
1054
1054
1055
-
netdev_state_change(dev);
1055
+
netif_state_change(dev);
1056
1056
}
1057
-
EXPORT_SYMBOL(netdev_set_operstate);
1057
+
EXPORT_SYMBOL(netif_set_operstate);
1058
1058
1059
1059
static void set_operstate(struct net_device *dev, unsigned char transition)
1060
1060
{
···
1080
1080
break;
1081
1081
}
1082
1082
1083
-
netdev_set_operstate(dev, operstate);
1083
+
netif_set_operstate(dev, operstate);
1084
1084
}
1085
1085
1086
1086
static unsigned int rtnl_dev_get_flags(const struct net_device *dev)
···
3027
3027
3028
3028
err = validate_linkmsg(dev, tb, extack);
3029
3029
if (err < 0)
3030
-
goto errout;
3030
+
return err;
3031
3031
3032
3032
if (tb[IFLA_IFNAME])
3033
3033
nla_strscpy(ifname, tb[IFLA_IFNAME], IFNAMSIZ);
···
3396
3396
errout:
3397
3397
if (status & DO_SETLINK_MODIFIED) {
3398
3398
if ((status & DO_SETLINK_NOTIFY) == DO_SETLINK_NOTIFY)
3399
-
netdev_state_change(dev);
3399
+
netif_state_change(dev);
3400
3400
3401
3401
if (err < 0)
3402
3402
net_warn_ratelimited("A link change request failed with some changes committed already. Interface %s may have been left with an inconsistent configuration, please check.\n",
···
3676
3676
nla_len(tb[IFLA_BROADCAST]));
3677
3677
if (tb[IFLA_TXQLEN])
3678
3678
dev->tx_queue_len = nla_get_u32(tb[IFLA_TXQLEN]);
3679
-
if (tb[IFLA_OPERSTATE])
3679
+
if (tb[IFLA_OPERSTATE]) {
3680
+
netdev_lock_ops(dev);
3680
3681
set_operstate(dev, nla_get_u8(tb[IFLA_OPERSTATE]));
3682
+
netdev_unlock_ops(dev);
3683
+
}
3681
3684
if (tb[IFLA_LINKMODE])
3682
3685
dev->link_mode = nla_get_u8(tb[IFLA_LINKMODE]);
3683
3686
if (tb[IFLA_GROUP])
+5
net/core/sock.c
+5
net/core/sock.c
···
2130
2130
*/
2131
2131
static inline void sock_lock_init(struct sock *sk)
2132
2132
{
2133
+
sk_owner_clear(sk);
2134
+
2133
2135
if (sk->sk_kern_sock)
2134
2136
sock_lock_init_class_and_name(
2135
2137
sk,
···
2228
2226
cgroup_sk_free(&sk->sk_cgrp_data);
2229
2227
mem_cgroup_sk_free(sk);
2230
2228
security_sk_free(sk);
2229
+
2230
+
sk_owner_put(sk);
2231
+
2231
2232
if (slab != NULL)
2232
2233
kmem_cache_free(slab, sk);
2233
2234
else
-1
net/ethtool/cmis.h
-1
net/ethtool/cmis.h
+3
-15
net/ethtool/cmis_cdb.c
+3
-15
net/ethtool/cmis_cdb.c
···
16
16
return 8 * (1 + min_t(u8, num_of_byte_octs, 15));
17
17
}
18
18
19
-
/* For accessing the EPL field on page 9Fh, the allowable length extension is
20
-
* min(i, 255) byte octets where i specifies the allowable additional number of
21
-
* byte octets in a READ or a WRITE.
22
-
*/
23
-
u32 ethtool_cmis_get_max_epl_size(u8 num_of_byte_octs)
24
-
{
25
-
return 8 * (1 + min_t(u8, num_of_byte_octs, 255));
26
-
}
27
-
28
19
void ethtool_cmis_cdb_compose_args(struct ethtool_cmis_cdb_cmd_args *args,
29
20
enum ethtool_cmis_cdb_cmd_id cmd, u8 *lpl,
30
21
u8 lpl_len, u8 *epl, u16 epl_len,
···
24
33
{
25
34
args->req.id = cpu_to_be16(cmd);
26
35
args->req.lpl_len = lpl_len;
27
-
if (lpl) {
36
+
if (lpl)
28
37
memcpy(args->req.payload, lpl, args->req.lpl_len);
29
-
args->read_write_len_ext =
30
-
ethtool_cmis_get_max_lpl_size(read_write_len_ext);
31
-
}
32
38
if (epl) {
33
39
args->req.epl_len = cpu_to_be16(epl_len);
34
40
args->req.epl = epl;
35
-
args->read_write_len_ext =
36
-
ethtool_cmis_get_max_epl_size(read_write_len_ext);
37
41
}
38
42
39
43
args->max_duration = max_duration;
44
+
args->read_write_len_ext =
45
+
ethtool_cmis_get_max_lpl_size(read_write_len_ext);
40
46
args->msleep_pre_rpl = msleep_pre_rpl;
41
47
args->rpl_exp_len = rpl_exp_len;
42
48
args->flags = flags;
+1
net/ethtool/common.c
+1
net/ethtool/common.c
+1
-1
net/ethtool/ioctl.c
+1
-1
net/ethtool/ioctl.c
+5
-3
net/ethtool/netlink.c
+5
-3
net/ethtool/netlink.c
···
500
500
netdev_unlock_ops(req_info->dev);
501
501
rtnl_unlock();
502
502
if (ret < 0)
503
-
goto err_cleanup;
503
+
goto err_dev;
504
504
ret = ops->reply_size(req_info, reply_data);
505
505
if (ret < 0)
506
506
goto err_cleanup;
···
560
560
netdev_unlock_ops(dev);
561
561
rtnl_unlock();
562
562
if (ret < 0)
563
-
goto out;
563
+
goto out_cancel;
564
564
ret = ethnl_fill_reply_header(skb, dev, ctx->ops->hdr_attr);
565
565
if (ret < 0)
566
566
goto out;
···
569
569
out:
570
570
if (ctx->ops->cleanup_data)
571
571
ctx->ops->cleanup_data(ctx->reply_data);
572
+
out_cancel:
572
573
ctx->reply_data->dev = NULL;
573
574
if (ret < 0)
574
575
genlmsg_cancel(skb, ehdr);
···
794
793
ethnl_init_reply_data(reply_data, ops, dev);
795
794
ret = ops->prepare_data(req_info, reply_data, &info);
796
795
if (ret < 0)
797
-
goto err_cleanup;
796
+
goto err_rep;
798
797
ret = ops->reply_size(req_info, reply_data);
799
798
if (ret < 0)
800
799
goto err_cleanup;
···
829
828
err_cleanup:
830
829
if (ops->cleanup_data)
831
830
ops->cleanup_data(reply_data);
831
+
err_rep:
832
832
kfree(reply_data);
833
833
kfree(req_info);
834
834
return;
+3
-3
net/hsr/hsr_device.c
+3
-3
net/hsr/hsr_device.c
···
33
33
struct net_device *dev = master->dev;
34
34
35
35
if (!is_admin_up(dev)) {
36
-
netdev_set_operstate(dev, IF_OPER_DOWN);
36
+
netif_set_operstate(dev, IF_OPER_DOWN);
37
37
return;
38
38
}
39
39
40
40
if (has_carrier)
41
-
netdev_set_operstate(dev, IF_OPER_UP);
41
+
netif_set_operstate(dev, IF_OPER_UP);
42
42
else
43
-
netdev_set_operstate(dev, IF_OPER_LOWERLAYERDOWN);
43
+
netif_set_operstate(dev, IF_OPER_LOWERLAYERDOWN);
44
44
}
45
45
46
46
static bool hsr_check_carrier(struct hsr_port *master)
+5
-4
net/ipv6/addrconf.c
+5
-4
net/ipv6/addrconf.c
···
3154
3154
3155
3155
rtnl_net_lock(net);
3156
3156
dev = __dev_get_by_index(net, ireq.ifr6_ifindex);
3157
-
netdev_lock_ops(dev);
3158
-
if (dev)
3157
+
if (dev) {
3158
+
netdev_lock_ops(dev);
3159
3159
err = inet6_addr_add(net, dev, &cfg, 0, 0, NULL);
3160
-
else
3160
+
netdev_unlock_ops(dev);
3161
+
} else {
3161
3162
err = -ENODEV;
3162
-
netdev_unlock_ops(dev);
3163
+
}
3163
3164
rtnl_net_unlock(net);
3164
3165
return err;
3165
3166
}
+4
-4
net/ipv6/route.c
+4
-4
net/ipv6/route.c
···
470
470
goto out;
471
471
472
472
hash = fl6->mp_hash;
473
-
if (hash <= atomic_read(&first->fib6_nh->fib_nh_upper_bound) &&
474
-
rt6_score_route(first->fib6_nh, first->fib6_flags, oif,
475
-
strict) >= 0) {
476
-
match = first;
473
+
if (hash <= atomic_read(&first->fib6_nh->fib_nh_upper_bound)) {
474
+
if (rt6_score_route(first->fib6_nh, first->fib6_flags, oif,
475
+
strict) >= 0)
476
+
match = first;
477
477
goto out;
478
478
}
479
479
+6
-2
net/mptcp/subflow.c
+6
-2
net/mptcp/subflow.c
···
899
899
goto dispose_child;
900
900
}
901
901
902
-
if (!subflow_hmac_valid(req, &mp_opt) ||
903
-
!mptcp_can_accept_new_subflow(subflow_req->msk)) {
902
+
if (!subflow_hmac_valid(req, &mp_opt)) {
904
903
SUBFLOW_REQ_INC_STATS(req, MPTCP_MIB_JOINACKMAC);
904
+
subflow_add_reset_reason(skb, MPTCP_RST_EPROHIBIT);
905
+
goto dispose_child;
906
+
}
907
+
908
+
if (!mptcp_can_accept_new_subflow(owner)) {
905
909
subflow_add_reset_reason(skb, MPTCP_RST_EPROHIBIT);
906
910
goto dispose_child;
907
911
}
+2
-2
net/netfilter/Kconfig
+2
-2
net/netfilter/Kconfig
···
212
212
bool 'SCTP protocol connection tracking support'
213
213
depends on NETFILTER_ADVANCED
214
214
default y
215
-
select LIBCRC32C
215
+
select CRC32
216
216
help
217
217
With this option enabled, the layer 3 independent connection
218
218
tracking code will be able to do state tracking on SCTP connections.
···
475
475
476
476
config NF_TABLES
477
477
select NETFILTER_NETLINK
478
-
select LIBCRC32C
478
+
select CRC32
479
479
tristate "Netfilter nf_tables support"
480
480
help
481
481
nftables is the new packet classification framework that intends to
+1
-1
net/netfilter/ipvs/Kconfig
+1
-1
net/netfilter/ipvs/Kconfig
+2
-1
net/netfilter/nft_set_pipapo_avx2.c
+2
-1
net/netfilter/nft_set_pipapo_avx2.c
···
994
994
NFT_PIPAPO_AVX2_BUCKET_LOAD8(5, lt, 8, pkt[8], bsize);
995
995
996
996
NFT_PIPAPO_AVX2_AND(6, 2, 3);
997
+
NFT_PIPAPO_AVX2_AND(3, 4, 7);
997
998
NFT_PIPAPO_AVX2_BUCKET_LOAD8(7, lt, 9, pkt[9], bsize);
998
-
NFT_PIPAPO_AVX2_AND(0, 4, 5);
999
+
NFT_PIPAPO_AVX2_AND(0, 3, 5);
999
1000
NFT_PIPAPO_AVX2_BUCKET_LOAD8(1, lt, 10, pkt[10], bsize);
1000
1001
NFT_PIPAPO_AVX2_AND(2, 6, 7);
1001
1002
NFT_PIPAPO_AVX2_BUCKET_LOAD8(3, lt, 11, pkt[11], bsize);
+1
-1
net/openvswitch/Kconfig
+1
-1
net/openvswitch/Kconfig
+1
-1
net/sched/Kconfig
+1
-1
net/sched/Kconfig
+45
-21
net/sched/cls_api.c
+45
-21
net/sched/cls_api.c
···
2057
2057
struct tcmsg *tcm;
2058
2058
struct nlmsghdr *nlh;
2059
2059
unsigned char *b = skb_tail_pointer(skb);
2060
+
int ret = -EMSGSIZE;
2060
2061
2061
2062
nlh = nlmsg_put(skb, portid, seq, event, sizeof(*tcm), flags);
2062
2063
if (!nlh)
···
2102
2101
2103
2102
return skb->len;
2104
2103
2104
+
cls_op_not_supp:
2105
+
ret = -EOPNOTSUPP;
2105
2106
out_nlmsg_trim:
2106
2107
nla_put_failure:
2107
-
cls_op_not_supp:
2108
2108
nlmsg_trim(skb, b);
2109
-
return -1;
2109
+
return ret;
2110
+
}
2111
+
2112
+
static struct sk_buff *tfilter_notify_prep(struct net *net,
2113
+
struct sk_buff *oskb,
2114
+
struct nlmsghdr *n,
2115
+
struct tcf_proto *tp,
2116
+
struct tcf_block *block,
2117
+
struct Qdisc *q, u32 parent,
2118
+
void *fh, int event,
2119
+
u32 portid, bool rtnl_held,
2120
+
struct netlink_ext_ack *extack)
2121
+
{
2122
+
unsigned int size = oskb ? max(NLMSG_GOODSIZE, oskb->len) : NLMSG_GOODSIZE;
2123
+
struct sk_buff *skb;
2124
+
int ret;
2125
+
2126
+
retry:
2127
+
skb = alloc_skb(size, GFP_KERNEL);
2128
+
if (!skb)
2129
+
return ERR_PTR(-ENOBUFS);
2130
+
2131
+
ret = tcf_fill_node(net, skb, tp, block, q, parent, fh, portid,
2132
+
n->nlmsg_seq, n->nlmsg_flags, event, false,
2133
+
rtnl_held, extack);
2134
+
if (ret <= 0) {
2135
+
kfree_skb(skb);
2136
+
if (ret == -EMSGSIZE) {
2137
+
size += NLMSG_GOODSIZE;
2138
+
goto retry;
2139
+
}
2140
+
return ERR_PTR(-EINVAL);
2141
+
}
2142
+
return skb;
2110
2143
}
2111
2144
2112
2145
static int tfilter_notify(struct net *net, struct sk_buff *oskb,
···
2156
2121
if (!unicast && !rtnl_notify_needed(net, n->nlmsg_flags, RTNLGRP_TC))
2157
2122
return 0;
2158
2123
2159
-
skb = alloc_skb(NLMSG_GOODSIZE, GFP_KERNEL);
2160
-
if (!skb)
2161
-
return -ENOBUFS;
2162
-
2163
-
if (tcf_fill_node(net, skb, tp, block, q, parent, fh, portid,
2164
-
n->nlmsg_seq, n->nlmsg_flags, event,
2165
-
false, rtnl_held, extack) <= 0) {
2166
-
kfree_skb(skb);
2167
-
return -EINVAL;
2168
-
}
2124
+
skb = tfilter_notify_prep(net, oskb, n, tp, block, q, parent, fh, event,
2125
+
portid, rtnl_held, extack);
2126
+
if (IS_ERR(skb))
2127
+
return PTR_ERR(skb);
2169
2128
2170
2129
if (unicast)
2171
2130
err = rtnl_unicast(skb, net, portid);
···
2182
2153
if (!rtnl_notify_needed(net, n->nlmsg_flags, RTNLGRP_TC))
2183
2154
return tp->ops->delete(tp, fh, last, rtnl_held, extack);
2184
2155
2185
-
skb = alloc_skb(NLMSG_GOODSIZE, GFP_KERNEL);
2186
-
if (!skb)
2187
-
return -ENOBUFS;
2188
-
2189
-
if (tcf_fill_node(net, skb, tp, block, q, parent, fh, portid,
2190
-
n->nlmsg_seq, n->nlmsg_flags, RTM_DELTFILTER,
2191
-
false, rtnl_held, extack) <= 0) {
2156
+
skb = tfilter_notify_prep(net, oskb, n, tp, block, q, parent, fh,
2157
+
RTM_DELTFILTER, portid, rtnl_held, extack);
2158
+
if (IS_ERR(skb)) {
2192
2159
NL_SET_ERR_MSG(extack, "Failed to build del event notification");
2193
-
kfree_skb(skb);
2194
-
return -EINVAL;
2160
+
return PTR_ERR(skb);
2195
2161
}
2196
2162
2197
2163
err = tp->ops->delete(tp, fh, last, rtnl_held, extack);
+1
-4
net/sched/sch_codel.c
+1
-4
net/sched/sch_codel.c
···
65
65
&q->stats, qdisc_pkt_len, codel_get_enqueue_time,
66
66
drop_func, dequeue_func);
67
67
68
-
/* We cant call qdisc_tree_reduce_backlog() if our qlen is 0,
69
-
* or HTB crashes. Defer it for next round.
70
-
*/
71
-
if (q->stats.drop_count && sch->q.qlen) {
68
+
if (q->stats.drop_count) {
72
69
qdisc_tree_reduce_backlog(sch, q->stats.drop_count, q->stats.drop_len);
73
70
q->stats.drop_count = 0;
74
71
q->stats.drop_len = 0;
+4
-3
net/sched/sch_drr.c
+4
-3
net/sched/sch_drr.c
···
105
105
return -ENOBUFS;
106
106
107
107
gnet_stats_basic_sync_init(&cl->bstats);
108
+
INIT_LIST_HEAD(&cl->alist);
108
109
cl->common.classid = classid;
109
110
cl->quantum = quantum;
110
111
cl->qdisc = qdisc_create_dflt(sch->dev_queue,
···
230
229
{
231
230
struct drr_class *cl = (struct drr_class *)arg;
232
231
233
-
list_del(&cl->alist);
232
+
list_del_init(&cl->alist);
234
233
}
235
234
236
235
static int drr_dump_class(struct Qdisc *sch, unsigned long arg,
···
391
390
if (unlikely(skb == NULL))
392
391
goto out;
393
392
if (cl->qdisc->q.qlen == 0)
394
-
list_del(&cl->alist);
393
+
list_del_init(&cl->alist);
395
394
396
395
bstats_update(&cl->bstats, skb);
397
396
qdisc_bstats_update(sch, skb);
···
432
431
for (i = 0; i < q->clhash.hashsize; i++) {
433
432
hlist_for_each_entry(cl, &q->clhash.hash[i], common.hnode) {
434
433
if (cl->qdisc->q.qlen)
435
-
list_del(&cl->alist);
434
+
list_del_init(&cl->alist);
436
435
qdisc_reset(cl->qdisc);
437
436
}
438
437
}
+4
-4
net/sched/sch_ets.c
+4
-4
net/sched/sch_ets.c
···
293
293
* to remove them.
294
294
*/
295
295
if (!ets_class_is_strict(q, cl) && sch->q.qlen)
296
-
list_del(&cl->alist);
296
+
list_del_init(&cl->alist);
297
297
}
298
298
299
299
static int ets_class_dump(struct Qdisc *sch, unsigned long arg,
···
488
488
if (unlikely(!skb))
489
489
goto out;
490
490
if (cl->qdisc->q.qlen == 0)
491
-
list_del(&cl->alist);
491
+
list_del_init(&cl->alist);
492
492
return ets_qdisc_dequeue_skb(sch, skb);
493
493
}
494
494
···
657
657
}
658
658
for (i = q->nbands; i < oldbands; i++) {
659
659
if (i >= q->nstrict && q->classes[i].qdisc->q.qlen)
660
-
list_del(&q->classes[i].alist);
660
+
list_del_init(&q->classes[i].alist);
661
661
qdisc_tree_flush_backlog(q->classes[i].qdisc);
662
662
}
663
663
WRITE_ONCE(q->nstrict, nstrict);
···
713
713
714
714
for (band = q->nstrict; band < q->nbands; band++) {
715
715
if (q->classes[band].qdisc->q.qlen)
716
-
list_del(&q->classes[band].alist);
716
+
list_del_init(&q->classes[band].alist);
717
717
}
718
718
for (band = 0; band < q->nbands; band++)
719
719
qdisc_reset(q->classes[band].qdisc);
+2
-4
net/sched/sch_fq_codel.c
+2
-4
net/sched/sch_fq_codel.c
···
315
315
}
316
316
qdisc_bstats_update(sch, skb);
317
317
flow->deficit -= qdisc_pkt_len(skb);
318
-
/* We cant call qdisc_tree_reduce_backlog() if our qlen is 0,
319
-
* or HTB crashes. Defer it for next round.
320
-
*/
321
-
if (q->cstats.drop_count && sch->q.qlen) {
318
+
319
+
if (q->cstats.drop_count) {
322
320
qdisc_tree_reduce_backlog(sch, q->cstats.drop_count,
323
321
q->cstats.drop_len);
324
322
q->cstats.drop_count = 0;
+6
-2
net/sched/sch_hfsc.c
+6
-2
net/sched/sch_hfsc.c
···
203
203
static inline void
204
204
eltree_remove(struct hfsc_class *cl)
205
205
{
206
-
rb_erase(&cl->el_node, &cl->sched->eligible);
206
+
if (!RB_EMPTY_NODE(&cl->el_node)) {
207
+
rb_erase(&cl->el_node, &cl->sched->eligible);
208
+
RB_CLEAR_NODE(&cl->el_node);
209
+
}
207
210
}
208
211
209
212
static inline void
···
1223
1220
/* vttree is now handled in update_vf() so that update_vf(cl, 0, 0)
1224
1221
* needs to be called explicitly to remove a class from vttree.
1225
1222
*/
1226
-
update_vf(cl, 0, 0);
1223
+
if (cl->cl_nactive)
1224
+
update_vf(cl, 0, 0);
1227
1225
if (cl->cl_flags & HFSC_RSC)
1228
1226
eltree_remove(cl);
1229
1227
}
+2
net/sched/sch_htb.c
+2
net/sched/sch_htb.c
+5
-2
net/sched/sch_qfq.c
+5
-2
net/sched/sch_qfq.c
···
347
347
struct qfq_aggregate *agg = cl->agg;
348
348
349
349
350
-
list_del(&cl->alist); /* remove from RR queue of the aggregate */
350
+
list_del_init(&cl->alist); /* remove from RR queue of the aggregate */
351
351
if (list_empty(&agg->active)) /* agg is now inactive */
352
352
qfq_deactivate_agg(q, agg);
353
353
}
···
474
474
gnet_stats_basic_sync_init(&cl->bstats);
475
475
cl->common.classid = classid;
476
476
cl->deficit = lmax;
477
+
INIT_LIST_HEAD(&cl->alist);
477
478
478
479
cl->qdisc = qdisc_create_dflt(sch->dev_queue, &pfifo_qdisc_ops,
479
480
classid, NULL);
···
983
982
cl->deficit -= (int) len;
984
983
985
984
if (cl->qdisc->q.qlen == 0) /* no more packets, remove from list */
986
-
list_del(&cl->alist);
985
+
list_del_init(&cl->alist);
987
986
else if (cl->deficit < qdisc_pkt_len(cl->qdisc->ops->peek(cl->qdisc))) {
988
987
cl->deficit += agg->lmax;
989
988
list_move_tail(&cl->alist, &agg->active);
···
1416
1415
struct qfq_sched *q = qdisc_priv(sch);
1417
1416
struct qfq_class *cl = (struct qfq_class *)arg;
1418
1417
1418
+
if (list_empty(&cl->alist))
1419
+
return;
1419
1420
qfq_deactivate_class(q, cl);
1420
1421
}
1421
1422
+50
-16
net/sched/sch_sfq.c
+50
-16
net/sched/sch_sfq.c
···
631
631
struct red_parms *p = NULL;
632
632
struct sk_buff *to_free = NULL;
633
633
struct sk_buff *tail = NULL;
634
+
unsigned int maxflows;
635
+
unsigned int quantum;
636
+
unsigned int divisor;
637
+
int perturb_period;
638
+
u8 headdrop;
639
+
u8 maxdepth;
640
+
int limit;
641
+
u8 flags;
642
+
634
643
635
644
if (opt->nla_len < nla_attr_size(sizeof(*ctl)))
636
645
return -EINVAL;
···
661
652
if (!p)
662
653
return -ENOMEM;
663
654
}
664
-
if (ctl->limit == 1) {
665
-
NL_SET_ERR_MSG_MOD(extack, "invalid limit");
666
-
return -EINVAL;
667
-
}
655
+
668
656
sch_tree_lock(sch);
657
+
658
+
limit = q->limit;
659
+
divisor = q->divisor;
660
+
headdrop = q->headdrop;
661
+
maxdepth = q->maxdepth;
662
+
maxflows = q->maxflows;
663
+
perturb_period = q->perturb_period;
664
+
quantum = q->quantum;
665
+
flags = q->flags;
666
+
667
+
/* update and validate configuration */
669
668
if (ctl->quantum)
670
-
q->quantum = ctl->quantum;
671
-
WRITE_ONCE(q->perturb_period, ctl->perturb_period * HZ);
669
+
quantum = ctl->quantum;
670
+
perturb_period = ctl->perturb_period * HZ;
672
671
if (ctl->flows)
673
-
q->maxflows = min_t(u32, ctl->flows, SFQ_MAX_FLOWS);
672
+
maxflows = min_t(u32, ctl->flows, SFQ_MAX_FLOWS);
674
673
if (ctl->divisor) {
675
-
q->divisor = ctl->divisor;
676
-
q->maxflows = min_t(u32, q->maxflows, q->divisor);
674
+
divisor = ctl->divisor;
675
+
maxflows = min_t(u32, maxflows, divisor);
677
676
}
678
677
if (ctl_v1) {
679
678
if (ctl_v1->depth)
680
-
q->maxdepth = min_t(u32, ctl_v1->depth, SFQ_MAX_DEPTH);
679
+
maxdepth = min_t(u32, ctl_v1->depth, SFQ_MAX_DEPTH);
681
680
if (p) {
682
-
swap(q->red_parms, p);
683
-
red_set_parms(q->red_parms,
681
+
red_set_parms(p,
684
682
ctl_v1->qth_min, ctl_v1->qth_max,
685
683
ctl_v1->Wlog,
686
684
ctl_v1->Plog, ctl_v1->Scell_log,
687
685
NULL,
688
686
ctl_v1->max_P);
689
687
}
690
-
q->flags = ctl_v1->flags;
691
-
q->headdrop = ctl_v1->headdrop;
688
+
flags = ctl_v1->flags;
689
+
headdrop = ctl_v1->headdrop;
692
690
}
693
691
if (ctl->limit) {
694
-
q->limit = min_t(u32, ctl->limit, q->maxdepth * q->maxflows);
695
-
q->maxflows = min_t(u32, q->maxflows, q->limit);
692
+
limit = min_t(u32, ctl->limit, maxdepth * maxflows);
693
+
maxflows = min_t(u32, maxflows, limit);
696
694
}
695
+
if (limit == 1) {
696
+
sch_tree_unlock(sch);
697
+
kfree(p);
698
+
NL_SET_ERR_MSG_MOD(extack, "invalid limit");
699
+
return -EINVAL;
700
+
}
701
+
702
+
/* commit configuration */
703
+
q->limit = limit;
704
+
q->divisor = divisor;
705
+
q->headdrop = headdrop;
706
+
q->maxdepth = maxdepth;
707
+
q->maxflows = maxflows;
708
+
WRITE_ONCE(q->perturb_period, perturb_period);
709
+
q->quantum = quantum;
710
+
q->flags = flags;
711
+
if (p)
712
+
swap(q->red_parms, p);
697
713
698
714
qlen = sch->q.qlen;
699
715
while (sch->q.qlen > q->limit) {
+1
-1
net/sctp/Kconfig
+1
-1
net/sctp/Kconfig
+14
-8
net/sctp/socket.c
+14
-8
net/sctp/socket.c
···
72
72
/* Forward declarations for internal helper functions. */
73
73
static bool sctp_writeable(const struct sock *sk);
74
74
static void sctp_wfree(struct sk_buff *skb);
75
-
static int sctp_wait_for_sndbuf(struct sctp_association *asoc, long *timeo_p,
76
-
size_t msg_len);
75
+
static int sctp_wait_for_sndbuf(struct sctp_association *asoc,
76
+
struct sctp_transport *transport,
77
+
long *timeo_p, size_t msg_len);
77
78
static int sctp_wait_for_packet(struct sock *sk, int *err, long *timeo_p);
78
79
static int sctp_wait_for_connect(struct sctp_association *, long *timeo_p);
79
80
static int sctp_wait_for_accept(struct sock *sk, long timeo);
···
1829
1828
1830
1829
if (sctp_wspace(asoc) <= 0 || !sk_wmem_schedule(sk, msg_len)) {
1831
1830
timeo = sock_sndtimeo(sk, msg->msg_flags & MSG_DONTWAIT);
1832
-
err = sctp_wait_for_sndbuf(asoc, &timeo, msg_len);
1831
+
err = sctp_wait_for_sndbuf(asoc, transport, &timeo, msg_len);
1833
1832
if (err)
1834
1833
goto err;
1835
1834
if (unlikely(sinfo->sinfo_stream >= asoc->stream.outcnt)) {
···
9215
9214
9216
9215
9217
9216
/* Helper function to wait for space in the sndbuf. */
9218
-
static int sctp_wait_for_sndbuf(struct sctp_association *asoc, long *timeo_p,
9219
-
size_t msg_len)
9217
+
static int sctp_wait_for_sndbuf(struct sctp_association *asoc,
9218
+
struct sctp_transport *transport,
9219
+
long *timeo_p, size_t msg_len)
9220
9220
{
9221
9221
struct sock *sk = asoc->base.sk;
9222
9222
long current_timeo = *timeo_p;
···
9227
9225
pr_debug("%s: asoc:%p, timeo:%ld, msg_len:%zu\n", __func__, asoc,
9228
9226
*timeo_p, msg_len);
9229
9227
9230
-
/* Increment the association's refcnt. */
9228
+
/* Increment the transport and association's refcnt. */
9229
+
if (transport)
9230
+
sctp_transport_hold(transport);
9231
9231
sctp_association_hold(asoc);
9232
9232
9233
9233
/* Wait on the association specific sndbuf space. */
···
9238
9234
TASK_INTERRUPTIBLE);
9239
9235
if (asoc->base.dead)
9240
9236
goto do_dead;
9241
-
if (!*timeo_p)
9237
+
if ((!*timeo_p) || (transport && transport->dead))
9242
9238
goto do_nonblock;
9243
9239
if (sk->sk_err || asoc->state >= SCTP_STATE_SHUTDOWN_PENDING)
9244
9240
goto do_error;
···
9263
9259
out:
9264
9260
finish_wait(&asoc->wait, &wait);
9265
9261
9266
-
/* Release the association's refcnt. */
9262
+
/* Release the transport and association's refcnt. */
9263
+
if (transport)
9264
+
sctp_transport_put(transport);
9267
9265
sctp_association_put(asoc);
9268
9266
9269
9267
return err;
+2
net/sctp/transport.c
+2
net/sctp/transport.c
+1
net/tipc/link.c
+1
net/tipc/link.c
···
1046
1046
if (unlikely(l->backlog[imp].len >= l->backlog[imp].limit)) {
1047
1047
if (imp == TIPC_SYSTEM_IMPORTANCE) {
1048
1048
pr_warn("%s<%s>, link overflow", link_rst_msg, l->name);
1049
+
__skb_queue_purge(list);
1049
1050
return -ENOBUFS;
1050
1051
}
1051
1052
rc = link_schedule_user(l, hdr);
+6
net/tls/tls_main.c
+6
net/tls/tls_main.c
···
852
852
return do_tls_setsockopt(sk, optname, optval, optlen);
853
853
}
854
854
855
+
static int tls_disconnect(struct sock *sk, int flags)
856
+
{
857
+
return -EOPNOTSUPP;
858
+
}
859
+
855
860
struct tls_context *tls_ctx_create(struct sock *sk)
856
861
{
857
862
struct inet_connection_sock *icsk = inet_csk(sk);
···
952
947
prot[TLS_BASE][TLS_BASE] = *base;
953
948
prot[TLS_BASE][TLS_BASE].setsockopt = tls_setsockopt;
954
949
prot[TLS_BASE][TLS_BASE].getsockopt = tls_getsockopt;
950
+
prot[TLS_BASE][TLS_BASE].disconnect = tls_disconnect;
955
951
prot[TLS_BASE][TLS_BASE].close = tls_sk_proto_close;
956
952
957
953
prot[TLS_SW][TLS_BASE] = prot[TLS_BASE][TLS_BASE];
+11
-7
tools/objtool/arch/x86/decode.c
+11
-7
tools/objtool/arch/x86/decode.c
···
522
522
case INAT_PFX_REPNE:
523
523
if (modrm == 0xca)
524
524
/* eretu/erets */
525
-
insn->type = INSN_CONTEXT_SWITCH;
525
+
insn->type = INSN_SYSRET;
526
526
break;
527
527
default:
528
528
if (modrm == 0xca)
···
535
535
536
536
insn->type = INSN_JUMP_CONDITIONAL;
537
537
538
-
} else if (op2 == 0x05 || op2 == 0x07 || op2 == 0x34 ||
539
-
op2 == 0x35) {
538
+
} else if (op2 == 0x05 || op2 == 0x34) {
540
539
541
-
/* sysenter, sysret */
542
-
insn->type = INSN_CONTEXT_SWITCH;
540
+
/* syscall, sysenter */
541
+
insn->type = INSN_SYSCALL;
542
+
543
+
} else if (op2 == 0x07 || op2 == 0x35) {
544
+
545
+
/* sysret, sysexit */
546
+
insn->type = INSN_SYSRET;
543
547
544
548
} else if (op2 == 0x0b || op2 == 0xb9) {
545
549
···
680
676
681
677
case 0xca: /* retf */
682
678
case 0xcb: /* retf */
683
-
insn->type = INSN_CONTEXT_SWITCH;
679
+
insn->type = INSN_SYSRET;
684
680
break;
685
681
686
682
case 0xe0: /* loopne */
···
725
721
} else if (modrm_reg == 5) {
726
722
727
723
/* jmpf */
728
-
insn->type = INSN_CONTEXT_SWITCH;
724
+
insn->type = INSN_SYSRET;
729
725
730
726
} else if (modrm_reg == 6) {
731
727
+1
-1
tools/objtool/arch/x86/special.c
+1
-1
tools/objtool/arch/x86/special.c
···
126
126
* indicates a rare GCC quirk/bug which can leave dead
127
127
* code behind.
128
128
*/
129
-
if (reloc_type(text_reloc) == R_X86_64_PC32) {
129
+
if (!file->ignore_unreachables && reloc_type(text_reloc) == R_X86_64_PC32) {
130
130
WARN_INSN(insn, "ignoring unreachables due to jump table quirk");
131
131
file->ignore_unreachables = true;
132
132
}
+51
-8
tools/objtool/check.c
+51
-8
tools/objtool/check.c
···
3505
3505
return next_insn_same_sec(file, alt_group->orig_group->last_insn);
3506
3506
}
3507
3507
3508
+
static bool skip_alt_group(struct instruction *insn)
3509
+
{
3510
+
struct instruction *alt_insn = insn->alts ? insn->alts->insn : NULL;
3511
+
3512
+
/* ANNOTATE_IGNORE_ALTERNATIVE */
3513
+
if (insn->alt_group && insn->alt_group->ignore)
3514
+
return true;
3515
+
3516
+
/*
3517
+
* For NOP patched with CLAC/STAC, only follow the latter to avoid
3518
+
* impossible code paths combining patched CLAC with unpatched STAC
3519
+
* or vice versa.
3520
+
*
3521
+
* ANNOTATE_IGNORE_ALTERNATIVE could have been used here, but Linus
3522
+
* requested not to do that to avoid hurting .s file readability
3523
+
* around CLAC/STAC alternative sites.
3524
+
*/
3525
+
3526
+
if (!alt_insn)
3527
+
return false;
3528
+
3529
+
/* Don't override ASM_{CLAC,STAC}_UNSAFE */
3530
+
if (alt_insn->alt_group && alt_insn->alt_group->ignore)
3531
+
return false;
3532
+
3533
+
return alt_insn->type == INSN_CLAC || alt_insn->type == INSN_STAC;
3534
+
}
3535
+
3508
3536
/*
3509
3537
* Follow the branch starting at the given instruction, and recursively follow
3510
3538
* any other branches (jumps). Meanwhile, track the frame pointer state at
···
3653
3625
}
3654
3626
}
3655
3627
3656
-
if (insn->alt_group && insn->alt_group->ignore)
3628
+
if (skip_alt_group(insn))
3657
3629
return 0;
3658
3630
3659
3631
if (handle_insn_ops(insn, next_insn, &state))
···
3712
3684
3713
3685
break;
3714
3686
3715
-
case INSN_CONTEXT_SWITCH:
3716
-
if (func) {
3717
-
if (!next_insn || !next_insn->hint) {
3718
-
WARN_INSN(insn, "unsupported instruction in callable function");
3719
-
return 1;
3720
-
}
3721
-
break;
3687
+
case INSN_SYSCALL:
3688
+
if (func && (!next_insn || !next_insn->hint)) {
3689
+
WARN_INSN(insn, "unsupported instruction in callable function");
3690
+
return 1;
3722
3691
}
3692
+
3693
+
break;
3694
+
3695
+
case INSN_SYSRET:
3696
+
if (func && (!next_insn || !next_insn->hint)) {
3697
+
WARN_INSN(insn, "unsupported instruction in callable function");
3698
+
return 1;
3699
+
}
3700
+
3723
3701
return 0;
3724
3702
3725
3703
case INSN_STAC:
···
3920
3886
WARN_INSN(insn, "RET before UNTRAIN");
3921
3887
return 1;
3922
3888
3889
+
case INSN_SYSCALL:
3890
+
break;
3891
+
3892
+
case INSN_SYSRET:
3893
+
return 0;
3894
+
3923
3895
case INSN_NOP:
3924
3896
if (insn->retpoline_safe)
3925
3897
return 0;
···
3934
3894
default:
3935
3895
break;
3936
3896
}
3897
+
3898
+
if (insn->dead_end)
3899
+
return 0;
3937
3900
3938
3901
if (!next) {
3939
3902
WARN_INSN(insn, "teh end!");
+2
-1
tools/objtool/include/objtool/arch.h
+2
-1
tools/objtool/include/objtool/arch.h
+4
tools/testing/kunit/kunit_parser.py
+4
tools/testing/kunit/kunit_parser.py
···
809
809
test.log.extend(parse_diagnostic(lines))
810
810
if test.name != "" and not peek_test_name_match(lines, test):
811
811
test.add_error(printer, 'missing subtest result line!')
812
+
elif not lines:
813
+
print_log(test.log, printer)
814
+
test.status = TestStatus.NO_TESTS
815
+
test.add_error(printer, 'No more test results!')
812
816
else:
813
817
parse_test_result(lines, test, expected_num, printer)
814
818
+2
-2
tools/testing/kunit/kunit_tool_test.py
+2
-2
tools/testing/kunit/kunit_tool_test.py
···
371
371
"""
372
372
result = kunit_parser.parse_run_tests(output.splitlines(), stdout)
373
373
# Missing test results after test plan should alert a suspected test crash.
374
-
self.assertEqual(kunit_parser.TestStatus.TEST_CRASHED, result.status)
375
-
self.assertEqual(result.counts, kunit_parser.TestCounts(passed=1, crashed=1, errors=1))
374
+
self.assertEqual(kunit_parser.TestStatus.SUCCESS, result.status)
375
+
self.assertEqual(result.counts, kunit_parser.TestCounts(passed=1, errors=2))
376
376
377
377
def line_stream_from_strs(strs: Iterable[str]) -> kunit_parser.LineStream:
378
378
return kunit_parser.LineStream(enumerate(strs, start=1))
+6
tools/testing/memblock/internal.h
+6
tools/testing/memblock/internal.h
+14
tools/testing/memblock/linux/mutex.h
+14
tools/testing/memblock/linux/mutex.h
-1
tools/testing/selftests/.gitignore
-1
tools/testing/selftests/.gitignore
-1
tools/testing/selftests/bpf/config.x86_64
-1
tools/testing/selftests/bpf/config.x86_64
+5
-2
tools/testing/selftests/bpf/prog_tests/res_spin_lock.c
+5
-2
tools/testing/selftests/bpf/prog_tests/res_spin_lock.c
···
25
25
26
26
while (!READ_ONCE(skip)) {
27
27
err = bpf_prog_test_run_opts(prog_fd, &topts);
28
-
ASSERT_OK(err, "test_run");
29
-
ASSERT_OK(topts.retval, "test_run retval");
28
+
if (err || topts.retval) {
29
+
ASSERT_OK(err, "test_run");
30
+
ASSERT_OK(topts.retval, "test_run retval");
31
+
break;
32
+
}
30
33
}
31
34
pthread_exit(arg);
32
35
}
+7
-3
tools/testing/selftests/bpf/progs/res_spin_lock.c
+7
-3
tools/testing/selftests/bpf/progs/res_spin_lock.c
···
38
38
r = bpf_res_spin_lock(&elem1->lock);
39
39
if (r)
40
40
return r;
41
-
if (!bpf_res_spin_lock(&elem2->lock)) {
41
+
r = bpf_res_spin_lock(&elem2->lock);
42
+
if (!r) {
42
43
bpf_res_spin_unlock(&elem2->lock);
43
44
bpf_res_spin_unlock(&elem1->lock);
44
45
return -1;
45
46
}
46
47
bpf_res_spin_unlock(&elem1->lock);
47
-
return 0;
48
+
return r != -EDEADLK;
48
49
}
49
50
50
51
SEC("tc")
···
125
124
/* Trigger AA, after exhausting entries in the held lock table. This
126
125
* time, only the timeout can save us, as AA detection won't succeed.
127
126
*/
128
-
if (!bpf_res_spin_lock(locks[34])) {
127
+
ret = bpf_res_spin_lock(locks[34]);
128
+
if (!ret) {
129
129
bpf_res_spin_unlock(locks[34]);
130
130
ret = 1;
131
131
goto end;
132
132
}
133
+
134
+
ret = ret != -ETIMEDOUT ? 2 : 0;
133
135
134
136
end:
135
137
for (i = i - 1; i >= 0; i--)
+405
-218
tools/testing/selftests/cgroup/test_cpuset_prs.sh
+405
-218
tools/testing/selftests/cgroup/test_cpuset_prs.sh
···
88
88
# If isolated CPUs have been reserved at boot time (as shown in
89
89
# cpuset.cpus.isolated), these isolated CPUs should be outside of CPUs 0-8
90
90
# that will be used by this script for testing purpose. If not, some of
91
-
# the tests may fail incorrectly. These pre-isolated CPUs should stay in
92
-
# an isolated state throughout the testing process for now.
91
+
# the tests may fail incorrectly. Wait a bit and retry again just in case
92
+
# these isolated CPUs are leftover from previous run and have just been
93
+
# cleaned up earlier in this script.
94
+
#
95
+
# These pre-isolated CPUs should stay in an isolated state throughout the
96
+
# testing process for now.
93
97
#
94
98
BOOT_ISOLCPUS=$(cat $CGROUP2/cpuset.cpus.isolated)
99
+
[[ -n "$BOOT_ISOLCPUS" ]] && {
100
+
sleep 0.5
101
+
BOOT_ISOLCPUS=$(cat $CGROUP2/cpuset.cpus.isolated)
102
+
}
95
103
if [[ -n "$BOOT_ISOLCPUS" ]]
96
104
then
97
105
[[ $(echo $BOOT_ISOLCPUS | sed -e "s/[,-].*//") -le 8 ]] &&
98
106
skip_test "Pre-isolated CPUs ($BOOT_ISOLCPUS) overlap CPUs to be tested"
99
107
echo "Pre-isolated CPUs: $BOOT_ISOLCPUS"
100
108
fi
109
+
101
110
cleanup()
102
111
{
103
112
online_cpus
104
113
cd $CGROUP2
105
-
rmdir A1/A2/A3 A1/A2 A1 B1 > /dev/null 2>&1
106
-
rmdir test > /dev/null 2>&1
114
+
rmdir A1/A2/A3 A1/A2 A1 B1 test/A1 test/B1 test > /dev/null 2>&1
115
+
rmdir rtest/p1/c11 rtest/p1/c12 rtest/p2/c21 \
116
+
rtest/p2/c22 rtest/p1 rtest/p2 rtest > /dev/null 2>&1
107
117
[[ -n "$SCHED_DEBUG" ]] &&
108
118
echo "$SCHED_DEBUG" > /sys/kernel/debug/sched/verbose
109
119
}
···
183
173
#
184
174
# Cgroup test hierarchy
185
175
#
186
-
# root -- A1 -- A2 -- A3
187
-
# +- B1
176
+
# root
177
+
# |
178
+
# +------+------+
179
+
# | |
180
+
# A1 B1
181
+
# |
182
+
# A2
183
+
# |
184
+
# A3
188
185
#
189
186
# P<v> = set cpus.partition (0:member, 1:root, 2:isolated)
190
187
# C<l> = add cpu-list to cpuset.cpus
191
188
# X<l> = add cpu-list to cpuset.cpus.exclusive
192
189
# S<p> = use prefix in subtree_control
193
190
# T = put a task into cgroup
191
+
# CX<l> = add cpu-list to both cpuset.cpus and cpuset.cpus.exclusive
194
192
# O<c>=<v> = Write <v> to CPU online file of <c>
195
193
#
196
194
# ECPUs - effective CPUs of cpusets
···
225
207
" C0-1:P1 . . C2-3 S+:C4-5 . . . 0 A1:4-5"
226
208
" C0-1 . . C2-3:P1 . . . C2 0 "
227
209
" C0-1 . . C2-3:P1 . . . C4-5 0 B1:4-5"
228
-
"C0-3:P1:S+ C2-3:P1 . . . . . . 0 A1:0-1,A2:2-3"
229
-
"C0-3:P1:S+ C2-3:P1 . . C1-3 . . . 0 A1:1,A2:2-3"
230
-
"C2-3:P1:S+ C3:P1 . . C3 . . . 0 A1:,A2:3 A1:P1,A2:P1"
231
-
"C2-3:P1:S+ C3:P1 . . C3 P0 . . 0 A1:3,A2:3 A1:P1,A2:P0"
232
-
"C2-3:P1:S+ C2:P1 . . C2-4 . . . 0 A1:3-4,A2:2"
233
-
"C2-3:P1:S+ C3:P1 . . C3 . . C0-2 0 A1:,B1:0-2 A1:P1,A2:P1"
234
-
"$SETUP_A123_PARTITIONS . C2-3 . . . 0 A1:,A2:2,A3:3 A1:P1,A2:P1,A3:P1"
210
+
"C0-3:P1:S+ C2-3:P1 . . . . . . 0 A1:0-1|A2:2-3|XA2:2-3"
211
+
"C0-3:P1:S+ C2-3:P1 . . C1-3 . . . 0 A1:1|A2:2-3|XA2:2-3"
212
+
"C2-3:P1:S+ C3:P1 . . C3 . . . 0 A1:|A2:3|XA2:3 A1:P1|A2:P1"
213
+
"C2-3:P1:S+ C3:P1 . . C3 P0 . . 0 A1:3|A2:3 A1:P1|A2:P0"
214
+
"C2-3:P1:S+ C2:P1 . . C2-4 . . . 0 A1:3-4|A2:2"
215
+
"C2-3:P1:S+ C3:P1 . . C3 . . C0-2 0 A1:|B1:0-2 A1:P1|A2:P1"
216
+
"$SETUP_A123_PARTITIONS . C2-3 . . . 0 A1:|A2:2|A3:3 A1:P1|A2:P1|A3:P1"
235
217
236
218
# CPU offlining cases:
237
-
" C0-1 . . C2-3 S+ C4-5 . O2=0 0 A1:0-1,B1:3"
238
-
"C0-3:P1:S+ C2-3:P1 . . O2=0 . . . 0 A1:0-1,A2:3"
239
-
"C0-3:P1:S+ C2-3:P1 . . O2=0 O2=1 . . 0 A1:0-1,A2:2-3"
240
-
"C0-3:P1:S+ C2-3:P1 . . O1=0 . . . 0 A1:0,A2:2-3"
241
-
"C0-3:P1:S+ C2-3:P1 . . O1=0 O1=1 . . 0 A1:0-1,A2:2-3"
242
-
"C2-3:P1:S+ C3:P1 . . O3=0 O3=1 . . 0 A1:2,A2:3 A1:P1,A2:P1"
243
-
"C2-3:P1:S+ C3:P2 . . O3=0 O3=1 . . 0 A1:2,A2:3 A1:P1,A2:P2"
244
-
"C2-3:P1:S+ C3:P1 . . O2=0 O2=1 . . 0 A1:2,A2:3 A1:P1,A2:P1"
245
-
"C2-3:P1:S+ C3:P2 . . O2=0 O2=1 . . 0 A1:2,A2:3 A1:P1,A2:P2"
246
-
"C2-3:P1:S+ C3:P1 . . O2=0 . . . 0 A1:,A2:3 A1:P1,A2:P1"
247
-
"C2-3:P1:S+ C3:P1 . . O3=0 . . . 0 A1:2,A2: A1:P1,A2:P1"
248
-
"C2-3:P1:S+ C3:P1 . . T:O2=0 . . . 0 A1:3,A2:3 A1:P1,A2:P-1"
249
-
"C2-3:P1:S+ C3:P1 . . . T:O3=0 . . 0 A1:2,A2:2 A1:P1,A2:P-1"
250
-
"$SETUP_A123_PARTITIONS . O1=0 . . . 0 A1:,A2:2,A3:3 A1:P1,A2:P1,A3:P1"
251
-
"$SETUP_A123_PARTITIONS . O2=0 . . . 0 A1:1,A2:,A3:3 A1:P1,A2:P1,A3:P1"
252
-
"$SETUP_A123_PARTITIONS . O3=0 . . . 0 A1:1,A2:2,A3: A1:P1,A2:P1,A3:P1"
253
-
"$SETUP_A123_PARTITIONS . T:O1=0 . . . 0 A1:2-3,A2:2-3,A3:3 A1:P1,A2:P-1,A3:P-1"
254
-
"$SETUP_A123_PARTITIONS . . T:O2=0 . . 0 A1:1,A2:3,A3:3 A1:P1,A2:P1,A3:P-1"
255
-
"$SETUP_A123_PARTITIONS . . . T:O3=0 . 0 A1:1,A2:2,A3:2 A1:P1,A2:P1,A3:P-1"
256
-
"$SETUP_A123_PARTITIONS . T:O1=0 O1=1 . . 0 A1:1,A2:2,A3:3 A1:P1,A2:P1,A3:P1"
257
-
"$SETUP_A123_PARTITIONS . . T:O2=0 O2=1 . 0 A1:1,A2:2,A3:3 A1:P1,A2:P1,A3:P1"
258
-
"$SETUP_A123_PARTITIONS . . . T:O3=0 O3=1 0 A1:1,A2:2,A3:3 A1:P1,A2:P1,A3:P1"
259
-
"$SETUP_A123_PARTITIONS . T:O1=0 O2=0 O1=1 . 0 A1:1,A2:,A3:3 A1:P1,A2:P1,A3:P1"
260
-
"$SETUP_A123_PARTITIONS . T:O1=0 O2=0 O2=1 . 0 A1:2-3,A2:2-3,A3:3 A1:P1,A2:P-1,A3:P-1"
219
+
" C0-1 . . C2-3 S+ C4-5 . O2=0 0 A1:0-1|B1:3"
220
+
"C0-3:P1:S+ C2-3:P1 . . O2=0 . . . 0 A1:0-1|A2:3"
221
+
"C0-3:P1:S+ C2-3:P1 . . O2=0 O2=1 . . 0 A1:0-1|A2:2-3"
222
+
"C0-3:P1:S+ C2-3:P1 . . O1=0 . . . 0 A1:0|A2:2-3"
223
+
"C0-3:P1:S+ C2-3:P1 . . O1=0 O1=1 . . 0 A1:0-1|A2:2-3"
224
+
"C2-3:P1:S+ C3:P1 . . O3=0 O3=1 . . 0 A1:2|A2:3 A1:P1|A2:P1"
225
+
"C2-3:P1:S+ C3:P2 . . O3=0 O3=1 . . 0 A1:2|A2:3 A1:P1|A2:P2"
226
+
"C2-3:P1:S+ C3:P1 . . O2=0 O2=1 . . 0 A1:2|A2:3 A1:P1|A2:P1"
227
+
"C2-3:P1:S+ C3:P2 . . O2=0 O2=1 . . 0 A1:2|A2:3 A1:P1|A2:P2"
228
+
"C2-3:P1:S+ C3:P1 . . O2=0 . . . 0 A1:|A2:3 A1:P1|A2:P1"
229
+
"C2-3:P1:S+ C3:P1 . . O3=0 . . . 0 A1:2|A2: A1:P1|A2:P1"
230
+
"C2-3:P1:S+ C3:P1 . . T:O2=0 . . . 0 A1:3|A2:3 A1:P1|A2:P-1"
231
+
"C2-3:P1:S+ C3:P1 . . . T:O3=0 . . 0 A1:2|A2:2 A1:P1|A2:P-1"
232
+
"$SETUP_A123_PARTITIONS . O1=0 . . . 0 A1:|A2:2|A3:3 A1:P1|A2:P1|A3:P1"
233
+
"$SETUP_A123_PARTITIONS . O2=0 . . . 0 A1:1|A2:|A3:3 A1:P1|A2:P1|A3:P1"
234
+
"$SETUP_A123_PARTITIONS . O3=0 . . . 0 A1:1|A2:2|A3: A1:P1|A2:P1|A3:P1"
235
+
"$SETUP_A123_PARTITIONS . T:O1=0 . . . 0 A1:2-3|A2:2-3|A3:3 A1:P1|A2:P-1|A3:P-1"
236
+
"$SETUP_A123_PARTITIONS . . T:O2=0 . . 0 A1:1|A2:3|A3:3 A1:P1|A2:P1|A3:P-1"
237
+
"$SETUP_A123_PARTITIONS . . . T:O3=0 . 0 A1:1|A2:2|A3:2 A1:P1|A2:P1|A3:P-1"
238
+
"$SETUP_A123_PARTITIONS . T:O1=0 O1=1 . . 0 A1:1|A2:2|A3:3 A1:P1|A2:P1|A3:P1"
239
+
"$SETUP_A123_PARTITIONS . . T:O2=0 O2=1 . 0 A1:1|A2:2|A3:3 A1:P1|A2:P1|A3:P1"
240
+
"$SETUP_A123_PARTITIONS . . . T:O3=0 O3=1 0 A1:1|A2:2|A3:3 A1:P1|A2:P1|A3:P1"
241
+
"$SETUP_A123_PARTITIONS . T:O1=0 O2=0 O1=1 . 0 A1:1|A2:|A3:3 A1:P1|A2:P1|A3:P1"
242
+
"$SETUP_A123_PARTITIONS . T:O1=0 O2=0 O2=1 . 0 A1:2-3|A2:2-3|A3:3 A1:P1|A2:P-1|A3:P-1"
261
243
262
244
# old-A1 old-A2 old-A3 old-B1 new-A1 new-A2 new-A3 new-B1 fail ECPUs Pstate ISOLCPUS
263
245
# ------ ------ ------ ------ ------ ------ ------ ------ ---- ----- ------ --------
264
246
#
265
247
# Remote partition and cpuset.cpus.exclusive tests
266
248
#
267
-
" C0-3:S+ C1-3:S+ C2-3 . X2-3 . . . 0 A1:0-3,A2:1-3,A3:2-3,XA1:2-3"
268
-
" C0-3:S+ C1-3:S+ C2-3 . X2-3 X2-3:P2 . . 0 A1:0-1,A2:2-3,A3:2-3 A1:P0,A2:P2 2-3"
269
-
" C0-3:S+ C1-3:S+ C2-3 . X2-3 X3:P2 . . 0 A1:0-2,A2:3,A3:3 A1:P0,A2:P2 3"
270
-
" C0-3:S+ C1-3:S+ C2-3 . X2-3 X2-3 X2-3:P2 . 0 A1:0-1,A2:1,A3:2-3 A1:P0,A3:P2 2-3"
271
-
" C0-3:S+ C1-3:S+ C2-3 . X2-3 X2-3 X2-3:P2:C3 . 0 A1:0-1,A2:1,A3:2-3 A1:P0,A3:P2 2-3"
272
-
" C0-3:S+ C1-3:S+ C2-3 C2-3 . . . P2 0 A1:0-3,A2:1-3,A3:2-3,B1:2-3 A1:P0,A3:P0,B1:P-2"
249
+
" C0-3:S+ C1-3:S+ C2-3 . X2-3 . . . 0 A1:0-3|A2:1-3|A3:2-3|XA1:2-3"
250
+
" C0-3:S+ C1-3:S+ C2-3 . X2-3 X2-3:P2 . . 0 A1:0-1|A2:2-3|A3:2-3 A1:P0|A2:P2 2-3"
251
+
" C0-3:S+ C1-3:S+ C2-3 . X2-3 X3:P2 . . 0 A1:0-2|A2:3|A3:3 A1:P0|A2:P2 3"
252
+
" C0-3:S+ C1-3:S+ C2-3 . X2-3 X2-3 X2-3:P2 . 0 A1:0-1|A2:1|A3:2-3 A1:P0|A3:P2 2-3"
253
+
" C0-3:S+ C1-3:S+ C2-3 . X2-3 X2-3 X2-3:P2:C3 . 0 A1:0-1|A2:1|A3:2-3 A1:P0|A3:P2 2-3"
254
+
" C0-3:S+ C1-3:S+ C2-3 C2-3 . . . P2 0 A1:0-3|A2:1-3|A3:2-3|B1:2-3 A1:P0|A3:P0|B1:P-2"
273
255
" C0-3:S+ C1-3:S+ C2-3 C4-5 . . . P2 0 B1:4-5 B1:P2 4-5"
274
-
" C0-3:S+ C1-3:S+ C2-3 C4 X2-3 X2-3 X2-3:P2 P2 0 A3:2-3,B1:4 A3:P2,B1:P2 2-4"
275
-
" C0-3:S+ C1-3:S+ C2-3 C4 X2-3 X2-3 X2-3:P2:C1-3 P2 0 A3:2-3,B1:4 A3:P2,B1:P2 2-4"
276
-
" C0-3:S+ C1-3:S+ C2-3 C4 X1-3 X1-3:P2 P2 . 0 A2:1,A3:2-3 A2:P2,A3:P2 1-3"
277
-
" C0-3:S+ C1-3:S+ C2-3 C4 X2-3 X2-3 X2-3:P2 P2:C4-5 0 A3:2-3,B1:4-5 A3:P2,B1:P2 2-5"
278
-
" C4:X0-3:S+ X1-3:S+ X2-3 . . P2 . . 0 A1:4,A2:1-3,A3:1-3 A2:P2 1-3"
279
-
" C4:X0-3:S+ X1-3:S+ X2-3 . . . P2 . 0 A1:4,A2:4,A3:2-3 A3:P2 2-3"
256
+
" C0-3:S+ C1-3:S+ C2-3 C4 X2-3 X2-3 X2-3:P2 P2 0 A3:2-3|B1:4 A3:P2|B1:P2 2-4"
257
+
" C0-3:S+ C1-3:S+ C2-3 C4 X2-3 X2-3 X2-3:P2:C1-3 P2 0 A3:2-3|B1:4 A3:P2|B1:P2 2-4"
258
+
" C0-3:S+ C1-3:S+ C2-3 C4 X1-3 X1-3:P2 P2 . 0 A2:1|A3:2-3 A2:P2|A3:P2 1-3"
259
+
" C0-3:S+ C1-3:S+ C2-3 C4 X2-3 X2-3 X2-3:P2 P2:C4-5 0 A3:2-3|B1:4-5 A3:P2|B1:P2 2-5"
260
+
" C4:X0-3:S+ X1-3:S+ X2-3 . . P2 . . 0 A1:4|A2:1-3|A3:1-3 A2:P2 1-3"
261
+
" C4:X0-3:S+ X1-3:S+ X2-3 . . . P2 . 0 A1:4|A2:4|A3:2-3 A3:P2 2-3"
280
262
281
263
# Nested remote/local partition tests
282
-
" C0-3:S+ C1-3:S+ C2-3 C4-5 X2-3 X2-3:P1 P2 P1 0 A1:0-1,A2:,A3:2-3,B1:4-5 \
283
-
A1:P0,A2:P1,A3:P2,B1:P1 2-3"
284
-
" C0-3:S+ C1-3:S+ C2-3 C4 X2-3 X2-3:P1 P2 P1 0 A1:0-1,A2:,A3:2-3,B1:4 \
285
-
A1:P0,A2:P1,A3:P2,B1:P1 2-4,2-3"
286
-
" C0-3:S+ C1-3:S+ C2-3 C4 X2-3 X2-3:P1 . P1 0 A1:0-1,A2:2-3,A3:2-3,B1:4 \
287
-
A1:P0,A2:P1,A3:P0,B1:P1"
288
-
" C0-3:S+ C1-3:S+ C3 C4 X2-3 X2-3:P1 P2 P1 0 A1:0-1,A2:2,A3:3,B1:4 \
289
-
A1:P0,A2:P1,A3:P2,B1:P1 2-4,3"
290
-
" C0-4:S+ C1-4:S+ C2-4 . X2-4 X2-4:P2 X4:P1 . 0 A1:0-1,A2:2-3,A3:4 \
291
-
A1:P0,A2:P2,A3:P1 2-4,2-3"
292
-
" C0-4:S+ C1-4:S+ C2-4 . X2-4 X2-4:P2 X3-4:P1 . 0 A1:0-1,A2:2,A3:3-4 \
293
-
A1:P0,A2:P2,A3:P1 2"
264
+
" C0-3:S+ C1-3:S+ C2-3 C4-5 X2-3 X2-3:P1 P2 P1 0 A1:0-1|A2:|A3:2-3|B1:4-5 \
265
+
A1:P0|A2:P1|A3:P2|B1:P1 2-3"
266
+
" C0-3:S+ C1-3:S+ C2-3 C4 X2-3 X2-3:P1 P2 P1 0 A1:0-1|A2:|A3:2-3|B1:4 \
267
+
A1:P0|A2:P1|A3:P2|B1:P1 2-4|2-3"
268
+
" C0-3:S+ C1-3:S+ C2-3 C4 X2-3 X2-3:P1 . P1 0 A1:0-1|A2:2-3|A3:2-3|B1:4 \
269
+
A1:P0|A2:P1|A3:P0|B1:P1"
270
+
" C0-3:S+ C1-3:S+ C3 C4 X2-3 X2-3:P1 P2 P1 0 A1:0-1|A2:2|A3:3|B1:4 \
271
+
A1:P0|A2:P1|A3:P2|B1:P1 2-4|3"
272
+
" C0-4:S+ C1-4:S+ C2-4 . X2-4 X2-4:P2 X4:P1 . 0 A1:0-1|A2:2-3|A3:4 \
273
+
A1:P0|A2:P2|A3:P1 2-4|2-3"
274
+
" C0-4:S+ C1-4:S+ C2-4 . X2-4 X2-4:P2 X3-4:P1 . 0 A1:0-1|A2:2|A3:3-4 \
275
+
A1:P0|A2:P2|A3:P1 2"
294
276
" C0-4:X2-4:S+ C1-4:X2-4:S+:P2 C2-4:X4:P1 \
295
-
. . X5 . . 0 A1:0-4,A2:1-4,A3:2-4 \
296
-
A1:P0,A2:P-2,A3:P-1"
277
+
. . X5 . . 0 A1:0-4|A2:1-4|A3:2-4 \
278
+
A1:P0|A2:P-2|A3:P-1 ."
297
279
" C0-4:X2-4:S+ C1-4:X2-4:S+:P2 C2-4:X4:P1 \
298
-
. . . X1 . 0 A1:0-1,A2:2-4,A3:2-4 \
299
-
A1:P0,A2:P2,A3:P-1 2-4"
280
+
. . . X1 . 0 A1:0-1|A2:2-4|A3:2-4 \
281
+
A1:P0|A2:P2|A3:P-1 2-4"
300
282
301
283
# Remote partition offline tests
302
-
" C0-3:S+ C1-3:S+ C2-3 . X2-3 X2-3 X2-3:P2:O2=0 . 0 A1:0-1,A2:1,A3:3 A1:P0,A3:P2 2-3"
303
-
" C0-3:S+ C1-3:S+ C2-3 . X2-3 X2-3 X2-3:P2:O2=0 O2=1 0 A1:0-1,A2:1,A3:2-3 A1:P0,A3:P2 2-3"
304
-
" C0-3:S+ C1-3:S+ C3 . X2-3 X2-3 P2:O3=0 . 0 A1:0-2,A2:1-2,A3: A1:P0,A3:P2 3"
305
-
" C0-3:S+ C1-3:S+ C3 . X2-3 X2-3 T:P2:O3=0 . 0 A1:0-2,A2:1-2,A3:1-2 A1:P0,A3:P-2 3,"
284
+
" C0-3:S+ C1-3:S+ C2-3 . X2-3 X2-3 X2-3:P2:O2=0 . 0 A1:0-1|A2:1|A3:3 A1:P0|A3:P2 2-3"
285
+
" C0-3:S+ C1-3:S+ C2-3 . X2-3 X2-3 X2-3:P2:O2=0 O2=1 0 A1:0-1|A2:1|A3:2-3 A1:P0|A3:P2 2-3"
286
+
" C0-3:S+ C1-3:S+ C3 . X2-3 X2-3 P2:O3=0 . 0 A1:0-2|A2:1-2|A3: A1:P0|A3:P2 3"
287
+
" C0-3:S+ C1-3:S+ C3 . X2-3 X2-3 T:P2:O3=0 . 0 A1:0-2|A2:1-2|A3:1-2 A1:P0|A3:P-2 3|"
306
288
307
289
# An invalidated remote partition cannot self-recover from hotplug
308
-
" C0-3:S+ C1-3:S+ C2 . X2-3 X2-3 T:P2:O2=0 O2=1 0 A1:0-3,A2:1-3,A3:2 A1:P0,A3:P-2"
290
+
" C0-3:S+ C1-3:S+ C2 . X2-3 X2-3 T:P2:O2=0 O2=1 0 A1:0-3|A2:1-3|A3:2 A1:P0|A3:P-2 ."
309
291
310
292
# cpus.exclusive.effective clearing test
311
-
" C0-3:S+ C1-3:S+ C2 . X2-3:X . . . 0 A1:0-3,A2:1-3,A3:2,XA1:"
293
+
" C0-3:S+ C1-3:S+ C2 . X2-3:X . . . 0 A1:0-3|A2:1-3|A3:2|XA1:"
312
294
313
295
# Invalid to valid remote partition transition test
314
-
" C0-3:S+ C1-3 . . . X3:P2 . . 0 A1:0-3,A2:1-3,XA2: A2:P-2"
296
+
" C0-3:S+ C1-3 . . . X3:P2 . . 0 A1:0-3|A2:1-3|XA2: A2:P-2 ."
315
297
" C0-3:S+ C1-3:X3:P2
316
-
. . X2-3 P2 . . 0 A1:0-2,A2:3,XA2:3 A2:P2 3"
298
+
. . X2-3 P2 . . 0 A1:0-2|A2:3|XA2:3 A2:P2 3"
317
299
318
300
# Invalid to valid local partition direct transition tests
319
-
" C1-3:S+:P2 X4:P2 . . . . . . 0 A1:1-3,XA1:1-3,A2:1-3:XA2: A1:P2,A2:P-2 1-3"
320
-
" C1-3:S+:P2 X4:P2 . . . X3:P2 . . 0 A1:1-2,XA1:1-3,A2:3:XA2:3 A1:P2,A2:P2 1-3"
321
-
" C0-3:P2 . . C4-6 C0-4 . . . 0 A1:0-4,B1:4-6 A1:P-2,B1:P0"
322
-
" C0-3:P2 . . C4-6 C0-4:C0-3 . . . 0 A1:0-3,B1:4-6 A1:P2,B1:P0 0-3"
323
-
" C0-3:P2 . . C3-5:C4-5 . . . . 0 A1:0-3,B1:4-5 A1:P2,B1:P0 0-3"
301
+
" C1-3:S+:P2 X4:P2 . . . . . . 0 A1:1-3|XA1:1-3|A2:1-3:XA2: A1:P2|A2:P-2 1-3"
302
+
" C1-3:S+:P2 X4:P2 . . . X3:P2 . . 0 A1:1-2|XA1:1-3|A2:3:XA2:3 A1:P2|A2:P2 1-3"
303
+
" C0-3:P2 . . C4-6 C0-4 . . . 0 A1:0-4|B1:4-6 A1:P-2|B1:P0"
304
+
" C0-3:P2 . . C4-6 C0-4:C0-3 . . . 0 A1:0-3|B1:4-6 A1:P2|B1:P0 0-3"
324
305
325
306
# Local partition invalidation tests
326
307
" C0-3:X1-3:S+:P2 C1-3:X2-3:S+:P2 C2-3:X3:P2 \
327
-
. . . . . 0 A1:1,A2:2,A3:3 A1:P2,A2:P2,A3:P2 1-3"
308
+
. . . . . 0 A1:1|A2:2|A3:3 A1:P2|A2:P2|A3:P2 1-3"
328
309
" C0-3:X1-3:S+:P2 C1-3:X2-3:S+:P2 C2-3:X3:P2 \
329
-
. . X4 . . 0 A1:1-3,A2:1-3,A3:2-3,XA2:,XA3: A1:P2,A2:P-2,A3:P-2 1-3"
310
+
. . X4 . . 0 A1:1-3|A2:1-3|A3:2-3|XA2:|XA3: A1:P2|A2:P-2|A3:P-2 1-3"
330
311
" C0-3:X1-3:S+:P2 C1-3:X2-3:S+:P2 C2-3:X3:P2 \
331
-
. . C4:X . . 0 A1:1-3,A2:1-3,A3:2-3,XA2:,XA3: A1:P2,A2:P-2,A3:P-2 1-3"
312
+
. . C4:X . . 0 A1:1-3|A2:1-3|A3:2-3|XA2:|XA3: A1:P2|A2:P-2|A3:P-2 1-3"
332
313
# Local partition CPU change tests
333
-
" C0-5:S+:P2 C4-5:S+:P1 . . . C3-5 . . 0 A1:0-2,A2:3-5 A1:P2,A2:P1 0-2"
334
-
" C0-5:S+:P2 C4-5:S+:P1 . . C1-5 . . . 0 A1:1-3,A2:4-5 A1:P2,A2:P1 1-3"
314
+
" C0-5:S+:P2 C4-5:S+:P1 . . . C3-5 . . 0 A1:0-2|A2:3-5 A1:P2|A2:P1 0-2"
315
+
" C0-5:S+:P2 C4-5:S+:P1 . . C1-5 . . . 0 A1:1-3|A2:4-5 A1:P2|A2:P1 1-3"
335
316
336
317
# cpus_allowed/exclusive_cpus update tests
337
318
" C0-3:X2-3:S+ C1-3:X2-3:S+ C2-3:X2-3 \
338
-
. X:C4 . P2 . 0 A1:4,A2:4,XA2:,XA3:,A3:4 \
339
-
A1:P0,A3:P-2"
319
+
. X:C4 . P2 . 0 A1:4|A2:4|XA2:|XA3:|A3:4 \
320
+
A1:P0|A3:P-2 ."
340
321
" C0-3:X2-3:S+ C1-3:X2-3:S+ C2-3:X2-3 \
341
-
. X1 . P2 . 0 A1:0-3,A2:1-3,XA1:1,XA2:,XA3:,A3:2-3 \
342
-
A1:P0,A3:P-2"
322
+
. X1 . P2 . 0 A1:0-3|A2:1-3|XA1:1|XA2:|XA3:|A3:2-3 \
323
+
A1:P0|A3:P-2 ."
343
324
" C0-3:X2-3:S+ C1-3:X2-3:S+ C2-3:X2-3 \
344
-
. . X3 P2 . 0 A1:0-2,A2:1-2,XA2:3,XA3:3,A3:3 \
345
-
A1:P0,A3:P2 3"
325
+
. . X3 P2 . 0 A1:0-2|A2:1-2|XA2:3|XA3:3|A3:3 \
326
+
A1:P0|A3:P2 3"
346
327
" C0-3:X2-3:S+ C1-3:X2-3:S+ C2-3:X2-3:P2 \
347
-
. . X3 . . 0 A1:0-3,A2:1-3,XA2:3,XA3:3,A3:2-3 \
348
-
A1:P0,A3:P-2"
328
+
. . X3 . . 0 A1:0-2|A2:1-2|XA2:3|XA3:3|A3:3|XA3:3 \
329
+
A1:P0|A3:P2 3"
349
330
" C0-3:X2-3:S+ C1-3:X2-3:S+ C2-3:X2-3:P2 \
350
-
. X4 . . . 0 A1:0-3,A2:1-3,A3:2-3,XA1:4,XA2:,XA3 \
351
-
A1:P0,A3:P-2"
331
+
. X4 . . . 0 A1:0-3|A2:1-3|A3:2-3|XA1:4|XA2:|XA3 \
332
+
A1:P0|A3:P-2"
352
333
353
334
# old-A1 old-A2 old-A3 old-B1 new-A1 new-A2 new-A3 new-B1 fail ECPUs Pstate ISOLCPUS
354
335
# ------ ------ ------ ------ ------ ------ ------ ------ ---- ----- ------ --------
···
356
339
#
357
340
# Adding CPUs to partition root that are not in parent's
358
341
# cpuset.cpus is allowed, but those extra CPUs are ignored.
359
-
"C2-3:P1:S+ C3:P1 . . . C2-4 . . 0 A1:,A2:2-3 A1:P1,A2:P1"
342
+
"C2-3:P1:S+ C3:P1 . . . C2-4 . . 0 A1:|A2:2-3 A1:P1|A2:P1"
360
343
361
344
# Taking away all CPUs from parent or itself if there are tasks
362
345
# will make the partition invalid.
363
-
"C2-3:P1:S+ C3:P1 . . T C2-3 . . 0 A1:2-3,A2:2-3 A1:P1,A2:P-1"
364
-
" C3:P1:S+ C3 . . T P1 . . 0 A1:3,A2:3 A1:P1,A2:P-1"
365
-
"$SETUP_A123_PARTITIONS . T:C2-3 . . . 0 A1:2-3,A2:2-3,A3:3 A1:P1,A2:P-1,A3:P-1"
366
-
"$SETUP_A123_PARTITIONS . T:C2-3:C1-3 . . . 0 A1:1,A2:2,A3:3 A1:P1,A2:P1,A3:P1"
346
+
"C2-3:P1:S+ C3:P1 . . T C2-3 . . 0 A1:2-3|A2:2-3 A1:P1|A2:P-1"
347
+
" C3:P1:S+ C3 . . T P1 . . 0 A1:3|A2:3 A1:P1|A2:P-1"
348
+
"$SETUP_A123_PARTITIONS . T:C2-3 . . . 0 A1:2-3|A2:2-3|A3:3 A1:P1|A2:P-1|A3:P-1"
349
+
"$SETUP_A123_PARTITIONS . T:C2-3:C1-3 . . . 0 A1:1|A2:2|A3:3 A1:P1|A2:P1|A3:P1"
367
350
368
351
# Changing a partition root to member makes child partitions invalid
369
-
"C2-3:P1:S+ C3:P1 . . P0 . . . 0 A1:2-3,A2:3 A1:P0,A2:P-1"
370
-
"$SETUP_A123_PARTITIONS . C2-3 P0 . . 0 A1:2-3,A2:2-3,A3:3 A1:P1,A2:P0,A3:P-1"
352
+
"C2-3:P1:S+ C3:P1 . . P0 . . . 0 A1:2-3|A2:3 A1:P0|A2:P-1"
353
+
"$SETUP_A123_PARTITIONS . C2-3 P0 . . 0 A1:2-3|A2:2-3|A3:3 A1:P1|A2:P0|A3:P-1"
371
354
372
355
# cpuset.cpus can contains cpus not in parent's cpuset.cpus as long
373
356
# as they overlap.
374
-
"C2-3:P1:S+ . . . . C3-4:P1 . . 0 A1:2,A2:3 A1:P1,A2:P1"
357
+
"C2-3:P1:S+ . . . . C3-4:P1 . . 0 A1:2|A2:3 A1:P1|A2:P1"
375
358
376
359
# Deletion of CPUs distributed to child cgroup is allowed.
377
-
"C0-1:P1:S+ C1 . C2-3 C4-5 . . . 0 A1:4-5,A2:4-5"
360
+
"C0-1:P1:S+ C1 . C2-3 C4-5 . . . 0 A1:4-5|A2:4-5"
378
361
379
362
# To become a valid partition root, cpuset.cpus must overlap parent's
380
363
# cpuset.cpus.
381
-
" C0-1:P1 . . C2-3 S+ C4-5:P1 . . 0 A1:0-1,A2:0-1 A1:P1,A2:P-1"
364
+
" C0-1:P1 . . C2-3 S+ C4-5:P1 . . 0 A1:0-1|A2:0-1 A1:P1|A2:P-1"
382
365
383
366
# Enabling partition with child cpusets is allowed
384
-
" C0-1:S+ C1 . C2-3 P1 . . . 0 A1:0-1,A2:1 A1:P1"
367
+
" C0-1:S+ C1 . C2-3 P1 . . . 0 A1:0-1|A2:1 A1:P1"
385
368
386
-
# A partition root with non-partition root parent is invalid, but it
369
+
# A partition root with non-partition root parent is invalid| but it
387
370
# can be made valid if its parent becomes a partition root too.
388
-
" C0-1:S+ C1 . C2-3 . P2 . . 0 A1:0-1,A2:1 A1:P0,A2:P-2"
389
-
" C0-1:S+ C1:P2 . C2-3 P1 . . . 0 A1:0,A2:1 A1:P1,A2:P2"
371
+
" C0-1:S+ C1 . C2-3 . P2 . . 0 A1:0-1|A2:1 A1:P0|A2:P-2"
372
+
" C0-1:S+ C1:P2 . C2-3 P1 . . . 0 A1:0|A2:1 A1:P1|A2:P2 0-1|1"
390
373
391
374
# A non-exclusive cpuset.cpus change will invalidate partition and its siblings
392
-
" C0-1:P1 . . C2-3 C0-2 . . . 0 A1:0-2,B1:2-3 A1:P-1,B1:P0"
393
-
" C0-1:P1 . . P1:C2-3 C0-2 . . . 0 A1:0-2,B1:2-3 A1:P-1,B1:P-1"
394
-
" C0-1 . . P1:C2-3 C0-2 . . . 0 A1:0-2,B1:2-3 A1:P0,B1:P-1"
375
+
" C0-1:P1 . . C2-3 C0-2 . . . 0 A1:0-2|B1:2-3 A1:P-1|B1:P0"
376
+
" C0-1:P1 . . P1:C2-3 C0-2 . . . 0 A1:0-2|B1:2-3 A1:P-1|B1:P-1"
377
+
" C0-1 . . P1:C2-3 C0-2 . . . 0 A1:0-2|B1:2-3 A1:P0|B1:P-1"
395
378
396
379
# cpuset.cpus can overlap with sibling cpuset.cpus.exclusive but not subsumed by it
397
-
" C0-3 . . C4-5 X5 . . . 0 A1:0-3,B1:4-5"
380
+
" C0-3 . . C4-5 X5 . . . 0 A1:0-3|B1:4-5"
398
381
399
382
# Child partition root that try to take all CPUs from parent partition
400
383
# with tasks will remain invalid.
401
-
" C1-4:P1:S+ P1 . . . . . . 0 A1:1-4,A2:1-4 A1:P1,A2:P-1"
402
-
" C1-4:P1:S+ P1 . . . C1-4 . . 0 A1,A2:1-4 A1:P1,A2:P1"
403
-
" C1-4:P1:S+ P1 . . T C1-4 . . 0 A1:1-4,A2:1-4 A1:P1,A2:P-1"
384
+
" C1-4:P1:S+ P1 . . . . . . 0 A1:1-4|A2:1-4 A1:P1|A2:P-1"
385
+
" C1-4:P1:S+ P1 . . . C1-4 . . 0 A1|A2:1-4 A1:P1|A2:P1"
386
+
" C1-4:P1:S+ P1 . . T C1-4 . . 0 A1:1-4|A2:1-4 A1:P1|A2:P-1"
404
387
405
388
# Clearing of cpuset.cpus with a preset cpuset.cpus.exclusive shouldn't
406
389
# affect cpuset.cpus.exclusive.effective.
407
-
" C1-4:X3:S+ C1:X3 . . . C . . 0 A2:1-4,XA2:3"
390
+
" C1-4:X3:S+ C1:X3 . . . C . . 0 A2:1-4|XA2:3"
391
+
392
+
# cpuset.cpus can contain CPUs that overlap a sibling cpuset with cpus.exclusive
393
+
# but creating a local partition out of it is not allowed. Similarly and change
394
+
# in cpuset.cpus of a local partition that overlaps sibling exclusive CPUs will
395
+
# invalidate it.
396
+
" CX1-4:S+ CX2-4:P2 . C5-6 . . . P1 0 A1:1|A2:2-4|B1:5-6|XB1:5-6 \
397
+
A1:P0|A2:P2:B1:P1 2-4"
398
+
" CX1-4:S+ CX2-4:P2 . C3-6 . . . P1 0 A1:1|A2:2-4|B1:5-6 \
399
+
A1:P0|A2:P2:B1:P-1 2-4"
400
+
" CX1-4:S+ CX2-4:P2 . C5-6 . . . P1:C3-6 0 A1:1|A2:2-4|B1:5-6 \
401
+
A1:P0|A2:P2:B1:P-1 2-4"
408
402
409
403
# old-A1 old-A2 old-A3 old-B1 new-A1 new-A2 new-A3 new-B1 fail ECPUs Pstate ISOLCPUS
410
404
# ------ ------ ------ ------ ------ ------ ------ ------ ---- ----- ------ --------
411
405
# Failure cases:
412
406
413
407
# A task cannot be added to a partition with no cpu
414
-
"C2-3:P1:S+ C3:P1 . . O2=0:T . . . 1 A1:,A2:3 A1:P1,A2:P1"
408
+
"C2-3:P1:S+ C3:P1 . . O2=0:T . . . 1 A1:|A2:3 A1:P1|A2:P1"
415
409
416
410
# Changes to cpuset.cpus.exclusive that violate exclusivity rule is rejected
417
-
" C0-3 . . C4-5 X0-3 . . X3-5 1 A1:0-3,B1:4-5"
411
+
" C0-3 . . C4-5 X0-3 . . X3-5 1 A1:0-3|B1:4-5"
418
412
419
413
# cpuset.cpus cannot be a subset of sibling cpuset.cpus.exclusive
420
-
" C0-3 . . C4-5 X3-5 . . . 1 A1:0-3,B1:4-5"
414
+
" C0-3 . . C4-5 X3-5 . . . 1 A1:0-3|B1:4-5"
415
+
)
416
+
417
+
#
418
+
# Cpuset controller remote partition test matrix.
419
+
#
420
+
# Cgroup test hierarchy
421
+
#
422
+
# root
423
+
# |
424
+
# rtest (cpuset.cpus.exclusive=1-7)
425
+
# |
426
+
# +------+------+
427
+
# | |
428
+
# p1 p2
429
+
# +--+--+ +--+--+
430
+
# | | | |
431
+
# c11 c12 c21 c22
432
+
#
433
+
# REMOTE_TEST_MATRIX uses the same notational convention as TEST_MATRIX.
434
+
# Only CPUs 1-7 should be used.
435
+
#
436
+
REMOTE_TEST_MATRIX=(
437
+
# old-p1 old-p2 old-c11 old-c12 old-c21 old-c22
438
+
# new-p1 new-p2 new-c11 new-c12 new-c21 new-c22 ECPUs Pstate ISOLCPUS
439
+
# ------ ------ ------- ------- ------- ------- ----- ------ --------
440
+
" X1-3:S+ X4-6:S+ X1-2 X3 X4-5 X6 \
441
+
. . P2 P2 P2 P2 c11:1-2|c12:3|c21:4-5|c22:6 \
442
+
c11:P2|c12:P2|c21:P2|c22:P2 1-6"
443
+
" CX1-4:S+ . X1-2:P2 C3 . . \
444
+
. . . C3-4 . . p1:3-4|c11:1-2|c12:3-4 \
445
+
p1:P0|c11:P2|c12:P0 1-2"
446
+
" CX1-4:S+ . X1-2:P2 . . . \
447
+
X2-4 . . . . . p1:1,3-4|c11:2 \
448
+
p1:P0|c11:P2 2"
449
+
" CX1-5:S+ . X1-2:P2 X3-5:P1 . . \
450
+
X2-4 . . . . . p1:1,5|c11:2|c12:3-4 \
451
+
p1:P0|c11:P2|c12:P1 2"
452
+
" CX1-4:S+ . X1-2:P2 X3-4:P1 . . \
453
+
. . X2 . . . p1:1|c11:2|c12:3-4 \
454
+
p1:P0|c11:P2|c12:P1 2"
455
+
# p1 as member, will get its effective CPUs from its parent rtest
456
+
" CX1-4:S+ . X1-2:P2 X3-4:P1 . . \
457
+
. . X1 CX2-4 . . p1:5-7|c11:1|c12:2-4 \
458
+
p1:P0|c11:P2|c12:P1 1"
459
+
" CX1-4:S+ X5-6:P1:S+ . . . . \
460
+
. . X1-2:P2 X4-5:P1 . X1-7:P2 p1:3|c11:1-2|c12:4:c22:5-6 \
461
+
p1:P0|p2:P1|c11:P2|c12:P1|c22:P2 \
462
+
1-2,4-6|1-2,5-6"
421
463
)
422
464
423
465
#
···
529
453
PFILE=$CGRP/cpuset.cpus.partition
530
454
CFILE=$CGRP/cpuset.cpus
531
455
XFILE=$CGRP/cpuset.cpus.exclusive
532
-
S=$(expr substr $CMD 1 1)
533
-
if [[ $S = S ]]
534
-
then
535
-
PREFIX=${CMD#?}
456
+
case $CMD in
457
+
S*) PREFIX=${CMD#?}
536
458
COMM="echo ${PREFIX}${CTRL} > $SFILE"
537
459
eval $COMM $REDIRECT
538
-
elif [[ $S = X ]]
539
-
then
460
+
;;
461
+
X*)
540
462
CPUS=${CMD#?}
541
463
COMM="echo $CPUS > $XFILE"
542
464
eval $COMM $REDIRECT
543
-
elif [[ $S = C ]]
544
-
then
545
-
CPUS=${CMD#?}
465
+
;;
466
+
CX*)
467
+
CPUS=${CMD#??}
468
+
COMM="echo $CPUS > $CFILE; echo $CPUS > $XFILE"
469
+
eval $COMM $REDIRECT
470
+
;;
471
+
C*) CPUS=${CMD#?}
546
472
COMM="echo $CPUS > $CFILE"
547
473
eval $COMM $REDIRECT
548
-
elif [[ $S = P ]]
549
-
then
550
-
VAL=${CMD#?}
474
+
;;
475
+
P*) VAL=${CMD#?}
551
476
case $VAL in
552
477
0) VAL=member
553
478
;;
···
563
486
esac
564
487
COMM="echo $VAL > $PFILE"
565
488
eval $COMM $REDIRECT
566
-
elif [[ $S = O ]]
567
-
then
568
-
VAL=${CMD#?}
489
+
;;
490
+
O*) VAL=${CMD#?}
569
491
write_cpu_online $VAL
570
-
elif [[ $S = T ]]
571
-
then
572
-
COMM="echo 0 > $TFILE"
492
+
;;
493
+
T*) COMM="echo 0 > $TFILE"
573
494
eval $COMM $REDIRECT
574
-
fi
495
+
;;
496
+
*) echo "Unknown command: $CMD"
497
+
exit 1
498
+
;;
499
+
esac
575
500
RET=$?
576
501
[[ $RET -ne 0 ]] && {
577
502
[[ -n "$SHOWERR" ]] && {
···
611
532
}
612
533
613
534
#
614
-
# Return 1 if the list of effective cpus isn't the same as the initial list.
535
+
# Remove all the test cgroup directories
615
536
#
616
537
reset_cgroup_states()
617
538
{
618
539
echo 0 > $CGROUP2/cgroup.procs
619
540
online_cpus
620
-
rmdir A1/A2/A3 A1/A2 A1 B1 > /dev/null 2>&1
621
-
pause 0.02
622
-
set_ctrl_state . R-
623
-
pause 0.01
541
+
rmdir $RESET_LIST > /dev/null 2>&1
624
542
}
625
543
626
544
dump_states()
627
545
{
628
-
for DIR in . A1 A1/A2 A1/A2/A3 B1
546
+
for DIR in $CGROUP_LIST
629
547
do
630
548
CPUS=$DIR/cpuset.cpus
631
549
ECPUS=$DIR/cpuset.cpus.effective
···
642
566
}
643
567
644
568
#
569
+
# Set the actual cgroup directory into $CGRP_DIR
570
+
# $1 - cgroup name
571
+
#
572
+
set_cgroup_dir()
573
+
{
574
+
CGRP_DIR=$1
575
+
[[ $CGRP_DIR = A2 ]] && CGRP_DIR=A1/A2
576
+
[[ $CGRP_DIR = A3 ]] && CGRP_DIR=A1/A2/A3
577
+
[[ $CGRP_DIR = c11 ]] && CGRP_DIR=p1/c11
578
+
[[ $CGRP_DIR = c12 ]] && CGRP_DIR=p1/c12
579
+
[[ $CGRP_DIR = c21 ]] && CGRP_DIR=p2/c21
580
+
[[ $CGRP_DIR = c22 ]] && CGRP_DIR=p2/c22
581
+
}
582
+
583
+
#
645
584
# Check effective cpus
646
-
# $1 - check string, format: <cgroup>:<cpu-list>[,<cgroup>:<cpu-list>]*
585
+
# $1 - check string, format: <cgroup>:<cpu-list>[|<cgroup>:<cpu-list>]*
647
586
#
648
587
check_effective_cpus()
649
588
{
650
589
CHK_STR=$1
651
-
for CHK in $(echo $CHK_STR | sed -e "s/,/ /g")
590
+
for CHK in $(echo $CHK_STR | sed -e "s/|/ /g")
652
591
do
653
592
set -- $(echo $CHK | sed -e "s/:/ /g")
654
593
CGRP=$1
655
-
CPUS=$2
594
+
EXPECTED_CPUS=$2
595
+
ACTUAL_CPUS=
656
596
if [[ $CGRP = X* ]]
657
597
then
658
598
CGRP=${CGRP#X}
···
676
584
else
677
585
FILE=cpuset.cpus.effective
678
586
fi
679
-
[[ $CGRP = A2 ]] && CGRP=A1/A2
680
-
[[ $CGRP = A3 ]] && CGRP=A1/A2/A3
681
-
[[ -e $CGRP/$FILE ]] || return 1
682
-
[[ $CPUS = $(cat $CGRP/$FILE) ]] || return 1
587
+
set_cgroup_dir $CGRP
588
+
[[ -e $CGRP_DIR/$FILE ]] || return 1
589
+
ACTUAL_CPUS=$(cat $CGRP_DIR/$FILE)
590
+
[[ $EXPECTED_CPUS = $ACTUAL_CPUS ]] || return 1
683
591
done
684
592
}
685
593
686
594
#
687
595
# Check cgroup states
688
-
# $1 - check string, format: <cgroup>:<state>[,<cgroup>:<state>]*
596
+
# $1 - check string, format: <cgroup>:<state>[|<cgroup>:<state>]*
689
597
#
690
598
check_cgroup_states()
691
599
{
692
600
CHK_STR=$1
693
-
for CHK in $(echo $CHK_STR | sed -e "s/,/ /g")
601
+
for CHK in $(echo $CHK_STR | sed -e "s/|/ /g")
694
602
do
695
603
set -- $(echo $CHK | sed -e "s/:/ /g")
696
604
CGRP=$1
697
-
CGRP_DIR=$CGRP
698
-
STATE=$2
605
+
EXPECTED_STATE=$2
699
606
FILE=
700
-
EVAL=$(expr substr $STATE 2 2)
701
-
[[ $CGRP = A2 ]] && CGRP_DIR=A1/A2
702
-
[[ $CGRP = A3 ]] && CGRP_DIR=A1/A2/A3
607
+
EVAL=$(expr substr $EXPECTED_STATE 2 2)
703
608
704
-
case $STATE in
609
+
set_cgroup_dir $CGRP
610
+
case $EXPECTED_STATE in
705
611
P*) FILE=$CGRP_DIR/cpuset.cpus.partition
706
612
;;
707
-
*) echo "Unknown state: $STATE!"
613
+
*) echo "Unknown state: $EXPECTED_STATE!"
708
614
exit 1
709
615
;;
710
616
esac
711
-
VAL=$(cat $FILE)
617
+
ACTUAL_STATE=$(cat $FILE)
712
618
713
-
case "$VAL" in
619
+
case "$ACTUAL_STATE" in
714
620
member) VAL=0
715
621
;;
716
622
root) VAL=1
···
732
642
[[ $VAL -eq 1 && $VERBOSE -gt 0 ]] && {
733
643
DOMS=$(cat $CGRP_DIR/cpuset.cpus.effective)
734
644
[[ -n "$DOMS" ]] &&
735
-
echo " [$CGRP] sched-domain: $DOMS" > $CONSOLE
645
+
echo " [$CGRP_DIR] sched-domain: $DOMS" > $CONSOLE
736
646
}
737
647
done
738
648
return 0
···
755
665
#
756
666
check_isolcpus()
757
667
{
758
-
EXPECT_VAL=$1
759
-
ISOLCPUS=
668
+
EXPECTED_ISOLCPUS=$1
669
+
ISCPUS=${CGROUP2}/cpuset.cpus.isolated
670
+
ISOLCPUS=$(cat $ISCPUS)
760
671
LASTISOLCPU=
761
672
SCHED_DOMAINS=/sys/kernel/debug/sched/domains
762
-
ISCPUS=${CGROUP2}/cpuset.cpus.isolated
763
-
if [[ $EXPECT_VAL = . ]]
673
+
if [[ $EXPECTED_ISOLCPUS = . ]]
764
674
then
765
-
EXPECT_VAL=
766
-
EXPECT_VAL2=
767
-
elif [[ $(expr $EXPECT_VAL : ".*,.*") > 0 ]]
675
+
EXPECTED_ISOLCPUS=
676
+
EXPECTED_SDOMAIN=
677
+
elif [[ $(expr $EXPECTED_ISOLCPUS : ".*|.*") > 0 ]]
768
678
then
769
-
set -- $(echo $EXPECT_VAL | sed -e "s/,/ /g")
770
-
EXPECT_VAL=$1
771
-
EXPECT_VAL2=$2
679
+
set -- $(echo $EXPECTED_ISOLCPUS | sed -e "s/|/ /g")
680
+
EXPECTED_ISOLCPUS=$2
681
+
EXPECTED_SDOMAIN=$1
772
682
else
773
-
EXPECT_VAL2=$EXPECT_VAL
683
+
EXPECTED_SDOMAIN=$EXPECTED_ISOLCPUS
774
684
fi
775
685
776
686
#
···
779
689
# to make appending those CPUs easier.
780
690
#
781
691
[[ -n "$BOOT_ISOLCPUS" ]] && {
782
-
EXPECT_VAL=${EXPECT_VAL:+${EXPECT_VAL},}${BOOT_ISOLCPUS}
783
-
EXPECT_VAL2=${EXPECT_VAL2:+${EXPECT_VAL2},}${BOOT_ISOLCPUS}
692
+
EXPECTED_ISOLCPUS=${EXPECTED_ISOLCPUS:+${EXPECTED_ISOLCPUS},}${BOOT_ISOLCPUS}
693
+
EXPECTED_SDOMAIN=${EXPECTED_SDOMAIN:+${EXPECTED_SDOMAIN},}${BOOT_ISOLCPUS}
784
694
}
785
695
786
696
#
787
697
# Check cpuset.cpus.isolated cpumask
788
698
#
789
-
[[ "$EXPECT_VAL2" != "$ISOLCPUS" ]] && {
699
+
[[ "$EXPECTED_ISOLCPUS" != "$ISOLCPUS" ]] && {
790
700
# Take a 50ms pause and try again
791
701
pause 0.05
792
702
ISOLCPUS=$(cat $ISCPUS)
793
703
}
794
-
[[ "$EXPECT_VAL2" != "$ISOLCPUS" ]] && return 1
704
+
[[ "$EXPECTED_ISOLCPUS" != "$ISOLCPUS" ]] && return 1
795
705
ISOLCPUS=
706
+
EXPECTED_ISOLCPUS=$EXPECTED_SDOMAIN
796
707
797
708
#
798
709
# Use the sched domain in debugfs to check isolated CPUs, if available
···
827
736
done
828
737
[[ "$ISOLCPUS" = *- ]] && ISOLCPUS=${ISOLCPUS}$LASTISOLCPU
829
738
830
-
[[ "$EXPECT_VAL" = "$ISOLCPUS" ]]
739
+
[[ "$EXPECTED_SDOMAIN" = "$ISOLCPUS" ]]
831
740
}
832
741
833
742
test_fail()
···
865
774
}
866
775
867
776
#
777
+
# Check state transition test result
778
+
# $1 - Test number
779
+
# $2 - Expected effective CPU values
780
+
# $3 - Expected partition states
781
+
# $4 - Expected isolated CPUs
782
+
#
783
+
check_test_results()
784
+
{
785
+
_NR=$1
786
+
_ECPUS="$2"
787
+
_PSTATES="$3"
788
+
_ISOLCPUS="$4"
789
+
790
+
[[ -n "$_ECPUS" && "$_ECPUS" != . ]] && {
791
+
check_effective_cpus $_ECPUS
792
+
[[ $? -ne 0 ]] && test_fail $_NR "effective CPU" \
793
+
"Cgroup $CGRP: expected $EXPECTED_CPUS, got $ACTUAL_CPUS"
794
+
}
795
+
796
+
[[ -n "$_PSTATES" && "$_PSTATES" != . ]] && {
797
+
check_cgroup_states $_PSTATES
798
+
[[ $? -ne 0 ]] && test_fail $_NR states \
799
+
"Cgroup $CGRP: expected $EXPECTED_STATE, got $ACTUAL_STATE"
800
+
}
801
+
802
+
# Compare the expected isolated CPUs with the actual ones,
803
+
# if available
804
+
[[ -n "$_ISOLCPUS" ]] && {
805
+
check_isolcpus $_ISOLCPUS
806
+
[[ $? -ne 0 ]] && {
807
+
[[ -n "$BOOT_ISOLCPUS" ]] && _ISOLCPUS=${_ISOLCPUS},${BOOT_ISOLCPUS}
808
+
test_fail $_NR "isolated CPU" \
809
+
"Expect $_ISOLCPUS, get $ISOLCPUS instead"
810
+
}
811
+
}
812
+
reset_cgroup_states
813
+
#
814
+
# Check to see if effective cpu list changes
815
+
#
816
+
_NEWLIST=$(cat $CGROUP2/cpuset.cpus.effective)
817
+
RETRY=0
818
+
while [[ $_NEWLIST != $CPULIST && $RETRY -lt 8 ]]
819
+
do
820
+
# Wait a bit longer & recheck a few times
821
+
pause 0.02
822
+
((RETRY++))
823
+
_NEWLIST=$(cat $CGROUP2/cpuset.cpus.effective)
824
+
done
825
+
[[ $_NEWLIST != $CPULIST ]] && {
826
+
echo "Effective cpus changed to $_NEWLIST after test $_NR!"
827
+
exit 1
828
+
}
829
+
null_isolcpus_check
830
+
[[ $VERBOSE -gt 0 ]] && echo "Test $I done."
831
+
}
832
+
833
+
#
868
834
# Run cpuset state transition test
869
835
# $1 - test matrix name
870
836
#
···
933
785
{
934
786
TEST=$1
935
787
CONTROLLER=cpuset
788
+
CGROUP_LIST=". A1 A1/A2 A1/A2/A3 B1"
789
+
RESET_LIST="A1/A2/A3 A1/A2 A1 B1"
936
790
I=0
937
791
eval CNT="\${#$TEST[@]}"
938
792
···
962
812
STATES=${11}
963
813
ICPUS=${12}
964
814
965
-
set_ctrl_state_noerr B1 $OLD_B1
966
815
set_ctrl_state_noerr A1 $OLD_A1
967
816
set_ctrl_state_noerr A1/A2 $OLD_A2
968
817
set_ctrl_state_noerr A1/A2/A3 $OLD_A3
818
+
set_ctrl_state_noerr B1 $OLD_B1
819
+
969
820
RETVAL=0
970
821
set_ctrl_state A1 $NEW_A1; ((RETVAL += $?))
971
822
set_ctrl_state A1/A2 $NEW_A2; ((RETVAL += $?))
···
975
824
976
825
[[ $RETVAL -ne $RESULT ]] && test_fail $I result
977
826
978
-
[[ -n "$ECPUS" && "$ECPUS" != . ]] && {
979
-
check_effective_cpus $ECPUS
980
-
[[ $? -ne 0 ]] && test_fail $I "effective CPU"
981
-
}
982
-
983
-
[[ -n "$STATES" && "$STATES" != . ]] && {
984
-
check_cgroup_states $STATES
985
-
[[ $? -ne 0 ]] && test_fail $I states
986
-
}
987
-
988
-
# Compare the expected isolated CPUs with the actual ones,
989
-
# if available
990
-
[[ -n "$ICPUS" ]] && {
991
-
check_isolcpus $ICPUS
992
-
[[ $? -ne 0 ]] && {
993
-
[[ -n "$BOOT_ISOLCPUS" ]] && ICPUS=${ICPUS},${BOOT_ISOLCPUS}
994
-
test_fail $I "isolated CPU" \
995
-
"Expect $ICPUS, get $ISOLCPUS instead"
996
-
}
997
-
}
998
-
reset_cgroup_states
999
-
#
1000
-
# Check to see if effective cpu list changes
1001
-
#
1002
-
NEWLIST=$(cat cpuset.cpus.effective)
1003
-
RETRY=0
1004
-
while [[ $NEWLIST != $CPULIST && $RETRY -lt 8 ]]
1005
-
do
1006
-
# Wait a bit longer & recheck a few times
1007
-
pause 0.02
1008
-
((RETRY++))
1009
-
NEWLIST=$(cat cpuset.cpus.effective)
1010
-
done
1011
-
[[ $NEWLIST != $CPULIST ]] && {
1012
-
echo "Effective cpus changed to $NEWLIST after test $I!"
1013
-
exit 1
1014
-
}
1015
-
null_isolcpus_check
1016
-
[[ $VERBOSE -gt 0 ]] && echo "Test $I done."
827
+
check_test_results $I "$ECPUS" "$STATES" "$ICPUS"
1017
828
((I++))
1018
829
done
830
+
echo "All $I tests of $TEST PASSED."
831
+
}
832
+
833
+
#
834
+
# Run cpuset remote partition state transition test
835
+
# $1 - test matrix name
836
+
#
837
+
run_remote_state_test()
838
+
{
839
+
TEST=$1
840
+
CONTROLLER=cpuset
841
+
[[ -d rtest ]] || mkdir rtest
842
+
cd rtest
843
+
echo +cpuset > cgroup.subtree_control
844
+
echo "1-7" > cpuset.cpus
845
+
echo "1-7" > cpuset.cpus.exclusive
846
+
CGROUP_LIST=".. . p1 p2 p1/c11 p1/c12 p2/c21 p2/c22"
847
+
RESET_LIST="p1/c11 p1/c12 p2/c21 p2/c22 p1 p2"
848
+
I=0
849
+
eval CNT="\${#$TEST[@]}"
850
+
851
+
reset_cgroup_states
852
+
console_msg "Running remote partition state transition test ..."
853
+
854
+
while [[ $I -lt $CNT ]]
855
+
do
856
+
echo "Running test $I ..." > $CONSOLE
857
+
[[ $VERBOSE -gt 1 ]] && {
858
+
echo ""
859
+
eval echo \${$TEST[$I]}
860
+
}
861
+
eval set -- "\${$TEST[$I]}"
862
+
OLD_p1=$1
863
+
OLD_p2=$2
864
+
OLD_c11=$3
865
+
OLD_c12=$4
866
+
OLD_c21=$5
867
+
OLD_c22=$6
868
+
NEW_p1=$7
869
+
NEW_p2=$8
870
+
NEW_c11=$9
871
+
NEW_c12=${10}
872
+
NEW_c21=${11}
873
+
NEW_c22=${12}
874
+
ECPUS=${13}
875
+
STATES=${14}
876
+
ICPUS=${15}
877
+
878
+
set_ctrl_state_noerr p1 $OLD_p1
879
+
set_ctrl_state_noerr p2 $OLD_p2
880
+
set_ctrl_state_noerr p1/c11 $OLD_c11
881
+
set_ctrl_state_noerr p1/c12 $OLD_c12
882
+
set_ctrl_state_noerr p2/c21 $OLD_c21
883
+
set_ctrl_state_noerr p2/c22 $OLD_c22
884
+
885
+
RETVAL=0
886
+
set_ctrl_state p1 $NEW_p1 ; ((RETVAL += $?))
887
+
set_ctrl_state p2 $NEW_p2 ; ((RETVAL += $?))
888
+
set_ctrl_state p1/c11 $NEW_c11; ((RETVAL += $?))
889
+
set_ctrl_state p1/c12 $NEW_c12; ((RETVAL += $?))
890
+
set_ctrl_state p2/c21 $NEW_c21; ((RETVAL += $?))
891
+
set_ctrl_state p2/c22 $NEW_c22; ((RETVAL += $?))
892
+
893
+
[[ $RETVAL -ne 0 ]] && test_fail $I result
894
+
895
+
check_test_results $I "$ECPUS" "$STATES" "$ICPUS"
896
+
((I++))
897
+
done
898
+
cd ..
899
+
rmdir rtest
1019
900
echo "All $I tests of $TEST PASSED."
1020
901
}
1021
902
···
1115
932
echo $$ > $CGROUP2/cgroup.procs
1116
933
[[ -d A1 ]] && rmdir A1
1117
934
null_isolcpus_check
935
+
pause 0.05
1118
936
}
1119
937
1120
938
#
···
1181
997
else
1182
998
echo "Inotify test PASSED"
1183
999
fi
1000
+
echo member > cpuset.cpus.partition
1001
+
echo "" > cpuset.cpus
1184
1002
}
1185
1003
1186
1004
trap cleanup 0 2 3 6
1187
1005
run_state_test TEST_MATRIX
1006
+
run_remote_state_test REMOTE_TEST_MATRIX
1188
1007
test_isolated
1189
1008
test_inotify
1190
1009
echo "All tests PASSED."
+32
-1
tools/testing/selftests/drivers/net/hds.py
+32
-1
tools/testing/selftests/drivers/net/hds.py
···
6
6
from lib.py import ksft_run, ksft_exit, ksft_eq, ksft_raises, KsftSkipEx
7
7
from lib.py import CmdExitFailure, EthtoolFamily, NlError
8
8
from lib.py import NetDrvEnv
9
-
from lib.py import defer, ethtool, ip
9
+
from lib.py import defer, ethtool, ip, random
10
10
11
11
12
12
def _get_hds_mode(cfg, netnl) -> str:
···
108
108
raise KsftSkipEx('hds-thresh not supported by device')
109
109
110
110
ksft_eq(0, rings['hds-thresh'])
111
+
112
+
def set_hds_thresh_random(cfg, netnl) -> None:
113
+
try:
114
+
rings = netnl.rings_get({'header': {'dev-index': cfg.ifindex}})
115
+
except NlError as e:
116
+
raise KsftSkipEx('ring-get not supported by device')
117
+
if 'hds-thresh' not in rings:
118
+
raise KsftSkipEx('hds-thresh not supported by device')
119
+
if 'hds-thresh-max' not in rings:
120
+
raise KsftSkipEx('hds-thresh-max not defined by device')
121
+
122
+
if rings['hds-thresh-max'] < 2:
123
+
raise KsftSkipEx('hds-thresh-max is too small')
124
+
elif rings['hds-thresh-max'] == 2:
125
+
hds_thresh = 1
126
+
else:
127
+
while True:
128
+
hds_thresh = random.randint(1, rings['hds-thresh-max'] - 1)
129
+
if hds_thresh != rings['hds-thresh']:
130
+
break
131
+
132
+
try:
133
+
netnl.rings_set({'header': {'dev-index': cfg.ifindex}, 'hds-thresh': hds_thresh})
134
+
except NlError as e:
135
+
if e.error == errno.EINVAL:
136
+
raise KsftSkipEx("hds-thresh-set not supported by the device")
137
+
elif e.error == errno.EOPNOTSUPP:
138
+
raise KsftSkipEx("ring-set not supported by the device")
139
+
rings = netnl.rings_get({'header': {'dev-index': cfg.ifindex}})
140
+
ksft_eq(hds_thresh, rings['hds-thresh'])
111
141
112
142
def set_hds_thresh_max(cfg, netnl) -> None:
113
143
try:
···
273
243
get_hds_thresh,
274
244
set_hds_disable,
275
245
set_hds_enable,
246
+
set_hds_thresh_random,
276
247
set_hds_thresh_zero,
277
248
set_hds_thresh_max,
278
249
set_hds_thresh_gt,
+177
tools/testing/selftests/ftrace/test.d/ftrace/fgraph-multi-filter.tc
+177
tools/testing/selftests/ftrace/test.d/ftrace/fgraph-multi-filter.tc
···
1
+
#!/bin/sh
2
+
# SPDX-License-Identifier: GPL-2.0
3
+
# description: ftrace - function graph filters
4
+
# requires: set_ftrace_filter function_graph:tracer
5
+
6
+
# Make sure that function graph filtering works
7
+
8
+
INSTANCE1="instances/test1_$$"
9
+
INSTANCE2="instances/test2_$$"
10
+
11
+
WD=`pwd`
12
+
13
+
do_reset() {
14
+
cd $WD
15
+
if [ -d $INSTANCE1 ]; then
16
+
echo nop > $INSTANCE1/current_tracer
17
+
rmdir $INSTANCE1
18
+
fi
19
+
if [ -d $INSTANCE2 ]; then
20
+
echo nop > $INSTANCE2/current_tracer
21
+
rmdir $INSTANCE2
22
+
fi
23
+
}
24
+
25
+
mkdir $INSTANCE1
26
+
if ! grep -q function_graph $INSTANCE1/available_tracers; then
27
+
echo "function_graph not allowed with instances"
28
+
rmdir $INSTANCE1
29
+
exit_unsupported
30
+
fi
31
+
32
+
mkdir $INSTANCE2
33
+
34
+
fail() { # msg
35
+
do_reset
36
+
echo $1
37
+
exit_fail
38
+
}
39
+
40
+
disable_tracing
41
+
clear_trace
42
+
43
+
function_count() {
44
+
search=$1
45
+
vsearch=$2
46
+
47
+
if [ -z "$search" ]; then
48
+
cat enabled_functions | wc -l
49
+
elif [ -z "$vsearch" ]; then
50
+
grep $search enabled_functions | wc -l
51
+
else
52
+
grep $search enabled_functions | grep $vsearch| wc -l
53
+
fi
54
+
}
55
+
56
+
set_fgraph() {
57
+
instance=$1
58
+
filter="$2"
59
+
notrace="$3"
60
+
61
+
echo "$filter" > $instance/set_ftrace_filter
62
+
echo "$notrace" > $instance/set_ftrace_notrace
63
+
echo function_graph > $instance/current_tracer
64
+
}
65
+
66
+
check_functions() {
67
+
orig_cnt=$1
68
+
test=$2
69
+
70
+
cnt=`function_count $test`
71
+
if [ $cnt -gt $orig_cnt ]; then
72
+
fail
73
+
fi
74
+
}
75
+
76
+
check_cnt() {
77
+
orig_cnt=$1
78
+
search=$2
79
+
vsearch=$3
80
+
81
+
cnt=`function_count $search $vsearch`
82
+
if [ $cnt -gt $orig_cnt ]; then
83
+
fail
84
+
fi
85
+
}
86
+
87
+
reset_graph() {
88
+
instance=$1
89
+
echo nop > $instance/current_tracer
90
+
}
91
+
92
+
# get any functions that were enabled before the test
93
+
total_cnt=`function_count`
94
+
sched_cnt=`function_count sched`
95
+
lock_cnt=`function_count lock`
96
+
time_cnt=`function_count time`
97
+
clock_cnt=`function_count clock`
98
+
locks_clock_cnt=`function_count locks clock`
99
+
clock_locks_cnt=`function_count clock locks`
100
+
101
+
# Trace functions with "sched" but not "time"
102
+
set_fgraph $INSTANCE1 '*sched*' '*time*'
103
+
104
+
# Make sure "time" isn't listed
105
+
check_functions $time_cnt 'time'
106
+
instance1_cnt=`function_count`
107
+
108
+
# Trace functions with "lock" but not "clock"
109
+
set_fgraph $INSTANCE2 '*lock*' '*clock*'
110
+
instance1_2_cnt=`function_count`
111
+
112
+
# Turn off the first instance
113
+
reset_graph $INSTANCE1
114
+
115
+
# The second instance doesn't trace "clock" functions
116
+
check_functions $clock_cnt 'clock'
117
+
instance2_cnt=`function_count`
118
+
119
+
# Start from a clean slate
120
+
reset_graph $INSTANCE2
121
+
check_functions $total_cnt
122
+
123
+
# Trace functions with "lock" but not "clock"
124
+
set_fgraph $INSTANCE2 '*lock*' '*clock*'
125
+
126
+
# This should match the last time instance 2 was by itself
127
+
cnt=`function_count`
128
+
if [ $instance2_cnt -ne $cnt ]; then
129
+
fail
130
+
fi
131
+
132
+
# And it should not be tracing "clock" functions
133
+
check_functions $clock_cnt 'clock'
134
+
135
+
# Trace functions with "sched" but not "time"
136
+
set_fgraph $INSTANCE1 '*sched*' '*time*'
137
+
138
+
# This should match the last time both instances were enabled
139
+
cnt=`function_count`
140
+
if [ $instance1_2_cnt -ne $cnt ]; then
141
+
fail
142
+
fi
143
+
144
+
# Turn off the second instance
145
+
reset_graph $INSTANCE2
146
+
147
+
# This should match the last time instance 1 was by itself
148
+
cnt=`function_count`
149
+
if [ $instance1_cnt -ne $cnt ]; then
150
+
fail
151
+
fi
152
+
153
+
# And it should not be tracing "time" functions
154
+
check_functions $time_cnt 'time'
155
+
156
+
# Start from a clean slate
157
+
reset_graph $INSTANCE1
158
+
check_functions $total_cnt
159
+
160
+
# Enable all functions but those that have "locks"
161
+
set_fgraph $INSTANCE1 '' '*locks*'
162
+
163
+
# Enable all functions but those that have "clock"
164
+
set_fgraph $INSTANCE2 '' '*clock*'
165
+
166
+
# If a function has "locks" it should not have "clock"
167
+
check_cnt $locks_clock_cnt locks clock
168
+
169
+
# If a function has "clock" it should not have "locks"
170
+
check_cnt $clock_locks_cnt clock locks
171
+
172
+
reset_graph $INSTANCE1
173
+
reset_graph $INSTANCE2
174
+
175
+
do_reset
176
+
177
+
exit 0
+1
-1
tools/testing/selftests/futex/functional/futex_wait_wouldblock.c
+1
-1
tools/testing/selftests/futex/functional/futex_wait_wouldblock.c
···
98
98
info("Calling futex_waitv on f1: %u @ %p with val=%u\n", f1, &f1, f1+1);
99
99
res = futex_waitv(&waitv, 1, 0, &to, CLOCK_MONOTONIC);
100
100
if (!res || errno != EWOULDBLOCK) {
101
-
ksft_test_result_pass("futex_waitv returned: %d %s\n",
101
+
ksft_test_result_fail("futex_waitv returned: %d %s\n",
102
102
res ? errno : res,
103
103
res ? strerror(errno) : "");
104
104
ret = RET_FAIL;
-1
tools/testing/selftests/hid/config.common
-1
tools/testing/selftests/hid/config.common
+1
-1
tools/testing/selftests/kvm/arm64/page_fault_test.c
+1
-1
tools/testing/selftests/kvm/arm64/page_fault_test.c
+61
-6
tools/testing/selftests/kvm/include/arm64/processor.h
+61
-6
tools/testing/selftests/kvm/include/arm64/processor.h
···
62
62
MAIR_ATTRIDX(MAIR_ATTR_NORMAL, MT_NORMAL) | \
63
63
MAIR_ATTRIDX(MAIR_ATTR_NORMAL_WT, MT_NORMAL_WT))
64
64
65
+
/* TCR_EL1 specific flags */
66
+
#define TCR_T0SZ_OFFSET 0
67
+
#define TCR_T0SZ(x) ((UL(64) - (x)) << TCR_T0SZ_OFFSET)
68
+
69
+
#define TCR_IRGN0_SHIFT 8
70
+
#define TCR_IRGN0_MASK (UL(3) << TCR_IRGN0_SHIFT)
71
+
#define TCR_IRGN0_NC (UL(0) << TCR_IRGN0_SHIFT)
72
+
#define TCR_IRGN0_WBWA (UL(1) << TCR_IRGN0_SHIFT)
73
+
#define TCR_IRGN0_WT (UL(2) << TCR_IRGN0_SHIFT)
74
+
#define TCR_IRGN0_WBnWA (UL(3) << TCR_IRGN0_SHIFT)
75
+
76
+
#define TCR_ORGN0_SHIFT 10
77
+
#define TCR_ORGN0_MASK (UL(3) << TCR_ORGN0_SHIFT)
78
+
#define TCR_ORGN0_NC (UL(0) << TCR_ORGN0_SHIFT)
79
+
#define TCR_ORGN0_WBWA (UL(1) << TCR_ORGN0_SHIFT)
80
+
#define TCR_ORGN0_WT (UL(2) << TCR_ORGN0_SHIFT)
81
+
#define TCR_ORGN0_WBnWA (UL(3) << TCR_ORGN0_SHIFT)
82
+
83
+
#define TCR_SH0_SHIFT 12
84
+
#define TCR_SH0_MASK (UL(3) << TCR_SH0_SHIFT)
85
+
#define TCR_SH0_INNER (UL(3) << TCR_SH0_SHIFT)
86
+
87
+
#define TCR_TG0_SHIFT 14
88
+
#define TCR_TG0_MASK (UL(3) << TCR_TG0_SHIFT)
89
+
#define TCR_TG0_4K (UL(0) << TCR_TG0_SHIFT)
90
+
#define TCR_TG0_64K (UL(1) << TCR_TG0_SHIFT)
91
+
#define TCR_TG0_16K (UL(2) << TCR_TG0_SHIFT)
92
+
93
+
#define TCR_IPS_SHIFT 32
94
+
#define TCR_IPS_MASK (UL(7) << TCR_IPS_SHIFT)
95
+
#define TCR_IPS_52_BITS (UL(6) << TCR_IPS_SHIFT)
96
+
#define TCR_IPS_48_BITS (UL(5) << TCR_IPS_SHIFT)
97
+
#define TCR_IPS_40_BITS (UL(2) << TCR_IPS_SHIFT)
98
+
#define TCR_IPS_36_BITS (UL(1) << TCR_IPS_SHIFT)
99
+
100
+
#define TCR_HA (UL(1) << 39)
101
+
#define TCR_DS (UL(1) << 59)
102
+
103
+
/*
104
+
* AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers).
105
+
*/
106
+
#define PTE_ATTRINDX(t) ((t) << 2)
107
+
#define PTE_ATTRINDX_MASK GENMASK(4, 2)
108
+
#define PTE_ATTRINDX_SHIFT 2
109
+
110
+
#define PTE_VALID BIT(0)
111
+
#define PGD_TYPE_TABLE BIT(1)
112
+
#define PUD_TYPE_TABLE BIT(1)
113
+
#define PMD_TYPE_TABLE BIT(1)
114
+
#define PTE_TYPE_PAGE BIT(1)
115
+
116
+
#define PTE_SHARED (UL(3) << 8) /* SH[1:0], inner shareable */
117
+
#define PTE_AF BIT(10)
118
+
119
+
#define PTE_ADDR_MASK(page_shift) GENMASK(47, (page_shift))
120
+
#define PTE_ADDR_51_48 GENMASK(15, 12)
121
+
#define PTE_ADDR_51_48_SHIFT 12
122
+
#define PTE_ADDR_MASK_LPA2(page_shift) GENMASK(49, (page_shift))
123
+
#define PTE_ADDR_51_50_LPA2 GENMASK(9, 8)
124
+
#define PTE_ADDR_51_50_LPA2_SHIFT 8
125
+
65
126
void aarch64_vcpu_setup(struct kvm_vcpu *vcpu, struct kvm_vcpu_init *init);
66
127
struct kvm_vcpu *aarch64_vcpu_add(struct kvm_vm *vm, uint32_t vcpu_id,
67
128
struct kvm_vcpu_init *init, void *guest_code);
···
162
101
(v) == VECTOR_SYNC_CURRENT || \
163
102
(v) == VECTOR_SYNC_LOWER_64 || \
164
103
(v) == VECTOR_SYNC_LOWER_32)
165
-
166
-
/* Access flag */
167
-
#define PTE_AF (1ULL << 10)
168
-
169
-
/* Access flag update enable/disable */
170
-
#define TCR_EL1_HA (1ULL << 39)
171
104
172
105
void aarch64_get_supported_page_sizes(uint32_t ipa, uint32_t *ipa4k,
173
106
uint32_t *ipa16k, uint32_t *ipa64k);
+34
-26
tools/testing/selftests/kvm/lib/arm64/processor.c
+34
-26
tools/testing/selftests/kvm/lib/arm64/processor.c
···
72
72
uint64_t pte;
73
73
74
74
if (use_lpa2_pte_format(vm)) {
75
-
pte = pa & GENMASK(49, vm->page_shift);
76
-
pte |= FIELD_GET(GENMASK(51, 50), pa) << 8;
77
-
attrs &= ~GENMASK(9, 8);
75
+
pte = pa & PTE_ADDR_MASK_LPA2(vm->page_shift);
76
+
pte |= FIELD_GET(GENMASK(51, 50), pa) << PTE_ADDR_51_50_LPA2_SHIFT;
77
+
attrs &= ~PTE_ADDR_51_50_LPA2;
78
78
} else {
79
-
pte = pa & GENMASK(47, vm->page_shift);
79
+
pte = pa & PTE_ADDR_MASK(vm->page_shift);
80
80
if (vm->page_shift == 16)
81
-
pte |= FIELD_GET(GENMASK(51, 48), pa) << 12;
81
+
pte |= FIELD_GET(GENMASK(51, 48), pa) << PTE_ADDR_51_48_SHIFT;
82
82
}
83
83
pte |= attrs;
84
84
···
90
90
uint64_t pa;
91
91
92
92
if (use_lpa2_pte_format(vm)) {
93
-
pa = pte & GENMASK(49, vm->page_shift);
94
-
pa |= FIELD_GET(GENMASK(9, 8), pte) << 50;
93
+
pa = pte & PTE_ADDR_MASK_LPA2(vm->page_shift);
94
+
pa |= FIELD_GET(PTE_ADDR_51_50_LPA2, pte) << 50;
95
95
} else {
96
-
pa = pte & GENMASK(47, vm->page_shift);
96
+
pa = pte & PTE_ADDR_MASK(vm->page_shift);
97
97
if (vm->page_shift == 16)
98
-
pa |= FIELD_GET(GENMASK(15, 12), pte) << 48;
98
+
pa |= FIELD_GET(PTE_ADDR_51_48, pte) << 48;
99
99
}
100
100
101
101
return pa;
···
128
128
static void _virt_pg_map(struct kvm_vm *vm, uint64_t vaddr, uint64_t paddr,
129
129
uint64_t flags)
130
130
{
131
-
uint8_t attr_idx = flags & 7;
131
+
uint8_t attr_idx = flags & (PTE_ATTRINDX_MASK >> PTE_ATTRINDX_SHIFT);
132
+
uint64_t pg_attr;
132
133
uint64_t *ptep;
133
134
134
135
TEST_ASSERT((vaddr % vm->page_size) == 0,
···
148
147
149
148
ptep = addr_gpa2hva(vm, vm->pgd) + pgd_index(vm, vaddr) * 8;
150
149
if (!*ptep)
151
-
*ptep = addr_pte(vm, vm_alloc_page_table(vm), 3);
150
+
*ptep = addr_pte(vm, vm_alloc_page_table(vm),
151
+
PGD_TYPE_TABLE | PTE_VALID);
152
152
153
153
switch (vm->pgtable_levels) {
154
154
case 4:
155
155
ptep = addr_gpa2hva(vm, pte_addr(vm, *ptep)) + pud_index(vm, vaddr) * 8;
156
156
if (!*ptep)
157
-
*ptep = addr_pte(vm, vm_alloc_page_table(vm), 3);
157
+
*ptep = addr_pte(vm, vm_alloc_page_table(vm),
158
+
PUD_TYPE_TABLE | PTE_VALID);
158
159
/* fall through */
159
160
case 3:
160
161
ptep = addr_gpa2hva(vm, pte_addr(vm, *ptep)) + pmd_index(vm, vaddr) * 8;
161
162
if (!*ptep)
162
-
*ptep = addr_pte(vm, vm_alloc_page_table(vm), 3);
163
+
*ptep = addr_pte(vm, vm_alloc_page_table(vm),
164
+
PMD_TYPE_TABLE | PTE_VALID);
163
165
/* fall through */
164
166
case 2:
165
167
ptep = addr_gpa2hva(vm, pte_addr(vm, *ptep)) + pte_index(vm, vaddr) * 8;
···
171
167
TEST_FAIL("Page table levels must be 2, 3, or 4");
172
168
}
173
169
174
-
*ptep = addr_pte(vm, paddr, (attr_idx << 2) | (1 << 10) | 3); /* AF */
170
+
pg_attr = PTE_AF | PTE_ATTRINDX(attr_idx) | PTE_TYPE_PAGE | PTE_VALID;
171
+
if (!use_lpa2_pte_format(vm))
172
+
pg_attr |= PTE_SHARED;
173
+
174
+
*ptep = addr_pte(vm, paddr, pg_attr);
175
175
}
176
176
177
177
void virt_arch_pg_map(struct kvm_vm *vm, uint64_t vaddr, uint64_t paddr)
···
301
293
case VM_MODE_P48V48_64K:
302
294
case VM_MODE_P40V48_64K:
303
295
case VM_MODE_P36V48_64K:
304
-
tcr_el1 |= 1ul << 14; /* TG0 = 64KB */
296
+
tcr_el1 |= TCR_TG0_64K;
305
297
break;
306
298
case VM_MODE_P52V48_16K:
307
299
case VM_MODE_P48V48_16K:
308
300
case VM_MODE_P40V48_16K:
309
301
case VM_MODE_P36V48_16K:
310
302
case VM_MODE_P36V47_16K:
311
-
tcr_el1 |= 2ul << 14; /* TG0 = 16KB */
303
+
tcr_el1 |= TCR_TG0_16K;
312
304
break;
313
305
case VM_MODE_P52V48_4K:
314
306
case VM_MODE_P48V48_4K:
315
307
case VM_MODE_P40V48_4K:
316
308
case VM_MODE_P36V48_4K:
317
-
tcr_el1 |= 0ul << 14; /* TG0 = 4KB */
309
+
tcr_el1 |= TCR_TG0_4K;
318
310
break;
319
311
default:
320
312
TEST_FAIL("Unknown guest mode, mode: 0x%x", vm->mode);
···
327
319
case VM_MODE_P52V48_4K:
328
320
case VM_MODE_P52V48_16K:
329
321
case VM_MODE_P52V48_64K:
330
-
tcr_el1 |= 6ul << 32; /* IPS = 52 bits */
322
+
tcr_el1 |= TCR_IPS_52_BITS;
331
323
ttbr0_el1 |= FIELD_GET(GENMASK(51, 48), vm->pgd) << 2;
332
324
break;
333
325
case VM_MODE_P48V48_4K:
334
326
case VM_MODE_P48V48_16K:
335
327
case VM_MODE_P48V48_64K:
336
-
tcr_el1 |= 5ul << 32; /* IPS = 48 bits */
328
+
tcr_el1 |= TCR_IPS_48_BITS;
337
329
break;
338
330
case VM_MODE_P40V48_4K:
339
331
case VM_MODE_P40V48_16K:
340
332
case VM_MODE_P40V48_64K:
341
-
tcr_el1 |= 2ul << 32; /* IPS = 40 bits */
333
+
tcr_el1 |= TCR_IPS_40_BITS;
342
334
break;
343
335
case VM_MODE_P36V48_4K:
344
336
case VM_MODE_P36V48_16K:
345
337
case VM_MODE_P36V48_64K:
346
338
case VM_MODE_P36V47_16K:
347
-
tcr_el1 |= 1ul << 32; /* IPS = 36 bits */
339
+
tcr_el1 |= TCR_IPS_36_BITS;
348
340
break;
349
341
default:
350
342
TEST_FAIL("Unknown guest mode, mode: 0x%x", vm->mode);
351
343
}
352
344
353
-
sctlr_el1 |= (1 << 0) | (1 << 2) | (1 << 12) /* M | C | I */;
354
-
/* TCR_EL1 |= IRGN0:WBWA | ORGN0:WBWA | SH0:Inner-Shareable */;
355
-
tcr_el1 |= (1 << 8) | (1 << 10) | (3 << 12);
356
-
tcr_el1 |= (64 - vm->va_bits) /* T0SZ */;
345
+
sctlr_el1 |= SCTLR_ELx_M | SCTLR_ELx_C | SCTLR_ELx_I;
346
+
347
+
tcr_el1 |= TCR_IRGN0_WBWA | TCR_ORGN0_WBWA | TCR_SH0_INNER;
348
+
tcr_el1 |= TCR_T0SZ(vm->va_bits);
357
349
if (use_lpa2_pte_format(vm))
358
-
tcr_el1 |= (1ul << 59) /* DS */;
350
+
tcr_el1 |= TCR_DS;
359
351
360
352
vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_SCTLR_EL1), sctlr_el1);
361
353
vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_TCR_EL1), tcr_el1);
-3
tools/testing/selftests/mincore/mincore_selftest.c
-3
tools/testing/selftests/mincore/mincore_selftest.c
+1
tools/testing/selftests/net/.gitignore
+1
tools/testing/selftests/net/.gitignore
+2
tools/testing/selftests/net/Makefile
+2
tools/testing/selftests/net/Makefile
···
106
106
TEST_PROGS += busy_poll_test.sh
107
107
TEST_GEN_PROGS += proc_net_pktgen
108
108
TEST_PROGS += lwt_dst_cache_ref_loop.sh
109
+
TEST_PROGS += skf_net_off.sh
110
+
TEST_GEN_FILES += skf_net_off
109
111
110
112
# YNL files, must be before "include ..lib.mk"
111
113
YNL_GEN_FILES := busy_poller netlink-dumps
+18
tools/testing/selftests/net/mptcp/mptcp_join.sh
+18
tools/testing/selftests/net/mptcp/mptcp_join.sh
···
1441
1441
fi
1442
1442
fi
1443
1443
1444
+
count=$(mptcp_lib_get_counter ${ns2} "MPTcpExtMPJoinSynAckHMacFailure")
1445
+
if [ -z "$count" ]; then
1446
+
rc=${KSFT_SKIP}
1447
+
elif [ "$count" != "0" ]; then
1448
+
rc=${KSFT_FAIL}
1449
+
print_check "synack HMAC"
1450
+
fail_test "got $count JOIN[s] synack HMAC failure expected 0"
1451
+
fi
1452
+
1444
1453
count=$(mptcp_lib_get_counter ${ns1} "MPTcpExtMPJoinAckRx")
1445
1454
if [ -z "$count" ]; then
1446
1455
rc=${KSFT_SKIP}
···
1457
1448
rc=${KSFT_FAIL}
1458
1449
print_check "ack rx"
1459
1450
fail_test "got $count JOIN[s] ack rx expected $ack_nr"
1451
+
fi
1452
+
1453
+
count=$(mptcp_lib_get_counter ${ns1} "MPTcpExtMPJoinAckHMacFailure")
1454
+
if [ -z "$count" ]; then
1455
+
rc=${KSFT_SKIP}
1456
+
elif [ "$count" != "0" ]; then
1457
+
rc=${KSFT_FAIL}
1458
+
print_check "ack HMAC"
1459
+
fail_test "got $count JOIN[s] ack HMAC failure expected 0"
1460
1460
fi
1461
1461
1462
1462
print_results "join Rx" ${rc}
+38
-1
tools/testing/selftests/net/netfilter/nft_concat_range.sh
+38
-1
tools/testing/selftests/net/netfilter/nft_concat_range.sh
···
27
27
net6_port_net6_port net_port_mac_proto_net"
28
28
29
29
# Reported bugs, also described by TYPE_ variables below
30
-
BUGS="flush_remove_add reload net_port_proto_match"
30
+
BUGS="flush_remove_add reload net_port_proto_match avx2_mismatch"
31
31
32
32
# List of possible paths to pktgen script from kernel tree for performance tests
33
33
PKTGEN_SCRIPT_PATHS="
···
387
387
388
388
perf_duration 0
389
389
"
390
+
391
+
TYPE_avx2_mismatch="
392
+
display avx2 false match
393
+
type_spec inet_proto . ipv6_addr
394
+
chain_spec meta l4proto . ip6 daddr
395
+
dst proto addr6
396
+
src
397
+
start 1
398
+
count 1
399
+
src_delta 1
400
+
tools ping
401
+
proto icmp6
402
+
403
+
race_repeat 0
404
+
405
+
perf_duration 0
406
+
"
407
+
408
+
390
409
# Set template for all tests, types and rules are filled in depending on test
391
410
set_template='
392
411
flush ruleset
···
1646
1627
done
1647
1628
1648
1629
nft flush ruleset
1630
+
}
1631
+
1632
+
test_bug_avx2_mismatch()
1633
+
{
1634
+
setup veth send_"${proto}" set || return ${ksft_skip}
1635
+
1636
+
local a1="fe80:dead:01ff:0a02:0b03:6007:8009:a001"
1637
+
local a2="fe80:dead:01fe:0a02:0b03:6007:8009:a001"
1638
+
1639
+
nft "add element inet filter test { icmpv6 . $a1 }"
1640
+
1641
+
dst_addr6="$a2"
1642
+
send_icmp6
1643
+
1644
+
if [ "$(count_packets)" -gt "0" ]; then
1645
+
err "False match for $a2"
1646
+
return 1
1647
+
fi
1649
1648
}
1650
1649
1651
1650
test_reported_issues() {
+244
tools/testing/selftests/net/skf_net_off.c
+244
tools/testing/selftests/net/skf_net_off.c
···
1
+
// SPDX-License-Identifier: GPL-2.0
2
+
3
+
/* Open a tun device.
4
+
*
5
+
* [modifications: use IFF_NAPI_FRAGS, add sk filter]
6
+
*
7
+
* Expects the device to have been configured previously, e.g.:
8
+
* sudo ip tuntap add name tap1 mode tap
9
+
* sudo ip link set tap1 up
10
+
* sudo ip link set dev tap1 addr 02:00:00:00:00:01
11
+
* sudo ip -6 addr add fdab::1 peer fdab::2 dev tap1 nodad
12
+
*
13
+
* And to avoid premature pskb_may_pull:
14
+
*
15
+
* sudo ethtool -K tap1 gro off
16
+
* sudo bash -c 'echo 0 > /proc/sys/net/ipv4/ip_early_demux'
17
+
*/
18
+
19
+
#define _GNU_SOURCE
20
+
21
+
#include <arpa/inet.h>
22
+
#include <errno.h>
23
+
#include <error.h>
24
+
#include <fcntl.h>
25
+
#include <getopt.h>
26
+
#include <linux/filter.h>
27
+
#include <linux/if.h>
28
+
#include <linux/if_packet.h>
29
+
#include <linux/if_tun.h>
30
+
#include <linux/ipv6.h>
31
+
#include <netinet/if_ether.h>
32
+
#include <netinet/in.h>
33
+
#include <netinet/ip.h>
34
+
#include <netinet/ip6.h>
35
+
#include <netinet/udp.h>
36
+
#include <poll.h>
37
+
#include <signal.h>
38
+
#include <stdbool.h>
39
+
#include <stddef.h>
40
+
#include <stdio.h>
41
+
#include <stdlib.h>
42
+
#include <string.h>
43
+
#include <sys/ioctl.h>
44
+
#include <sys/socket.h>
45
+
#include <sys/poll.h>
46
+
#include <sys/types.h>
47
+
#include <sys/uio.h>
48
+
#include <unistd.h>
49
+
50
+
static bool cfg_do_filter;
51
+
static bool cfg_do_frags;
52
+
static int cfg_dst_port = 8000;
53
+
static char *cfg_ifname;
54
+
55
+
static int tun_open(const char *tun_name)
56
+
{
57
+
struct ifreq ifr = {0};
58
+
int fd, ret;
59
+
60
+
fd = open("/dev/net/tun", O_RDWR);
61
+
if (fd == -1)
62
+
error(1, errno, "open /dev/net/tun");
63
+
64
+
ifr.ifr_flags = IFF_TAP;
65
+
if (cfg_do_frags)
66
+
ifr.ifr_flags |= IFF_NAPI | IFF_NAPI_FRAGS;
67
+
68
+
strncpy(ifr.ifr_name, tun_name, IFNAMSIZ - 1);
69
+
70
+
ret = ioctl(fd, TUNSETIFF, &ifr);
71
+
if (ret)
72
+
error(1, ret, "ioctl TUNSETIFF");
73
+
74
+
return fd;
75
+
}
76
+
77
+
static void sk_set_filter(int fd)
78
+
{
79
+
const int offset_proto = offsetof(struct ip6_hdr, ip6_nxt);
80
+
const int offset_dport = sizeof(struct ip6_hdr) + offsetof(struct udphdr, dest);
81
+
82
+
/* Filter UDP packets with destination port cfg_dst_port */
83
+
struct sock_filter filter_code[] = {
84
+
BPF_STMT(BPF_LD + BPF_B + BPF_ABS, SKF_AD_OFF + SKF_AD_PKTTYPE),
85
+
BPF_JUMP(BPF_JMP + BPF_JEQ + BPF_K, PACKET_HOST, 0, 4),
86
+
BPF_STMT(BPF_LD + BPF_B + BPF_ABS, SKF_NET_OFF + offset_proto),
87
+
BPF_JUMP(BPF_JMP + BPF_JEQ + BPF_K, IPPROTO_UDP, 0, 2),
88
+
BPF_STMT(BPF_LD + BPF_H + BPF_ABS, SKF_NET_OFF + offset_dport),
89
+
BPF_JUMP(BPF_JMP + BPF_JEQ + BPF_K, cfg_dst_port, 1, 0),
90
+
BPF_STMT(BPF_RET + BPF_K, 0),
91
+
BPF_STMT(BPF_RET + BPF_K, 0xFFFF),
92
+
};
93
+
94
+
struct sock_fprog filter = {
95
+
sizeof(filter_code) / sizeof(filter_code[0]),
96
+
filter_code,
97
+
};
98
+
99
+
if (setsockopt(fd, SOL_SOCKET, SO_ATTACH_FILTER, &filter, sizeof(filter)))
100
+
error(1, errno, "setsockopt attach filter");
101
+
}
102
+
103
+
static int raw_open(void)
104
+
{
105
+
int fd;
106
+
107
+
fd = socket(PF_INET6, SOCK_RAW, IPPROTO_UDP);
108
+
if (fd == -1)
109
+
error(1, errno, "socket raw (udp)");
110
+
111
+
if (cfg_do_filter)
112
+
sk_set_filter(fd);
113
+
114
+
return fd;
115
+
}
116
+
117
+
static void tun_write(int fd)
118
+
{
119
+
const char eth_src[] = { 0x02, 0x00, 0x00, 0x00, 0x00, 0x02 };
120
+
const char eth_dst[] = { 0x02, 0x00, 0x00, 0x00, 0x00, 0x01 };
121
+
struct tun_pi pi = {0};
122
+
struct ipv6hdr ip6h = {0};
123
+
struct udphdr uh = {0};
124
+
struct ethhdr eth = {0};
125
+
uint32_t payload;
126
+
struct iovec iov[5];
127
+
int ret;
128
+
129
+
pi.proto = htons(ETH_P_IPV6);
130
+
131
+
memcpy(eth.h_source, eth_src, sizeof(eth_src));
132
+
memcpy(eth.h_dest, eth_dst, sizeof(eth_dst));
133
+
eth.h_proto = htons(ETH_P_IPV6);
134
+
135
+
ip6h.version = 6;
136
+
ip6h.payload_len = htons(sizeof(uh) + sizeof(uint32_t));
137
+
ip6h.nexthdr = IPPROTO_UDP;
138
+
ip6h.hop_limit = 8;
139
+
if (inet_pton(AF_INET6, "fdab::2", &ip6h.saddr) != 1)
140
+
error(1, errno, "inet_pton src");
141
+
if (inet_pton(AF_INET6, "fdab::1", &ip6h.daddr) != 1)
142
+
error(1, errno, "inet_pton src");
143
+
144
+
uh.source = htons(8000);
145
+
uh.dest = htons(cfg_dst_port);
146
+
uh.len = ip6h.payload_len;
147
+
uh.check = 0;
148
+
149
+
payload = htonl(0xABABABAB); /* Covered in IPv6 length */
150
+
151
+
iov[0].iov_base = π
152
+
iov[0].iov_len = sizeof(pi);
153
+
iov[1].iov_base = ð
154
+
iov[1].iov_len = sizeof(eth);
155
+
iov[2].iov_base = &ip6h;
156
+
iov[2].iov_len = sizeof(ip6h);
157
+
iov[3].iov_base = &uh;
158
+
iov[3].iov_len = sizeof(uh);
159
+
iov[4].iov_base = &payload;
160
+
iov[4].iov_len = sizeof(payload);
161
+
162
+
ret = writev(fd, iov, sizeof(iov) / sizeof(iov[0]));
163
+
if (ret <= 0)
164
+
error(1, errno, "writev");
165
+
}
166
+
167
+
static void raw_read(int fd)
168
+
{
169
+
struct timeval tv = { .tv_usec = 100 * 1000 };
170
+
struct msghdr msg = {0};
171
+
struct iovec iov[2];
172
+
struct udphdr uh;
173
+
uint32_t payload[2];
174
+
int ret;
175
+
176
+
if (setsockopt(fd, SOL_SOCKET, SO_RCVTIMEO, &tv, sizeof(tv)))
177
+
error(1, errno, "setsockopt rcvtimeo udp");
178
+
179
+
iov[0].iov_base = &uh;
180
+
iov[0].iov_len = sizeof(uh);
181
+
182
+
iov[1].iov_base = payload;
183
+
iov[1].iov_len = sizeof(payload);
184
+
185
+
msg.msg_iov = iov;
186
+
msg.msg_iovlen = sizeof(iov) / sizeof(iov[0]);
187
+
188
+
ret = recvmsg(fd, &msg, 0);
189
+
if (ret <= 0)
190
+
error(1, errno, "read raw");
191
+
if (ret != sizeof(uh) + sizeof(payload[0]))
192
+
error(1, errno, "read raw: len=%d\n", ret);
193
+
194
+
fprintf(stderr, "raw recv: 0x%x\n", payload[0]);
195
+
}
196
+
197
+
static void parse_opts(int argc, char **argv)
198
+
{
199
+
int c;
200
+
201
+
while ((c = getopt(argc, argv, "fFi:")) != -1) {
202
+
switch (c) {
203
+
case 'f':
204
+
cfg_do_filter = true;
205
+
printf("bpf filter enabled\n");
206
+
break;
207
+
case 'F':
208
+
cfg_do_frags = true;
209
+
printf("napi frags mode enabled\n");
210
+
break;
211
+
case 'i':
212
+
cfg_ifname = optarg;
213
+
break;
214
+
default:
215
+
error(1, 0, "unknown option %c", optopt);
216
+
break;
217
+
}
218
+
}
219
+
220
+
if (!cfg_ifname)
221
+
error(1, 0, "must specify tap interface name (-i)");
222
+
}
223
+
224
+
int main(int argc, char **argv)
225
+
{
226
+
int fdt, fdr;
227
+
228
+
parse_opts(argc, argv);
229
+
230
+
fdr = raw_open();
231
+
fdt = tun_open(cfg_ifname);
232
+
233
+
tun_write(fdt);
234
+
raw_read(fdr);
235
+
236
+
if (close(fdt))
237
+
error(1, errno, "close tun");
238
+
if (close(fdr))
239
+
error(1, errno, "close udp");
240
+
241
+
fprintf(stderr, "OK\n");
242
+
return 0;
243
+
}
244
+
+30
tools/testing/selftests/net/skf_net_off.sh
+30
tools/testing/selftests/net/skf_net_off.sh
···
1
+
#!/bin/bash
2
+
# SPDX-License-Identifier: GPL-2.0
3
+
4
+
readonly NS="ns-$(mktemp -u XXXXXX)"
5
+
6
+
cleanup() {
7
+
ip netns del $NS
8
+
}
9
+
10
+
ip netns add $NS
11
+
trap cleanup EXIT
12
+
13
+
ip -netns $NS link set lo up
14
+
ip -netns $NS tuntap add name tap1 mode tap
15
+
ip -netns $NS link set tap1 up
16
+
ip -netns $NS link set dev tap1 addr 02:00:00:00:00:01
17
+
ip -netns $NS -6 addr add fdab::1 peer fdab::2 dev tap1 nodad
18
+
ip netns exec $NS ethtool -K tap1 gro off
19
+
20
+
# disable early demux, else udp_v6_early_demux pulls udp header into linear
21
+
ip netns exec $NS sysctl -w net.ipv4.ip_early_demux=0
22
+
23
+
echo "no filter"
24
+
ip netns exec $NS ./skf_net_off -i tap1
25
+
26
+
echo "filter, linear skb (-f)"
27
+
ip netns exec $NS ./skf_net_off -i tap1 -f
28
+
29
+
echo "filter, fragmented skb (-f) (-F)"
30
+
ip netns exec $NS ./skf_net_off -i tap1 -f -F
+36
tools/testing/selftests/net/tls.c
+36
tools/testing/selftests/net/tls.c
···
1753
1753
EXPECT_EQ(memcmp(buf, test_str, send_len), 0);
1754
1754
}
1755
1755
1756
+
TEST_F(tls_basic, disconnect)
1757
+
{
1758
+
char const *test_str = "test_message";
1759
+
int send_len = strlen(test_str) + 1;
1760
+
struct tls_crypto_info_keys key;
1761
+
struct sockaddr_in addr;
1762
+
char buf[20];
1763
+
int ret;
1764
+
1765
+
if (self->notls)
1766
+
return;
1767
+
1768
+
tls_crypto_info_init(TLS_1_3_VERSION, TLS_CIPHER_AES_GCM_128,
1769
+
&key, 0);
1770
+
1771
+
ret = setsockopt(self->fd, SOL_TLS, TLS_TX, &key, key.len);
1772
+
ASSERT_EQ(ret, 0);
1773
+
1774
+
/* Pre-queue the data so that setsockopt parses it but doesn't
1775
+
* dequeue it from the TCP socket. recvmsg would dequeue.
1776
+
*/
1777
+
EXPECT_EQ(send(self->fd, test_str, send_len, 0), send_len);
1778
+
1779
+
ret = setsockopt(self->cfd, SOL_TLS, TLS_RX, &key, key.len);
1780
+
ASSERT_EQ(ret, 0);
1781
+
1782
+
addr.sin_family = AF_UNSPEC;
1783
+
addr.sin_addr.s_addr = htonl(INADDR_ANY);
1784
+
addr.sin_port = 0;
1785
+
ret = connect(self->cfd, &addr, sizeof(addr));
1786
+
EXPECT_EQ(ret, -1);
1787
+
EXPECT_EQ(errno, EOPNOTSUPP);
1788
+
1789
+
EXPECT_EQ(recv(self->cfd, buf, send_len, 0), send_len);
1790
+
}
1791
+
1756
1792
TEST_F(tls, rekey)
1757
1793
{
1758
1794
char const *test_str_1 = "test_message_before_rekey";
+155
tools/testing/selftests/tc-testing/tc-tests/infra/qdiscs.json
+155
tools/testing/selftests/tc-testing/tc-tests/infra/qdiscs.json
···
158
158
"$TC qdisc del dev $DUMMY handle 1: root",
159
159
"$IP addr del 10.10.10.10/24 dev $DUMMY || true"
160
160
]
161
+
},
162
+
{
163
+
"id": "a4bb",
164
+
"name": "Test FQ_CODEL with HTB parent - force packet drop with empty queue",
165
+
"category": [
166
+
"qdisc",
167
+
"fq_codel",
168
+
"htb"
169
+
],
170
+
"plugins": {
171
+
"requires": "nsPlugin"
172
+
},
173
+
"setup": [
174
+
"$IP link set dev $DUMMY up || true",
175
+
"$IP addr add 10.10.10.10/24 dev $DUMMY || true",
176
+
"$TC qdisc add dev $DUMMY handle 1: root htb default 10",
177
+
"$TC class add dev $DUMMY parent 1: classid 1:10 htb rate 1kbit",
178
+
"$TC qdisc add dev $DUMMY parent 1:10 handle 10: fq_codel memory_limit 1 flows 1 target 0.1ms interval 1ms",
179
+
"$TC filter add dev $DUMMY parent 1: protocol ip prio 1 u32 match ip protocol 1 0xff flowid 1:10",
180
+
"ping -c 5 -f -I $DUMMY 10.10.10.1 > /dev/null || true",
181
+
"sleep 0.1"
182
+
],
183
+
"cmdUnderTest": "$TC -s qdisc show dev $DUMMY",
184
+
"expExitCode": "0",
185
+
"verifyCmd": "$TC -s qdisc show dev $DUMMY | grep -A 5 'qdisc fq_codel'",
186
+
"matchPattern": "dropped [1-9][0-9]*",
187
+
"matchCount": "1",
188
+
"teardown": [
189
+
"$TC qdisc del dev $DUMMY handle 1: root",
190
+
"$IP addr del 10.10.10.10/24 dev $DUMMY || true"
191
+
]
192
+
},
193
+
{
194
+
"id": "a4be",
195
+
"name": "Test FQ_CODEL with QFQ parent - force packet drop with empty queue",
196
+
"category": [
197
+
"qdisc",
198
+
"fq_codel",
199
+
"qfq"
200
+
],
201
+
"plugins": {
202
+
"requires": "nsPlugin"
203
+
},
204
+
"setup": [
205
+
"$IP link set dev $DUMMY up || true",
206
+
"$IP addr add 10.10.10.10/24 dev $DUMMY || true",
207
+
"$TC qdisc add dev $DUMMY handle 1: root qfq",
208
+
"$TC class add dev $DUMMY parent 1: classid 1:10 qfq weight 1 maxpkt 1000",
209
+
"$TC qdisc add dev $DUMMY parent 1:10 handle 10: fq_codel memory_limit 1 flows 1 target 0.1ms interval 1ms",
210
+
"$TC filter add dev $DUMMY parent 1: protocol ip prio 1 u32 match ip protocol 1 0xff flowid 1:10",
211
+
"ping -c 10 -s 1000 -f -I $DUMMY 10.10.10.1 > /dev/null || true",
212
+
"sleep 0.1"
213
+
],
214
+
"cmdUnderTest": "$TC -s qdisc show dev $DUMMY",
215
+
"expExitCode": "0",
216
+
"verifyCmd": "$TC -s qdisc show dev $DUMMY | grep -A 5 'qdisc fq_codel'",
217
+
"matchPattern": "dropped [1-9][0-9]*",
218
+
"matchCount": "1",
219
+
"teardown": [
220
+
"$TC qdisc del dev $DUMMY handle 1: root",
221
+
"$IP addr del 10.10.10.10/24 dev $DUMMY || true"
222
+
]
223
+
},
224
+
{
225
+
"id": "a4bf",
226
+
"name": "Test FQ_CODEL with HFSC parent - force packet drop with empty queue",
227
+
"category": [
228
+
"qdisc",
229
+
"fq_codel",
230
+
"hfsc"
231
+
],
232
+
"plugins": {
233
+
"requires": "nsPlugin"
234
+
},
235
+
"setup": [
236
+
"$IP link set dev $DUMMY up || true",
237
+
"$IP addr add 10.10.10.10/24 dev $DUMMY || true",
238
+
"$TC qdisc add dev $DUMMY handle 1: root hfsc default 10",
239
+
"$TC class add dev $DUMMY parent 1: classid 1:10 hfsc sc rate 1kbit ul rate 1kbit",
240
+
"$TC qdisc add dev $DUMMY parent 1:10 handle 10: fq_codel memory_limit 1 flows 1 target 0.1ms interval 1ms",
241
+
"$TC filter add dev $DUMMY parent 1: protocol ip prio 1 u32 match ip protocol 1 0xff flowid 1:10",
242
+
"ping -c 5 -f -I $DUMMY 10.10.10.1 > /dev/null || true",
243
+
"sleep 0.1"
244
+
],
245
+
"cmdUnderTest": "$TC -s qdisc show dev $DUMMY",
246
+
"expExitCode": "0",
247
+
"verifyCmd": "$TC -s qdisc show dev $DUMMY | grep -A 5 'qdisc fq_codel'",
248
+
"matchPattern": "dropped [1-9][0-9]*",
249
+
"matchCount": "1",
250
+
"teardown": [
251
+
"$TC qdisc del dev $DUMMY handle 1: root",
252
+
"$IP addr del 10.10.10.10/24 dev $DUMMY || true"
253
+
]
254
+
},
255
+
{
256
+
"id": "a4c0",
257
+
"name": "Test FQ_CODEL with DRR parent - force packet drop with empty queue",
258
+
"category": [
259
+
"qdisc",
260
+
"fq_codel",
261
+
"drr"
262
+
],
263
+
"plugins": {
264
+
"requires": "nsPlugin"
265
+
},
266
+
"setup": [
267
+
"$IP link set dev $DUMMY up || true",
268
+
"$IP addr add 10.10.10.10/24 dev $DUMMY || true",
269
+
"$TC qdisc add dev $DUMMY handle 1: root drr",
270
+
"$TC class add dev $DUMMY parent 1: classid 1:10 drr quantum 1500",
271
+
"$TC qdisc add dev $DUMMY parent 1:10 handle 10: fq_codel memory_limit 1 flows 1 target 0.1ms interval 1ms",
272
+
"$TC filter add dev $DUMMY parent 1: protocol ip prio 1 u32 match ip protocol 1 0xff flowid 1:10",
273
+
"ping -c 5 -f -I $DUMMY 10.10.10.1 > /dev/null || true",
274
+
"sleep 0.1"
275
+
],
276
+
"cmdUnderTest": "$TC -s qdisc show dev $DUMMY",
277
+
"expExitCode": "0",
278
+
"verifyCmd": "$TC -s qdisc show dev $DUMMY | grep -A 5 'qdisc fq_codel'",
279
+
"matchPattern": "dropped [1-9][0-9]*",
280
+
"matchCount": "1",
281
+
"teardown": [
282
+
"$TC qdisc del dev $DUMMY handle 1: root",
283
+
"$IP addr del 10.10.10.10/24 dev $DUMMY || true"
284
+
]
285
+
},
286
+
{
287
+
"id": "a4c1",
288
+
"name": "Test FQ_CODEL with ETS parent - force packet drop with empty queue",
289
+
"category": [
290
+
"qdisc",
291
+
"fq_codel",
292
+
"ets"
293
+
],
294
+
"plugins": {
295
+
"requires": "nsPlugin"
296
+
},
297
+
"setup": [
298
+
"$IP link set dev $DUMMY up || true",
299
+
"$IP addr add 10.10.10.10/24 dev $DUMMY || true",
300
+
"$TC qdisc add dev $DUMMY handle 1: root ets bands 2 strict 1",
301
+
"$TC class change dev $DUMMY parent 1: classid 1:1 ets",
302
+
"$TC qdisc add dev $DUMMY parent 1:1 handle 10: fq_codel memory_limit 1 flows 1 target 0.1ms interval 1ms",
303
+
"$TC filter add dev $DUMMY parent 1: protocol ip prio 1 u32 match ip protocol 1 0xff flowid 1:1",
304
+
"ping -c 5 -f -I $DUMMY 10.10.10.1 > /dev/null || true",
305
+
"sleep 0.1"
306
+
],
307
+
"cmdUnderTest": "$TC -s qdisc show dev $DUMMY",
308
+
"expExitCode": "0",
309
+
"verifyCmd": "$TC -s qdisc show dev $DUMMY | grep -A 5 'qdisc fq_codel'",
310
+
"matchPattern": "dropped [1-9][0-9]*",
311
+
"matchCount": "1",
312
+
"teardown": [
313
+
"$TC qdisc del dev $DUMMY handle 1: root",
314
+
"$IP addr del 10.10.10.10/24 dev $DUMMY || true"
315
+
]
161
316
}
162
317
]
+36
tools/testing/selftests/tc-testing/tc-tests/qdiscs/sfq.json
+36
tools/testing/selftests/tc-testing/tc-tests/qdiscs/sfq.json
···
228
228
"matchCount": "0",
229
229
"teardown": [
230
230
]
231
+
},
232
+
{
233
+
"id": "7f8f",
234
+
"name": "Check that a derived limit of 1 is rejected (limit 2 depth 1 flows 1)",
235
+
"category": [
236
+
"qdisc",
237
+
"sfq"
238
+
],
239
+
"plugins": {
240
+
"requires": "nsPlugin"
241
+
},
242
+
"setup": [],
243
+
"cmdUnderTest": "$TC qdisc add dev $DUMMY handle 1: root sfq limit 2 depth 1 flows 1",
244
+
"expExitCode": "2",
245
+
"verifyCmd": "$TC qdisc show dev $DUMMY",
246
+
"matchPattern": "sfq",
247
+
"matchCount": "0",
248
+
"teardown": []
249
+
},
250
+
{
251
+
"id": "5168",
252
+
"name": "Check that a derived limit of 1 is rejected (limit 2 depth 1 divisor 1)",
253
+
"category": [
254
+
"qdisc",
255
+
"sfq"
256
+
],
257
+
"plugins": {
258
+
"requires": "nsPlugin"
259
+
},
260
+
"setup": [],
261
+
"cmdUnderTest": "$TC qdisc add dev $DUMMY handle 1: root sfq limit 2 depth 1 divisor 1",
262
+
"expExitCode": "2",
263
+
"verifyCmd": "$TC qdisc show dev $DUMMY",
264
+
"matchPattern": "sfq",
265
+
"matchCount": "0",
266
+
"teardown": []
231
267
}
232
268
]
+3
tools/testing/selftests/tpm2/.gitignore
+3
tools/testing/selftests/tpm2/.gitignore
+1
-1
tools/testing/selftests/tpm2/test_smoke.sh
+1
-1
tools/testing/selftests/tpm2/test_smoke.sh
+24
tools/testing/selftests/ublk/test_stripe_04.sh
+24
tools/testing/selftests/ublk/test_stripe_04.sh
···
1
+
#!/bin/bash
2
+
# SPDX-License-Identifier: GPL-2.0
3
+
4
+
. "$(cd "$(dirname "$0")" && pwd)"/test_common.sh
5
+
6
+
TID="stripe_04"
7
+
ERR_CODE=0
8
+
9
+
_prep_test "stripe" "mkfs & mount & umount on zero copy"
10
+
11
+
backfile_0=$(_create_backfile 256M)
12
+
backfile_1=$(_create_backfile 256M)
13
+
dev_id=$(_add_ublk_dev -t stripe -z -q 2 "$backfile_0" "$backfile_1")
14
+
_check_add_dev $TID $? "$backfile_0" "$backfile_1"
15
+
16
+
_mkfs_mount_test /dev/ublkb"${dev_id}"
17
+
ERR_CODE=$?
18
+
19
+
_cleanup_test "stripe"
20
+
21
+
_remove_backfile "$backfile_0"
22
+
_remove_backfile "$backfile_1"
23
+
24
+
_show_result $TID $ERR_CODE