tjh.dev
+49
-15
drivers/clk/at91/clk-usb.c
+49
-15
drivers/clk/at91/clk-usb.c
···
56
return DIV_ROUND_CLOSEST(parent_rate, (usbdiv + 1));
57
}
58
59
-
static long at91sam9x5_clk_usb_round_rate(struct clk_hw *hw, unsigned long rate,
60
-
unsigned long *parent_rate)
61
{
62
-
unsigned long div;
63
64
-
if (!rate)
65
-
return -EINVAL;
66
67
-
if (rate >= *parent_rate)
68
-
return *parent_rate;
69
70
-
div = DIV_ROUND_CLOSEST(*parent_rate, rate);
71
-
if (div > SAM9X5_USB_MAX_DIV + 1)
72
-
div = SAM9X5_USB_MAX_DIV + 1;
73
74
-
return DIV_ROUND_CLOSEST(*parent_rate, div);
75
}
76
77
static int at91sam9x5_clk_usb_set_parent(struct clk_hw *hw, u8 index)
···
154
155
static const struct clk_ops at91sam9x5_usb_ops = {
156
.recalc_rate = at91sam9x5_clk_usb_recalc_rate,
157
-
.round_rate = at91sam9x5_clk_usb_round_rate,
158
.get_parent = at91sam9x5_clk_usb_get_parent,
159
.set_parent = at91sam9x5_clk_usb_set_parent,
160
.set_rate = at91sam9x5_clk_usb_set_rate,
···
192
.disable = at91sam9n12_clk_usb_disable,
193
.is_enabled = at91sam9n12_clk_usb_is_enabled,
194
.recalc_rate = at91sam9x5_clk_usb_recalc_rate,
195
-
.round_rate = at91sam9x5_clk_usb_round_rate,
196
.set_rate = at91sam9x5_clk_usb_set_rate,
197
};
198
···
212
init.ops = &at91sam9x5_usb_ops;
213
init.parent_names = parent_names;
214
init.num_parents = num_parents;
215
-
init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
216
217
usb->hw.init = &init;
218
usb->pmc = pmc;
···
241
init.ops = &at91sam9n12_usb_ops;
242
init.parent_names = &parent_name;
243
init.num_parents = 1;
244
-
init.flags = CLK_SET_RATE_GATE;
245
246
usb->hw.init = &init;
247
usb->pmc = pmc;
···
56
return DIV_ROUND_CLOSEST(parent_rate, (usbdiv + 1));
57
}
58
59
+
static long at91sam9x5_clk_usb_determine_rate(struct clk_hw *hw,
60
+
unsigned long rate,
61
+
unsigned long min_rate,
62
+
unsigned long max_rate,
63
+
unsigned long *best_parent_rate,
64
+
struct clk_hw **best_parent_hw)
65
{
66
+
struct clk *parent = NULL;
67
+
long best_rate = -EINVAL;
68
+
unsigned long tmp_rate;
69
+
int best_diff = -1;
70
+
int tmp_diff;
71
+
int i;
72
73
+
for (i = 0; i < __clk_get_num_parents(hw->clk); i++) {
74
+
int div;
75
76
+
parent = clk_get_parent_by_index(hw->clk, i);
77
+
if (!parent)
78
+
continue;
79
80
+
for (div = 1; div < SAM9X5_USB_MAX_DIV + 2; div++) {
81
+
unsigned long tmp_parent_rate;
82
83
+
tmp_parent_rate = rate * div;
84
+
tmp_parent_rate = __clk_round_rate(parent,
85
+
tmp_parent_rate);
86
+
tmp_rate = DIV_ROUND_CLOSEST(tmp_parent_rate, div);
87
+
if (tmp_rate < rate)
88
+
tmp_diff = rate - tmp_rate;
89
+
else
90
+
tmp_diff = tmp_rate - rate;
91
+
92
+
if (best_diff < 0 || best_diff > tmp_diff) {
93
+
best_rate = tmp_rate;
94
+
best_diff = tmp_diff;
95
+
*best_parent_rate = tmp_parent_rate;
96
+
*best_parent_hw = __clk_get_hw(parent);
97
+
}
98
+
99
+
if (!best_diff || tmp_rate < rate)
100
+
break;
101
+
}
102
+
103
+
if (!best_diff)
104
+
break;
105
+
}
106
+
107
+
return best_rate;
108
}
109
110
static int at91sam9x5_clk_usb_set_parent(struct clk_hw *hw, u8 index)
···
121
122
static const struct clk_ops at91sam9x5_usb_ops = {
123
.recalc_rate = at91sam9x5_clk_usb_recalc_rate,
124
+
.determine_rate = at91sam9x5_clk_usb_determine_rate,
125
.get_parent = at91sam9x5_clk_usb_get_parent,
126
.set_parent = at91sam9x5_clk_usb_set_parent,
127
.set_rate = at91sam9x5_clk_usb_set_rate,
···
159
.disable = at91sam9n12_clk_usb_disable,
160
.is_enabled = at91sam9n12_clk_usb_is_enabled,
161
.recalc_rate = at91sam9x5_clk_usb_recalc_rate,
162
+
.determine_rate = at91sam9x5_clk_usb_determine_rate,
163
.set_rate = at91sam9x5_clk_usb_set_rate,
164
};
165
···
179
init.ops = &at91sam9x5_usb_ops;
180
init.parent_names = parent_names;
181
init.num_parents = num_parents;
182
+
init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
183
+
CLK_SET_RATE_PARENT;
184
185
usb->hw.init = &init;
186
usb->pmc = pmc;
···
207
init.ops = &at91sam9n12_usb_ops;
208
init.parent_names = &parent_name;
209
init.num_parents = 1;
210
+
init.flags = CLK_SET_RATE_GATE | CLK_SET_RATE_PARENT;
211
212
usb->hw.init = &init;
213
usb->pmc = pmc;