ARC: [DeviceTree] Convert some Kconfig items to runtime values

* mem size now runtime configured (prev CONFIG_ARC_PLAT_SDRAM_SIZE)
* core cpu clk runtime configured (prev CONFIG_ARC_PLAT_CLK)

Signed-off-by: Vineet Gupta <[e-mail]>
Cc: Arnd Bergmann <[e-mail]>
Cc: Grant Likely <[e-mail]>

arch/arc/Kconfig

···
 
 #New platform adds here
 
-config ARC_PLAT_CLK
-	int "Clk speed in Hz"
-	default "80000000"
-
 config LINUX_LINK_BASE
 	hex "Linux Link Address"
 	default "0x80000000"
···
 	  However some customers have peripherals mapped at this addr, so
 	  Linux needs to be scooted a bit.
 	  If you don't know what the above means, leave this setting alone.
-
-config ARC_PLAT_SDRAM_SIZE
-	hex "SD RAM Size"
-	default "0x10000000"
-	help
-	  Implies the amount of SDRAM/DRAM Linux is going to claim/own.
-	  The actual memory itself could be larger than this number. But for
-	  all software purposes, this is the amt of memory.
 
 endmenu # "Platform Board Configuration"
 

arch/arc/boot/dts/skeleton.dtsi

···
 
 / {
 	compatible = "snps,arc";
+	clock-frequency = <80000000>;	/* 80 MHZ */
 	#address-cells = <1>;
 	#size-cells = <1>;
 	chosen { };
 	aliases { };
-	memory { device_type = "memory"; reg = <0 0>; };
+	memory {
+		device_type = "memory";
+		reg = <0x00000000 0x10000000>;	/* 256M */
+	};
 };

arch/arc/include/asm/clk.h

···
 	return core_freq;
 }
 
+extern int arc_set_core_freq(unsigned long);
+
 #endif

arch/arc/kernel/clk.c

···
 
 #include <asm/clk.h>
 
-unsigned long core_freq = CONFIG_ARC_PLAT_CLK;
+unsigned long core_freq = 800000000;
+
+/*
+ * As of now we default to device-tree provided clock
+ * In future we can determine this in early boot
+ */
+int arc_set_core_freq(unsigned long freq)
+{
+	core_freq = freq;
+	return 0;
+}

arch/arc/kernel/devtree.c

···
 #include <linux/of.h>
 #include <linux/of_fdt.h>
 #include <asm/prom.h>
+#include <asm/clk.h>
 
 /* called from unflatten_device_tree() to bootstrap devicetree itself */
 void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
···
 	struct boot_param_header *devtree = dt;
 	unsigned long dt_root;
 	char *model, *compat;
+	void *clk;
 	char manufacturer[16];
+	unsigned long len;
 
 	/* check device tree validity */
 	if (be32_to_cpu(devtree->magic) != OF_DT_HEADER)
···
 
 	/* Retrieve various information from the /chosen node */
 	of_scan_flat_dt(early_init_dt_scan_chosen, boot_command_line);
+
+	/* Initialize {size,address}-cells info */
+	of_scan_flat_dt(early_init_dt_scan_root, NULL);
+
+	/* Setup memory, calling early_init_dt_add_memory_arch */
+	of_scan_flat_dt(early_init_dt_scan_memory, NULL);
+
+	clk = of_get_flat_dt_prop(dt_root, "clock-frequency", &len);
+	if (clk)
+		arc_set_core_freq(of_read_ulong(clk, len/4));
 
 	return 0;
 }

arch/arc/mm/init.c

···
 EXPORT_SYMBOL(empty_zero_page);
 
 /* Default tot mem from .config */
-static unsigned long arc_mem_sz = CONFIG_ARC_PLAT_SDRAM_SIZE;
+static unsigned long arc_mem_sz = 0x20000000;  /* some default */
 
 /* User can over-ride above with "mem=nnn[KkMm]" in cmdline */
 static int __init setup_mem_sz(char *str)
···
 
 void __init early_init_dt_add_memory_arch(u64 base, u64 size)
 {
-	pr_err("%s(%llx, %llx)\n", __func__, base, size);
+	arc_mem_sz = size & PAGE_MASK;
+	pr_info("Memory size set via devicetree %ldM\n", TO_MB(arc_mem_sz));
 }
 
 /*
···
 
 	/*
 	 * We do it here, so that memory is correctly instantiated
-	 * even if "mem=xxx" cmline over-ride is not given
+	 * even if "mem=xxx" cmline over-ride is given and/or
+	 * DT has memory node. Each causes an update to @arc_mem_sz
+	 * and we finally add memory one here
 	 */
 	memblock_add(CONFIG_LINUX_LINK_BASE, arc_mem_sz);