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of: Add bindings of hw throttle for Tegra soctherm

Add HW throttle configuration sub-node for soctherm, which
is used to describe the throttle event, and worked as a
cooling device. The "hot" type trip in thermal zone can
be bound to this cooling device, and trigger the throttle
function.

Signed-off-by: Wei Ni <wni@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>

authored by

Wei Ni and committed by
Zhang Rui
44f3d417 c6935931

+119 -2
+119 -2
Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt
··· 10 10 - compatible : For Tegra124, must contain "nvidia,tegra124-soctherm". 11 11 For Tegra132, must contain "nvidia,tegra132-soctherm". 12 12 For Tegra210, must contain "nvidia,tegra210-soctherm". 13 - - reg : Should contain 1 entry: 13 + - reg : Should contain at least 2 entries for each entry in reg-names: 14 14 - SOCTHERM register set 15 + - Tegra CAR register set: Required for Tegra124 and Tegra210. 16 + - CCROC register set: Required for Tegra132. 17 + - reg-names : Should contain at least 2 entries: 18 + - soctherm-reg 19 + - car-reg 20 + - ccroc-reg 15 21 - interrupts : Defines the interrupt used by SOCTHERM 16 22 - clocks : Must contain an entry for each entry in clock-names. 17 23 See ../clocks/clock-bindings.txt for details. ··· 31 25 - #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description 32 26 of this property. See <dt-bindings/thermal/tegra124-soctherm.h> for a 33 27 list of valid values when referring to thermal sensors. 28 + - throttle-cfgs: A sub-node which is a container of configuration for each 29 + hardware throttle events. These events can be set as cooling devices. 30 + * throttle events: Sub-nodes must be named as "light" or "heavy". 31 + Properties: 32 + - nvidia,priority: Each throttles has its own throttle settings, so the 33 + SW need to set priorities for various throttle, the HW arbiter can select 34 + the final throttle settings. 35 + Bigger value indicates higher priority, In general, higher priority 36 + translates to lower target frequency. SW needs to ensure that critical 37 + thermal alarms are given higher priority, and ensure that there is 38 + no race if priority of two vectors is set to the same value. 39 + The range of this value is 1~100. 40 + - nvidia,cpu-throt-percent: This property is for Tegra124 and Tegra210. 41 + It is the throttling depth of pulse skippers, it's the percentage 42 + throttling. 43 + - nvidia,cpu-throt-level: This property is only for Tegra132, it is the 44 + level of pulse skippers, which used to throttle clock frequencies. It 45 + indicates cpu clock throttling depth, and the depth can be programmed. 46 + Must set as following values: 47 + TEGRA_SOCTHERM_THROT_LEVEL_LOW, TEGRA_SOCTHERM_THROT_LEVEL_MED 48 + TEGRA_SOCTHERM_THROT_LEVEL_HIGH, TEGRA_SOCTHERM_THROT_LEVEL_NONE 49 + - #cooling-cells: Should be 1. This cooling device only support on/off state. 50 + See ./thermal.txt for a description of this property. 34 51 35 52 Note: 36 53 - the "critical" type trip points will be set to SOC_THERM hardware as the 37 54 shut down temperature. Once the temperature of this thermal zone is higher 38 55 than it, the system will be shutdown or reset by hardware. 56 + - the "hot" type trip points will be set to SOC_THERM hardware as the throttle 57 + temperature. Once the the temperature of this thermal zone is higher 58 + than it, it will trigger the HW throttle event. 39 59 40 60 Example : 41 61 42 62 soctherm@700e2000 { 43 63 compatible = "nvidia,tegra124-soctherm"; 44 - reg = <0x0 0x700e2000 0x0 0x1000>; 64 + reg = <0x0 0x700e2000 0x0 0x600 /* SOC_THERM reg_base */ 65 + 0x0 0x60006000 0x0 0x400 /* CAR reg_base */ 66 + reg-names = "soctherm-reg", "car-reg"; 45 67 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 46 68 clocks = <&tegra_car TEGRA124_CLK_TSENSOR>, 47 69 <&tegra_car TEGRA124_CLK_SOC_THERM>; ··· 78 44 reset-names = "soctherm"; 79 45 80 46 #thermal-sensor-cells = <1>; 47 + 48 + throttle-cfgs { 49 + /* 50 + * When the "heavy" cooling device triggered, 51 + * the HW will skip cpu clock's pulse in 85% depth 52 + */ 53 + throttle_heavy: heavy { 54 + nvidia,priority = <100>; 55 + nvidia,cpu-throt-percent = <85>; 56 + 57 + #cooling-cells = <1>; 58 + }; 59 + 60 + /* 61 + * When the "light" cooling device triggered, 62 + * the HW will skip cpu clock's pulse in 50% depth 63 + */ 64 + throttle_light: light { 65 + nvidia,priority = <80>; 66 + nvidia,cpu-throt-percent = <50>; 67 + 68 + #cooling-cells = <1>; 69 + }; 70 + 71 + /* 72 + * If these two devices are triggered in same time, the HW throttle 73 + * arbiter will select the highest priority as the final throttle 74 + * settings to skip cpu pulse. 75 + */ 76 + }; 77 + }; 78 + 79 + Example: referring to Tegra132's "reg", "reg-names" and "throttle-cfgs" : 80 + 81 + soctherm@700e2000 { 82 + compatible = "nvidia,tegra132-soctherm"; 83 + reg = <0x0 0x700e2000 0x0 0x600 /* SOC_THERM reg_base */ 84 + 0x0 0x70040000 0x0 0x200>; /* CCROC reg_base */; 85 + reg-names = "soctherm-reg", "ccroc-reg"; 86 + 87 + throttle-cfgs { 88 + /* 89 + * When the "heavy" cooling device triggered, 90 + * the HW will skip cpu clock's pulse in HIGH level 91 + */ 92 + throttle_heavy: heavy { 93 + nvidia,priority = <100>; 94 + nvidia,cpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_HIGH>; 95 + 96 + #cooling-cells = <1>; 97 + }; 98 + 99 + /* 100 + * When the "light" cooling device triggered, 101 + * the HW will skip cpu clock's pulse in MED level 102 + */ 103 + throttle_light: light { 104 + nvidia,priority = <80>; 105 + nvidia,cpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_MED>; 106 + 107 + #cooling-cells = <1>; 108 + }; 109 + 110 + /* 111 + * If these two devices are triggered in same time, the HW throttle 112 + * arbiter will select the highest priority as the final throttle 113 + * settings to skip cpu pulse. 114 + */ 115 + 116 + }; 81 117 }; 82 118 83 119 Example: referring to thermal sensors : ··· 165 61 temperature = <102500>; 166 62 hysteresis = <1000>; 167 63 type = "critical"; 64 + }; 65 + 66 + cpu_throttle_trip: throttle-trip { 67 + temperature = <100000>; 68 + hysteresis = <1000>; 69 + type = "hot"; 70 + }; 71 + }; 72 + 73 + cooling-maps { 74 + map0 { 75 + trip = <&cpu_throttle_trip>; 76 + cooling-device = <&throttle_heavy 1 1>; 168 77 }; 169 78 }; 170 79 };